wl1271_spi.h 4.2 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
  5. * Copyright (C) 2008-2009 Nokia Corporation
  6. *
  7. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. */
  24. #ifndef __WL1271_SPI_H__
  25. #define __WL1271_SPI_H__
  26. #include "wl1271_reg.h"
  27. #define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
  28. #define HW_PARTITION_REGISTERS_ADDR 0x1ffc0
  29. #define HW_PART0_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR)
  30. #define HW_PART0_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 4)
  31. #define HW_PART1_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 8)
  32. #define HW_PART1_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 12)
  33. #define HW_PART2_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 16)
  34. #define HW_PART2_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 20)
  35. #define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
  36. #define HW_ACCESS_REGISTER_SIZE 4
  37. #define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
  38. #define WSPI_CMD_READ 0x40000000
  39. #define WSPI_CMD_WRITE 0x00000000
  40. #define WSPI_CMD_FIXED 0x20000000
  41. #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
  42. #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
  43. #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
  44. #define WSPI_INIT_CMD_CRC_LEN 5
  45. #define WSPI_INIT_CMD_START 0x00
  46. #define WSPI_INIT_CMD_TX 0x40
  47. /* the extra bypass bit is sampled by the TNET as '1' */
  48. #define WSPI_INIT_CMD_BYPASS_BIT 0x80
  49. #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
  50. #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
  51. #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
  52. #define WSPI_INIT_CMD_IOD 0x40
  53. #define WSPI_INIT_CMD_IP 0x20
  54. #define WSPI_INIT_CMD_CS 0x10
  55. #define WSPI_INIT_CMD_WS 0x08
  56. #define WSPI_INIT_CMD_WSPI 0x01
  57. #define WSPI_INIT_CMD_END 0x01
  58. #define WSPI_INIT_CMD_LEN 8
  59. #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
  60. ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
  61. #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
  62. #define OCP_CMD_LOOP 32
  63. #define OCP_CMD_WRITE 0x1
  64. #define OCP_CMD_READ 0x2
  65. #define OCP_READY_MASK BIT(18)
  66. #define OCP_STATUS_MASK (BIT(16) | BIT(17))
  67. #define OCP_STATUS_NO_RESP 0x00000
  68. #define OCP_STATUS_OK 0x10000
  69. #define OCP_STATUS_REQ_FAILED 0x20000
  70. #define OCP_STATUS_RESP_ERROR 0x30000
  71. /* Raw target IO, address is not translated */
  72. void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
  73. size_t len, bool fixed);
  74. void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
  75. size_t len, bool fixed);
  76. /* Translated target IO */
  77. void wl1271_spi_read(struct wl1271 *wl, int addr, void *buf, size_t len,
  78. bool fixed);
  79. void wl1271_spi_write(struct wl1271 *wl, int addr, void *buf, size_t len,
  80. bool fixed);
  81. u32 wl1271_spi_read32(struct wl1271 *wl, int addr);
  82. void wl1271_spi_write32(struct wl1271 *wl, int addr, u32 val);
  83. /* Top Register IO */
  84. void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val);
  85. u16 wl1271_top_reg_read(struct wl1271 *wl, int addr);
  86. /* INIT and RESET words */
  87. void wl1271_spi_reset(struct wl1271 *wl);
  88. void wl1271_spi_init(struct wl1271 *wl);
  89. int wl1271_set_partition(struct wl1271 *wl,
  90. struct wl1271_partition_set *p);
  91. static inline u32 wl1271_raw_read32(struct wl1271 *wl, int addr)
  92. {
  93. wl1271_spi_raw_read(wl, addr, &wl->buffer_32,
  94. sizeof(wl->buffer_32), false);
  95. return wl->buffer_32;
  96. }
  97. static inline void wl1271_raw_write32(struct wl1271 *wl, int addr, u32 val)
  98. {
  99. wl->buffer_32 = val;
  100. wl1271_spi_raw_write(wl, addr, &wl->buffer_32,
  101. sizeof(wl->buffer_32), false);
  102. }
  103. #endif /* __WL1271_SPI_H__ */