dev-sysmmu.c 4.2 KB

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  1. /* linux/arch/arm/mach-exynos4/dev-sysmmu.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * EXYNOS4 - System MMU support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <mach/map.h>
  15. #include <mach/irqs.h>
  16. static struct resource exynos4_sysmmu_resource[] = {
  17. [0] = {
  18. .start = EXYNOS4_PA_SYSMMU_MDMA,
  19. .end = EXYNOS4_PA_SYSMMU_MDMA + SZ_64K - 1,
  20. .flags = IORESOURCE_MEM,
  21. },
  22. [1] = {
  23. .start = IRQ_SYSMMU_MDMA0_0,
  24. .end = IRQ_SYSMMU_MDMA0_0,
  25. .flags = IORESOURCE_IRQ,
  26. },
  27. [2] = {
  28. .start = EXYNOS4_PA_SYSMMU_SSS,
  29. .end = EXYNOS4_PA_SYSMMU_SSS + SZ_64K - 1,
  30. .flags = IORESOURCE_MEM,
  31. },
  32. [3] = {
  33. .start = IRQ_SYSMMU_SSS_0,
  34. .end = IRQ_SYSMMU_SSS_0,
  35. .flags = IORESOURCE_IRQ,
  36. },
  37. [4] = {
  38. .start = EXYNOS4_PA_SYSMMU_FIMC0,
  39. .end = EXYNOS4_PA_SYSMMU_FIMC0 + SZ_64K - 1,
  40. .flags = IORESOURCE_MEM,
  41. },
  42. [5] = {
  43. .start = IRQ_SYSMMU_FIMC0_0,
  44. .end = IRQ_SYSMMU_FIMC0_0,
  45. .flags = IORESOURCE_IRQ,
  46. },
  47. [6] = {
  48. .start = EXYNOS4_PA_SYSMMU_FIMC1,
  49. .end = EXYNOS4_PA_SYSMMU_FIMC1 + SZ_64K - 1,
  50. .flags = IORESOURCE_MEM,
  51. },
  52. [7] = {
  53. .start = IRQ_SYSMMU_FIMC1_0,
  54. .end = IRQ_SYSMMU_FIMC1_0,
  55. .flags = IORESOURCE_IRQ,
  56. },
  57. [8] = {
  58. .start = EXYNOS4_PA_SYSMMU_FIMC2,
  59. .end = EXYNOS4_PA_SYSMMU_FIMC2 + SZ_64K - 1,
  60. .flags = IORESOURCE_MEM,
  61. },
  62. [9] = {
  63. .start = IRQ_SYSMMU_FIMC2_0,
  64. .end = IRQ_SYSMMU_FIMC2_0,
  65. .flags = IORESOURCE_IRQ,
  66. },
  67. [10] = {
  68. .start = EXYNOS4_PA_SYSMMU_FIMC3,
  69. .end = EXYNOS4_PA_SYSMMU_FIMC3 + SZ_64K - 1,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. [11] = {
  73. .start = IRQ_SYSMMU_FIMC3_0,
  74. .end = IRQ_SYSMMU_FIMC3_0,
  75. .flags = IORESOURCE_IRQ,
  76. },
  77. [12] = {
  78. .start = EXYNOS4_PA_SYSMMU_JPEG,
  79. .end = EXYNOS4_PA_SYSMMU_JPEG + SZ_64K - 1,
  80. .flags = IORESOURCE_MEM,
  81. },
  82. [13] = {
  83. .start = IRQ_SYSMMU_JPEG_0,
  84. .end = IRQ_SYSMMU_JPEG_0,
  85. .flags = IORESOURCE_IRQ,
  86. },
  87. [14] = {
  88. .start = EXYNOS4_PA_SYSMMU_FIMD0,
  89. .end = EXYNOS4_PA_SYSMMU_FIMD0 + SZ_64K - 1,
  90. .flags = IORESOURCE_MEM,
  91. },
  92. [15] = {
  93. .start = IRQ_SYSMMU_LCD0_M0_0,
  94. .end = IRQ_SYSMMU_LCD0_M0_0,
  95. .flags = IORESOURCE_IRQ,
  96. },
  97. [16] = {
  98. .start = EXYNOS4_PA_SYSMMU_FIMD1,
  99. .end = EXYNOS4_PA_SYSMMU_FIMD1 + SZ_64K - 1,
  100. .flags = IORESOURCE_MEM,
  101. },
  102. [17] = {
  103. .start = IRQ_SYSMMU_LCD1_M1_0,
  104. .end = IRQ_SYSMMU_LCD1_M1_0,
  105. .flags = IORESOURCE_IRQ,
  106. },
  107. [18] = {
  108. .start = EXYNOS4_PA_SYSMMU_PCIe,
  109. .end = EXYNOS4_PA_SYSMMU_PCIe + SZ_64K - 1,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. [19] = {
  113. .start = IRQ_SYSMMU_PCIE_0,
  114. .end = IRQ_SYSMMU_PCIE_0,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. [20] = {
  118. .start = EXYNOS4_PA_SYSMMU_G2D,
  119. .end = EXYNOS4_PA_SYSMMU_G2D + SZ_64K - 1,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. [21] = {
  123. .start = IRQ_SYSMMU_2D_0,
  124. .end = IRQ_SYSMMU_2D_0,
  125. .flags = IORESOURCE_IRQ,
  126. },
  127. [22] = {
  128. .start = EXYNOS4_PA_SYSMMU_ROTATOR,
  129. .end = EXYNOS4_PA_SYSMMU_ROTATOR + SZ_64K - 1,
  130. .flags = IORESOURCE_MEM,
  131. },
  132. [23] = {
  133. .start = IRQ_SYSMMU_ROTATOR_0,
  134. .end = IRQ_SYSMMU_ROTATOR_0,
  135. .flags = IORESOURCE_IRQ,
  136. },
  137. [24] = {
  138. .start = EXYNOS4_PA_SYSMMU_MDMA2,
  139. .end = EXYNOS4_PA_SYSMMU_MDMA2 + SZ_64K - 1,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. [25] = {
  143. .start = IRQ_SYSMMU_MDMA1_0,
  144. .end = IRQ_SYSMMU_MDMA1_0,
  145. .flags = IORESOURCE_IRQ,
  146. },
  147. [26] = {
  148. .start = EXYNOS4_PA_SYSMMU_TV,
  149. .end = EXYNOS4_PA_SYSMMU_TV + SZ_64K - 1,
  150. .flags = IORESOURCE_MEM,
  151. },
  152. [27] = {
  153. .start = IRQ_SYSMMU_TV_M0_0,
  154. .end = IRQ_SYSMMU_TV_M0_0,
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. [28] = {
  158. .start = EXYNOS4_PA_SYSMMU_MFC_L,
  159. .end = EXYNOS4_PA_SYSMMU_MFC_L + SZ_64K - 1,
  160. .flags = IORESOURCE_MEM,
  161. },
  162. [29] = {
  163. .start = IRQ_SYSMMU_MFC_M0_0,
  164. .end = IRQ_SYSMMU_MFC_M0_0,
  165. .flags = IORESOURCE_IRQ,
  166. },
  167. [30] = {
  168. .start = EXYNOS4_PA_SYSMMU_MFC_R,
  169. .end = EXYNOS4_PA_SYSMMU_MFC_R + SZ_64K - 1,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. [31] = {
  173. .start = IRQ_SYSMMU_MFC_M1_0,
  174. .end = IRQ_SYSMMU_MFC_M1_0,
  175. .flags = IORESOURCE_IRQ,
  176. },
  177. };
  178. struct platform_device exynos4_device_sysmmu = {
  179. .name = "s5p-sysmmu",
  180. .id = 32,
  181. .num_resources = ARRAY_SIZE(exynos4_sysmmu_resource),
  182. .resource = exynos4_sysmmu_resource,
  183. };
  184. EXPORT_SYMBOL(exynos4_device_sysmmu);