cx88-dvb.c 20 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h"
  36. # ifdef HAVE_VP3054_I2C
  37. # include "cx88-vp3054-i2c.h"
  38. # endif
  39. #endif
  40. #ifdef HAVE_CX22702
  41. # include "cx22702.h"
  42. #endif
  43. #ifdef HAVE_OR51132
  44. # include "or51132.h"
  45. #endif
  46. #ifdef HAVE_LGDT330X
  47. # include "lgdt330x.h"
  48. #endif
  49. #ifdef HAVE_NXT200X
  50. # include "nxt200x.h"
  51. #endif
  52. #ifdef HAVE_CX24123
  53. # include "cx24123.h"
  54. #endif
  55. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  56. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  57. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  58. MODULE_LICENSE("GPL");
  59. static unsigned int debug = 0;
  60. module_param(debug, int, 0644);
  61. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  62. #define dprintk(level,fmt, arg...) if (debug >= level) \
  63. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  64. /* ------------------------------------------------------------------ */
  65. static int dvb_buf_setup(struct videobuf_queue *q,
  66. unsigned int *count, unsigned int *size)
  67. {
  68. struct cx8802_dev *dev = q->priv_data;
  69. dev->ts_packet_size = 188 * 4;
  70. dev->ts_packet_count = 32;
  71. *size = dev->ts_packet_size * dev->ts_packet_count;
  72. *count = 32;
  73. return 0;
  74. }
  75. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  76. enum v4l2_field field)
  77. {
  78. struct cx8802_dev *dev = q->priv_data;
  79. return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb,field);
  80. }
  81. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  82. {
  83. struct cx8802_dev *dev = q->priv_data;
  84. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  85. }
  86. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  87. {
  88. struct cx8802_dev *dev = q->priv_data;
  89. cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
  90. }
  91. static struct videobuf_queue_ops dvb_qops = {
  92. .buf_setup = dvb_buf_setup,
  93. .buf_prepare = dvb_buf_prepare,
  94. .buf_queue = dvb_buf_queue,
  95. .buf_release = dvb_buf_release,
  96. };
  97. /* ------------------------------------------------------------------ */
  98. #ifdef HAVE_MT352
  99. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  100. {
  101. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  102. static u8 reset [] = { RESET, 0x80 };
  103. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  104. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  105. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  106. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  107. mt352_write(fe, clock_config, sizeof(clock_config));
  108. udelay(200);
  109. mt352_write(fe, reset, sizeof(reset));
  110. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  111. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  112. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  113. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  114. return 0;
  115. }
  116. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  117. {
  118. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  119. static u8 reset [] = { RESET, 0x80 };
  120. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  121. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  122. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  123. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  124. mt352_write(fe, clock_config, sizeof(clock_config));
  125. udelay(200);
  126. mt352_write(fe, reset, sizeof(reset));
  127. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  128. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  129. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  130. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  131. return 0;
  132. }
  133. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  134. {
  135. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  136. static u8 reset [] = { 0x50, 0x80 };
  137. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  138. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  139. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  140. static u8 dntv_extra[] = { 0xB5, 0x7A };
  141. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  142. mt352_write(fe, clock_config, sizeof(clock_config));
  143. udelay(2000);
  144. mt352_write(fe, reset, sizeof(reset));
  145. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  146. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  147. udelay(2000);
  148. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  149. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  150. return 0;
  151. }
  152. static int mt352_pll_set(struct dvb_frontend* fe,
  153. struct dvb_frontend_parameters* params,
  154. u8* pllbuf)
  155. {
  156. struct cx8802_dev *dev= fe->dvb->priv;
  157. pllbuf[0] = dev->core->pll_addr << 1;
  158. dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
  159. params->frequency,
  160. params->u.ofdm.bandwidth);
  161. return 0;
  162. }
  163. static struct mt352_config dvico_fusionhdtv = {
  164. .demod_address = 0x0F,
  165. .demod_init = dvico_fusionhdtv_demod_init,
  166. .pll_set = mt352_pll_set,
  167. };
  168. static struct mt352_config dntv_live_dvbt_config = {
  169. .demod_address = 0x0f,
  170. .demod_init = dntv_live_dvbt_demod_init,
  171. .pll_set = mt352_pll_set,
  172. };
  173. static struct mt352_config dvico_fusionhdtv_dual = {
  174. .demod_address = 0x0F,
  175. .demod_init = dvico_dual_demod_init,
  176. .pll_set = mt352_pll_set,
  177. };
  178. #ifdef HAVE_VP3054_I2C
  179. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  180. {
  181. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  182. static u8 reset [] = { 0x50, 0x80 };
  183. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  184. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  185. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  186. static u8 dntv_extra[] = { 0xB5, 0x7A };
  187. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  188. mt352_write(fe, clock_config, sizeof(clock_config));
  189. udelay(2000);
  190. mt352_write(fe, reset, sizeof(reset));
  191. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  192. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  193. udelay(2000);
  194. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  195. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  196. return 0;
  197. }
  198. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  199. {
  200. struct cx8802_dev *dev= fe->dvb->priv;
  201. /* this message is to set up ATC and ALC */
  202. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  203. struct i2c_msg msg =
  204. { .addr = dev->core->pll_addr, .flags = 0,
  205. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  206. int err;
  207. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  208. if (err < 0)
  209. return err;
  210. else
  211. return -EREMOTEIO;
  212. }
  213. return 0;
  214. }
  215. static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
  216. struct dvb_frontend_parameters* params,
  217. u8* pllbuf)
  218. {
  219. struct cx8802_dev *dev= fe->dvb->priv;
  220. struct i2c_msg msg =
  221. { .addr = dev->core->pll_addr, .flags = 0,
  222. .buf = pllbuf+1, .len = 4 };
  223. int err;
  224. /* Switch PLL to DVB mode */
  225. err = philips_fmd1216_pll_init(fe);
  226. if (err)
  227. return err;
  228. /* Tune PLL */
  229. pllbuf[0] = dev->core->pll_addr << 1;
  230. dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
  231. params->frequency,
  232. params->u.ofdm.bandwidth);
  233. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  234. printk(KERN_WARNING "cx88-dvb: %s error "
  235. "(addr %02x <- %02x, err = %i)\n",
  236. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  237. if (err < 0)
  238. return err;
  239. else
  240. return -EREMOTEIO;
  241. }
  242. return 0;
  243. }
  244. static struct mt352_config dntv_live_dvbt_pro_config = {
  245. .demod_address = 0x0f,
  246. .no_tuner = 1,
  247. .demod_init = dntv_live_dvbt_pro_demod_init,
  248. .pll_set = dntv_live_dvbt_pro_pll_set,
  249. };
  250. #endif
  251. #endif
  252. #ifdef HAVE_CX22702
  253. static struct cx22702_config connexant_refboard_config = {
  254. .demod_address = 0x43,
  255. .output_mode = CX22702_SERIAL_OUTPUT,
  256. .pll_address = 0x60,
  257. .pll_desc = &dvb_pll_thomson_dtt7579,
  258. };
  259. static struct cx22702_config hauppauge_novat_config = {
  260. .demod_address = 0x43,
  261. .output_mode = CX22702_SERIAL_OUTPUT,
  262. .pll_address = 0x61,
  263. .pll_desc = &dvb_pll_thomson_dtt759x,
  264. };
  265. static struct cx22702_config hauppauge_hvr1100_config = {
  266. .demod_address = 0x63,
  267. .output_mode = CX22702_SERIAL_OUTPUT,
  268. .pll_address = 0x61,
  269. .pll_desc = &dvb_pll_fmd1216me,
  270. };
  271. #endif
  272. #ifdef HAVE_OR51132
  273. static int or51132_set_ts_param(struct dvb_frontend* fe,
  274. int is_punctured)
  275. {
  276. struct cx8802_dev *dev= fe->dvb->priv;
  277. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  278. return 0;
  279. }
  280. static struct or51132_config pchdtv_hd3000 = {
  281. .demod_address = 0x15,
  282. .pll_address = 0x61,
  283. .pll_desc = &dvb_pll_thomson_dtt7610,
  284. .set_ts_params = or51132_set_ts_param,
  285. };
  286. #endif
  287. #ifdef HAVE_LGDT330X
  288. static int lgdt330x_pll_set(struct dvb_frontend* fe,
  289. struct dvb_frontend_parameters* params)
  290. {
  291. /* FIXME make this routine use the tuner-simple code.
  292. * It could probably be shared with a number of ATSC
  293. * frontends. Many share the same tuner with analog TV. */
  294. struct cx8802_dev *dev= fe->dvb->priv;
  295. struct cx88_core *core = dev->core;
  296. u8 buf[4];
  297. struct i2c_msg msg =
  298. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  299. int err;
  300. /* Put the analog decoder in standby to keep it quiet */
  301. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  302. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  303. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  304. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  305. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  306. printk(KERN_WARNING "cx88-dvb: %s error "
  307. "(addr %02x <- %02x, err = %i)\n",
  308. __FUNCTION__, buf[0], buf[1], err);
  309. if (err < 0)
  310. return err;
  311. else
  312. return -EREMOTEIO;
  313. }
  314. if (core->tuner_type == TUNER_LG_TDVS_H062F) {
  315. /* Set the Auxiliary Byte. */
  316. buf[2] &= ~0x20;
  317. buf[2] |= 0x18;
  318. buf[3] = 0x50;
  319. i2c_transfer(&core->i2c_adap, &msg, 1);
  320. }
  321. return 0;
  322. }
  323. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  324. {
  325. struct cx8802_dev *dev= fe->dvb->priv;
  326. struct cx88_core *core = dev->core;
  327. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  328. if (index == 0)
  329. cx_clear(MO_GP0_IO, 8);
  330. else
  331. cx_set(MO_GP0_IO, 8);
  332. return 0;
  333. }
  334. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  335. {
  336. struct cx8802_dev *dev= fe->dvb->priv;
  337. if (is_punctured)
  338. dev->ts_gen_cntrl |= 0x04;
  339. else
  340. dev->ts_gen_cntrl &= ~0x04;
  341. return 0;
  342. }
  343. static struct lgdt330x_config fusionhdtv_3_gold = {
  344. .demod_address = 0x0e,
  345. .demod_chip = LGDT3302,
  346. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  347. .pll_set = lgdt330x_pll_set,
  348. .set_ts_params = lgdt330x_set_ts_param,
  349. };
  350. static struct lgdt330x_config fusionhdtv_5_gold = {
  351. .demod_address = 0x0e,
  352. .demod_chip = LGDT3303,
  353. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  354. .pll_set = lgdt330x_pll_set,
  355. .set_ts_params = lgdt330x_set_ts_param,
  356. };
  357. #endif
  358. #ifdef HAVE_NXT200X
  359. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  360. int is_punctured)
  361. {
  362. struct cx8802_dev *dev= fe->dvb->priv;
  363. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  364. return 0;
  365. }
  366. static int nxt200x_set_pll_input(u8* buf, int input)
  367. {
  368. if (input)
  369. buf[3] |= 0x08;
  370. else
  371. buf[3] &= ~0x08;
  372. return 0;
  373. }
  374. static struct nxt200x_config ati_hdtvwonder = {
  375. .demod_address = 0x0a,
  376. .pll_address = 0x61,
  377. .pll_desc = &dvb_pll_tuv1236d,
  378. .set_pll_input = nxt200x_set_pll_input,
  379. .set_ts_params = nxt200x_set_ts_param,
  380. };
  381. #endif
  382. #ifdef HAVE_CX24123
  383. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  384. int is_punctured)
  385. {
  386. struct cx8802_dev *dev= fe->dvb->priv;
  387. dev->ts_gen_cntrl = 0x2;
  388. return 0;
  389. }
  390. static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
  391. {
  392. struct cx8802_dev *dev= fe->dvb->priv;
  393. struct cx88_core *core = dev->core;
  394. if (on)
  395. cx_write(MO_GP0_IO, 0x000006f9);
  396. else
  397. cx_write(MO_GP0_IO, 0x000006fB);
  398. }
  399. static struct cx24123_config hauppauge_novas_config = {
  400. .demod_address = 0x55,
  401. .use_isl6421 = 1,
  402. .set_ts_params = cx24123_set_ts_param,
  403. };
  404. static struct cx24123_config kworld_dvbs_100_config = {
  405. .demod_address = 0x15,
  406. .use_isl6421 = 0,
  407. .set_ts_params = cx24123_set_ts_param,
  408. .enable_lnb_voltage = cx24123_enable_lnb_voltage,
  409. };
  410. #endif
  411. static int dvb_register(struct cx8802_dev *dev)
  412. {
  413. /* init struct videobuf_dvb */
  414. dev->dvb.name = dev->core->name;
  415. dev->ts_gen_cntrl = 0x0c;
  416. /* init frontend */
  417. switch (dev->core->board) {
  418. #ifdef HAVE_CX22702
  419. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  420. dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
  421. &dev->core->i2c_adap);
  422. break;
  423. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  424. case CX88_BOARD_CONEXANT_DVB_T1:
  425. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  426. case CX88_BOARD_WINFAST_DTV1000:
  427. dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
  428. &dev->core->i2c_adap);
  429. break;
  430. case CX88_BOARD_HAUPPAUGE_HVR1100:
  431. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  432. dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
  433. &dev->core->i2c_adap);
  434. break;
  435. #endif
  436. #ifdef HAVE_MT352
  437. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  438. dev->core->pll_addr = 0x61;
  439. dev->core->pll_desc = &dvb_pll_lg_z201;
  440. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  441. &dev->core->i2c_adap);
  442. break;
  443. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  444. dev->core->pll_addr = 0x60;
  445. dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
  446. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
  447. &dev->core->i2c_adap);
  448. break;
  449. case CX88_BOARD_KWORLD_DVB_T:
  450. case CX88_BOARD_DNTV_LIVE_DVB_T:
  451. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  452. dev->core->pll_addr = 0x61;
  453. dev->core->pll_desc = &dvb_pll_unknown_1;
  454. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
  455. &dev->core->i2c_adap);
  456. break;
  457. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  458. #ifdef HAVE_VP3054_I2C
  459. dev->core->pll_addr = 0x61;
  460. dev->core->pll_desc = &dvb_pll_fmd1216me;
  461. dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
  462. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  463. #else
  464. printk("%s: built without vp3054 support\n", dev->core->name);
  465. #endif
  466. break;
  467. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  468. /* The tin box says DEE1601, but it seems to be DTT7579
  469. * compatible, with a slightly different MT352 AGC gain. */
  470. dev->core->pll_addr = 0x61;
  471. dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
  472. dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
  473. &dev->core->i2c_adap);
  474. break;
  475. #endif
  476. #ifdef HAVE_OR51132
  477. case CX88_BOARD_PCHDTV_HD3000:
  478. dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
  479. &dev->core->i2c_adap);
  480. break;
  481. #endif
  482. #ifdef HAVE_LGDT330X
  483. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  484. dev->ts_gen_cntrl = 0x08;
  485. {
  486. /* Do a hardware reset of chip before using it. */
  487. struct cx88_core *core = dev->core;
  488. cx_clear(MO_GP0_IO, 1);
  489. mdelay(100);
  490. cx_set(MO_GP0_IO, 1);
  491. mdelay(200);
  492. /* Select RF connector callback */
  493. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  494. dev->core->pll_addr = 0x61;
  495. dev->core->pll_desc = &dvb_pll_microtune_4042;
  496. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  497. &dev->core->i2c_adap);
  498. }
  499. break;
  500. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  501. dev->ts_gen_cntrl = 0x08;
  502. {
  503. /* Do a hardware reset of chip before using it. */
  504. struct cx88_core *core = dev->core;
  505. cx_clear(MO_GP0_IO, 1);
  506. mdelay(100);
  507. cx_set(MO_GP0_IO, 9);
  508. mdelay(200);
  509. dev->core->pll_addr = 0x61;
  510. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  511. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
  512. &dev->core->i2c_adap);
  513. }
  514. break;
  515. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  516. dev->ts_gen_cntrl = 0x08;
  517. {
  518. /* Do a hardware reset of chip before using it. */
  519. struct cx88_core *core = dev->core;
  520. cx_clear(MO_GP0_IO, 1);
  521. mdelay(100);
  522. cx_set(MO_GP0_IO, 1);
  523. mdelay(200);
  524. dev->core->pll_addr = 0x61;
  525. dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
  526. dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
  527. &dev->core->i2c_adap);
  528. }
  529. break;
  530. #endif
  531. #ifdef HAVE_NXT200X
  532. case CX88_BOARD_ATI_HDTVWONDER:
  533. dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
  534. &dev->core->i2c_adap);
  535. break;
  536. #endif
  537. #ifdef HAVE_CX24123
  538. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  539. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  540. dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
  541. &dev->core->i2c_adap);
  542. break;
  543. case CX88_BOARD_KWORLD_DVBS_100:
  544. dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
  545. &dev->core->i2c_adap);
  546. break;
  547. #endif
  548. default:
  549. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  550. dev->core->name);
  551. break;
  552. }
  553. if (NULL == dev->dvb.frontend) {
  554. printk("%s: frontend initialization failed\n",dev->core->name);
  555. return -1;
  556. }
  557. if (dev->core->pll_desc) {
  558. dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
  559. dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
  560. }
  561. /* Put the analog decoder in standby to keep it quiet */
  562. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  563. /* register everything */
  564. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  565. }
  566. /* ----------------------------------------------------------- */
  567. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  568. const struct pci_device_id *pci_id)
  569. {
  570. struct cx8802_dev *dev;
  571. struct cx88_core *core;
  572. int err;
  573. /* general setup */
  574. core = cx88_core_get(pci_dev);
  575. if (NULL == core)
  576. return -EINVAL;
  577. err = -ENODEV;
  578. if (!cx88_boards[core->board].dvb)
  579. goto fail_core;
  580. err = -ENOMEM;
  581. dev = kmalloc(sizeof(*dev),GFP_KERNEL);
  582. if (NULL == dev)
  583. goto fail_core;
  584. memset(dev,0,sizeof(*dev));
  585. dev->pci = pci_dev;
  586. dev->core = core;
  587. err = cx8802_init_common(dev);
  588. if (0 != err)
  589. goto fail_free;
  590. #ifdef HAVE_VP3054_I2C
  591. err = vp3054_i2c_probe(dev);
  592. if (0 != err)
  593. goto fail_free;
  594. #endif
  595. /* dvb stuff */
  596. printk("%s/2: cx2388x based dvb card\n", core->name);
  597. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  598. dev->pci, &dev->slock,
  599. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  600. V4L2_FIELD_TOP,
  601. sizeof(struct cx88_buffer),
  602. dev);
  603. err = dvb_register(dev);
  604. if (0 != err)
  605. goto fail_fini;
  606. /* Maintain a reference to cx88-video can query the 8802 device. */
  607. core->dvbdev = dev;
  608. return 0;
  609. fail_fini:
  610. cx8802_fini_common(dev);
  611. fail_free:
  612. kfree(dev);
  613. fail_core:
  614. cx88_core_put(core,pci_dev);
  615. return err;
  616. }
  617. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  618. {
  619. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  620. /* Destroy any 8802 reference. */
  621. dev->core->dvbdev = NULL;
  622. /* dvb */
  623. videobuf_dvb_unregister(&dev->dvb);
  624. #ifdef HAVE_VP3054_I2C
  625. vp3054_i2c_remove(dev);
  626. #endif
  627. /* common */
  628. cx8802_fini_common(dev);
  629. cx88_core_put(dev->core,dev->pci);
  630. kfree(dev);
  631. }
  632. static struct pci_device_id cx8802_pci_tbl[] = {
  633. {
  634. .vendor = 0x14f1,
  635. .device = 0x8802,
  636. .subvendor = PCI_ANY_ID,
  637. .subdevice = PCI_ANY_ID,
  638. },{
  639. /* --- end of list --- */
  640. }
  641. };
  642. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  643. static struct pci_driver dvb_pci_driver = {
  644. .name = "cx88-dvb",
  645. .id_table = cx8802_pci_tbl,
  646. .probe = dvb_probe,
  647. .remove = __devexit_p(dvb_remove),
  648. .suspend = cx8802_suspend_common,
  649. .resume = cx8802_resume_common,
  650. };
  651. static int dvb_init(void)
  652. {
  653. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  654. (CX88_VERSION_CODE >> 16) & 0xff,
  655. (CX88_VERSION_CODE >> 8) & 0xff,
  656. CX88_VERSION_CODE & 0xff);
  657. #ifdef SNAPSHOT
  658. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  659. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  660. #endif
  661. return pci_register_driver(&dvb_pci_driver);
  662. }
  663. static void dvb_fini(void)
  664. {
  665. pci_unregister_driver(&dvb_pci_driver);
  666. }
  667. module_init(dvb_init);
  668. module_exit(dvb_fini);
  669. /*
  670. * Local variables:
  671. * c-basic-offset: 8
  672. * compile-command: "make DVB=1"
  673. * End:
  674. */