ov9740.c 27 KB

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  1. /*
  2. * OmniVision OV9740 Camera Driver
  3. *
  4. * Copyright (C) 2011 NVIDIA Corporation
  5. *
  6. * Based on ov9640 camera driver.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/i2c.h>
  15. #include <linux/slab.h>
  16. #include <media/soc_camera.h>
  17. #include <media/soc_mediabus.h>
  18. #include <media/v4l2-chip-ident.h>
  19. #define to_ov9740(sd) container_of(sd, struct ov9740_priv, subdev)
  20. /* General Status Registers */
  21. #define OV9740_MODEL_ID_HI 0x0000
  22. #define OV9740_MODEL_ID_LO 0x0001
  23. #define OV9740_REVISION_NUMBER 0x0002
  24. #define OV9740_MANUFACTURER_ID 0x0003
  25. #define OV9740_SMIA_VERSION 0x0004
  26. /* General Setup Registers */
  27. #define OV9740_MODE_SELECT 0x0100
  28. #define OV9740_IMAGE_ORT 0x0101
  29. #define OV9740_SOFTWARE_RESET 0x0103
  30. #define OV9740_GRP_PARAM_HOLD 0x0104
  31. #define OV9740_MSK_CORRUP_FM 0x0105
  32. /* Timing Setting */
  33. #define OV9740_FRM_LENGTH_LN_HI 0x0340 /* VTS */
  34. #define OV9740_FRM_LENGTH_LN_LO 0x0341 /* VTS */
  35. #define OV9740_LN_LENGTH_PCK_HI 0x0342 /* HTS */
  36. #define OV9740_LN_LENGTH_PCK_LO 0x0343 /* HTS */
  37. #define OV9740_X_ADDR_START_HI 0x0344
  38. #define OV9740_X_ADDR_START_LO 0x0345
  39. #define OV9740_Y_ADDR_START_HI 0x0346
  40. #define OV9740_Y_ADDR_START_LO 0x0347
  41. #define OV9740_X_ADDR_END_HI 0x0348
  42. #define OV9740_X_ADDR_END_LO 0x0349
  43. #define OV9740_Y_ADDR_END_HI 0x034a
  44. #define OV9740_Y_ADDR_END_LO 0x034b
  45. #define OV9740_X_OUTPUT_SIZE_HI 0x034c
  46. #define OV9740_X_OUTPUT_SIZE_LO 0x034d
  47. #define OV9740_Y_OUTPUT_SIZE_HI 0x034e
  48. #define OV9740_Y_OUTPUT_SIZE_LO 0x034f
  49. /* IO Control Registers */
  50. #define OV9740_IO_CREL00 0x3002
  51. #define OV9740_IO_CREL01 0x3004
  52. #define OV9740_IO_CREL02 0x3005
  53. #define OV9740_IO_OUTPUT_SEL01 0x3026
  54. #define OV9740_IO_OUTPUT_SEL02 0x3027
  55. /* AWB Registers */
  56. #define OV9740_AWB_MANUAL_CTRL 0x3406
  57. /* Analog Control Registers */
  58. #define OV9740_ANALOG_CTRL01 0x3601
  59. #define OV9740_ANALOG_CTRL02 0x3602
  60. #define OV9740_ANALOG_CTRL03 0x3603
  61. #define OV9740_ANALOG_CTRL04 0x3604
  62. #define OV9740_ANALOG_CTRL10 0x3610
  63. #define OV9740_ANALOG_CTRL12 0x3612
  64. #define OV9740_ANALOG_CTRL15 0x3615
  65. #define OV9740_ANALOG_CTRL20 0x3620
  66. #define OV9740_ANALOG_CTRL21 0x3621
  67. #define OV9740_ANALOG_CTRL22 0x3622
  68. #define OV9740_ANALOG_CTRL30 0x3630
  69. #define OV9740_ANALOG_CTRL31 0x3631
  70. #define OV9740_ANALOG_CTRL32 0x3632
  71. #define OV9740_ANALOG_CTRL33 0x3633
  72. /* Sensor Control */
  73. #define OV9740_SENSOR_CTRL03 0x3703
  74. #define OV9740_SENSOR_CTRL04 0x3704
  75. #define OV9740_SENSOR_CTRL05 0x3705
  76. #define OV9740_SENSOR_CTRL07 0x3707
  77. /* Timing Control */
  78. #define OV9740_TIMING_CTRL17 0x3817
  79. #define OV9740_TIMING_CTRL19 0x3819
  80. #define OV9740_TIMING_CTRL33 0x3833
  81. #define OV9740_TIMING_CTRL35 0x3835
  82. /* Banding Filter */
  83. #define OV9740_AEC_MAXEXPO_60_H 0x3a02
  84. #define OV9740_AEC_MAXEXPO_60_L 0x3a03
  85. #define OV9740_AEC_B50_STEP_HI 0x3a08
  86. #define OV9740_AEC_B50_STEP_LO 0x3a09
  87. #define OV9740_AEC_B60_STEP_HI 0x3a0a
  88. #define OV9740_AEC_B60_STEP_LO 0x3a0b
  89. #define OV9740_AEC_CTRL0D 0x3a0d
  90. #define OV9740_AEC_CTRL0E 0x3a0e
  91. #define OV9740_AEC_MAXEXPO_50_H 0x3a14
  92. #define OV9740_AEC_MAXEXPO_50_L 0x3a15
  93. /* AEC/AGC Control */
  94. #define OV9740_AEC_ENABLE 0x3503
  95. #define OV9740_GAIN_CEILING_01 0x3a18
  96. #define OV9740_GAIN_CEILING_02 0x3a19
  97. #define OV9740_AEC_HI_THRESHOLD 0x3a11
  98. #define OV9740_AEC_3A1A 0x3a1a
  99. #define OV9740_AEC_CTRL1B_WPT2 0x3a1b
  100. #define OV9740_AEC_CTRL0F_WPT 0x3a0f
  101. #define OV9740_AEC_CTRL10_BPT 0x3a10
  102. #define OV9740_AEC_CTRL1E_BPT2 0x3a1e
  103. #define OV9740_AEC_LO_THRESHOLD 0x3a1f
  104. /* BLC Control */
  105. #define OV9740_BLC_AUTO_ENABLE 0x4002
  106. #define OV9740_BLC_MODE 0x4005
  107. /* VFIFO */
  108. #define OV9740_VFIFO_READ_START_HI 0x4608
  109. #define OV9740_VFIFO_READ_START_LO 0x4609
  110. /* DVP Control */
  111. #define OV9740_DVP_VSYNC_CTRL02 0x4702
  112. #define OV9740_DVP_VSYNC_MODE 0x4704
  113. #define OV9740_DVP_VSYNC_CTRL06 0x4706
  114. /* PLL Setting */
  115. #define OV9740_PLL_MODE_CTRL01 0x3104
  116. #define OV9740_PRE_PLL_CLK_DIV 0x0305
  117. #define OV9740_PLL_MULTIPLIER 0x0307
  118. #define OV9740_VT_SYS_CLK_DIV 0x0303
  119. #define OV9740_VT_PIX_CLK_DIV 0x0301
  120. #define OV9740_PLL_CTRL3010 0x3010
  121. #define OV9740_VFIFO_CTRL00 0x460e
  122. /* ISP Control */
  123. #define OV9740_ISP_CTRL00 0x5000
  124. #define OV9740_ISP_CTRL01 0x5001
  125. #define OV9740_ISP_CTRL03 0x5003
  126. #define OV9740_ISP_CTRL05 0x5005
  127. #define OV9740_ISP_CTRL12 0x5012
  128. #define OV9740_ISP_CTRL19 0x5019
  129. #define OV9740_ISP_CTRL1A 0x501a
  130. #define OV9740_ISP_CTRL1E 0x501e
  131. #define OV9740_ISP_CTRL1F 0x501f
  132. #define OV9740_ISP_CTRL20 0x5020
  133. #define OV9740_ISP_CTRL21 0x5021
  134. /* AWB */
  135. #define OV9740_AWB_CTRL00 0x5180
  136. #define OV9740_AWB_CTRL01 0x5181
  137. #define OV9740_AWB_CTRL02 0x5182
  138. #define OV9740_AWB_CTRL03 0x5183
  139. #define OV9740_AWB_ADV_CTRL01 0x5184
  140. #define OV9740_AWB_ADV_CTRL02 0x5185
  141. #define OV9740_AWB_ADV_CTRL03 0x5186
  142. #define OV9740_AWB_ADV_CTRL04 0x5187
  143. #define OV9740_AWB_ADV_CTRL05 0x5188
  144. #define OV9740_AWB_ADV_CTRL06 0x5189
  145. #define OV9740_AWB_ADV_CTRL07 0x518a
  146. #define OV9740_AWB_ADV_CTRL08 0x518b
  147. #define OV9740_AWB_ADV_CTRL09 0x518c
  148. #define OV9740_AWB_ADV_CTRL10 0x518d
  149. #define OV9740_AWB_ADV_CTRL11 0x518e
  150. #define OV9740_AWB_CTRL0F 0x518f
  151. #define OV9740_AWB_CTRL10 0x5190
  152. #define OV9740_AWB_CTRL11 0x5191
  153. #define OV9740_AWB_CTRL12 0x5192
  154. #define OV9740_AWB_CTRL13 0x5193
  155. #define OV9740_AWB_CTRL14 0x5194
  156. /* MIPI Control */
  157. #define OV9740_MIPI_CTRL00 0x4800
  158. #define OV9740_MIPI_3837 0x3837
  159. #define OV9740_MIPI_CTRL01 0x4801
  160. #define OV9740_MIPI_CTRL03 0x4803
  161. #define OV9740_MIPI_CTRL05 0x4805
  162. #define OV9740_VFIFO_RD_CTRL 0x4601
  163. #define OV9740_MIPI_CTRL_3012 0x3012
  164. #define OV9740_SC_CMMM_MIPI_CTR 0x3014
  165. #define OV9740_MAX_WIDTH 1280
  166. #define OV9740_MAX_HEIGHT 720
  167. /* Misc. structures */
  168. struct ov9740_reg {
  169. u16 reg;
  170. u8 val;
  171. };
  172. struct ov9740_priv {
  173. struct v4l2_subdev subdev;
  174. int ident;
  175. u16 model;
  176. u8 revision;
  177. u8 manid;
  178. u8 smiaver;
  179. bool flag_vflip;
  180. bool flag_hflip;
  181. /* For suspend/resume. */
  182. struct v4l2_mbus_framefmt current_mf;
  183. bool current_enable;
  184. };
  185. static const struct ov9740_reg ov9740_defaults[] = {
  186. /* Software Reset */
  187. { OV9740_SOFTWARE_RESET, 0x01 },
  188. /* Banding Filter */
  189. { OV9740_AEC_B50_STEP_HI, 0x00 },
  190. { OV9740_AEC_B50_STEP_LO, 0xe8 },
  191. { OV9740_AEC_CTRL0E, 0x03 },
  192. { OV9740_AEC_MAXEXPO_50_H, 0x15 },
  193. { OV9740_AEC_MAXEXPO_50_L, 0xc6 },
  194. { OV9740_AEC_B60_STEP_HI, 0x00 },
  195. { OV9740_AEC_B60_STEP_LO, 0xc0 },
  196. { OV9740_AEC_CTRL0D, 0x04 },
  197. { OV9740_AEC_MAXEXPO_60_H, 0x18 },
  198. { OV9740_AEC_MAXEXPO_60_L, 0x20 },
  199. /* LC */
  200. { 0x5842, 0x02 }, { 0x5843, 0x5e }, { 0x5844, 0x04 }, { 0x5845, 0x32 },
  201. { 0x5846, 0x03 }, { 0x5847, 0x29 }, { 0x5848, 0x02 }, { 0x5849, 0xcc },
  202. /* Un-documented OV9740 registers */
  203. { 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 },
  204. { 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c },
  205. { 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580a, 0x0e }, { 0x580b, 0x16 },
  206. { 0x580c, 0x06 }, { 0x580d, 0x02 }, { 0x580e, 0x00 }, { 0x580f, 0x00 },
  207. { 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 },
  208. { 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 },
  209. { 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581a, 0x07 }, { 0x581b, 0x08 },
  210. { 0x581c, 0x0b }, { 0x581d, 0x14 }, { 0x581e, 0x28 }, { 0x581f, 0x23 },
  211. { 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a },
  212. { 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f },
  213. { 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582a, 0x8f }, { 0x582b, 0x9e },
  214. { 0x582c, 0x8f }, { 0x582d, 0x9f }, { 0x582e, 0x4f }, { 0x582f, 0x87 },
  215. { 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f },
  216. { 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf },
  217. { 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583a, 0x9f }, { 0x583b, 0x7f },
  218. { 0x583c, 0x5f },
  219. /* Y Gamma */
  220. { 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e },
  221. { 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 },
  222. { 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548a, 0xa4 }, { 0x548b, 0xb1 },
  223. { 0x548c, 0xc6 }, { 0x548d, 0xd8 }, { 0x548e, 0xe9 },
  224. /* UV Gamma */
  225. { 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 },
  226. { 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 },
  227. { 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549a, 0x02 }, { 0x549b, 0xeb },
  228. { 0x549c, 0x02 }, { 0x549d, 0xa0 }, { 0x549e, 0x02 }, { 0x549f, 0x67 },
  229. { 0x54a0, 0x02 }, { 0x54a1, 0x3b }, { 0x54a2, 0x02 }, { 0x54a3, 0x18 },
  230. { 0x54a4, 0x01 }, { 0x54a5, 0xe7 }, { 0x54a6, 0x01 }, { 0x54a7, 0xc3 },
  231. { 0x54a8, 0x01 }, { 0x54a9, 0x94 }, { 0x54aa, 0x01 }, { 0x54ab, 0x72 },
  232. { 0x54ac, 0x01 }, { 0x54ad, 0x57 },
  233. /* AWB */
  234. { OV9740_AWB_CTRL00, 0xf0 },
  235. { OV9740_AWB_CTRL01, 0x00 },
  236. { OV9740_AWB_CTRL02, 0x41 },
  237. { OV9740_AWB_CTRL03, 0x42 },
  238. { OV9740_AWB_ADV_CTRL01, 0x8a },
  239. { OV9740_AWB_ADV_CTRL02, 0x61 },
  240. { OV9740_AWB_ADV_CTRL03, 0xce },
  241. { OV9740_AWB_ADV_CTRL04, 0xa8 },
  242. { OV9740_AWB_ADV_CTRL05, 0x17 },
  243. { OV9740_AWB_ADV_CTRL06, 0x1f },
  244. { OV9740_AWB_ADV_CTRL07, 0x27 },
  245. { OV9740_AWB_ADV_CTRL08, 0x41 },
  246. { OV9740_AWB_ADV_CTRL09, 0x34 },
  247. { OV9740_AWB_ADV_CTRL10, 0xf0 },
  248. { OV9740_AWB_ADV_CTRL11, 0x10 },
  249. { OV9740_AWB_CTRL0F, 0xff },
  250. { OV9740_AWB_CTRL10, 0x00 },
  251. { OV9740_AWB_CTRL11, 0xff },
  252. { OV9740_AWB_CTRL12, 0x00 },
  253. { OV9740_AWB_CTRL13, 0xff },
  254. { OV9740_AWB_CTRL14, 0x00 },
  255. /* CIP */
  256. { 0x530d, 0x12 },
  257. /* CMX */
  258. { 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 },
  259. { 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 },
  260. { 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538a, 0x00 }, { 0x538b, 0x20 },
  261. { 0x538c, 0x00 }, { 0x538d, 0x00 }, { 0x538e, 0x00 }, { 0x538f, 0x16 },
  262. { 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 },
  263. { 0x5394, 0x18 },
  264. /* 50/60 Detection */
  265. { 0x3c0a, 0x9c }, { 0x3c0b, 0x3f },
  266. /* Output Select */
  267. { OV9740_IO_OUTPUT_SEL01, 0x00 },
  268. { OV9740_IO_OUTPUT_SEL02, 0x00 },
  269. { OV9740_IO_CREL00, 0x00 },
  270. { OV9740_IO_CREL01, 0x00 },
  271. { OV9740_IO_CREL02, 0x00 },
  272. /* AWB Control */
  273. { OV9740_AWB_MANUAL_CTRL, 0x00 },
  274. /* Analog Control */
  275. { OV9740_ANALOG_CTRL03, 0xaa },
  276. { OV9740_ANALOG_CTRL32, 0x2f },
  277. { OV9740_ANALOG_CTRL20, 0x66 },
  278. { OV9740_ANALOG_CTRL21, 0xc0 },
  279. { OV9740_ANALOG_CTRL31, 0x52 },
  280. { OV9740_ANALOG_CTRL33, 0x50 },
  281. { OV9740_ANALOG_CTRL30, 0xca },
  282. { OV9740_ANALOG_CTRL04, 0x0c },
  283. { OV9740_ANALOG_CTRL01, 0x40 },
  284. { OV9740_ANALOG_CTRL02, 0x16 },
  285. { OV9740_ANALOG_CTRL10, 0xa1 },
  286. { OV9740_ANALOG_CTRL12, 0x24 },
  287. { OV9740_ANALOG_CTRL22, 0x9f },
  288. { OV9740_ANALOG_CTRL15, 0xf0 },
  289. /* Sensor Control */
  290. { OV9740_SENSOR_CTRL03, 0x42 },
  291. { OV9740_SENSOR_CTRL04, 0x10 },
  292. { OV9740_SENSOR_CTRL05, 0x45 },
  293. { OV9740_SENSOR_CTRL07, 0x14 },
  294. /* Timing Control */
  295. { OV9740_TIMING_CTRL33, 0x04 },
  296. { OV9740_TIMING_CTRL35, 0x02 },
  297. { OV9740_TIMING_CTRL19, 0x6e },
  298. { OV9740_TIMING_CTRL17, 0x94 },
  299. /* AEC/AGC Control */
  300. { OV9740_AEC_ENABLE, 0x10 },
  301. { OV9740_GAIN_CEILING_01, 0x00 },
  302. { OV9740_GAIN_CEILING_02, 0x7f },
  303. { OV9740_AEC_HI_THRESHOLD, 0xa0 },
  304. { OV9740_AEC_3A1A, 0x05 },
  305. { OV9740_AEC_CTRL1B_WPT2, 0x50 },
  306. { OV9740_AEC_CTRL0F_WPT, 0x50 },
  307. { OV9740_AEC_CTRL10_BPT, 0x4c },
  308. { OV9740_AEC_CTRL1E_BPT2, 0x4c },
  309. { OV9740_AEC_LO_THRESHOLD, 0x26 },
  310. /* BLC Control */
  311. { OV9740_BLC_AUTO_ENABLE, 0x45 },
  312. { OV9740_BLC_MODE, 0x18 },
  313. /* DVP Control */
  314. { OV9740_DVP_VSYNC_CTRL02, 0x04 },
  315. { OV9740_DVP_VSYNC_MODE, 0x00 },
  316. { OV9740_DVP_VSYNC_CTRL06, 0x08 },
  317. /* PLL Setting */
  318. { OV9740_PLL_MODE_CTRL01, 0x20 },
  319. { OV9740_PRE_PLL_CLK_DIV, 0x03 },
  320. { OV9740_PLL_MULTIPLIER, 0x4c },
  321. { OV9740_VT_SYS_CLK_DIV, 0x01 },
  322. { OV9740_VT_PIX_CLK_DIV, 0x08 },
  323. { OV9740_PLL_CTRL3010, 0x01 },
  324. { OV9740_VFIFO_CTRL00, 0x82 },
  325. /* Timing Setting */
  326. /* VTS */
  327. { OV9740_FRM_LENGTH_LN_HI, 0x03 },
  328. { OV9740_FRM_LENGTH_LN_LO, 0x07 },
  329. /* HTS */
  330. { OV9740_LN_LENGTH_PCK_HI, 0x06 },
  331. { OV9740_LN_LENGTH_PCK_LO, 0x62 },
  332. /* MIPI Control */
  333. { OV9740_MIPI_CTRL00, 0x44 }, /* 0x64 for discontinuous clk */
  334. { OV9740_MIPI_3837, 0x01 },
  335. { OV9740_MIPI_CTRL01, 0x0f },
  336. { OV9740_MIPI_CTRL03, 0x05 },
  337. { OV9740_MIPI_CTRL05, 0x10 },
  338. { OV9740_VFIFO_RD_CTRL, 0x16 },
  339. { OV9740_MIPI_CTRL_3012, 0x70 },
  340. { OV9740_SC_CMMM_MIPI_CTR, 0x01 },
  341. /* YUYV order */
  342. { OV9740_ISP_CTRL19, 0x02 },
  343. };
  344. static enum v4l2_mbus_pixelcode ov9740_codes[] = {
  345. V4L2_MBUS_FMT_YUYV8_2X8,
  346. };
  347. static const struct v4l2_queryctrl ov9740_controls[] = {
  348. {
  349. .id = V4L2_CID_VFLIP,
  350. .type = V4L2_CTRL_TYPE_BOOLEAN,
  351. .name = "Flip Vertically",
  352. .minimum = 0,
  353. .maximum = 1,
  354. .step = 1,
  355. .default_value = 0,
  356. },
  357. {
  358. .id = V4L2_CID_HFLIP,
  359. .type = V4L2_CTRL_TYPE_BOOLEAN,
  360. .name = "Flip Horizontally",
  361. .minimum = 0,
  362. .maximum = 1,
  363. .step = 1,
  364. .default_value = 0,
  365. },
  366. };
  367. /* read a register */
  368. static int ov9740_reg_read(struct i2c_client *client, u16 reg, u8 *val)
  369. {
  370. int ret;
  371. struct i2c_msg msg[] = {
  372. {
  373. .addr = client->addr,
  374. .flags = 0,
  375. .len = 2,
  376. .buf = (u8 *)&reg,
  377. },
  378. {
  379. .addr = client->addr,
  380. .flags = I2C_M_RD,
  381. .len = 1,
  382. .buf = val,
  383. },
  384. };
  385. reg = swab16(reg);
  386. ret = i2c_transfer(client->adapter, msg, 2);
  387. if (ret < 0) {
  388. dev_err(&client->dev, "Failed reading register 0x%04x!\n", reg);
  389. return ret;
  390. }
  391. return 0;
  392. }
  393. /* write a register */
  394. static int ov9740_reg_write(struct i2c_client *client, u16 reg, u8 val)
  395. {
  396. struct i2c_msg msg;
  397. struct {
  398. u16 reg;
  399. u8 val;
  400. } __packed buf;
  401. int ret;
  402. reg = swab16(reg);
  403. buf.reg = reg;
  404. buf.val = val;
  405. msg.addr = client->addr;
  406. msg.flags = 0;
  407. msg.len = 3;
  408. msg.buf = (u8 *)&buf;
  409. ret = i2c_transfer(client->adapter, &msg, 1);
  410. if (ret < 0) {
  411. dev_err(&client->dev, "Failed writing register 0x%04x!\n", reg);
  412. return ret;
  413. }
  414. return 0;
  415. }
  416. /* Read a register, alter its bits, write it back */
  417. static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset)
  418. {
  419. u8 val;
  420. int ret;
  421. ret = ov9740_reg_read(client, reg, &val);
  422. if (ret < 0) {
  423. dev_err(&client->dev,
  424. "[Read]-Modify-Write of register 0x%04x failed!\n",
  425. reg);
  426. return ret;
  427. }
  428. val |= set;
  429. val &= ~unset;
  430. ret = ov9740_reg_write(client, reg, val);
  431. if (ret < 0) {
  432. dev_err(&client->dev,
  433. "Read-Modify-[Write] of register 0x%04x failed!\n",
  434. reg);
  435. return ret;
  436. }
  437. return 0;
  438. }
  439. static int ov9740_reg_write_array(struct i2c_client *client,
  440. const struct ov9740_reg *regarray,
  441. int regarraylen)
  442. {
  443. int i;
  444. int ret;
  445. for (i = 0; i < regarraylen; i++) {
  446. ret = ov9740_reg_write(client,
  447. regarray[i].reg, regarray[i].val);
  448. if (ret < 0)
  449. return ret;
  450. }
  451. return 0;
  452. }
  453. /* Start/Stop streaming from the device */
  454. static int ov9740_s_stream(struct v4l2_subdev *sd, int enable)
  455. {
  456. struct i2c_client *client = v4l2_get_subdevdata(sd);
  457. struct ov9740_priv *priv = to_ov9740(sd);
  458. int ret;
  459. /* Program orientation register. */
  460. if (priv->flag_vflip)
  461. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x2, 0);
  462. else
  463. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x2);
  464. if (ret < 0)
  465. return ret;
  466. if (priv->flag_hflip)
  467. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x1, 0);
  468. else
  469. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x1);
  470. if (ret < 0)
  471. return ret;
  472. if (enable) {
  473. dev_dbg(&client->dev, "Enabling Streaming\n");
  474. /* Start Streaming */
  475. ret = ov9740_reg_write(client, OV9740_MODE_SELECT, 0x01);
  476. } else {
  477. dev_dbg(&client->dev, "Disabling Streaming\n");
  478. /* Software Reset */
  479. ret = ov9740_reg_write(client, OV9740_SOFTWARE_RESET, 0x01);
  480. if (!ret)
  481. /* Setting Streaming to Standby */
  482. ret = ov9740_reg_write(client, OV9740_MODE_SELECT,
  483. 0x00);
  484. }
  485. priv->current_enable = enable;
  486. return ret;
  487. }
  488. /* select nearest higher resolution for capture */
  489. static void ov9740_res_roundup(u32 *width, u32 *height)
  490. {
  491. /* Width must be a multiple of 4 pixels. */
  492. *width = ALIGN(*width, 4);
  493. /* Max resolution is 1280x720 (720p). */
  494. if (*width > OV9740_MAX_WIDTH)
  495. *width = OV9740_MAX_WIDTH;
  496. if (*height > OV9740_MAX_HEIGHT)
  497. *height = OV9740_MAX_HEIGHT;
  498. }
  499. /* Setup registers according to resolution and color encoding */
  500. static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height)
  501. {
  502. u32 x_start;
  503. u32 y_start;
  504. u32 x_end;
  505. u32 y_end;
  506. bool scaling = 0;
  507. u32 scale_input_x;
  508. u32 scale_input_y;
  509. int ret;
  510. if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT))
  511. scaling = 1;
  512. /*
  513. * Try to use as much of the sensor area as possible when supporting
  514. * smaller resolutions. Depending on the aspect ratio of the
  515. * chosen resolution, we can either use the full width of the sensor,
  516. * or the full height of the sensor (or both if the aspect ratio is
  517. * the same as 1280x720.
  518. */
  519. if ((OV9740_MAX_WIDTH * height) > (OV9740_MAX_HEIGHT * width)) {
  520. scale_input_x = (OV9740_MAX_HEIGHT * width) / height;
  521. scale_input_y = OV9740_MAX_HEIGHT;
  522. } else {
  523. scale_input_x = OV9740_MAX_WIDTH;
  524. scale_input_y = (OV9740_MAX_WIDTH * height) / width;
  525. }
  526. /* These describe the area of the sensor to use. */
  527. x_start = (OV9740_MAX_WIDTH - scale_input_x) / 2;
  528. y_start = (OV9740_MAX_HEIGHT - scale_input_y) / 2;
  529. x_end = x_start + scale_input_x - 1;
  530. y_end = y_start + scale_input_y - 1;
  531. ret = ov9740_reg_write(client, OV9740_X_ADDR_START_HI, x_start >> 8);
  532. if (ret)
  533. goto done;
  534. ret = ov9740_reg_write(client, OV9740_X_ADDR_START_LO, x_start & 0xff);
  535. if (ret)
  536. goto done;
  537. ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_HI, y_start >> 8);
  538. if (ret)
  539. goto done;
  540. ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_LO, y_start & 0xff);
  541. if (ret)
  542. goto done;
  543. ret = ov9740_reg_write(client, OV9740_X_ADDR_END_HI, x_end >> 8);
  544. if (ret)
  545. goto done;
  546. ret = ov9740_reg_write(client, OV9740_X_ADDR_END_LO, x_end & 0xff);
  547. if (ret)
  548. goto done;
  549. ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_HI, y_end >> 8);
  550. if (ret)
  551. goto done;
  552. ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_LO, y_end & 0xff);
  553. if (ret)
  554. goto done;
  555. ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_HI, width >> 8);
  556. if (ret)
  557. goto done;
  558. ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_LO, width & 0xff);
  559. if (ret)
  560. goto done;
  561. ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_HI, height >> 8);
  562. if (ret)
  563. goto done;
  564. ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_LO, height & 0xff);
  565. if (ret)
  566. goto done;
  567. ret = ov9740_reg_write(client, OV9740_ISP_CTRL1E, scale_input_x >> 8);
  568. if (ret)
  569. goto done;
  570. ret = ov9740_reg_write(client, OV9740_ISP_CTRL1F, scale_input_x & 0xff);
  571. if (ret)
  572. goto done;
  573. ret = ov9740_reg_write(client, OV9740_ISP_CTRL20, scale_input_y >> 8);
  574. if (ret)
  575. goto done;
  576. ret = ov9740_reg_write(client, OV9740_ISP_CTRL21, scale_input_y & 0xff);
  577. if (ret)
  578. goto done;
  579. ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_HI,
  580. (scale_input_x - width) >> 8);
  581. if (ret)
  582. goto done;
  583. ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_LO,
  584. (scale_input_x - width) & 0xff);
  585. if (ret)
  586. goto done;
  587. ret = ov9740_reg_write(client, OV9740_ISP_CTRL00, 0xff);
  588. if (ret)
  589. goto done;
  590. ret = ov9740_reg_write(client, OV9740_ISP_CTRL01, 0xef |
  591. (scaling << 4));
  592. if (ret)
  593. goto done;
  594. ret = ov9740_reg_write(client, OV9740_ISP_CTRL03, 0xff);
  595. done:
  596. return ret;
  597. }
  598. /* set the format we will capture in */
  599. static int ov9740_s_fmt(struct v4l2_subdev *sd,
  600. struct v4l2_mbus_framefmt *mf)
  601. {
  602. struct i2c_client *client = v4l2_get_subdevdata(sd);
  603. struct ov9740_priv *priv = to_ov9740(sd);
  604. enum v4l2_colorspace cspace;
  605. enum v4l2_mbus_pixelcode code = mf->code;
  606. int ret;
  607. ov9740_res_roundup(&mf->width, &mf->height);
  608. switch (code) {
  609. case V4L2_MBUS_FMT_YUYV8_2X8:
  610. cspace = V4L2_COLORSPACE_SRGB;
  611. break;
  612. default:
  613. return -EINVAL;
  614. }
  615. ret = ov9740_reg_write_array(client, ov9740_defaults,
  616. ARRAY_SIZE(ov9740_defaults));
  617. if (ret < 0)
  618. return ret;
  619. ret = ov9740_set_res(client, mf->width, mf->height);
  620. if (ret < 0)
  621. return ret;
  622. mf->code = code;
  623. mf->colorspace = cspace;
  624. memcpy(&priv->current_mf, mf, sizeof(struct v4l2_mbus_framefmt));
  625. return ret;
  626. }
  627. static int ov9740_try_fmt(struct v4l2_subdev *sd,
  628. struct v4l2_mbus_framefmt *mf)
  629. {
  630. ov9740_res_roundup(&mf->width, &mf->height);
  631. mf->field = V4L2_FIELD_NONE;
  632. mf->code = V4L2_MBUS_FMT_YUYV8_2X8;
  633. mf->colorspace = V4L2_COLORSPACE_SRGB;
  634. return 0;
  635. }
  636. static int ov9740_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  637. enum v4l2_mbus_pixelcode *code)
  638. {
  639. if (index >= ARRAY_SIZE(ov9740_codes))
  640. return -EINVAL;
  641. *code = ov9740_codes[index];
  642. return 0;
  643. }
  644. static int ov9740_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  645. {
  646. a->bounds.left = 0;
  647. a->bounds.top = 0;
  648. a->bounds.width = OV9740_MAX_WIDTH;
  649. a->bounds.height = OV9740_MAX_HEIGHT;
  650. a->defrect = a->bounds;
  651. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  652. a->pixelaspect.numerator = 1;
  653. a->pixelaspect.denominator = 1;
  654. return 0;
  655. }
  656. static int ov9740_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  657. {
  658. a->c.left = 0;
  659. a->c.top = 0;
  660. a->c.width = OV9740_MAX_WIDTH;
  661. a->c.height = OV9740_MAX_HEIGHT;
  662. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  663. return 0;
  664. }
  665. /* Get status of additional camera capabilities */
  666. static int ov9740_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  667. {
  668. struct ov9740_priv *priv = to_ov9740(sd);
  669. switch (ctrl->id) {
  670. case V4L2_CID_VFLIP:
  671. ctrl->value = priv->flag_vflip;
  672. break;
  673. case V4L2_CID_HFLIP:
  674. ctrl->value = priv->flag_hflip;
  675. break;
  676. default:
  677. return -EINVAL;
  678. }
  679. return 0;
  680. }
  681. /* Set status of additional camera capabilities */
  682. static int ov9740_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  683. {
  684. struct ov9740_priv *priv = to_ov9740(sd);
  685. switch (ctrl->id) {
  686. case V4L2_CID_VFLIP:
  687. priv->flag_vflip = ctrl->value;
  688. break;
  689. case V4L2_CID_HFLIP:
  690. priv->flag_hflip = ctrl->value;
  691. break;
  692. default:
  693. return -EINVAL;
  694. }
  695. return 0;
  696. }
  697. /* Get chip identification */
  698. static int ov9740_g_chip_ident(struct v4l2_subdev *sd,
  699. struct v4l2_dbg_chip_ident *id)
  700. {
  701. struct ov9740_priv *priv = to_ov9740(sd);
  702. id->ident = priv->ident;
  703. id->revision = priv->revision;
  704. return 0;
  705. }
  706. static int ov9740_s_power(struct v4l2_subdev *sd, int on)
  707. {
  708. struct ov9740_priv *priv = to_ov9740(sd);
  709. if (!priv->current_enable)
  710. return 0;
  711. if (on) {
  712. ov9740_s_fmt(sd, &priv->current_mf);
  713. ov9740_s_stream(sd, priv->current_enable);
  714. } else {
  715. ov9740_s_stream(sd, 0);
  716. priv->current_enable = true;
  717. }
  718. return 0;
  719. }
  720. #ifdef CONFIG_VIDEO_ADV_DEBUG
  721. static int ov9740_get_register(struct v4l2_subdev *sd,
  722. struct v4l2_dbg_register *reg)
  723. {
  724. struct i2c_client *client = v4l2_get_subdevdata(sd);
  725. int ret;
  726. u8 val;
  727. if (reg->reg & ~0xffff)
  728. return -EINVAL;
  729. reg->size = 2;
  730. ret = ov9740_reg_read(client, reg->reg, &val);
  731. if (ret)
  732. return ret;
  733. reg->val = (__u64)val;
  734. return ret;
  735. }
  736. static int ov9740_set_register(struct v4l2_subdev *sd,
  737. struct v4l2_dbg_register *reg)
  738. {
  739. struct i2c_client *client = v4l2_get_subdevdata(sd);
  740. if (reg->reg & ~0xffff || reg->val & ~0xff)
  741. return -EINVAL;
  742. return ov9740_reg_write(client, reg->reg, reg->val);
  743. }
  744. #endif
  745. static int ov9740_video_probe(struct soc_camera_device *icd,
  746. struct i2c_client *client)
  747. {
  748. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  749. struct ov9740_priv *priv = to_ov9740(sd);
  750. u8 modelhi, modello;
  751. int ret;
  752. /* We must have a parent by now. And it cannot be a wrong one. */
  753. BUG_ON(!icd->parent ||
  754. to_soc_camera_host(icd->parent)->nr != icd->iface);
  755. /*
  756. * check and show product ID and manufacturer ID
  757. */
  758. ret = ov9740_reg_read(client, OV9740_MODEL_ID_HI, &modelhi);
  759. if (ret < 0)
  760. goto err;
  761. ret = ov9740_reg_read(client, OV9740_MODEL_ID_LO, &modello);
  762. if (ret < 0)
  763. goto err;
  764. priv->model = (modelhi << 8) | modello;
  765. ret = ov9740_reg_read(client, OV9740_REVISION_NUMBER, &priv->revision);
  766. if (ret < 0)
  767. goto err;
  768. ret = ov9740_reg_read(client, OV9740_MANUFACTURER_ID, &priv->manid);
  769. if (ret < 0)
  770. goto err;
  771. ret = ov9740_reg_read(client, OV9740_SMIA_VERSION, &priv->smiaver);
  772. if (ret < 0)
  773. goto err;
  774. if (priv->model != 0x9740) {
  775. ret = -ENODEV;
  776. goto err;
  777. }
  778. priv->ident = V4L2_IDENT_OV9740;
  779. dev_info(&client->dev, "ov9740 Model ID 0x%04x, Revision 0x%02x, "
  780. "Manufacturer 0x%02x, SMIA Version 0x%02x\n",
  781. priv->model, priv->revision, priv->manid, priv->smiaver);
  782. err:
  783. return ret;
  784. }
  785. static struct soc_camera_ops ov9740_ops = {
  786. .controls = ov9740_controls,
  787. .num_controls = ARRAY_SIZE(ov9740_controls),
  788. };
  789. /* Request bus settings on camera side */
  790. static int ov9740_g_mbus_config(struct v4l2_subdev *sd,
  791. struct v4l2_mbus_config *cfg)
  792. {
  793. struct i2c_client *client = v4l2_get_subdevdata(sd);
  794. struct soc_camera_device *icd = client->dev.platform_data;
  795. struct soc_camera_link *icl = to_soc_camera_link(icd);
  796. cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
  797. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
  798. V4L2_MBUS_DATA_ACTIVE_HIGH;
  799. cfg->type = V4L2_MBUS_PARALLEL;
  800. cfg->flags = soc_camera_apply_board_flags(icl, cfg);
  801. return 0;
  802. }
  803. static struct v4l2_subdev_video_ops ov9740_video_ops = {
  804. .s_stream = ov9740_s_stream,
  805. .s_mbus_fmt = ov9740_s_fmt,
  806. .try_mbus_fmt = ov9740_try_fmt,
  807. .enum_mbus_fmt = ov9740_enum_fmt,
  808. .cropcap = ov9740_cropcap,
  809. .g_crop = ov9740_g_crop,
  810. .g_mbus_config = ov9740_g_mbus_config,
  811. };
  812. static struct v4l2_subdev_core_ops ov9740_core_ops = {
  813. .g_ctrl = ov9740_g_ctrl,
  814. .s_ctrl = ov9740_s_ctrl,
  815. .g_chip_ident = ov9740_g_chip_ident,
  816. .s_power = ov9740_s_power,
  817. #ifdef CONFIG_VIDEO_ADV_DEBUG
  818. .g_register = ov9740_get_register,
  819. .s_register = ov9740_set_register,
  820. #endif
  821. };
  822. static struct v4l2_subdev_ops ov9740_subdev_ops = {
  823. .core = &ov9740_core_ops,
  824. .video = &ov9740_video_ops,
  825. };
  826. /*
  827. * i2c_driver function
  828. */
  829. static int ov9740_probe(struct i2c_client *client,
  830. const struct i2c_device_id *did)
  831. {
  832. struct ov9740_priv *priv;
  833. struct soc_camera_device *icd = client->dev.platform_data;
  834. struct soc_camera_link *icl;
  835. int ret;
  836. if (!icd) {
  837. dev_err(&client->dev, "Missing soc-camera data!\n");
  838. return -EINVAL;
  839. }
  840. icl = to_soc_camera_link(icd);
  841. if (!icl) {
  842. dev_err(&client->dev, "Missing platform_data for driver\n");
  843. return -EINVAL;
  844. }
  845. priv = kzalloc(sizeof(struct ov9740_priv), GFP_KERNEL);
  846. if (!priv) {
  847. dev_err(&client->dev, "Failed to allocate private data!\n");
  848. return -ENOMEM;
  849. }
  850. v4l2_i2c_subdev_init(&priv->subdev, client, &ov9740_subdev_ops);
  851. icd->ops = &ov9740_ops;
  852. ret = ov9740_video_probe(icd, client);
  853. if (ret < 0) {
  854. icd->ops = NULL;
  855. kfree(priv);
  856. }
  857. return ret;
  858. }
  859. static int ov9740_remove(struct i2c_client *client)
  860. {
  861. struct ov9740_priv *priv = i2c_get_clientdata(client);
  862. kfree(priv);
  863. return 0;
  864. }
  865. static const struct i2c_device_id ov9740_id[] = {
  866. { "ov9740", 0 },
  867. { }
  868. };
  869. MODULE_DEVICE_TABLE(i2c, ov9740_id);
  870. static struct i2c_driver ov9740_i2c_driver = {
  871. .driver = {
  872. .name = "ov9740",
  873. },
  874. .probe = ov9740_probe,
  875. .remove = ov9740_remove,
  876. .id_table = ov9740_id,
  877. };
  878. static int __init ov9740_module_init(void)
  879. {
  880. return i2c_add_driver(&ov9740_i2c_driver);
  881. }
  882. static void __exit ov9740_module_exit(void)
  883. {
  884. i2c_del_driver(&ov9740_i2c_driver);
  885. }
  886. module_init(ov9740_module_init);
  887. module_exit(ov9740_module_exit);
  888. MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV9740");
  889. MODULE_AUTHOR("Andrew Chew <achew@nvidia.com>");
  890. MODULE_LICENSE("GPL v2");