orinoco_pci.c 12 KB

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  1. /* orinoco_pci.c
  2. *
  3. * Driver for Prism II devices that have a direct PCI interface
  4. * (i.e., not in a Pcmcia or PLX bridge)
  5. *
  6. * Specifically here we're talking about the Linksys WMP11
  7. *
  8. * Current maintainers (as of 29 September 2003) are:
  9. * Pavel Roskin <proski AT gnu.org>
  10. * and David Gibson <hermes AT gibson.dropbear.id.au>
  11. *
  12. * Some of this code is borrowed from orinoco_plx.c
  13. * Copyright (C) 2001 Daniel Barlow <dan AT telent.net>
  14. * Some of this code is "inspired" by linux-wlan-ng-0.1.10, but nothing
  15. * has been copied from it. linux-wlan-ng-0.1.10 is originally :
  16. * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved.
  17. * This file originally written by:
  18. * Copyright (C) 2001 Jean Tourrilhes <jt AT hpl.hp.com>
  19. * And is now maintained by:
  20. * (C) Copyright David Gibson, IBM Corp. 2002-2003.
  21. *
  22. * The contents of this file are subject to the Mozilla Public License
  23. * Version 1.1 (the "License"); you may not use this file except in
  24. * compliance with the License. You may obtain a copy of the License
  25. * at http://www.mozilla.org/MPL/
  26. *
  27. * Software distributed under the License is distributed on an "AS IS"
  28. * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
  29. * the License for the specific language governing rights and
  30. * limitations under the License.
  31. *
  32. * Alternatively, the contents of this file may be used under the
  33. * terms of the GNU General Public License version 2 (the "GPL"), in
  34. * which case the provisions of the GPL are applicable instead of the
  35. * above. If you wish to allow the use of your version of this file
  36. * only under the terms of the GPL and not to allow others to use your
  37. * version of this file under the MPL, indicate your decision by
  38. * deleting the provisions above and replace them with the notice and
  39. * other provisions required by the GPL. If you do not delete the
  40. * provisions above, a recipient may use your version of this file
  41. * under either the MPL or the GPL.
  42. */
  43. /*
  44. * Theory of operation...
  45. * -------------------
  46. * Maybe you had a look in orinoco_plx. Well, this is totally different...
  47. *
  48. * The card contains only one PCI region, which contains all the usual
  49. * hermes registers.
  50. *
  51. * The driver will memory map this region in normal memory. Because
  52. * the hermes registers are mapped in normal memory and not in ISA I/O
  53. * post space, we can't use the usual inw/outw macros and we need to
  54. * use readw/writew.
  55. * This slight difference force us to compile our own version of
  56. * hermes.c with the register access macro changed. That's a bit
  57. * hackish but works fine.
  58. *
  59. * Note that the PCI region is pretty big (4K). That's much more than
  60. * the usual set of hermes register (0x0 -> 0x3E). I've got a strong
  61. * suspicion that the whole memory space of the adapter is in fact in
  62. * this region. Accessing directly the adapter memory instead of going
  63. * through the usual register would speed up significantely the
  64. * operations...
  65. *
  66. * Finally, the card looks like this :
  67. -----------------------
  68. Bus 0, device 14, function 0:
  69. Network controller: PCI device 1260:3873 (Harris Semiconductor) (rev 1).
  70. IRQ 11.
  71. Master Capable. Latency=248.
  72. Prefetchable 32 bit memory at 0xffbcc000 [0xffbccfff].
  73. -----------------------
  74. 00:0e.0 Network controller: Harris Semiconductor: Unknown device 3873 (rev 01)
  75. Subsystem: Unknown device 1737:3874
  76. Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
  77. Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
  78. Latency: 248 set, cache line size 08
  79. Interrupt: pin A routed to IRQ 11
  80. Region 0: Memory at ffbcc000 (32-bit, prefetchable) [size=4K]
  81. Capabilities: [dc] Power Management version 2
  82. Flags: PMEClk- AuxPwr- DSI- D1+ D2+ PME+
  83. Status: D0 PME-Enable- DSel=0 DScale=0 PME-
  84. -----------------------
  85. *
  86. * That's all..
  87. *
  88. * Jean II
  89. */
  90. #define DRIVER_NAME "orinoco_pci"
  91. #define PFX DRIVER_NAME ": "
  92. #include <linux/config.h>
  93. #include <linux/module.h>
  94. #include <linux/kernel.h>
  95. #include <linux/init.h>
  96. #include <linux/delay.h>
  97. #include <linux/pci.h>
  98. #include "orinoco.h"
  99. /* All the magic there is from wlan-ng */
  100. /* Magic offset of the reset register of the PCI card */
  101. #define HERMES_PCI_COR (0x26)
  102. /* Magic bitmask to reset the card */
  103. #define HERMES_PCI_COR_MASK (0x0080)
  104. /* Magic timeouts for doing the reset.
  105. * Those times are straight from wlan-ng, and it is claimed that they
  106. * are necessary. Alan will kill me. Take your time and grab a coffee. */
  107. #define HERMES_PCI_COR_ONT (250) /* ms */
  108. #define HERMES_PCI_COR_OFFT (500) /* ms */
  109. #define HERMES_PCI_COR_BUSYT (500) /* ms */
  110. /* Orinoco PCI specific data */
  111. struct orinoco_pci_card {
  112. void __iomem *pci_ioaddr;
  113. };
  114. /*
  115. * Do a soft reset of the PCI card using the Configuration Option Register
  116. * We need this to get going...
  117. * This is the part of the code that is strongly inspired from wlan-ng
  118. *
  119. * Note : This code is done with irq enabled. This mean that many
  120. * interrupts will occur while we are there. This is why we use the
  121. * jiffies to regulate time instead of a straight mdelay(). Usually we
  122. * need only around 245 iteration of the loop to do 250 ms delay.
  123. *
  124. * Note bis : Don't try to access HERMES_CMD during the reset phase.
  125. * It just won't work !
  126. */
  127. static int
  128. orinoco_pci_cor_reset(struct orinoco_private *priv)
  129. {
  130. hermes_t *hw = &priv->hw;
  131. unsigned long timeout;
  132. u16 reg;
  133. /* Assert the reset until the card notice */
  134. hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK);
  135. mdelay(HERMES_PCI_COR_ONT);
  136. /* Give time for the card to recover from this hard effort */
  137. hermes_write_regn(hw, PCI_COR, 0x0000);
  138. mdelay(HERMES_PCI_COR_OFFT);
  139. /* The card is ready when it's no longer busy */
  140. timeout = jiffies + (HERMES_PCI_COR_BUSYT * HZ / 1000);
  141. reg = hermes_read_regn(hw, CMD);
  142. while (time_before(jiffies, timeout) && (reg & HERMES_CMD_BUSY)) {
  143. mdelay(1);
  144. reg = hermes_read_regn(hw, CMD);
  145. }
  146. /* Still busy? */
  147. if (reg & HERMES_CMD_BUSY) {
  148. printk(KERN_ERR PFX "Busy timeout\n");
  149. return -ETIMEDOUT;
  150. }
  151. return 0;
  152. }
  153. /*
  154. * Initialise a card. Mostly similar to PLX code.
  155. */
  156. static int orinoco_pci_init_one(struct pci_dev *pdev,
  157. const struct pci_device_id *ent)
  158. {
  159. int err = 0;
  160. void __iomem *pci_ioaddr = NULL;
  161. struct orinoco_private *priv = NULL;
  162. struct orinoco_pci_card *card;
  163. struct net_device *dev = NULL;
  164. err = pci_enable_device(pdev);
  165. if (err) {
  166. printk(KERN_ERR PFX "Cannot enable PCI device\n");
  167. return err;
  168. }
  169. err = pci_request_regions(pdev, DRIVER_NAME);
  170. if (err != 0) {
  171. printk(KERN_ERR PFX "Cannot obtain PCI resources\n");
  172. goto fail_resources;
  173. }
  174. /* Resource 0 is mapped to the hermes registers */
  175. pci_ioaddr = pci_iomap(pdev, 0, 0);
  176. if (!pci_ioaddr) {
  177. err = -EIO;
  178. printk(KERN_ERR PFX "Cannot remap hardware registers\n");
  179. goto fail_map;
  180. }
  181. /* Allocate network device */
  182. dev = alloc_orinocodev(sizeof(*card), orinoco_pci_cor_reset);
  183. if (! dev) {
  184. err = -ENOMEM;
  185. goto fail_alloc;
  186. }
  187. priv = netdev_priv(dev);
  188. card = priv->card;
  189. card->pci_ioaddr = pci_ioaddr;
  190. dev->mem_start = pci_resource_start(pdev, 0);
  191. dev->mem_end = dev->mem_start + pci_resource_len(pdev, 0) - 1;
  192. SET_MODULE_OWNER(dev);
  193. SET_NETDEV_DEV(dev, &pdev->dev);
  194. hermes_struct_init(&priv->hw, pci_ioaddr, HERMES_32BIT_REGSPACING);
  195. printk(KERN_DEBUG PFX "Detected device %s, mem:0x%lx-0x%lx, irq %d\n",
  196. pci_name(pdev), dev->mem_start, dev->mem_end, pdev->irq);
  197. err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ,
  198. dev->name, dev);
  199. if (err) {
  200. printk(KERN_ERR PFX "Cannot allocate IRQ %d\n", pdev->irq);
  201. err = -EBUSY;
  202. goto fail_irq;
  203. }
  204. dev->irq = pdev->irq;
  205. /* Perform a COR reset to start the card */
  206. err = orinoco_pci_cor_reset(priv);
  207. if (err) {
  208. printk(KERN_ERR PFX "Initial reset failed\n");
  209. goto fail;
  210. }
  211. err = register_netdev(dev);
  212. if (err) {
  213. printk(KERN_ERR PFX "Failed to register net device\n");
  214. goto fail;
  215. }
  216. pci_set_drvdata(pdev, dev);
  217. return 0;
  218. fail:
  219. free_irq(pdev->irq, dev);
  220. fail_irq:
  221. pci_set_drvdata(pdev, NULL);
  222. free_orinocodev(dev);
  223. fail_alloc:
  224. iounmap(pci_ioaddr);
  225. fail_map:
  226. pci_release_regions(pdev);
  227. fail_resources:
  228. pci_disable_device(pdev);
  229. return err;
  230. }
  231. static void __devexit orinoco_pci_remove_one(struct pci_dev *pdev)
  232. {
  233. struct net_device *dev = pci_get_drvdata(pdev);
  234. struct orinoco_private *priv = netdev_priv(dev);
  235. struct orinoco_pci_card *card = priv->card;
  236. unregister_netdev(dev);
  237. free_irq(dev->irq, dev);
  238. pci_set_drvdata(pdev, NULL);
  239. free_orinocodev(dev);
  240. iounmap(card->pci_ioaddr);
  241. pci_release_regions(pdev);
  242. pci_disable_device(pdev);
  243. }
  244. static int orinoco_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  245. {
  246. struct net_device *dev = pci_get_drvdata(pdev);
  247. struct orinoco_private *priv = netdev_priv(dev);
  248. unsigned long flags;
  249. int err;
  250. err = orinoco_lock(priv, &flags);
  251. if (err) {
  252. printk(KERN_ERR "%s: hw_unavailable on orinoco_pci_suspend\n",
  253. dev->name);
  254. return err;
  255. }
  256. err = __orinoco_down(dev);
  257. if (err)
  258. printk(KERN_WARNING "%s: orinoco_pci_suspend(): Error %d downing interface\n",
  259. dev->name, err);
  260. netif_device_detach(dev);
  261. priv->hw_unavailable++;
  262. orinoco_unlock(priv, &flags);
  263. free_irq(pdev->irq, dev);
  264. pci_save_state(pdev);
  265. pci_disable_device(pdev);
  266. pci_set_power_state(pdev, PCI_D3hot);
  267. return 0;
  268. }
  269. static int orinoco_pci_resume(struct pci_dev *pdev)
  270. {
  271. struct net_device *dev = pci_get_drvdata(pdev);
  272. struct orinoco_private *priv = netdev_priv(dev);
  273. unsigned long flags;
  274. int err;
  275. printk(KERN_DEBUG "%s: Orinoco-PCI waking up\n", dev->name);
  276. pci_set_power_state(pdev, 0);
  277. pci_enable_device(pdev);
  278. pci_restore_state(pdev);
  279. err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ,
  280. dev->name, dev);
  281. if (err) {
  282. printk(KERN_ERR "%s: Cannot re-allocate IRQ\n", dev->name);
  283. pci_disable_device(pdev);
  284. return -EBUSY;
  285. }
  286. err = orinoco_reinit_firmware(dev);
  287. if (err) {
  288. printk(KERN_ERR "%s: Error %d re-initializing firmware on orinoco_pci_resume()\n",
  289. dev->name, err);
  290. return err;
  291. }
  292. spin_lock_irqsave(&priv->lock, flags);
  293. netif_device_attach(dev);
  294. priv->hw_unavailable--;
  295. if (priv->open && (! priv->hw_unavailable)) {
  296. err = __orinoco_up(dev);
  297. if (err)
  298. printk(KERN_ERR "%s: Error %d restarting card on orinoco_pci_resume()\n",
  299. dev->name, err);
  300. }
  301. spin_unlock_irqrestore(&priv->lock, flags);
  302. return 0;
  303. }
  304. static struct pci_device_id orinoco_pci_pci_id_table[] = {
  305. /* Intersil Prism 3 */
  306. {0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID,},
  307. /* Intersil Prism 2.5 */
  308. {0x1260, 0x3873, PCI_ANY_ID, PCI_ANY_ID,},
  309. /* Samsung MagicLAN SWL-2210P */
  310. {0x167d, 0xa000, PCI_ANY_ID, PCI_ANY_ID,},
  311. {0,},
  312. };
  313. MODULE_DEVICE_TABLE(pci, orinoco_pci_pci_id_table);
  314. static struct pci_driver orinoco_pci_driver = {
  315. .name = DRIVER_NAME,
  316. .id_table = orinoco_pci_pci_id_table,
  317. .probe = orinoco_pci_init_one,
  318. .remove = __devexit_p(orinoco_pci_remove_one),
  319. .suspend = orinoco_pci_suspend,
  320. .resume = orinoco_pci_resume,
  321. };
  322. static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
  323. " (Pavel Roskin <proski@gnu.org>,"
  324. " David Gibson <hermes@gibson.dropbear.id.au> &"
  325. " Jean Tourrilhes <jt@hpl.hp.com>)";
  326. MODULE_AUTHOR("Pavel Roskin <proski@gnu.org> & David Gibson <hermes@gibson.dropbear.id.au>");
  327. MODULE_DESCRIPTION("Driver for wireless LAN cards using direct PCI interface");
  328. MODULE_LICENSE("Dual MPL/GPL");
  329. static int __init orinoco_pci_init(void)
  330. {
  331. printk(KERN_DEBUG "%s\n", version);
  332. return pci_module_init(&orinoco_pci_driver);
  333. }
  334. static void __exit orinoco_pci_exit(void)
  335. {
  336. pci_unregister_driver(&orinoco_pci_driver);
  337. }
  338. module_init(orinoco_pci_init);
  339. module_exit(orinoco_pci_exit);
  340. /*
  341. * Local variables:
  342. * c-indent-level: 8
  343. * c-basic-offset: 8
  344. * tab-width: 8
  345. * End:
  346. */