netxen_nic_init.c 31 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_ioctl.h"
  38. #include "netxen_nic_phan_reg.h"
  39. struct crb_addr_pair {
  40. long addr;
  41. long data;
  42. };
  43. #define NETXEN_MAX_CRB_XFORM 60
  44. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  45. #define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff )
  46. #define crb_addr_transform(name) \
  47. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  48. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  49. static inline void
  50. netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  51. unsigned long off, int *data)
  52. {
  53. void __iomem *addr = (adapter->ahw.pci_base + off);
  54. writel(*data, addr);
  55. }
  56. static void crb_addr_transform_setup(void)
  57. {
  58. crb_addr_transform(XDMA);
  59. crb_addr_transform(TIMR);
  60. crb_addr_transform(SRE);
  61. crb_addr_transform(SQN3);
  62. crb_addr_transform(SQN2);
  63. crb_addr_transform(SQN1);
  64. crb_addr_transform(SQN0);
  65. crb_addr_transform(SQS3);
  66. crb_addr_transform(SQS2);
  67. crb_addr_transform(SQS1);
  68. crb_addr_transform(SQS0);
  69. crb_addr_transform(RPMX7);
  70. crb_addr_transform(RPMX6);
  71. crb_addr_transform(RPMX5);
  72. crb_addr_transform(RPMX4);
  73. crb_addr_transform(RPMX3);
  74. crb_addr_transform(RPMX2);
  75. crb_addr_transform(RPMX1);
  76. crb_addr_transform(RPMX0);
  77. crb_addr_transform(ROMUSB);
  78. crb_addr_transform(SN);
  79. crb_addr_transform(QMN);
  80. crb_addr_transform(QMS);
  81. crb_addr_transform(PGNI);
  82. crb_addr_transform(PGND);
  83. crb_addr_transform(PGN3);
  84. crb_addr_transform(PGN2);
  85. crb_addr_transform(PGN1);
  86. crb_addr_transform(PGN0);
  87. crb_addr_transform(PGSI);
  88. crb_addr_transform(PGSD);
  89. crb_addr_transform(PGS3);
  90. crb_addr_transform(PGS2);
  91. crb_addr_transform(PGS1);
  92. crb_addr_transform(PGS0);
  93. crb_addr_transform(PS);
  94. crb_addr_transform(PH);
  95. crb_addr_transform(NIU);
  96. crb_addr_transform(I2Q);
  97. crb_addr_transform(EG);
  98. crb_addr_transform(MN);
  99. crb_addr_transform(MS);
  100. crb_addr_transform(CAS2);
  101. crb_addr_transform(CAS1);
  102. crb_addr_transform(CAS0);
  103. crb_addr_transform(CAM);
  104. crb_addr_transform(C2C1);
  105. crb_addr_transform(C2C0);
  106. }
  107. int netxen_init_firmware(struct netxen_adapter *adapter)
  108. {
  109. u32 state = 0, loops = 0, err = 0;
  110. /* Window 1 call */
  111. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  112. if (state == PHAN_INITIALIZE_ACK)
  113. return 0;
  114. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  115. udelay(100);
  116. /* Window 1 call */
  117. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  118. loops++;
  119. }
  120. if (loops >= 2000) {
  121. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  122. state);
  123. err = -EIO;
  124. return err;
  125. }
  126. /* Window 1 call */
  127. writel(PHAN_INITIALIZE_ACK,
  128. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  129. return err;
  130. }
  131. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  132. {
  133. int ctxid, ring;
  134. u32 i;
  135. u32 num_rx_bufs = 0;
  136. struct netxen_rcv_desc_ctx *rcv_desc;
  137. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  138. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  139. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  140. struct netxen_rx_buffer *rx_buf;
  141. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  142. rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
  143. rcv_desc->begin_alloc = 0;
  144. rx_buf = rcv_desc->rx_buf_arr;
  145. num_rx_bufs = rcv_desc->max_rx_desc_count;
  146. /*
  147. * Now go through all of them, set reference handles
  148. * and put them in the queues.
  149. */
  150. for (i = 0; i < num_rx_bufs; i++) {
  151. rx_buf->ref_handle = i;
  152. rx_buf->state = NETXEN_BUFFER_FREE;
  153. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  154. "%p\n", ctxid, i, rx_buf);
  155. rx_buf++;
  156. }
  157. }
  158. }
  159. DPRINTK(INFO, "initialized buffers for %s and %s\n",
  160. "adapter->free_cmd_buf_list", "adapter->free_rxbuf");
  161. }
  162. void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
  163. {
  164. if (netxen_nic_get_board_info(adapter) != 0)
  165. printk("%s: Error getting board config info.\n",
  166. netxen_nic_driver_name);
  167. switch (adapter->ahw.board_type) {
  168. case NETXEN_NIC_GBE:
  169. adapter->ahw.max_ports = 4;
  170. break;
  171. case NETXEN_NIC_XGBE:
  172. adapter->ahw.max_ports = 1;
  173. break;
  174. default:
  175. printk(KERN_ERR "%s: Unknown board type\n",
  176. netxen_nic_driver_name);
  177. }
  178. }
  179. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  180. {
  181. struct netxen_drvops *ops = adapter->ops;
  182. switch (adapter->ahw.board_type) {
  183. case NETXEN_NIC_GBE:
  184. ops->enable_phy_interrupts =
  185. netxen_niu_gbe_enable_phy_interrupts;
  186. ops->disable_phy_interrupts =
  187. netxen_niu_gbe_disable_phy_interrupts;
  188. ops->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  189. ops->macaddr_set = netxen_niu_macaddr_set;
  190. ops->set_mtu = netxen_nic_set_mtu_gb;
  191. ops->set_promisc = netxen_niu_set_promiscuous_mode;
  192. ops->unset_promisc = netxen_niu_set_promiscuous_mode;
  193. ops->phy_read = netxen_niu_gbe_phy_read;
  194. ops->phy_write = netxen_niu_gbe_phy_write;
  195. ops->init_port = netxen_niu_gbe_init_port;
  196. ops->init_niu = netxen_nic_init_niu_gb;
  197. ops->stop_port = netxen_niu_disable_gbe_port;
  198. break;
  199. case NETXEN_NIC_XGBE:
  200. ops->enable_phy_interrupts =
  201. netxen_niu_xgbe_enable_phy_interrupts;
  202. ops->disable_phy_interrupts =
  203. netxen_niu_xgbe_disable_phy_interrupts;
  204. ops->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  205. ops->macaddr_set = netxen_niu_xg_macaddr_set;
  206. ops->set_mtu = netxen_nic_set_mtu_xgb;
  207. ops->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  208. ops->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
  209. ops->stop_port = netxen_niu_disable_xg_port;
  210. break;
  211. default:
  212. break;
  213. }
  214. }
  215. /*
  216. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  217. * address to external PCI CRB address.
  218. */
  219. unsigned long netxen_decode_crb_addr(unsigned long addr)
  220. {
  221. int i;
  222. unsigned long base_addr, offset, pci_base;
  223. crb_addr_transform_setup();
  224. pci_base = NETXEN_ADDR_ERROR;
  225. base_addr = addr & 0xfff00000;
  226. offset = addr & 0x000fffff;
  227. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  228. if (crb_addr_xform[i] == base_addr) {
  229. pci_base = i << 20;
  230. break;
  231. }
  232. }
  233. if (pci_base == NETXEN_ADDR_ERROR)
  234. return pci_base;
  235. else
  236. return (pci_base + offset);
  237. }
  238. static long rom_max_timeout = 10000;
  239. static long rom_lock_timeout = 1000000;
  240. static inline int rom_lock(struct netxen_adapter *adapter)
  241. {
  242. int iter;
  243. u32 done = 0;
  244. int timeout = 0;
  245. while (!done) {
  246. /* acquire semaphore2 from PCI HW block */
  247. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  248. &done);
  249. if (done == 1)
  250. break;
  251. if (timeout >= rom_lock_timeout)
  252. return -EIO;
  253. timeout++;
  254. /*
  255. * Yield CPU
  256. */
  257. if (!in_atomic())
  258. schedule();
  259. else {
  260. for (iter = 0; iter < 20; iter++)
  261. cpu_relax(); /*This a nop instr on i386 */
  262. }
  263. }
  264. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  265. return 0;
  266. }
  267. static inline void rom_unlock(struct netxen_adapter *adapter)
  268. {
  269. u32 val;
  270. /* release semaphore2 */
  271. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  272. }
  273. int netxen_wait_rom_done(struct netxen_adapter *adapter)
  274. {
  275. long timeout = 0;
  276. long done = 0;
  277. while (done == 0) {
  278. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  279. done &= 2;
  280. timeout++;
  281. if (timeout >= rom_max_timeout) {
  282. printk("Timeout reached waiting for rom done");
  283. return -EIO;
  284. }
  285. }
  286. return 0;
  287. }
  288. static inline int
  289. do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  290. {
  291. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  292. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  293. udelay(100); /* prevent bursting on CRB */
  294. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  295. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  296. if (netxen_wait_rom_done(adapter)) {
  297. printk("Error waiting for rom done\n");
  298. return -EIO;
  299. }
  300. /* reset abyte_cnt and dummy_byte_cnt */
  301. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  302. udelay(100); /* prevent bursting on CRB */
  303. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  304. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  305. return 0;
  306. }
  307. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  308. {
  309. int ret;
  310. if (rom_lock(adapter) != 0)
  311. return -EIO;
  312. ret = do_rom_fast_read(adapter, addr, valp);
  313. rom_unlock(adapter);
  314. return ret;
  315. }
  316. #define NETXEN_BOARDTYPE 0x4008
  317. #define NETXEN_BOARDNUM 0x400c
  318. #define NETXEN_CHIPNUM 0x4010
  319. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  320. #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
  321. #define NETXEN_ROM_FOUND_INIT 0x400
  322. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  323. {
  324. int addr, val, status;
  325. int n, i;
  326. int init_delay = 0;
  327. struct crb_addr_pair *buf;
  328. unsigned long off;
  329. /* resetall */
  330. status = netxen_nic_get_board_info(adapter);
  331. if (status)
  332. printk("%s: pinit_from_rom: Error getting board info\n",
  333. netxen_nic_driver_name);
  334. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  335. NETXEN_ROMBUS_RESET);
  336. if (verbose) {
  337. int val;
  338. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  339. printk("P2 ROM board type: 0x%08x\n", val);
  340. else
  341. printk("Could not read board type\n");
  342. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  343. printk("P2 ROM board num: 0x%08x\n", val);
  344. else
  345. printk("Could not read board number\n");
  346. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  347. printk("P2 ROM chip num: 0x%08x\n", val);
  348. else
  349. printk("Could not read chip number\n");
  350. }
  351. if (netxen_rom_fast_read(adapter, 0, &n) == 0
  352. && (n & NETXEN_ROM_FIRST_BARRIER)) {
  353. n &= ~NETXEN_ROM_ROUNDUP;
  354. if (n < NETXEN_ROM_FOUND_INIT) {
  355. if (verbose)
  356. printk("%s: %d CRB init values found"
  357. " in ROM.\n", netxen_nic_driver_name, n);
  358. } else {
  359. printk("%s:n=0x%x Error! NetXen card flash not"
  360. " initialized.\n", __FUNCTION__, n);
  361. return -EIO;
  362. }
  363. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  364. if (buf == NULL) {
  365. printk("%s: pinit_from_rom: Unable to calloc memory.\n",
  366. netxen_nic_driver_name);
  367. return -ENOMEM;
  368. }
  369. for (i = 0; i < n; i++) {
  370. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  371. || netxen_rom_fast_read(adapter, 8 * i + 8,
  372. &addr) != 0)
  373. return -EIO;
  374. buf[i].addr = addr;
  375. buf[i].data = val;
  376. if (verbose)
  377. printk("%s: PCI: 0x%08x == 0x%08x\n",
  378. netxen_nic_driver_name, (unsigned int)
  379. netxen_decode_crb_addr((unsigned long)
  380. addr), val);
  381. }
  382. for (i = 0; i < n; i++) {
  383. off =
  384. netxen_decode_crb_addr((unsigned long)buf[i].addr) +
  385. NETXEN_PCI_CRBSPACE;
  386. /* skipping cold reboot MAGIC */
  387. if (off == NETXEN_CAM_RAM(0x1fc))
  388. continue;
  389. /* After writing this register, HW needs time for CRB */
  390. /* to quiet down (else crb_window returns 0xffffffff) */
  391. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  392. init_delay = 1;
  393. /* hold xdma in reset also */
  394. buf[i].data = 0x8000ff;
  395. }
  396. if (ADDR_IN_WINDOW1(off)) {
  397. writel(buf[i].data,
  398. NETXEN_CRB_NORMALIZE(adapter, off));
  399. } else {
  400. netxen_nic_pci_change_crbwindow(adapter, 0);
  401. writel(buf[i].data,
  402. adapter->ahw.pci_base + off);
  403. netxen_nic_pci_change_crbwindow(adapter, 1);
  404. }
  405. if (init_delay == 1) {
  406. ssleep(1);
  407. init_delay = 0;
  408. }
  409. msleep(1);
  410. }
  411. kfree(buf);
  412. /* disable_peg_cache_all */
  413. /* unreset_net_cache */
  414. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  415. 4);
  416. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  417. (val & 0xffffff0f));
  418. /* p2dn replyCount */
  419. netxen_crb_writelit_adapter(adapter,
  420. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  421. /* disable_peg_cache 0 */
  422. netxen_crb_writelit_adapter(adapter,
  423. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  424. /* disable_peg_cache 1 */
  425. netxen_crb_writelit_adapter(adapter,
  426. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  427. /* peg_clr_all */
  428. /* peg_clr 0 */
  429. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  430. 0);
  431. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  432. 0);
  433. /* peg_clr 1 */
  434. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  435. 0);
  436. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  437. 0);
  438. /* peg_clr 2 */
  439. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  440. 0);
  441. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  442. 0);
  443. /* peg_clr 3 */
  444. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  445. 0);
  446. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  447. 0);
  448. }
  449. return 0;
  450. }
  451. void netxen_phantom_init(struct netxen_adapter *adapter)
  452. {
  453. u32 val = 0;
  454. int loops = 0;
  455. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE, &val, 4);
  456. writel(1,
  457. NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
  458. if (0 == val) {
  459. while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
  460. udelay(100);
  461. val =
  462. readl(NETXEN_CRB_NORMALIZE
  463. (adapter, CRB_CMDPEG_STATE));
  464. loops++;
  465. }
  466. if (val != PHAN_INITIALIZE_COMPLETE)
  467. printk("WARNING: Initial boot wait loop failed...\n");
  468. }
  469. }
  470. int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
  471. {
  472. int ctx;
  473. for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
  474. struct netxen_recv_context *recv_ctx =
  475. &(adapter->recv_ctx[ctx]);
  476. u32 consumer;
  477. struct status_desc *desc_head;
  478. struct status_desc *desc; /* used to read status desc here */
  479. consumer = recv_ctx->status_rx_consumer;
  480. desc_head = recv_ctx->rcv_status_desc_head;
  481. desc = &desc_head[consumer];
  482. if (((le16_to_cpu(desc->owner)) & STATUS_OWNER_HOST))
  483. return 1;
  484. }
  485. return 0;
  486. }
  487. void netxen_watchdog_task(unsigned long v)
  488. {
  489. int port_num;
  490. struct netxen_port *port;
  491. struct net_device *netdev;
  492. struct netxen_adapter *adapter = (struct netxen_adapter *)v;
  493. for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
  494. port = adapter->port[port_num];
  495. netdev = port->netdev;
  496. if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
  497. printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
  498. netxen_nic_driver_name, port_num, netdev->name);
  499. netif_carrier_on(netdev);
  500. }
  501. if (netif_queue_stopped(netdev))
  502. netif_wake_queue(netdev);
  503. }
  504. netxen_nic_pci_change_crbwindow(adapter, 1);
  505. if (adapter->ops->handle_phy_intr)
  506. adapter->ops->handle_phy_intr(adapter);
  507. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  508. }
  509. /*
  510. * netxen_process_rcv() send the received packet to the protocol stack.
  511. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  512. * invoke the routine to send more rx buffers to the Phantom...
  513. */
  514. void
  515. netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  516. struct status_desc *desc)
  517. {
  518. struct netxen_port *port = adapter->port[STATUS_DESC_PORT(desc)];
  519. struct pci_dev *pdev = port->pdev;
  520. struct net_device *netdev = port->netdev;
  521. int index = le16_to_cpu(desc->reference_handle);
  522. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  523. struct netxen_rx_buffer *buffer;
  524. struct sk_buff *skb;
  525. u32 length = le16_to_cpu(desc->total_length);
  526. u32 desc_ctx;
  527. struct netxen_rcv_desc_ctx *rcv_desc;
  528. int ret;
  529. desc_ctx = STATUS_DESC_TYPE(desc);
  530. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  531. printk("%s: %s Bad Rcv descriptor ring\n",
  532. netxen_nic_driver_name, netdev->name);
  533. return;
  534. }
  535. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  536. buffer = &rcv_desc->rx_buf_arr[index];
  537. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  538. PCI_DMA_FROMDEVICE);
  539. skb = (struct sk_buff *)buffer->skb;
  540. if (likely(STATUS_DESC_STATUS(desc) == STATUS_CKSUM_OK)) {
  541. port->stats.csummed++;
  542. skb->ip_summed = CHECKSUM_UNNECESSARY;
  543. } else
  544. skb->ip_summed = CHECKSUM_NONE;
  545. skb->dev = netdev;
  546. skb_put(skb, length);
  547. skb->protocol = eth_type_trans(skb, netdev);
  548. ret = netif_receive_skb(skb);
  549. /*
  550. * RH: Do we need these stats on a regular basis. Can we get it from
  551. * Linux stats.
  552. */
  553. switch (ret) {
  554. case NET_RX_SUCCESS:
  555. port->stats.uphappy++;
  556. break;
  557. case NET_RX_CN_LOW:
  558. port->stats.uplcong++;
  559. break;
  560. case NET_RX_CN_MOD:
  561. port->stats.upmcong++;
  562. break;
  563. case NET_RX_CN_HIGH:
  564. port->stats.uphcong++;
  565. break;
  566. case NET_RX_DROP:
  567. port->stats.updropped++;
  568. break;
  569. default:
  570. port->stats.updunno++;
  571. break;
  572. }
  573. netdev->last_rx = jiffies;
  574. rcv_desc->rcv_free++;
  575. rcv_desc->rcv_pending--;
  576. /*
  577. * We just consumed one buffer so post a buffer.
  578. */
  579. adapter->stats.post_called++;
  580. buffer->skb = NULL;
  581. buffer->state = NETXEN_BUFFER_FREE;
  582. port->stats.no_rcv++;
  583. port->stats.rxbytes += length;
  584. }
  585. /* Process Receive status ring */
  586. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  587. {
  588. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  589. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  590. struct status_desc *desc; /* used to read status desc here */
  591. u32 consumer = recv_ctx->status_rx_consumer;
  592. int count = 0, ring;
  593. DPRINTK(INFO, "procesing receive\n");
  594. /*
  595. * we assume in this case that there is only one port and that is
  596. * port #1...changes need to be done in firmware to indicate port
  597. * number as part of the descriptor. This way we will be able to get
  598. * the netdev which is associated with that device.
  599. */
  600. while (count < max) {
  601. desc = &desc_head[consumer];
  602. if (!((le16_to_cpu(desc->owner)) & STATUS_OWNER_HOST)) {
  603. DPRINTK(ERR, "desc %p ownedby %x\n", desc, desc->owner);
  604. break;
  605. }
  606. netxen_process_rcv(adapter, ctxid, desc);
  607. desc->owner = STATUS_OWNER_PHANTOM;
  608. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  609. count++;
  610. }
  611. if (count) {
  612. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  613. netxen_post_rx_buffers(adapter, ctxid, ring);
  614. }
  615. }
  616. /* update the consumer index in phantom */
  617. if (count) {
  618. adapter->stats.process_rcv++;
  619. recv_ctx->status_rx_consumer = consumer;
  620. /* Window = 1 */
  621. writel(consumer,
  622. NETXEN_CRB_NORMALIZE(adapter,
  623. recv_crb_registers[ctxid].
  624. crb_rcv_status_consumer));
  625. }
  626. return count;
  627. }
  628. /* Process Command status ring */
  629. void netxen_process_cmd_ring(unsigned long data)
  630. {
  631. u32 last_consumer;
  632. u32 consumer;
  633. struct netxen_adapter *adapter = (struct netxen_adapter *)data;
  634. int count = 0;
  635. struct netxen_cmd_buffer *buffer;
  636. struct netxen_port *port; /* port #1 */
  637. struct netxen_port *nport;
  638. struct pci_dev *pdev;
  639. struct netxen_skb_frag *frag;
  640. u32 i;
  641. struct sk_buff *skb = NULL;
  642. int p;
  643. spin_lock(&adapter->tx_lock);
  644. last_consumer = adapter->last_cmd_consumer;
  645. DPRINTK(INFO, "procesing xmit complete\n");
  646. /* we assume in this case that there is only one port and that is
  647. * port #1...changes need to be done in firmware to indicate port
  648. * number as part of the descriptor. This way we will be able to get
  649. * the netdev which is associated with that device.
  650. */
  651. /* Window = 1 */
  652. consumer =
  653. readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMD_CONSUMER_OFFSET));
  654. if (last_consumer == consumer) { /* Ring is empty */
  655. DPRINTK(INFO, "last_consumer %d == consumer %d\n",
  656. last_consumer, consumer);
  657. spin_unlock(&adapter->tx_lock);
  658. return;
  659. }
  660. adapter->proc_cmd_buf_counter++;
  661. adapter->stats.process_xmit++;
  662. /*
  663. * Not needed - does not seem to be used anywhere.
  664. * adapter->cmd_consumer = consumer;
  665. */
  666. spin_unlock(&adapter->tx_lock);
  667. while ((last_consumer != consumer) && (count < MAX_STATUS_HANDLE)) {
  668. buffer = &adapter->cmd_buf_arr[last_consumer];
  669. port = adapter->port[buffer->port];
  670. pdev = port->pdev;
  671. frag = &buffer->frag_array[0];
  672. skb = buffer->skb;
  673. if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
  674. pci_unmap_single(pdev, frag->dma, frag->length,
  675. PCI_DMA_TODEVICE);
  676. for (i = 1; i < buffer->frag_count; i++) {
  677. DPRINTK(INFO, "getting fragment no %d\n", i);
  678. frag++; /* Get the next frag */
  679. pci_unmap_page(pdev, frag->dma, frag->length,
  680. PCI_DMA_TODEVICE);
  681. }
  682. port->stats.skbfreed++;
  683. dev_kfree_skb_any(skb);
  684. skb = NULL;
  685. } else if (adapter->proc_cmd_buf_counter == 1) {
  686. port->stats.txnullskb++;
  687. }
  688. if (unlikely(netif_queue_stopped(port->netdev)
  689. && netif_carrier_ok(port->netdev))
  690. && ((jiffies - port->netdev->trans_start) >
  691. port->netdev->watchdog_timeo)) {
  692. schedule_work(&port->adapter->tx_timeout_task);
  693. }
  694. last_consumer = get_next_index(last_consumer,
  695. adapter->max_tx_desc_count);
  696. count++;
  697. }
  698. adapter->stats.noxmitdone += count;
  699. count = 0;
  700. spin_lock(&adapter->tx_lock);
  701. if ((--adapter->proc_cmd_buf_counter) == 0) {
  702. adapter->last_cmd_consumer = last_consumer;
  703. while ((adapter->last_cmd_consumer != consumer)
  704. && (count < MAX_STATUS_HANDLE)) {
  705. buffer =
  706. &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
  707. count++;
  708. if (buffer->skb)
  709. break;
  710. else
  711. adapter->last_cmd_consumer =
  712. get_next_index(adapter->last_cmd_consumer,
  713. adapter->max_tx_desc_count);
  714. }
  715. }
  716. if (count) {
  717. for (p = 0; p < adapter->ahw.max_ports; p++) {
  718. nport = adapter->port[p];
  719. if (netif_queue_stopped(nport->netdev)
  720. && (nport->flags & NETXEN_NETDEV_STATUS)) {
  721. netif_wake_queue(nport->netdev);
  722. nport->flags &= ~NETXEN_NETDEV_STATUS;
  723. }
  724. }
  725. }
  726. spin_unlock(&adapter->tx_lock);
  727. DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
  728. __FUNCTION__);
  729. }
  730. /*
  731. * netxen_post_rx_buffers puts buffer in the Phantom memory
  732. */
  733. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  734. {
  735. struct pci_dev *pdev = adapter->ahw.pdev;
  736. struct sk_buff *skb;
  737. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  738. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  739. struct netxen_recv_crb *crbarea = &recv_crb_registers[ctx];
  740. struct netxen_rcv_desc_crb *rcv_desc_crb = NULL;
  741. u32 producer;
  742. struct rcv_desc *pdesc;
  743. struct netxen_rx_buffer *buffer;
  744. int count = 0;
  745. int index = 0;
  746. adapter->stats.post_called++;
  747. rcv_desc = &recv_ctx->rcv_desc[ringid];
  748. rcv_desc_crb = &crbarea->rcv_desc_crb[ringid];
  749. producer = rcv_desc->producer;
  750. index = rcv_desc->begin_alloc;
  751. buffer = &rcv_desc->rx_buf_arr[index];
  752. /* We can start writing rx descriptors into the phantom memory. */
  753. while (buffer->state == NETXEN_BUFFER_FREE) {
  754. skb = dev_alloc_skb(rcv_desc->skb_size);
  755. if (unlikely(!skb)) {
  756. /*
  757. * We need to schedule the posting of buffers to the pegs.
  758. */
  759. rcv_desc->begin_alloc = index;
  760. DPRINTK(ERR, "unm_post_rx_buffers: "
  761. " allocated only %d buffers\n", count);
  762. break;
  763. }
  764. count++; /* now there should be no failure */
  765. pdesc = &rcv_desc->desc_head[producer];
  766. skb_reserve(skb, NET_IP_ALIGN);
  767. /*
  768. * This will be setup when we receive the
  769. * buffer after it has been filled
  770. * skb->dev = netdev;
  771. */
  772. buffer->skb = skb;
  773. buffer->state = NETXEN_BUFFER_BUSY;
  774. buffer->dma = pci_map_single(pdev, skb->data,
  775. rcv_desc->dma_size,
  776. PCI_DMA_FROMDEVICE);
  777. /* make a rcv descriptor */
  778. pdesc->reference_handle = le16_to_cpu(buffer->ref_handle);
  779. pdesc->buffer_length = le16_to_cpu(rcv_desc->dma_size);
  780. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  781. DPRINTK(INFO, "done writing descripter\n");
  782. producer =
  783. get_next_index(producer, rcv_desc->max_rx_desc_count);
  784. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  785. buffer = &rcv_desc->rx_buf_arr[index];
  786. }
  787. /* if we did allocate buffers, then write the count to Phantom */
  788. if (count) {
  789. rcv_desc->begin_alloc = index;
  790. rcv_desc->rcv_pending += count;
  791. adapter->stats.lastposted = count;
  792. adapter->stats.posted += count;
  793. rcv_desc->producer = producer;
  794. if (rcv_desc->rcv_free >= 32) {
  795. rcv_desc->rcv_free = 0;
  796. /* Window = 1 */
  797. writel((producer - 1) &
  798. (rcv_desc->max_rx_desc_count - 1),
  799. NETXEN_CRB_NORMALIZE(adapter,
  800. rcv_desc_crb->
  801. crb_rcv_producer_offset));
  802. wmb();
  803. }
  804. }
  805. }
  806. int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
  807. {
  808. if (find_diff_among(adapter->last_cmd_consumer,
  809. adapter->cmd_producer,
  810. adapter->max_tx_desc_count) > 0)
  811. return 1;
  812. return 0;
  813. }
  814. int
  815. netxen_nic_fill_statistics(struct netxen_adapter *adapter,
  816. struct netxen_port *port,
  817. struct netxen_statistics *netxen_stats)
  818. {
  819. void __iomem *addr;
  820. if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
  821. netxen_nic_pci_change_crbwindow(adapter, 0);
  822. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_BYTE_CNT,
  823. &(netxen_stats->tx_bytes));
  824. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_FRAME_CNT,
  825. &(netxen_stats->tx_packets));
  826. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_BYTE_CNT,
  827. &(netxen_stats->rx_bytes));
  828. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_FRAME_CNT,
  829. &(netxen_stats->rx_packets));
  830. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_AGGR_ERROR_CNT,
  831. &(netxen_stats->rx_errors));
  832. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_CRC_ERROR_CNT,
  833. &(netxen_stats->rx_crc_errors));
  834. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
  835. &(netxen_stats->
  836. rx_long_length_error));
  837. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
  838. &(netxen_stats->
  839. rx_short_length_error));
  840. netxen_nic_pci_change_crbwindow(adapter, 1);
  841. } else {
  842. spin_lock_bh(&adapter->tx_lock);
  843. netxen_stats->tx_bytes = port->stats.txbytes;
  844. netxen_stats->tx_packets = port->stats.xmitedframes +
  845. port->stats.xmitfinished;
  846. netxen_stats->rx_bytes = port->stats.rxbytes;
  847. netxen_stats->rx_packets = port->stats.no_rcv;
  848. netxen_stats->rx_errors = port->stats.rcvdbadskb;
  849. netxen_stats->tx_errors = port->stats.nocmddescriptor;
  850. netxen_stats->rx_short_length_error = port->stats.uplcong;
  851. netxen_stats->rx_long_length_error = port->stats.uphcong;
  852. netxen_stats->rx_crc_errors = 0;
  853. netxen_stats->rx_mac_errors = 0;
  854. spin_unlock_bh(&adapter->tx_lock);
  855. }
  856. return 0;
  857. }
  858. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  859. {
  860. struct netxen_port *port;
  861. int port_num;
  862. memset(&adapter->stats, 0, sizeof(adapter->stats));
  863. for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
  864. port = adapter->port[port_num];
  865. memset(&port->stats, 0, sizeof(port->stats));
  866. }
  867. }
  868. int
  869. netxen_nic_clear_statistics(struct netxen_adapter *adapter,
  870. struct netxen_port *port)
  871. {
  872. int data = 0;
  873. netxen_nic_pci_change_crbwindow(adapter, 0);
  874. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_BYTE_CNT, &data);
  875. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_FRAME_CNT,
  876. &data);
  877. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_BYTE_CNT, &data);
  878. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_FRAME_CNT,
  879. &data);
  880. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_AGGR_ERROR_CNT,
  881. &data);
  882. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_CRC_ERROR_CNT,
  883. &data);
  884. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
  885. &data);
  886. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
  887. &data);
  888. netxen_nic_pci_change_crbwindow(adapter, 1);
  889. netxen_nic_clear_stats(adapter);
  890. return 0;
  891. }
  892. int
  893. netxen_nic_do_ioctl(struct netxen_adapter *adapter, void *u_data,
  894. struct netxen_port *port)
  895. {
  896. struct netxen_nic_ioctl_data data;
  897. struct netxen_nic_ioctl_data *up_data;
  898. int retval = 0;
  899. struct netxen_statistics netxen_stats;
  900. up_data = (void *)u_data;
  901. DPRINTK(INFO, "doing ioctl for %p\n", adapter);
  902. if (copy_from_user(&data, (void __user *)up_data, sizeof(data))) {
  903. /* evil user tried to crash the kernel */
  904. DPRINTK(ERR, "bad copy from userland: %d\n", (int)sizeof(data));
  905. retval = -EFAULT;
  906. goto error_out;
  907. }
  908. /* Shouldn't access beyond legal limits of "char u[64];" member */
  909. if (!data.ptr && (data.size > sizeof(data.u))) {
  910. /* evil user tried to crash the kernel */
  911. DPRINTK(ERR, "bad size: %d\n", data.size);
  912. retval = -EFAULT;
  913. goto error_out;
  914. }
  915. switch (data.cmd) {
  916. case netxen_nic_cmd_pci_read:
  917. if ((retval = netxen_nic_hw_read_wx(adapter, data.off,
  918. &(data.u), data.size)))
  919. goto error_out;
  920. if (copy_to_user
  921. ((void __user *)&(up_data->u), &(data.u), data.size)) {
  922. DPRINTK(ERR, "bad copy to userland: %d\n",
  923. (int)sizeof(data));
  924. retval = -EFAULT;
  925. goto error_out;
  926. }
  927. data.rv = 0;
  928. break;
  929. case netxen_nic_cmd_pci_write:
  930. data.rv = netxen_nic_hw_write_wx(adapter, data.off, &(data.u),
  931. data.size);
  932. break;
  933. case netxen_nic_cmd_pci_config_read:
  934. switch (data.size) {
  935. case 1:
  936. data.rv = pci_read_config_byte(adapter->ahw.pdev,
  937. data.off,
  938. (char *)&(data.u));
  939. break;
  940. case 2:
  941. data.rv = pci_read_config_word(adapter->ahw.pdev,
  942. data.off,
  943. (short *)&(data.u));
  944. break;
  945. case 4:
  946. data.rv = pci_read_config_dword(adapter->ahw.pdev,
  947. data.off,
  948. (u32 *) & (data.u));
  949. break;
  950. }
  951. if (copy_to_user
  952. ((void __user *)&(up_data->u), &(data.u), data.size)) {
  953. DPRINTK(ERR, "bad copy to userland: %d\n",
  954. (int)sizeof(data));
  955. retval = -EFAULT;
  956. goto error_out;
  957. }
  958. break;
  959. case netxen_nic_cmd_pci_config_write:
  960. switch (data.size) {
  961. case 1:
  962. data.rv = pci_write_config_byte(adapter->ahw.pdev,
  963. data.off,
  964. *(char *)&(data.u));
  965. break;
  966. case 2:
  967. data.rv = pci_write_config_word(adapter->ahw.pdev,
  968. data.off,
  969. *(short *)&(data.u));
  970. break;
  971. case 4:
  972. data.rv = pci_write_config_dword(adapter->ahw.pdev,
  973. data.off,
  974. *(u32 *) & (data.u));
  975. break;
  976. }
  977. break;
  978. case netxen_nic_cmd_get_stats:
  979. data.rv =
  980. netxen_nic_fill_statistics(adapter, port, &netxen_stats);
  981. if (copy_to_user
  982. ((void __user *)(up_data->ptr), (void *)&netxen_stats,
  983. sizeof(struct netxen_statistics))) {
  984. DPRINTK(ERR, "bad copy to userland: %d\n",
  985. (int)sizeof(netxen_stats));
  986. retval = -EFAULT;
  987. goto error_out;
  988. }
  989. up_data->rv = data.rv;
  990. break;
  991. case netxen_nic_cmd_clear_stats:
  992. data.rv = netxen_nic_clear_statistics(adapter, port);
  993. up_data->rv = data.rv;
  994. break;
  995. case netxen_nic_cmd_get_version:
  996. if (copy_to_user
  997. ((void __user *)&(up_data->u), NETXEN_NIC_LINUX_VERSIONID,
  998. sizeof(NETXEN_NIC_LINUX_VERSIONID))) {
  999. DPRINTK(ERR, "bad copy to userland: %d\n",
  1000. (int)sizeof(data));
  1001. retval = -EFAULT;
  1002. goto error_out;
  1003. }
  1004. break;
  1005. default:
  1006. DPRINTK(INFO, "bad command %d for %p\n", data.cmd, adapter);
  1007. retval = -EOPNOTSUPP;
  1008. goto error_out;
  1009. }
  1010. put_user(data.rv, (u16 __user *) (&(up_data->rv)));
  1011. DPRINTK(INFO, "done ioctl for %p well.\n", adapter);
  1012. error_out:
  1013. return retval;
  1014. }