spu_base.c 17 KB

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  1. /*
  2. * Low-level SPU handling
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #undef DEBUG
  23. #include <linux/interrupt.h>
  24. #include <linux/list.h>
  25. #include <linux/module.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/slab.h>
  28. #include <linux/wait.h>
  29. #include <linux/mm.h>
  30. #include <linux/io.h>
  31. #include <linux/mutex.h>
  32. #include <linux/linux_logo.h>
  33. #include <asm/spu.h>
  34. #include <asm/spu_priv1.h>
  35. #include <asm/xmon.h>
  36. #include <asm/prom.h>
  37. const struct spu_management_ops *spu_management_ops;
  38. EXPORT_SYMBOL_GPL(spu_management_ops);
  39. const struct spu_priv1_ops *spu_priv1_ops;
  40. EXPORT_SYMBOL_GPL(spu_priv1_ops);
  41. struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
  42. EXPORT_SYMBOL_GPL(cbe_spu_info);
  43. /*
  44. * The spufs fault-handling code needs to call force_sig_info to raise signals
  45. * on DMA errors. Export it here to avoid general kernel-wide access to this
  46. * function
  47. */
  48. EXPORT_SYMBOL_GPL(force_sig_info);
  49. /*
  50. * Protects cbe_spu_info and spu->number.
  51. */
  52. static DEFINE_SPINLOCK(spu_lock);
  53. /*
  54. * List of all spus in the system.
  55. *
  56. * This list is iterated by callers from irq context and callers that
  57. * want to sleep. Thus modifications need to be done with both
  58. * spu_full_list_lock and spu_full_list_mutex held, while iterating
  59. * through it requires either of these locks.
  60. *
  61. * In addition spu_full_list_lock protects all assignmens to
  62. * spu->mm.
  63. */
  64. static LIST_HEAD(spu_full_list);
  65. static DEFINE_SPINLOCK(spu_full_list_lock);
  66. static DEFINE_MUTEX(spu_full_list_mutex);
  67. void spu_invalidate_slbs(struct spu *spu)
  68. {
  69. struct spu_priv2 __iomem *priv2 = spu->priv2;
  70. if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
  71. out_be64(&priv2->slb_invalidate_all_W, 0UL);
  72. }
  73. EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
  74. /* This is called by the MM core when a segment size is changed, to
  75. * request a flush of all the SPEs using a given mm
  76. */
  77. void spu_flush_all_slbs(struct mm_struct *mm)
  78. {
  79. struct spu *spu;
  80. unsigned long flags;
  81. spin_lock_irqsave(&spu_full_list_lock, flags);
  82. list_for_each_entry(spu, &spu_full_list, full_list) {
  83. if (spu->mm == mm)
  84. spu_invalidate_slbs(spu);
  85. }
  86. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  87. }
  88. /* The hack below stinks... try to do something better one of
  89. * these days... Does it even work properly with NR_CPUS == 1 ?
  90. */
  91. static inline void mm_needs_global_tlbie(struct mm_struct *mm)
  92. {
  93. int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
  94. /* Global TLBIE broadcast required with SPEs. */
  95. __cpus_setall(&mm->cpu_vm_mask, nr);
  96. }
  97. void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
  98. {
  99. unsigned long flags;
  100. spin_lock_irqsave(&spu_full_list_lock, flags);
  101. spu->mm = mm;
  102. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  103. if (mm)
  104. mm_needs_global_tlbie(mm);
  105. }
  106. EXPORT_SYMBOL_GPL(spu_associate_mm);
  107. static int __spu_trap_invalid_dma(struct spu *spu)
  108. {
  109. pr_debug("%s\n", __FUNCTION__);
  110. spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
  111. return 0;
  112. }
  113. static int __spu_trap_dma_align(struct spu *spu)
  114. {
  115. pr_debug("%s\n", __FUNCTION__);
  116. spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
  117. return 0;
  118. }
  119. static int __spu_trap_error(struct spu *spu)
  120. {
  121. pr_debug("%s\n", __FUNCTION__);
  122. spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
  123. return 0;
  124. }
  125. static void spu_restart_dma(struct spu *spu)
  126. {
  127. struct spu_priv2 __iomem *priv2 = spu->priv2;
  128. if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
  129. out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
  130. }
  131. static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
  132. {
  133. struct spu_priv2 __iomem *priv2 = spu->priv2;
  134. struct mm_struct *mm = spu->mm;
  135. u64 esid, vsid, llp;
  136. int psize;
  137. pr_debug("%s\n", __FUNCTION__);
  138. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  139. /* SLBs are pre-loaded for context switch, so
  140. * we should never get here!
  141. */
  142. printk("%s: invalid access during switch!\n", __func__);
  143. return 1;
  144. }
  145. esid = (ea & ESID_MASK) | SLB_ESID_V;
  146. switch(REGION_ID(ea)) {
  147. case USER_REGION_ID:
  148. #ifdef CONFIG_PPC_MM_SLICES
  149. psize = get_slice_psize(mm, ea);
  150. #else
  151. psize = mm->context.user_psize;
  152. #endif
  153. vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  154. SLB_VSID_USER;
  155. break;
  156. case VMALLOC_REGION_ID:
  157. if (ea < VMALLOC_END)
  158. psize = mmu_vmalloc_psize;
  159. else
  160. psize = mmu_io_psize;
  161. vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  162. SLB_VSID_KERNEL;
  163. break;
  164. case KERNEL_REGION_ID:
  165. psize = mmu_linear_psize;
  166. vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  167. SLB_VSID_KERNEL;
  168. break;
  169. default:
  170. /* Future: support kernel segments so that drivers
  171. * can use SPUs.
  172. */
  173. pr_debug("invalid region access at %016lx\n", ea);
  174. return 1;
  175. }
  176. llp = mmu_psize_defs[psize].sllp;
  177. out_be64(&priv2->slb_index_W, spu->slb_replace);
  178. out_be64(&priv2->slb_vsid_RW, vsid | llp);
  179. out_be64(&priv2->slb_esid_RW, esid);
  180. spu->slb_replace++;
  181. if (spu->slb_replace >= 8)
  182. spu->slb_replace = 0;
  183. spu_restart_dma(spu);
  184. spu->stats.slb_flt++;
  185. return 0;
  186. }
  187. extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
  188. static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
  189. {
  190. pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
  191. /* Handle kernel space hash faults immediately.
  192. User hash faults need to be deferred to process context. */
  193. if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
  194. && REGION_ID(ea) != USER_REGION_ID
  195. && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
  196. spu_restart_dma(spu);
  197. return 0;
  198. }
  199. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  200. printk("%s: invalid access during switch!\n", __func__);
  201. return 1;
  202. }
  203. spu->dar = ea;
  204. spu->dsisr = dsisr;
  205. mb();
  206. spu->stop_callback(spu);
  207. return 0;
  208. }
  209. static irqreturn_t
  210. spu_irq_class_0(int irq, void *data)
  211. {
  212. struct spu *spu;
  213. unsigned long stat, mask;
  214. spu = data;
  215. mask = spu_int_mask_get(spu, 0);
  216. stat = spu_int_stat_get(spu, 0);
  217. stat &= mask;
  218. spin_lock(&spu->register_lock);
  219. spu->class_0_pending |= stat;
  220. spin_unlock(&spu->register_lock);
  221. spu->stop_callback(spu);
  222. spu_int_stat_clear(spu, 0, stat);
  223. return IRQ_HANDLED;
  224. }
  225. int
  226. spu_irq_class_0_bottom(struct spu *spu)
  227. {
  228. unsigned long flags;
  229. unsigned long stat;
  230. spin_lock_irqsave(&spu->register_lock, flags);
  231. stat = spu->class_0_pending;
  232. spu->class_0_pending = 0;
  233. if (stat & 1) /* invalid DMA alignment */
  234. __spu_trap_dma_align(spu);
  235. if (stat & 2) /* invalid MFC DMA */
  236. __spu_trap_invalid_dma(spu);
  237. if (stat & 4) /* error on SPU */
  238. __spu_trap_error(spu);
  239. spin_unlock_irqrestore(&spu->register_lock, flags);
  240. return (stat & 0x7) ? -EIO : 0;
  241. }
  242. EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
  243. static irqreturn_t
  244. spu_irq_class_1(int irq, void *data)
  245. {
  246. struct spu *spu;
  247. unsigned long stat, mask, dar, dsisr;
  248. spu = data;
  249. /* atomically read & clear class1 status. */
  250. spin_lock(&spu->register_lock);
  251. mask = spu_int_mask_get(spu, 1);
  252. stat = spu_int_stat_get(spu, 1) & mask;
  253. dar = spu_mfc_dar_get(spu);
  254. dsisr = spu_mfc_dsisr_get(spu);
  255. if (stat & 2) /* mapping fault */
  256. spu_mfc_dsisr_set(spu, 0ul);
  257. spu_int_stat_clear(spu, 1, stat);
  258. spin_unlock(&spu->register_lock);
  259. pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
  260. dar, dsisr);
  261. if (stat & 1) /* segment fault */
  262. __spu_trap_data_seg(spu, dar);
  263. if (stat & 2) { /* mapping fault */
  264. __spu_trap_data_map(spu, dar, dsisr);
  265. }
  266. if (stat & 4) /* ls compare & suspend on get */
  267. ;
  268. if (stat & 8) /* ls compare & suspend on put */
  269. ;
  270. return stat ? IRQ_HANDLED : IRQ_NONE;
  271. }
  272. static irqreturn_t
  273. spu_irq_class_2(int irq, void *data)
  274. {
  275. struct spu *spu;
  276. unsigned long stat;
  277. unsigned long mask;
  278. spu = data;
  279. spin_lock(&spu->register_lock);
  280. stat = spu_int_stat_get(spu, 2);
  281. mask = spu_int_mask_get(spu, 2);
  282. /* ignore interrupts we're not waiting for */
  283. stat &= mask;
  284. /*
  285. * mailbox interrupts (0x1 and 0x10) are level triggered.
  286. * mask them now before acknowledging.
  287. */
  288. if (stat & 0x11)
  289. spu_int_mask_and(spu, 2, ~(stat & 0x11));
  290. /* acknowledge all interrupts before the callbacks */
  291. spu_int_stat_clear(spu, 2, stat);
  292. spin_unlock(&spu->register_lock);
  293. pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
  294. if (stat & 1) /* PPC core mailbox */
  295. spu->ibox_callback(spu);
  296. if (stat & 2) /* SPU stop-and-signal */
  297. spu->stop_callback(spu);
  298. if (stat & 4) /* SPU halted */
  299. spu->stop_callback(spu);
  300. if (stat & 8) /* DMA tag group complete */
  301. spu->mfc_callback(spu);
  302. if (stat & 0x10) /* SPU mailbox threshold */
  303. spu->wbox_callback(spu);
  304. spu->stats.class2_intr++;
  305. return stat ? IRQ_HANDLED : IRQ_NONE;
  306. }
  307. static int spu_request_irqs(struct spu *spu)
  308. {
  309. int ret = 0;
  310. if (spu->irqs[0] != NO_IRQ) {
  311. snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
  312. spu->number);
  313. ret = request_irq(spu->irqs[0], spu_irq_class_0,
  314. IRQF_DISABLED,
  315. spu->irq_c0, spu);
  316. if (ret)
  317. goto bail0;
  318. }
  319. if (spu->irqs[1] != NO_IRQ) {
  320. snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
  321. spu->number);
  322. ret = request_irq(spu->irqs[1], spu_irq_class_1,
  323. IRQF_DISABLED,
  324. spu->irq_c1, spu);
  325. if (ret)
  326. goto bail1;
  327. }
  328. if (spu->irqs[2] != NO_IRQ) {
  329. snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
  330. spu->number);
  331. ret = request_irq(spu->irqs[2], spu_irq_class_2,
  332. IRQF_DISABLED,
  333. spu->irq_c2, spu);
  334. if (ret)
  335. goto bail2;
  336. }
  337. return 0;
  338. bail2:
  339. if (spu->irqs[1] != NO_IRQ)
  340. free_irq(spu->irqs[1], spu);
  341. bail1:
  342. if (spu->irqs[0] != NO_IRQ)
  343. free_irq(spu->irqs[0], spu);
  344. bail0:
  345. return ret;
  346. }
  347. static void spu_free_irqs(struct spu *spu)
  348. {
  349. if (spu->irqs[0] != NO_IRQ)
  350. free_irq(spu->irqs[0], spu);
  351. if (spu->irqs[1] != NO_IRQ)
  352. free_irq(spu->irqs[1], spu);
  353. if (spu->irqs[2] != NO_IRQ)
  354. free_irq(spu->irqs[2], spu);
  355. }
  356. void spu_init_channels(struct spu *spu)
  357. {
  358. static const struct {
  359. unsigned channel;
  360. unsigned count;
  361. } zero_list[] = {
  362. { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
  363. { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
  364. }, count_list[] = {
  365. { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
  366. { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
  367. { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
  368. };
  369. struct spu_priv2 __iomem *priv2;
  370. int i;
  371. priv2 = spu->priv2;
  372. /* initialize all channel data to zero */
  373. for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
  374. int count;
  375. out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
  376. for (count = 0; count < zero_list[i].count; count++)
  377. out_be64(&priv2->spu_chnldata_RW, 0);
  378. }
  379. /* initialize channel counts to meaningful values */
  380. for (i = 0; i < ARRAY_SIZE(count_list); i++) {
  381. out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
  382. out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
  383. }
  384. }
  385. EXPORT_SYMBOL_GPL(spu_init_channels);
  386. static int spu_shutdown(struct sys_device *sysdev)
  387. {
  388. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  389. spu_free_irqs(spu);
  390. spu_destroy_spu(spu);
  391. return 0;
  392. }
  393. static struct sysdev_class spu_sysdev_class = {
  394. set_kset_name("spu"),
  395. .shutdown = spu_shutdown,
  396. };
  397. int spu_add_sysdev_attr(struct sysdev_attribute *attr)
  398. {
  399. struct spu *spu;
  400. mutex_lock(&spu_full_list_mutex);
  401. list_for_each_entry(spu, &spu_full_list, full_list)
  402. sysdev_create_file(&spu->sysdev, attr);
  403. mutex_unlock(&spu_full_list_mutex);
  404. return 0;
  405. }
  406. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
  407. int spu_add_sysdev_attr_group(struct attribute_group *attrs)
  408. {
  409. struct spu *spu;
  410. mutex_lock(&spu_full_list_mutex);
  411. list_for_each_entry(spu, &spu_full_list, full_list)
  412. sysfs_create_group(&spu->sysdev.kobj, attrs);
  413. mutex_unlock(&spu_full_list_mutex);
  414. return 0;
  415. }
  416. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
  417. void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
  418. {
  419. struct spu *spu;
  420. mutex_lock(&spu_full_list_mutex);
  421. list_for_each_entry(spu, &spu_full_list, full_list)
  422. sysdev_remove_file(&spu->sysdev, attr);
  423. mutex_unlock(&spu_full_list_mutex);
  424. }
  425. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
  426. void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
  427. {
  428. struct spu *spu;
  429. mutex_lock(&spu_full_list_mutex);
  430. list_for_each_entry(spu, &spu_full_list, full_list)
  431. sysfs_remove_group(&spu->sysdev.kobj, attrs);
  432. mutex_unlock(&spu_full_list_mutex);
  433. }
  434. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
  435. static int spu_create_sysdev(struct spu *spu)
  436. {
  437. int ret;
  438. spu->sysdev.id = spu->number;
  439. spu->sysdev.cls = &spu_sysdev_class;
  440. ret = sysdev_register(&spu->sysdev);
  441. if (ret) {
  442. printk(KERN_ERR "Can't register SPU %d with sysfs\n",
  443. spu->number);
  444. return ret;
  445. }
  446. sysfs_add_device_to_node(&spu->sysdev, spu->node);
  447. return 0;
  448. }
  449. static int __init create_spu(void *data)
  450. {
  451. struct spu *spu;
  452. int ret;
  453. static int number;
  454. unsigned long flags;
  455. struct timespec ts;
  456. ret = -ENOMEM;
  457. spu = kzalloc(sizeof (*spu), GFP_KERNEL);
  458. if (!spu)
  459. goto out;
  460. spu->alloc_state = SPU_FREE;
  461. spin_lock_init(&spu->register_lock);
  462. spin_lock(&spu_lock);
  463. spu->number = number++;
  464. spin_unlock(&spu_lock);
  465. ret = spu_create_spu(spu, data);
  466. if (ret)
  467. goto out_free;
  468. spu_mfc_sdr_setup(spu);
  469. spu_mfc_sr1_set(spu, 0x33);
  470. ret = spu_request_irqs(spu);
  471. if (ret)
  472. goto out_destroy;
  473. ret = spu_create_sysdev(spu);
  474. if (ret)
  475. goto out_free_irqs;
  476. mutex_lock(&cbe_spu_info[spu->node].list_mutex);
  477. list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
  478. cbe_spu_info[spu->node].n_spus++;
  479. mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
  480. mutex_lock(&spu_full_list_mutex);
  481. spin_lock_irqsave(&spu_full_list_lock, flags);
  482. list_add(&spu->full_list, &spu_full_list);
  483. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  484. mutex_unlock(&spu_full_list_mutex);
  485. spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
  486. ktime_get_ts(&ts);
  487. spu->stats.tstamp = timespec_to_ns(&ts);
  488. INIT_LIST_HEAD(&spu->aff_list);
  489. goto out;
  490. out_free_irqs:
  491. spu_free_irqs(spu);
  492. out_destroy:
  493. spu_destroy_spu(spu);
  494. out_free:
  495. kfree(spu);
  496. out:
  497. return ret;
  498. }
  499. static const char *spu_state_names[] = {
  500. "user", "system", "iowait", "idle"
  501. };
  502. static unsigned long long spu_acct_time(struct spu *spu,
  503. enum spu_utilization_state state)
  504. {
  505. struct timespec ts;
  506. unsigned long long time = spu->stats.times[state];
  507. /*
  508. * If the spu is idle or the context is stopped, utilization
  509. * statistics are not updated. Apply the time delta from the
  510. * last recorded state of the spu.
  511. */
  512. if (spu->stats.util_state == state) {
  513. ktime_get_ts(&ts);
  514. time += timespec_to_ns(&ts) - spu->stats.tstamp;
  515. }
  516. return time / NSEC_PER_MSEC;
  517. }
  518. static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
  519. {
  520. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  521. return sprintf(buf, "%s %llu %llu %llu %llu "
  522. "%llu %llu %llu %llu %llu %llu %llu %llu\n",
  523. spu_state_names[spu->stats.util_state],
  524. spu_acct_time(spu, SPU_UTIL_USER),
  525. spu_acct_time(spu, SPU_UTIL_SYSTEM),
  526. spu_acct_time(spu, SPU_UTIL_IOWAIT),
  527. spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
  528. spu->stats.vol_ctx_switch,
  529. spu->stats.invol_ctx_switch,
  530. spu->stats.slb_flt,
  531. spu->stats.hash_flt,
  532. spu->stats.min_flt,
  533. spu->stats.maj_flt,
  534. spu->stats.class2_intr,
  535. spu->stats.libassist);
  536. }
  537. static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
  538. static int __init init_spu_base(void)
  539. {
  540. int i, ret = 0;
  541. for (i = 0; i < MAX_NUMNODES; i++) {
  542. mutex_init(&cbe_spu_info[i].list_mutex);
  543. INIT_LIST_HEAD(&cbe_spu_info[i].spus);
  544. }
  545. if (!spu_management_ops)
  546. goto out;
  547. /* create sysdev class for spus */
  548. ret = sysdev_class_register(&spu_sysdev_class);
  549. if (ret)
  550. goto out;
  551. ret = spu_enumerate_spus(create_spu);
  552. if (ret < 0) {
  553. printk(KERN_WARNING "%s: Error initializing spus\n",
  554. __FUNCTION__);
  555. goto out_unregister_sysdev_class;
  556. }
  557. if (ret > 0) {
  558. /*
  559. * We cannot put the forward declaration in
  560. * <linux/linux_logo.h> because of conflicting session type
  561. * conflicts for const and __initdata with different compiler
  562. * versions
  563. */
  564. extern const struct linux_logo logo_spe_clut224;
  565. fb_append_extra_logo(&logo_spe_clut224, ret);
  566. }
  567. mutex_lock(&spu_full_list_mutex);
  568. xmon_register_spus(&spu_full_list);
  569. crash_register_spus(&spu_full_list);
  570. mutex_unlock(&spu_full_list_mutex);
  571. spu_add_sysdev_attr(&attr_stat);
  572. spu_init_affinity();
  573. return 0;
  574. out_unregister_sysdev_class:
  575. sysdev_class_unregister(&spu_sysdev_class);
  576. out:
  577. return ret;
  578. }
  579. module_init(init_spu_base);
  580. MODULE_LICENSE("GPL");
  581. MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");