cx23885-dvb.c 22 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/device.h>
  24. #include <linux/fs.h>
  25. #include <linux/kthread.h>
  26. #include <linux/file.h>
  27. #include <linux/suspend.h>
  28. #include "cx23885.h"
  29. #include <media/v4l2-common.h>
  30. #include "dvb_ca_en50221.h"
  31. #include "s5h1409.h"
  32. #include "s5h1411.h"
  33. #include "mt2131.h"
  34. #include "tda8290.h"
  35. #include "tda18271.h"
  36. #include "lgdt330x.h"
  37. #include "xc5000.h"
  38. #include "tda10048.h"
  39. #include "tuner-xc2028.h"
  40. #include "tuner-simple.h"
  41. #include "dib7000p.h"
  42. #include "dibx000_common.h"
  43. #include "zl10353.h"
  44. #include "stv0900.h"
  45. #include "stv6110.h"
  46. #include "lnbh24.h"
  47. #include "cx24116.h"
  48. #include "cimax2.h"
  49. #include "netup-eeprom.h"
  50. #include "netup-init.h"
  51. static unsigned int debug;
  52. #define dprintk(level, fmt, arg...)\
  53. do { if (debug >= level)\
  54. printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
  55. } while (0)
  56. /* ------------------------------------------------------------------ */
  57. static unsigned int alt_tuner;
  58. module_param(alt_tuner, int, 0644);
  59. MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. /* ------------------------------------------------------------------ */
  62. static int dvb_buf_setup(struct videobuf_queue *q,
  63. unsigned int *count, unsigned int *size)
  64. {
  65. struct cx23885_tsport *port = q->priv_data;
  66. port->ts_packet_size = 188 * 4;
  67. port->ts_packet_count = 32;
  68. *size = port->ts_packet_size * port->ts_packet_count;
  69. *count = 32;
  70. return 0;
  71. }
  72. static int dvb_buf_prepare(struct videobuf_queue *q,
  73. struct videobuf_buffer *vb, enum v4l2_field field)
  74. {
  75. struct cx23885_tsport *port = q->priv_data;
  76. return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
  77. }
  78. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  79. {
  80. struct cx23885_tsport *port = q->priv_data;
  81. cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
  82. }
  83. static void dvb_buf_release(struct videobuf_queue *q,
  84. struct videobuf_buffer *vb)
  85. {
  86. cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
  87. }
  88. static struct videobuf_queue_ops dvb_qops = {
  89. .buf_setup = dvb_buf_setup,
  90. .buf_prepare = dvb_buf_prepare,
  91. .buf_queue = dvb_buf_queue,
  92. .buf_release = dvb_buf_release,
  93. };
  94. static struct s5h1409_config hauppauge_generic_config = {
  95. .demod_address = 0x32 >> 1,
  96. .output_mode = S5H1409_SERIAL_OUTPUT,
  97. .gpio = S5H1409_GPIO_ON,
  98. .qam_if = 44000,
  99. .inversion = S5H1409_INVERSION_OFF,
  100. .status_mode = S5H1409_DEMODLOCKING,
  101. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  102. };
  103. static struct tda10048_config hauppauge_hvr1200_config = {
  104. .demod_address = 0x10 >> 1,
  105. .output_mode = TDA10048_SERIAL_OUTPUT,
  106. .fwbulkwritelen = TDA10048_BULKWRITE_200,
  107. .inversion = TDA10048_INVERSION_ON
  108. };
  109. static struct s5h1409_config hauppauge_ezqam_config = {
  110. .demod_address = 0x32 >> 1,
  111. .output_mode = S5H1409_SERIAL_OUTPUT,
  112. .gpio = S5H1409_GPIO_OFF,
  113. .qam_if = 4000,
  114. .inversion = S5H1409_INVERSION_ON,
  115. .status_mode = S5H1409_DEMODLOCKING,
  116. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  117. };
  118. static struct s5h1409_config hauppauge_hvr1800lp_config = {
  119. .demod_address = 0x32 >> 1,
  120. .output_mode = S5H1409_SERIAL_OUTPUT,
  121. .gpio = S5H1409_GPIO_OFF,
  122. .qam_if = 44000,
  123. .inversion = S5H1409_INVERSION_OFF,
  124. .status_mode = S5H1409_DEMODLOCKING,
  125. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  126. };
  127. static struct s5h1409_config hauppauge_hvr1500_config = {
  128. .demod_address = 0x32 >> 1,
  129. .output_mode = S5H1409_SERIAL_OUTPUT,
  130. .gpio = S5H1409_GPIO_OFF,
  131. .inversion = S5H1409_INVERSION_OFF,
  132. .status_mode = S5H1409_DEMODLOCKING,
  133. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  134. };
  135. static struct mt2131_config hauppauge_generic_tunerconfig = {
  136. 0x61
  137. };
  138. static struct lgdt330x_config fusionhdtv_5_express = {
  139. .demod_address = 0x0e,
  140. .demod_chip = LGDT3303,
  141. .serial_mpeg = 0x40,
  142. };
  143. static struct s5h1409_config hauppauge_hvr1500q_config = {
  144. .demod_address = 0x32 >> 1,
  145. .output_mode = S5H1409_SERIAL_OUTPUT,
  146. .gpio = S5H1409_GPIO_ON,
  147. .qam_if = 44000,
  148. .inversion = S5H1409_INVERSION_OFF,
  149. .status_mode = S5H1409_DEMODLOCKING,
  150. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  151. };
  152. static struct s5h1409_config dvico_s5h1409_config = {
  153. .demod_address = 0x32 >> 1,
  154. .output_mode = S5H1409_SERIAL_OUTPUT,
  155. .gpio = S5H1409_GPIO_ON,
  156. .qam_if = 44000,
  157. .inversion = S5H1409_INVERSION_OFF,
  158. .status_mode = S5H1409_DEMODLOCKING,
  159. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  160. };
  161. static struct s5h1411_config dvico_s5h1411_config = {
  162. .output_mode = S5H1411_SERIAL_OUTPUT,
  163. .gpio = S5H1411_GPIO_ON,
  164. .qam_if = S5H1411_IF_44000,
  165. .vsb_if = S5H1411_IF_44000,
  166. .inversion = S5H1411_INVERSION_OFF,
  167. .status_mode = S5H1411_DEMODLOCKING,
  168. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  169. };
  170. static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
  171. .i2c_address = 0x61,
  172. .if_khz = 5380,
  173. };
  174. static struct xc5000_config dvico_xc5000_tunerconfig = {
  175. .i2c_address = 0x64,
  176. .if_khz = 5380,
  177. };
  178. static struct tda829x_config tda829x_no_probe = {
  179. .probe_tuner = TDA829X_DONT_PROBE,
  180. };
  181. static struct tda18271_std_map hauppauge_tda18271_std_map = {
  182. .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
  183. .if_lvl = 6, .rfagc_top = 0x37 },
  184. .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
  185. .if_lvl = 6, .rfagc_top = 0x37 },
  186. };
  187. static struct tda18271_config hauppauge_tda18271_config = {
  188. .std_map = &hauppauge_tda18271_std_map,
  189. .gate = TDA18271_GATE_ANALOG,
  190. };
  191. static struct tda18271_config hauppauge_hvr1200_tuner_config = {
  192. .gate = TDA18271_GATE_ANALOG,
  193. };
  194. static struct dibx000_agc_config xc3028_agc_config = {
  195. BAND_VHF | BAND_UHF, /* band_caps */
  196. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
  197. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  198. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
  199. * P_agc_nb_est=2, P_agc_write=0
  200. */
  201. (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
  202. (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
  203. 712, /* inv_gain */
  204. 21, /* time_stabiliz */
  205. 0, /* alpha_level */
  206. 118, /* thlock */
  207. 0, /* wbd_inv */
  208. 2867, /* wbd_ref */
  209. 0, /* wbd_sel */
  210. 2, /* wbd_alpha */
  211. 0, /* agc1_max */
  212. 0, /* agc1_min */
  213. 39718, /* agc2_max */
  214. 9930, /* agc2_min */
  215. 0, /* agc1_pt1 */
  216. 0, /* agc1_pt2 */
  217. 0, /* agc1_pt3 */
  218. 0, /* agc1_slope1 */
  219. 0, /* agc1_slope2 */
  220. 0, /* agc2_pt1 */
  221. 128, /* agc2_pt2 */
  222. 29, /* agc2_slope1 */
  223. 29, /* agc2_slope2 */
  224. 17, /* alpha_mant */
  225. 27, /* alpha_exp */
  226. 23, /* beta_mant */
  227. 51, /* beta_exp */
  228. 1, /* perform_agc_softsplit */
  229. };
  230. /* PLL Configuration for COFDM BW_MHz = 8.000000
  231. * With external clock = 30.000000 */
  232. static struct dibx000_bandwidth_config xc3028_bw_config = {
  233. 60000, /* internal */
  234. 30000, /* sampling */
  235. 1, /* pll_cfg: prediv */
  236. 8, /* pll_cfg: ratio */
  237. 3, /* pll_cfg: range */
  238. 1, /* pll_cfg: reset */
  239. 0, /* pll_cfg: bypass */
  240. 0, /* misc: refdiv */
  241. 0, /* misc: bypclk_div */
  242. 1, /* misc: IO_CLK_en_core */
  243. 1, /* misc: ADClkSrc */
  244. 0, /* misc: modulo */
  245. (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
  246. (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
  247. 20452225, /* timf */
  248. 30000000 /* xtal_hz */
  249. };
  250. static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
  251. .output_mpeg2_in_188_bytes = 1,
  252. .hostbus_diversity = 1,
  253. .tuner_is_baseband = 0,
  254. .update_lna = NULL,
  255. .agc_config_count = 1,
  256. .agc = &xc3028_agc_config,
  257. .bw = &xc3028_bw_config,
  258. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  259. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  260. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  261. .pwm_freq_div = 0,
  262. .agc_control = NULL,
  263. .spur_protect = 0,
  264. .output_mode = OUTMODE_MPEG2_SERIAL,
  265. };
  266. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  267. .demod_address = 0x0f,
  268. .if2 = 45600,
  269. .no_tuner = 1,
  270. .disable_i2c_gate_ctrl = 1,
  271. };
  272. static struct stv0900_config netup_stv0900_config = {
  273. .demod_address = 0x68,
  274. .xtal = 27000000,
  275. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  276. .diseqc_mode = 2,/* 2/3 PWM */
  277. .path1_mode = 2,/*Serial continues clock */
  278. .path2_mode = 2,/*Serial continues clock */
  279. .tun1_maddress = 0,/* 0x60 */
  280. .tun2_maddress = 3,/* 0x63 */
  281. .tun1_adc = 1,/* 1 Vpp */
  282. .tun2_adc = 1,/* 1 Vpp */
  283. };
  284. static struct stv6110_config netup_stv6110_tunerconfig_a = {
  285. .i2c_address = 0x60,
  286. .mclk = 27000000,
  287. .iq_wiring = 0,
  288. };
  289. static struct stv6110_config netup_stv6110_tunerconfig_b = {
  290. .i2c_address = 0x63,
  291. .mclk = 27000000,
  292. .iq_wiring = 1,
  293. };
  294. static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  295. {
  296. struct cx23885_tsport *port = fe->dvb->priv;
  297. struct cx23885_dev *dev = port->dev;
  298. if (voltage == SEC_VOLTAGE_18)
  299. cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
  300. else if (voltage == SEC_VOLTAGE_13)
  301. cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
  302. else
  303. cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
  304. return 0;
  305. }
  306. static struct cx24116_config tbs_cx24116_config = {
  307. .demod_address = 0x05,
  308. };
  309. static struct cx24116_config tevii_cx24116_config = {
  310. .demod_address = 0x55,
  311. };
  312. static struct cx24116_config dvbworld_cx24116_config = {
  313. .demod_address = 0x05,
  314. };
  315. static int dvb_register(struct cx23885_tsport *port)
  316. {
  317. struct cx23885_dev *dev = port->dev;
  318. struct cx23885_i2c *i2c_bus = NULL;
  319. struct videobuf_dvb_frontend *fe0;
  320. int ret;
  321. /* Get the first frontend */
  322. fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
  323. if (!fe0)
  324. return -EINVAL;
  325. /* init struct videobuf_dvb */
  326. fe0->dvb.name = dev->name;
  327. /* init frontend */
  328. switch (dev->board) {
  329. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  330. i2c_bus = &dev->i2c_bus[0];
  331. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  332. &hauppauge_generic_config,
  333. &i2c_bus->i2c_adap);
  334. if (fe0->dvb.frontend != NULL) {
  335. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  336. &i2c_bus->i2c_adap,
  337. &hauppauge_generic_tunerconfig, 0);
  338. }
  339. break;
  340. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  341. i2c_bus = &dev->i2c_bus[0];
  342. switch (alt_tuner) {
  343. case 1:
  344. fe0->dvb.frontend =
  345. dvb_attach(s5h1409_attach,
  346. &hauppauge_ezqam_config,
  347. &i2c_bus->i2c_adap);
  348. if (fe0->dvb.frontend != NULL) {
  349. dvb_attach(tda829x_attach, fe0->dvb.frontend,
  350. &dev->i2c_bus[1].i2c_adap, 0x42,
  351. &tda829x_no_probe);
  352. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  353. 0x60, &dev->i2c_bus[1].i2c_adap,
  354. &hauppauge_tda18271_config);
  355. }
  356. break;
  357. case 0:
  358. default:
  359. fe0->dvb.frontend =
  360. dvb_attach(s5h1409_attach,
  361. &hauppauge_generic_config,
  362. &i2c_bus->i2c_adap);
  363. if (fe0->dvb.frontend != NULL)
  364. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  365. &i2c_bus->i2c_adap,
  366. &hauppauge_generic_tunerconfig, 0);
  367. break;
  368. }
  369. break;
  370. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  371. i2c_bus = &dev->i2c_bus[0];
  372. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  373. &hauppauge_hvr1800lp_config,
  374. &i2c_bus->i2c_adap);
  375. if (fe0->dvb.frontend != NULL) {
  376. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  377. &i2c_bus->i2c_adap,
  378. &hauppauge_generic_tunerconfig, 0);
  379. }
  380. break;
  381. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  382. i2c_bus = &dev->i2c_bus[0];
  383. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  384. &fusionhdtv_5_express,
  385. &i2c_bus->i2c_adap);
  386. if (fe0->dvb.frontend != NULL) {
  387. dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  388. &i2c_bus->i2c_adap, 0x61,
  389. TUNER_LG_TDVS_H06XF);
  390. }
  391. break;
  392. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  393. i2c_bus = &dev->i2c_bus[1];
  394. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  395. &hauppauge_hvr1500q_config,
  396. &dev->i2c_bus[0].i2c_adap);
  397. if (fe0->dvb.frontend != NULL)
  398. dvb_attach(xc5000_attach, fe0->dvb.frontend,
  399. &i2c_bus->i2c_adap,
  400. &hauppauge_hvr1500q_tunerconfig);
  401. break;
  402. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  403. i2c_bus = &dev->i2c_bus[1];
  404. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  405. &hauppauge_hvr1500_config,
  406. &dev->i2c_bus[0].i2c_adap);
  407. if (fe0->dvb.frontend != NULL) {
  408. struct dvb_frontend *fe;
  409. struct xc2028_config cfg = {
  410. .i2c_adap = &i2c_bus->i2c_adap,
  411. .i2c_addr = 0x61,
  412. };
  413. static struct xc2028_ctrl ctl = {
  414. .fname = XC2028_DEFAULT_FIRMWARE,
  415. .max_len = 64,
  416. .scode_table = XC3028_FE_OREN538,
  417. };
  418. fe = dvb_attach(xc2028_attach,
  419. fe0->dvb.frontend, &cfg);
  420. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  421. fe->ops.tuner_ops.set_config(fe, &ctl);
  422. }
  423. break;
  424. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  425. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  426. i2c_bus = &dev->i2c_bus[0];
  427. fe0->dvb.frontend = dvb_attach(tda10048_attach,
  428. &hauppauge_hvr1200_config,
  429. &i2c_bus->i2c_adap);
  430. if (fe0->dvb.frontend != NULL) {
  431. dvb_attach(tda829x_attach, fe0->dvb.frontend,
  432. &dev->i2c_bus[1].i2c_adap, 0x42,
  433. &tda829x_no_probe);
  434. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  435. 0x60, &dev->i2c_bus[1].i2c_adap,
  436. &hauppauge_hvr1200_tuner_config);
  437. }
  438. break;
  439. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  440. i2c_bus = &dev->i2c_bus[0];
  441. fe0->dvb.frontend = dvb_attach(dib7000p_attach,
  442. &i2c_bus->i2c_adap,
  443. 0x12, &hauppauge_hvr1400_dib7000_config);
  444. if (fe0->dvb.frontend != NULL) {
  445. struct dvb_frontend *fe;
  446. struct xc2028_config cfg = {
  447. .i2c_adap = &dev->i2c_bus[1].i2c_adap,
  448. .i2c_addr = 0x64,
  449. };
  450. static struct xc2028_ctrl ctl = {
  451. .fname = XC3028L_DEFAULT_FIRMWARE,
  452. .max_len = 64,
  453. .demod = 5000,
  454. /* This is true for all demods with
  455. v36 firmware? */
  456. .type = XC2028_D2633,
  457. };
  458. fe = dvb_attach(xc2028_attach,
  459. fe0->dvb.frontend, &cfg);
  460. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  461. fe->ops.tuner_ops.set_config(fe, &ctl);
  462. }
  463. break;
  464. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  465. i2c_bus = &dev->i2c_bus[port->nr - 1];
  466. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  467. &dvico_s5h1409_config,
  468. &i2c_bus->i2c_adap);
  469. if (fe0->dvb.frontend == NULL)
  470. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  471. &dvico_s5h1411_config,
  472. &i2c_bus->i2c_adap);
  473. if (fe0->dvb.frontend != NULL)
  474. dvb_attach(xc5000_attach, fe0->dvb.frontend,
  475. &i2c_bus->i2c_adap,
  476. &dvico_xc5000_tunerconfig);
  477. break;
  478. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
  479. i2c_bus = &dev->i2c_bus[port->nr - 1];
  480. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  481. &dvico_fusionhdtv_xc3028,
  482. &i2c_bus->i2c_adap);
  483. if (fe0->dvb.frontend != NULL) {
  484. struct dvb_frontend *fe;
  485. struct xc2028_config cfg = {
  486. .i2c_adap = &i2c_bus->i2c_adap,
  487. .i2c_addr = 0x61,
  488. };
  489. static struct xc2028_ctrl ctl = {
  490. .fname = XC2028_DEFAULT_FIRMWARE,
  491. .max_len = 64,
  492. .demod = XC3028_FE_ZARLINK456,
  493. };
  494. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
  495. &cfg);
  496. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  497. fe->ops.tuner_ops.set_config(fe, &ctl);
  498. }
  499. break;
  500. }
  501. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  502. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  503. i2c_bus = &dev->i2c_bus[0];
  504. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  505. &dvico_fusionhdtv_xc3028,
  506. &i2c_bus->i2c_adap);
  507. if (fe0->dvb.frontend != NULL) {
  508. struct dvb_frontend *fe;
  509. struct xc2028_config cfg = {
  510. .i2c_adap = &dev->i2c_bus[1].i2c_adap,
  511. .i2c_addr = 0x61,
  512. };
  513. static struct xc2028_ctrl ctl = {
  514. .fname = XC2028_DEFAULT_FIRMWARE,
  515. .max_len = 64,
  516. .demod = XC3028_FE_ZARLINK456,
  517. };
  518. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
  519. &cfg);
  520. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  521. fe->ops.tuner_ops.set_config(fe, &ctl);
  522. }
  523. break;
  524. case CX23885_BOARD_TBS_6920:
  525. i2c_bus = &dev->i2c_bus[0];
  526. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  527. &tbs_cx24116_config,
  528. &i2c_bus->i2c_adap);
  529. if (fe0->dvb.frontend != NULL)
  530. fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  531. break;
  532. case CX23885_BOARD_TEVII_S470:
  533. i2c_bus = &dev->i2c_bus[1];
  534. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  535. &tevii_cx24116_config,
  536. &i2c_bus->i2c_adap);
  537. if (fe0->dvb.frontend != NULL)
  538. fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  539. break;
  540. case CX23885_BOARD_DVBWORLD_2005:
  541. i2c_bus = &dev->i2c_bus[1];
  542. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  543. &dvbworld_cx24116_config,
  544. &i2c_bus->i2c_adap);
  545. break;
  546. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  547. i2c_bus = &dev->i2c_bus[0];
  548. switch (port->nr) {
  549. /* port B */
  550. case 1:
  551. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  552. &netup_stv0900_config,
  553. &i2c_bus->i2c_adap, 0);
  554. if (fe0->dvb.frontend != NULL) {
  555. if (dvb_attach(stv6110_attach,
  556. fe0->dvb.frontend,
  557. &netup_stv6110_tunerconfig_a,
  558. &i2c_bus->i2c_adap)) {
  559. if (!dvb_attach(lnbh24_attach,
  560. fe0->dvb.frontend,
  561. &i2c_bus->i2c_adap,
  562. LNBH24_PCL, 0, 0x09))
  563. printk(KERN_ERR
  564. "No LNBH24 found!\n");
  565. }
  566. }
  567. break;
  568. /* port C */
  569. case 2:
  570. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  571. &netup_stv0900_config,
  572. &i2c_bus->i2c_adap, 1);
  573. if (fe0->dvb.frontend != NULL) {
  574. if (dvb_attach(stv6110_attach,
  575. fe0->dvb.frontend,
  576. &netup_stv6110_tunerconfig_b,
  577. &i2c_bus->i2c_adap)) {
  578. if (!dvb_attach(lnbh24_attach,
  579. fe0->dvb.frontend,
  580. &i2c_bus->i2c_adap,
  581. LNBH24_PCL, 0, 0x0a))
  582. printk(KERN_ERR
  583. "No LNBH24 found!\n");
  584. }
  585. }
  586. break;
  587. }
  588. break;
  589. default:
  590. printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
  591. " isn't supported yet\n",
  592. dev->name);
  593. break;
  594. }
  595. if (NULL == fe0->dvb.frontend) {
  596. printk(KERN_ERR "%s: frontend initialization failed\n",
  597. dev->name);
  598. return -1;
  599. }
  600. /* define general-purpose callback pointer */
  601. fe0->dvb.frontend->callback = cx23885_tuner_callback;
  602. /* Put the analog decoder in standby to keep it quiet */
  603. call_all(dev, tuner, s_standby);
  604. if (fe0->dvb.frontend->ops.analog_ops.standby)
  605. fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
  606. /* register everything */
  607. ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
  608. &dev->pci->dev, adapter_nr, 0);
  609. /* init CI & MAC */
  610. switch (dev->board) {
  611. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
  612. static struct netup_card_info cinfo;
  613. netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
  614. memcpy(port->frontends.adapter.proposed_mac,
  615. cinfo.port[port->nr - 1].mac, 6);
  616. printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
  617. "%02X:%02X:%02X:%02X:%02X:%02X\n",
  618. port->nr,
  619. port->frontends.adapter.proposed_mac[0],
  620. port->frontends.adapter.proposed_mac[1],
  621. port->frontends.adapter.proposed_mac[2],
  622. port->frontends.adapter.proposed_mac[3],
  623. port->frontends.adapter.proposed_mac[4],
  624. port->frontends.adapter.proposed_mac[5]);
  625. netup_ci_init(port);
  626. break;
  627. }
  628. }
  629. return ret;
  630. }
  631. int cx23885_dvb_register(struct cx23885_tsport *port)
  632. {
  633. struct videobuf_dvb_frontend *fe0;
  634. struct cx23885_dev *dev = port->dev;
  635. int err, i;
  636. /* Here we need to allocate the correct number of frontends,
  637. * as reflected in the cards struct. The reality is that currrently
  638. * no cx23885 boards support this - yet. But, if we don't modify this
  639. * code then the second frontend would never be allocated (later)
  640. * and fail with error before the attach in dvb_register().
  641. * Without these changes we risk an OOPS later. The changes here
  642. * are for safety, and should provide a good foundation for the
  643. * future addition of any multi-frontend cx23885 based boards.
  644. */
  645. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  646. port->num_frontends);
  647. for (i = 1; i <= port->num_frontends; i++) {
  648. if (videobuf_dvb_alloc_frontend(
  649. &port->frontends, i) == NULL) {
  650. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  651. return -ENOMEM;
  652. }
  653. fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
  654. if (!fe0)
  655. err = -EINVAL;
  656. dprintk(1, "%s\n", __func__);
  657. dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
  658. dev->board,
  659. dev->name,
  660. dev->pci_bus,
  661. dev->pci_slot);
  662. err = -ENODEV;
  663. /* dvb stuff */
  664. /* We have to init the queue for each frontend on a port. */
  665. printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
  666. videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
  667. &dev->pci->dev, &port->slock,
  668. V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
  669. sizeof(struct cx23885_buffer), port);
  670. }
  671. err = dvb_register(port);
  672. if (err != 0)
  673. printk(KERN_ERR "%s() dvb_register failed err = %d\n",
  674. __func__, err);
  675. return err;
  676. }
  677. int cx23885_dvb_unregister(struct cx23885_tsport *port)
  678. {
  679. struct videobuf_dvb_frontend *fe0;
  680. /* FIXME: in an error condition where the we have
  681. * an expected number of frontends (attach problem)
  682. * then this might not clean up correctly, if 1
  683. * is invalid.
  684. * This comment only applies to future boards IF they
  685. * implement MFE support.
  686. */
  687. fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
  688. if (fe0->dvb.frontend)
  689. videobuf_dvb_unregister_bus(&port->frontends);
  690. switch (port->dev->board) {
  691. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  692. netup_ci_exit(port);
  693. break;
  694. }
  695. return 0;
  696. }