ab8500.c 25 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. *
  6. * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
  7. * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
  8. *
  9. * AB8500 peripheral regulators
  10. *
  11. * AB8500 supports the following regulators:
  12. * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/err.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/mfd/abx500.h>
  20. #include <linux/mfd/abx500/ab8500.h>
  21. #include <linux/of.h>
  22. #include <linux/regulator/of_regulator.h>
  23. #include <linux/regulator/driver.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/regulator/ab8500.h>
  26. #include <linux/slab.h>
  27. /**
  28. * struct ab8500_regulator_info - ab8500 regulator information
  29. * @dev: device pointer
  30. * @desc: regulator description
  31. * @regulator_dev: regulator device
  32. * @is_enabled: status of regulator (on/off)
  33. * @load_lp_uA: maximum load in idle (low power) mode
  34. * @update_bank: bank to control on/off
  35. * @update_reg: register to control on/off
  36. * @update_mask: mask to enable/disable and set mode of regulator
  37. * @update_val: bits holding the regulator current mode
  38. * @update_val_idle: bits to enable the regulator in idle (low power) mode
  39. * @update_val_normal: bits to enable the regulator in normal (high power) mode
  40. * @voltage_bank: bank to control regulator voltage
  41. * @voltage_reg: register to control regulator voltage
  42. * @voltage_mask: mask to control regulator voltage
  43. * @voltage_shift: shift to control regulator voltage
  44. * @delay: startup/set voltage delay in us
  45. */
  46. struct ab8500_regulator_info {
  47. struct device *dev;
  48. struct regulator_desc desc;
  49. struct regulator_dev *regulator;
  50. bool is_enabled;
  51. int load_lp_uA;
  52. u8 update_bank;
  53. u8 update_reg;
  54. u8 update_mask;
  55. u8 update_val;
  56. u8 update_val_idle;
  57. u8 update_val_normal;
  58. u8 voltage_bank;
  59. u8 voltage_reg;
  60. u8 voltage_mask;
  61. u8 voltage_shift;
  62. unsigned int delay;
  63. };
  64. /* voltage tables for the vauxn/vintcore supplies */
  65. static const unsigned int ldo_vauxn_voltages[] = {
  66. 1100000,
  67. 1200000,
  68. 1300000,
  69. 1400000,
  70. 1500000,
  71. 1800000,
  72. 1850000,
  73. 1900000,
  74. 2500000,
  75. 2650000,
  76. 2700000,
  77. 2750000,
  78. 2800000,
  79. 2900000,
  80. 3000000,
  81. 3300000,
  82. };
  83. static const unsigned int ldo_vaux3_voltages[] = {
  84. 1200000,
  85. 1500000,
  86. 1800000,
  87. 2100000,
  88. 2500000,
  89. 2750000,
  90. 2790000,
  91. 2910000,
  92. };
  93. static const unsigned int ldo_vintcore_voltages[] = {
  94. 1200000,
  95. 1225000,
  96. 1250000,
  97. 1275000,
  98. 1300000,
  99. 1325000,
  100. 1350000,
  101. };
  102. static int ab8500_regulator_enable(struct regulator_dev *rdev)
  103. {
  104. int ret;
  105. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  106. if (info == NULL) {
  107. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  108. return -EINVAL;
  109. }
  110. ret = abx500_mask_and_set_register_interruptible(info->dev,
  111. info->update_bank, info->update_reg,
  112. info->update_mask, info->update_val);
  113. if (ret < 0)
  114. dev_err(rdev_get_dev(rdev),
  115. "couldn't set enable bits for regulator\n");
  116. info->is_enabled = true;
  117. dev_vdbg(rdev_get_dev(rdev),
  118. "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
  119. info->desc.name, info->update_bank, info->update_reg,
  120. info->update_mask, info->update_val);
  121. return ret;
  122. }
  123. static int ab8500_regulator_disable(struct regulator_dev *rdev)
  124. {
  125. int ret;
  126. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  127. if (info == NULL) {
  128. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  129. return -EINVAL;
  130. }
  131. ret = abx500_mask_and_set_register_interruptible(info->dev,
  132. info->update_bank, info->update_reg,
  133. info->update_mask, 0x0);
  134. if (ret < 0)
  135. dev_err(rdev_get_dev(rdev),
  136. "couldn't set disable bits for regulator\n");
  137. info->is_enabled = false;
  138. dev_vdbg(rdev_get_dev(rdev),
  139. "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
  140. info->desc.name, info->update_bank, info->update_reg,
  141. info->update_mask, 0x0);
  142. return ret;
  143. }
  144. static unsigned int ab8500_regulator_get_optimum_mode(
  145. struct regulator_dev *rdev, int input_uV,
  146. int output_uV, int load_uA)
  147. {
  148. unsigned int mode;
  149. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  150. if (info == NULL) {
  151. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  152. return -EINVAL;
  153. }
  154. if (load_uA <= info->load_lp_uA)
  155. mode = REGULATOR_MODE_IDLE;
  156. else
  157. mode = REGULATOR_MODE_NORMAL;
  158. return mode;
  159. }
  160. static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
  161. unsigned int mode)
  162. {
  163. int ret = 0;
  164. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  165. if (info == NULL) {
  166. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  167. return -EINVAL;
  168. }
  169. switch (mode) {
  170. case REGULATOR_MODE_NORMAL:
  171. info->update_val = info->update_val_normal;
  172. break;
  173. case REGULATOR_MODE_IDLE:
  174. info->update_val = info->update_val_idle;
  175. break;
  176. default:
  177. return -EINVAL;
  178. }
  179. if (info->is_enabled) {
  180. ret = abx500_mask_and_set_register_interruptible(info->dev,
  181. info->update_bank, info->update_reg,
  182. info->update_mask, info->update_val);
  183. if (ret < 0)
  184. dev_err(rdev_get_dev(rdev),
  185. "couldn't set regulator mode\n");
  186. dev_vdbg(rdev_get_dev(rdev),
  187. "%s-set_mode (bank, reg, mask, value): "
  188. "0x%x, 0x%x, 0x%x, 0x%x\n",
  189. info->desc.name, info->update_bank, info->update_reg,
  190. info->update_mask, info->update_val);
  191. }
  192. return ret;
  193. }
  194. static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
  195. {
  196. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  197. int ret;
  198. if (info == NULL) {
  199. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  200. return -EINVAL;
  201. }
  202. if (info->update_val == info->update_val_normal)
  203. ret = REGULATOR_MODE_NORMAL;
  204. else if (info->update_val == info->update_val_idle)
  205. ret = REGULATOR_MODE_IDLE;
  206. else
  207. ret = -EINVAL;
  208. return ret;
  209. }
  210. static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
  211. {
  212. int ret;
  213. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  214. u8 regval;
  215. if (info == NULL) {
  216. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  217. return -EINVAL;
  218. }
  219. ret = abx500_get_register_interruptible(info->dev,
  220. info->update_bank, info->update_reg, &regval);
  221. if (ret < 0) {
  222. dev_err(rdev_get_dev(rdev),
  223. "couldn't read 0x%x register\n", info->update_reg);
  224. return ret;
  225. }
  226. dev_vdbg(rdev_get_dev(rdev),
  227. "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
  228. " 0x%x\n",
  229. info->desc.name, info->update_bank, info->update_reg,
  230. info->update_mask, regval);
  231. if (regval & info->update_mask)
  232. info->is_enabled = true;
  233. else
  234. info->is_enabled = false;
  235. return info->is_enabled;
  236. }
  237. static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
  238. {
  239. int ret, val;
  240. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  241. u8 regval;
  242. if (info == NULL) {
  243. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  244. return -EINVAL;
  245. }
  246. ret = abx500_get_register_interruptible(info->dev,
  247. info->voltage_bank, info->voltage_reg, &regval);
  248. if (ret < 0) {
  249. dev_err(rdev_get_dev(rdev),
  250. "couldn't read voltage reg for regulator\n");
  251. return ret;
  252. }
  253. dev_vdbg(rdev_get_dev(rdev),
  254. "%s-get_voltage (bank, reg, mask, shift, value): "
  255. "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
  256. info->desc.name, info->voltage_bank,
  257. info->voltage_reg, info->voltage_mask,
  258. info->voltage_shift, regval);
  259. val = regval & info->voltage_mask;
  260. return val >> info->voltage_shift;
  261. }
  262. static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
  263. unsigned selector)
  264. {
  265. int ret;
  266. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  267. u8 regval;
  268. if (info == NULL) {
  269. dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
  270. return -EINVAL;
  271. }
  272. /* set the registers for the request */
  273. regval = (u8)selector << info->voltage_shift;
  274. ret = abx500_mask_and_set_register_interruptible(info->dev,
  275. info->voltage_bank, info->voltage_reg,
  276. info->voltage_mask, regval);
  277. if (ret < 0)
  278. dev_err(rdev_get_dev(rdev),
  279. "couldn't set voltage reg for regulator\n");
  280. dev_vdbg(rdev_get_dev(rdev),
  281. "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
  282. " 0x%x\n",
  283. info->desc.name, info->voltage_bank, info->voltage_reg,
  284. info->voltage_mask, regval);
  285. return ret;
  286. }
  287. static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
  288. unsigned int old_sel,
  289. unsigned int new_sel)
  290. {
  291. struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
  292. return info->delay;
  293. }
  294. static struct regulator_ops ab8500_regulator_volt_mode_ops = {
  295. .enable = ab8500_regulator_enable,
  296. .disable = ab8500_regulator_disable,
  297. .is_enabled = ab8500_regulator_is_enabled,
  298. .get_optimum_mode = ab8500_regulator_get_optimum_mode,
  299. .set_mode = ab8500_regulator_set_mode,
  300. .get_mode = ab8500_regulator_get_mode,
  301. .get_voltage_sel = ab8500_regulator_get_voltage_sel,
  302. .set_voltage_sel = ab8500_regulator_set_voltage_sel,
  303. .list_voltage = regulator_list_voltage_table,
  304. .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
  305. };
  306. static struct regulator_ops ab8500_regulator_mode_ops = {
  307. .enable = ab8500_regulator_enable,
  308. .disable = ab8500_regulator_disable,
  309. .is_enabled = ab8500_regulator_is_enabled,
  310. .get_optimum_mode = ab8500_regulator_get_optimum_mode,
  311. .set_mode = ab8500_regulator_set_mode,
  312. .get_mode = ab8500_regulator_get_mode,
  313. .get_voltage_sel = ab8500_regulator_get_voltage_sel,
  314. .list_voltage = regulator_list_voltage_table,
  315. .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
  316. };
  317. static struct regulator_ops ab8500_regulator_ops = {
  318. .enable = ab8500_regulator_enable,
  319. .disable = ab8500_regulator_disable,
  320. .is_enabled = ab8500_regulator_is_enabled,
  321. .get_voltage_sel = ab8500_regulator_get_voltage_sel,
  322. .list_voltage = regulator_list_voltage_table,
  323. };
  324. static struct ab8500_regulator_info
  325. ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
  326. /*
  327. * Variable Voltage Regulators
  328. * name, min mV, max mV,
  329. * update bank, reg, mask, enable val
  330. * volt bank, reg, mask
  331. */
  332. [AB8500_LDO_AUX1] = {
  333. .desc = {
  334. .name = "LDO-AUX1",
  335. .ops = &ab8500_regulator_volt_mode_ops,
  336. .type = REGULATOR_VOLTAGE,
  337. .id = AB8500_LDO_AUX1,
  338. .owner = THIS_MODULE,
  339. .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
  340. .volt_table = ldo_vauxn_voltages,
  341. },
  342. .load_lp_uA = 5000,
  343. .update_bank = 0x04,
  344. .update_reg = 0x09,
  345. .update_mask = 0x03,
  346. .update_val = 0x01,
  347. .update_val_idle = 0x03,
  348. .update_val_normal = 0x01,
  349. .voltage_bank = 0x04,
  350. .voltage_reg = 0x1f,
  351. .voltage_mask = 0x0f,
  352. },
  353. [AB8500_LDO_AUX2] = {
  354. .desc = {
  355. .name = "LDO-AUX2",
  356. .ops = &ab8500_regulator_volt_mode_ops,
  357. .type = REGULATOR_VOLTAGE,
  358. .id = AB8500_LDO_AUX2,
  359. .owner = THIS_MODULE,
  360. .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
  361. .volt_table = ldo_vauxn_voltages,
  362. },
  363. .load_lp_uA = 5000,
  364. .update_bank = 0x04,
  365. .update_reg = 0x09,
  366. .update_mask = 0x0c,
  367. .update_val = 0x04,
  368. .update_val_idle = 0x0c,
  369. .update_val_normal = 0x04,
  370. .voltage_bank = 0x04,
  371. .voltage_reg = 0x20,
  372. .voltage_mask = 0x0f,
  373. },
  374. [AB8500_LDO_AUX3] = {
  375. .desc = {
  376. .name = "LDO-AUX3",
  377. .ops = &ab8500_regulator_volt_mode_ops,
  378. .type = REGULATOR_VOLTAGE,
  379. .id = AB8500_LDO_AUX3,
  380. .owner = THIS_MODULE,
  381. .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
  382. .volt_table = ldo_vaux3_voltages,
  383. },
  384. .load_lp_uA = 5000,
  385. .update_bank = 0x04,
  386. .update_reg = 0x0a,
  387. .update_mask = 0x03,
  388. .update_val = 0x01,
  389. .update_val_idle = 0x03,
  390. .update_val_normal = 0x01,
  391. .voltage_bank = 0x04,
  392. .voltage_reg = 0x21,
  393. .voltage_mask = 0x07,
  394. },
  395. [AB8500_LDO_INTCORE] = {
  396. .desc = {
  397. .name = "LDO-INTCORE",
  398. .ops = &ab8500_regulator_volt_mode_ops,
  399. .type = REGULATOR_VOLTAGE,
  400. .id = AB8500_LDO_INTCORE,
  401. .owner = THIS_MODULE,
  402. .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
  403. .volt_table = ldo_vintcore_voltages,
  404. },
  405. .load_lp_uA = 5000,
  406. .update_bank = 0x03,
  407. .update_reg = 0x80,
  408. .update_mask = 0x44,
  409. .update_val = 0x04,
  410. .update_val_idle = 0x44,
  411. .update_val_normal = 0x04,
  412. .voltage_bank = 0x03,
  413. .voltage_reg = 0x80,
  414. .voltage_mask = 0x38,
  415. .voltage_shift = 3,
  416. },
  417. /*
  418. * Fixed Voltage Regulators
  419. * name, fixed mV,
  420. * update bank, reg, mask, enable val
  421. */
  422. [AB8500_LDO_TVOUT] = {
  423. .desc = {
  424. .name = "LDO-TVOUT",
  425. .ops = &ab8500_regulator_mode_ops,
  426. .type = REGULATOR_VOLTAGE,
  427. .id = AB8500_LDO_TVOUT,
  428. .owner = THIS_MODULE,
  429. .n_voltages = 1,
  430. .min_uV = 2000000,
  431. .enable_time = 10000,
  432. },
  433. .delay = 10000,
  434. .load_lp_uA = 1000,
  435. .update_bank = 0x03,
  436. .update_reg = 0x80,
  437. .update_mask = 0x82,
  438. .update_val = 0x02,
  439. .update_val_idle = 0x82,
  440. .update_val_normal = 0x02,
  441. },
  442. [AB8500_LDO_USB] = {
  443. .desc = {
  444. .name = "LDO-USB",
  445. .ops = &ab8500_regulator_fixed_ops,
  446. .type = REGULATOR_VOLTAGE,
  447. .id = AB8500_LDO_USB,
  448. .owner = THIS_MODULE,
  449. .n_voltages = 1,
  450. .min_uV = 3300000,
  451. },
  452. .update_bank = 0x03,
  453. .update_reg = 0x82,
  454. .update_mask = 0x03,
  455. },
  456. /*
  457. * Regulators with fixed voltage and normal mode
  458. */
  459. [AB8500_LDO_AUDIO] = {
  460. .desc = {
  461. .name = "LDO-AUDIO",
  462. .ops = &ab8500_regulator_ops,
  463. .type = REGULATOR_VOLTAGE,
  464. .id = AB8500_LDO_AUDIO,
  465. .owner = THIS_MODULE,
  466. .n_voltages = 1,
  467. .min_uV = 2000000,
  468. },
  469. .update_bank = 0x03,
  470. .update_reg = 0x83,
  471. .update_mask = 0x02,
  472. .update_val = 0x02,
  473. },
  474. [AB8500_LDO_ANAMIC1] = {
  475. .desc = {
  476. .name = "LDO-ANAMIC1",
  477. .ops = &ab8500_regulator_ops,
  478. .type = REGULATOR_VOLTAGE,
  479. .id = AB8500_LDO_ANAMIC1,
  480. .owner = THIS_MODULE,
  481. .n_voltages = 1,
  482. .min_uV = 2050000,
  483. },
  484. .update_bank = 0x03,
  485. .update_reg = 0x83,
  486. .update_mask = 0x08,
  487. .update_val = 0x08,
  488. },
  489. [AB8500_LDO_ANAMIC2] = {
  490. .desc = {
  491. .name = "LDO-ANAMIC2",
  492. .ops = &ab8500_regulator_ops,
  493. .type = REGULATOR_VOLTAGE,
  494. .id = AB8500_LDO_ANAMIC2,
  495. .owner = THIS_MODULE,
  496. .n_voltages = 1,
  497. .min_uV = 2050000,
  498. },
  499. .update_bank = 0x03,
  500. .update_reg = 0x83,
  501. .update_mask = 0x10,
  502. .update_val = 0x10,
  503. },
  504. [AB8500_LDO_DMIC] = {
  505. .desc = {
  506. .name = "LDO-DMIC",
  507. .ops = &ab8500_regulator_ops,
  508. .type = REGULATOR_VOLTAGE,
  509. .id = AB8500_LDO_DMIC,
  510. .owner = THIS_MODULE,
  511. .n_voltages = 1,
  512. .min_uV = 1800000,
  513. },
  514. .update_bank = 0x03,
  515. .update_reg = 0x83,
  516. .update_mask = 0x04,
  517. .update_val = 0x04,
  518. },
  519. /*
  520. * Regulators with fixed voltage and normal/idle modes
  521. */
  522. [AB8500_LDO_ANA] = {
  523. .desc = {
  524. .name = "LDO-ANA",
  525. .ops = &ab8500_regulator_mode_ops,
  526. .type = REGULATOR_VOLTAGE,
  527. .id = AB8500_LDO_ANA,
  528. .owner = THIS_MODULE,
  529. .n_voltages = 1,
  530. .min_uV = 1200000,
  531. },
  532. .load_lp_uA = 1000,
  533. .update_bank = 0x04,
  534. .update_reg = 0x06,
  535. .update_mask = 0x0c,
  536. .update_val = 0x04,
  537. .update_val_idle = 0x0c,
  538. .update_val_normal = 0x04,
  539. },
  540. };
  541. struct ab8500_reg_init {
  542. u8 bank;
  543. u8 addr;
  544. u8 mask;
  545. };
  546. #define REG_INIT(_id, _bank, _addr, _mask) \
  547. [_id] = { \
  548. .bank = _bank, \
  549. .addr = _addr, \
  550. .mask = _mask, \
  551. }
  552. static struct ab8500_reg_init ab8500_reg_init[] = {
  553. /*
  554. * 0x30, VanaRequestCtrl
  555. * 0x0c, VpllRequestCtrl
  556. * 0xc0, VextSupply1RequestCtrl
  557. */
  558. REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xfc),
  559. /*
  560. * 0x03, VextSupply2RequestCtrl
  561. * 0x0c, VextSupply3RequestCtrl
  562. * 0x30, Vaux1RequestCtrl
  563. * 0xc0, Vaux2RequestCtrl
  564. */
  565. REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
  566. /*
  567. * 0x03, Vaux3RequestCtrl
  568. * 0x04, SwHPReq
  569. */
  570. REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
  571. /*
  572. * 0x01, Vsmps1SysClkReq1HPValid
  573. * 0x02, Vsmps2SysClkReq1HPValid
  574. * 0x04, Vsmps3SysClkReq1HPValid
  575. * 0x08, VanaSysClkReq1HPValid
  576. * 0x10, VpllSysClkReq1HPValid
  577. * 0x20, Vaux1SysClkReq1HPValid
  578. * 0x40, Vaux2SysClkReq1HPValid
  579. * 0x80, Vaux3SysClkReq1HPValid
  580. */
  581. REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
  582. /*
  583. * 0x10, VextSupply1SysClkReq1HPValid
  584. * 0x20, VextSupply2SysClkReq1HPValid
  585. * 0x40, VextSupply3SysClkReq1HPValid
  586. */
  587. REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
  588. /*
  589. * 0x08, VanaHwHPReq1Valid
  590. * 0x20, Vaux1HwHPReq1Valid
  591. * 0x40, Vaux2HwHPReq1Valid
  592. * 0x80, Vaux3HwHPReq1Valid
  593. */
  594. REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
  595. /*
  596. * 0x01, VextSupply1HwHPReq1Valid
  597. * 0x02, VextSupply2HwHPReq1Valid
  598. * 0x04, VextSupply3HwHPReq1Valid
  599. */
  600. REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
  601. /*
  602. * 0x08, VanaHwHPReq2Valid
  603. * 0x20, Vaux1HwHPReq2Valid
  604. * 0x40, Vaux2HwHPReq2Valid
  605. * 0x80, Vaux3HwHPReq2Valid
  606. */
  607. REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
  608. /*
  609. * 0x01, VextSupply1HwHPReq2Valid
  610. * 0x02, VextSupply2HwHPReq2Valid
  611. * 0x04, VextSupply3HwHPReq2Valid
  612. */
  613. REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
  614. /*
  615. * 0x20, VanaSwHPReqValid
  616. * 0x80, Vaux1SwHPReqValid
  617. */
  618. REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
  619. /*
  620. * 0x01, Vaux2SwHPReqValid
  621. * 0x02, Vaux3SwHPReqValid
  622. * 0x04, VextSupply1SwHPReqValid
  623. * 0x08, VextSupply2SwHPReqValid
  624. * 0x10, VextSupply3SwHPReqValid
  625. */
  626. REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
  627. /*
  628. * 0x02, SysClkReq2Valid1
  629. * ...
  630. * 0x80, SysClkReq8Valid1
  631. */
  632. REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
  633. /*
  634. * 0x02, SysClkReq2Valid2
  635. * ...
  636. * 0x80, SysClkReq8Valid2
  637. */
  638. REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
  639. /*
  640. * 0x02, VTVoutEna
  641. * 0x04, Vintcore12Ena
  642. * 0x38, Vintcore12Sel
  643. * 0x40, Vintcore12LP
  644. * 0x80, VTVoutLP
  645. */
  646. REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
  647. /*
  648. * 0x02, VaudioEna
  649. * 0x04, VdmicEna
  650. * 0x08, Vamic1Ena
  651. * 0x10, Vamic2Ena
  652. */
  653. REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
  654. /*
  655. * 0x01, Vamic1_dzout
  656. * 0x02, Vamic2_dzout
  657. */
  658. REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
  659. /*
  660. * 0x0c, VBBNRegu
  661. * 0x03, VBBPRegu
  662. * NOTE! PRCMU register
  663. */
  664. REG_INIT(AB8500_ARMREGU2, 0x04, 0x01, 0x0f),
  665. /*
  666. * 0x0c, VBBPSel1
  667. * 0x03, VBBNSel1
  668. * NOTE! PRCMU register
  669. */
  670. REG_INIT(AB8500_VBBSEL1, 0x04, 0x11, 0x0f),
  671. /*
  672. * 0x0c, VBBNSel2
  673. * 0x03, VBBPSel2
  674. * NOTE! PRCMU register
  675. */
  676. REG_INIT(AB8500_VBBSEL2, 0x04, 0x12, 0x0f),
  677. /*
  678. * 0x03, Vsmps1Regu
  679. * 0x0c, Vsmps1SelCtrl
  680. */
  681. REG_INIT(AB8500_VSMPS1REGU, 0x04, 0x03, 0x0f),
  682. /*
  683. * 0x03, Vsmps2Regu
  684. * 0x0c, Vsmps2SelCtrl
  685. */
  686. REG_INIT(AB8500_VSMPS2REGU, 0x04, 0x04, 0x0f),
  687. /*
  688. * 0x0c, VanaRegu
  689. * 0x03, VpllRegu
  690. */
  691. REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
  692. /*
  693. * 0x01, VrefDDREna
  694. * 0x02, VrefDDRSleepMode
  695. */
  696. REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
  697. /*
  698. * 0x03, VextSupply1Regu
  699. * 0x0c, VextSupply2Regu
  700. * 0x30, VextSupply3Regu
  701. * 0x40, ExtSupply2Bypass
  702. * 0x80, ExtSupply3Bypass
  703. */
  704. REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
  705. /*
  706. * 0x03, Vaux1Regu
  707. * 0x0c, Vaux2Regu
  708. */
  709. REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
  710. /*
  711. * 0x0c, Vrf1Regu
  712. * 0x03, Vaux3Regu
  713. */
  714. REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
  715. /*
  716. * 0x3f, Vsmps1Sel1
  717. */
  718. REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
  719. /*
  720. * 0x0f, Vaux1Sel
  721. */
  722. REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
  723. /*
  724. * 0x0f, Vaux2Sel
  725. */
  726. REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
  727. /*
  728. * 0x07, Vaux3Sel
  729. */
  730. REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
  731. /*
  732. * 0x01, VextSupply12LP
  733. */
  734. REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
  735. /*
  736. * 0x04, Vaux1Disch
  737. * 0x08, Vaux2Disch
  738. * 0x10, Vaux3Disch
  739. * 0x20, Vintcore12Disch
  740. * 0x40, VTVoutDisch
  741. * 0x80, VaudioDisch
  742. */
  743. REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
  744. /*
  745. * 0x02, VanaDisch
  746. * 0x04, VdmicPullDownEna
  747. * 0x10, VdmicDisch
  748. */
  749. REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
  750. };
  751. static int ab8500_regulator_init_registers(struct platform_device *pdev,
  752. int id, int mask, int value)
  753. {
  754. int err;
  755. BUG_ON(value & ~mask);
  756. BUG_ON(mask & ~ab8500_reg_init[id].mask);
  757. /* initialize register */
  758. err = abx500_mask_and_set_register_interruptible(
  759. &pdev->dev,
  760. ab8500_reg_init[id].bank,
  761. ab8500_reg_init[id].addr,
  762. mask, value);
  763. if (err < 0) {
  764. dev_err(&pdev->dev,
  765. "Failed to initialize 0x%02x, 0x%02x.\n",
  766. ab8500_reg_init[id].bank,
  767. ab8500_reg_init[id].addr);
  768. return err;
  769. }
  770. dev_vdbg(&pdev->dev,
  771. " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
  772. ab8500_reg_init[id].bank,
  773. ab8500_reg_init[id].addr,
  774. mask, value);
  775. return 0;
  776. }
  777. static int ab8500_regulator_register(struct platform_device *pdev,
  778. struct regulator_init_data *init_data,
  779. int id,
  780. struct device_node *np)
  781. {
  782. struct ab8500_regulator_info *info = NULL;
  783. struct regulator_config config = { };
  784. int err;
  785. /* assign per-regulator data */
  786. info = &ab8500_regulator_info[id];
  787. info->dev = &pdev->dev;
  788. config.dev = &pdev->dev;
  789. config.init_data = init_data;
  790. config.driver_data = info;
  791. config.of_node = np;
  792. /* fix for hardware before ab8500v2.0 */
  793. if (abx500_get_chip_id(info->dev) < 0x20) {
  794. if (info->desc.id == AB8500_LDO_AUX3) {
  795. info->desc.n_voltages =
  796. ARRAY_SIZE(ldo_vauxn_voltages);
  797. info->desc.volt_table = ldo_vauxn_voltages;
  798. info->voltage_mask = 0xf;
  799. }
  800. }
  801. /* register regulator with framework */
  802. info->regulator = regulator_register(&info->desc, &config);
  803. if (IS_ERR(info->regulator)) {
  804. err = PTR_ERR(info->regulator);
  805. dev_err(&pdev->dev, "failed to register regulator %s\n",
  806. info->desc.name);
  807. /* when we fail, un-register all earlier regulators */
  808. while (--id >= 0) {
  809. info = &ab8500_regulator_info[id];
  810. regulator_unregister(info->regulator);
  811. }
  812. return err;
  813. }
  814. return 0;
  815. }
  816. static struct of_regulator_match ab8500_regulator_matches[] = {
  817. { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
  818. { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
  819. { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
  820. { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
  821. { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
  822. { .name = "ab8500_ldo_usb", .driver_data = (void *) AB8500_LDO_USB, },
  823. { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
  824. { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
  825. { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
  826. { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
  827. { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
  828. };
  829. static int
  830. ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)
  831. {
  832. int err, i;
  833. for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
  834. err = ab8500_regulator_register(
  835. pdev, ab8500_regulator_matches[i].init_data,
  836. i, ab8500_regulator_matches[i].of_node);
  837. if (err)
  838. return err;
  839. }
  840. return 0;
  841. }
  842. static int ab8500_regulator_probe(struct platform_device *pdev)
  843. {
  844. struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
  845. struct ab8500_platform_data *pdata;
  846. struct device_node *np = pdev->dev.of_node;
  847. int i, err;
  848. if (np) {
  849. err = of_regulator_match(&pdev->dev, np,
  850. ab8500_regulator_matches,
  851. ARRAY_SIZE(ab8500_regulator_matches));
  852. if (err < 0) {
  853. dev_err(&pdev->dev,
  854. "Error parsing regulator init data: %d\n", err);
  855. return err;
  856. }
  857. err = ab8500_regulator_of_probe(pdev, np);
  858. return err;
  859. }
  860. if (!ab8500) {
  861. dev_err(&pdev->dev, "null mfd parent\n");
  862. return -EINVAL;
  863. }
  864. pdata = dev_get_platdata(ab8500->dev);
  865. if (!pdata) {
  866. dev_err(&pdev->dev, "null pdata\n");
  867. return -EINVAL;
  868. }
  869. /* make sure the platform data has the correct size */
  870. if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
  871. dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
  872. return -EINVAL;
  873. }
  874. /* initialize registers */
  875. for (i = 0; i < pdata->num_regulator_reg_init; i++) {
  876. int id, mask, value;
  877. id = pdata->regulator_reg_init[i].id;
  878. mask = pdata->regulator_reg_init[i].mask;
  879. value = pdata->regulator_reg_init[i].value;
  880. /* check for configuration errors */
  881. BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
  882. err = ab8500_regulator_init_registers(pdev, id, mask, value);
  883. if (err < 0)
  884. return err;
  885. }
  886. /* register all regulators */
  887. for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
  888. err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL);
  889. if (err < 0)
  890. return err;
  891. }
  892. return 0;
  893. }
  894. static int ab8500_regulator_remove(struct platform_device *pdev)
  895. {
  896. int i;
  897. for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
  898. struct ab8500_regulator_info *info = NULL;
  899. info = &ab8500_regulator_info[i];
  900. dev_vdbg(rdev_get_dev(info->regulator),
  901. "%s-remove\n", info->desc.name);
  902. regulator_unregister(info->regulator);
  903. }
  904. return 0;
  905. }
  906. static struct platform_driver ab8500_regulator_driver = {
  907. .probe = ab8500_regulator_probe,
  908. .remove = ab8500_regulator_remove,
  909. .driver = {
  910. .name = "ab8500-regulator",
  911. .owner = THIS_MODULE,
  912. },
  913. };
  914. static int __init ab8500_regulator_init(void)
  915. {
  916. int ret;
  917. ret = platform_driver_register(&ab8500_regulator_driver);
  918. if (ret != 0)
  919. pr_err("Failed to register ab8500 regulator: %d\n", ret);
  920. return ret;
  921. }
  922. subsys_initcall(ab8500_regulator_init);
  923. static void __exit ab8500_regulator_exit(void)
  924. {
  925. platform_driver_unregister(&ab8500_regulator_driver);
  926. }
  927. module_exit(ab8500_regulator_exit);
  928. MODULE_LICENSE("GPL v2");
  929. MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
  930. MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
  931. MODULE_ALIAS("platform:ab8500-regulator");