dw_dmac.h 2.0 KB

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  1. /*
  2. * Driver for the Synopsys DesignWare DMA Controller (aka DMACA on
  3. * AVR32 systems.)
  4. *
  5. * Copyright (C) 2007 Atmel Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #ifndef DW_DMAC_H
  12. #define DW_DMAC_H
  13. #include <linux/dmaengine.h>
  14. /**
  15. * struct dw_dma_platform_data - Controller configuration parameters
  16. * @nr_channels: Number of channels supported by hardware (max 8)
  17. */
  18. struct dw_dma_platform_data {
  19. unsigned int nr_channels;
  20. };
  21. /**
  22. * struct dw_dma_slave - Controller-specific information about a slave
  23. * @slave: Generic information about the slave
  24. * @ctl_lo: Platform-specific initializer for the CTL_LO register
  25. * @cfg_hi: Platform-specific initializer for the CFG_HI register
  26. * @cfg_lo: Platform-specific initializer for the CFG_LO register
  27. */
  28. struct dw_dma_slave {
  29. struct dma_slave slave;
  30. u32 cfg_hi;
  31. u32 cfg_lo;
  32. };
  33. /* Platform-configurable bits in CFG_HI */
  34. #define DWC_CFGH_FCMODE (1 << 0)
  35. #define DWC_CFGH_FIFO_MODE (1 << 1)
  36. #define DWC_CFGH_PROTCTL(x) ((x) << 2)
  37. #define DWC_CFGH_SRC_PER(x) ((x) << 7)
  38. #define DWC_CFGH_DST_PER(x) ((x) << 11)
  39. /* Platform-configurable bits in CFG_LO */
  40. #define DWC_CFGL_PRIO(x) ((x) << 5) /* priority */
  41. #define DWC_CFGL_LOCK_CH_XFER (0 << 12) /* scope of LOCK_CH */
  42. #define DWC_CFGL_LOCK_CH_BLOCK (1 << 12)
  43. #define DWC_CFGL_LOCK_CH_XACT (2 << 12)
  44. #define DWC_CFGL_LOCK_BUS_XFER (0 << 14) /* scope of LOCK_BUS */
  45. #define DWC_CFGL_LOCK_BUS_BLOCK (1 << 14)
  46. #define DWC_CFGL_LOCK_BUS_XACT (2 << 14)
  47. #define DWC_CFGL_LOCK_CH (1 << 15) /* channel lockout */
  48. #define DWC_CFGL_LOCK_BUS (1 << 16) /* busmaster lockout */
  49. #define DWC_CFGL_HS_DST_POL (1 << 18) /* dst handshake active low */
  50. #define DWC_CFGL_HS_SRC_POL (1 << 19) /* src handshake active low */
  51. static inline struct dw_dma_slave *to_dw_dma_slave(struct dma_slave *slave)
  52. {
  53. return container_of(slave, struct dw_dma_slave, slave);
  54. }
  55. #endif /* DW_DMAC_H */