omap-mcpdm.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512
  1. /*
  2. * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
  3. *
  4. * Copyright (C) 2009 - 2011 Texas Instruments
  5. *
  6. * Author: Misael Lopez Cruz <misael.lopez@ti.com>
  7. * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
  8. * Margarita Olaya <magi.olaya@ti.com>
  9. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * version 2 as published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23. * 02110-1301 USA
  24. *
  25. */
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/err.h>
  31. #include <linux/io.h>
  32. #include <linux/irq.h>
  33. #include <linux/slab.h>
  34. #include <linux/pm_runtime.h>
  35. #include <sound/core.h>
  36. #include <sound/pcm.h>
  37. #include <sound/pcm_params.h>
  38. #include <sound/soc.h>
  39. #include <plat/dma.h>
  40. #include <plat/omap_hwmod.h>
  41. #include "omap-mcpdm.h"
  42. #include "omap-pcm.h"
  43. struct omap_mcpdm {
  44. struct device *dev;
  45. unsigned long phys_base;
  46. void __iomem *io_base;
  47. int irq;
  48. struct mutex mutex;
  49. /* channel data */
  50. u32 dn_channels;
  51. u32 up_channels;
  52. /* McPDM FIFO thresholds */
  53. u32 dn_threshold;
  54. u32 up_threshold;
  55. };
  56. /*
  57. * Stream DMA parameters
  58. */
  59. static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  60. {
  61. .name = "Audio playback",
  62. .dma_req = OMAP44XX_DMA_MCPDM_DL,
  63. .data_type = OMAP_DMA_DATA_TYPE_S32,
  64. .sync_mode = OMAP_DMA_SYNC_PACKET,
  65. .port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_DN_DATA,
  66. },
  67. {
  68. .name = "Audio capture",
  69. .dma_req = OMAP44XX_DMA_MCPDM_UP,
  70. .data_type = OMAP_DMA_DATA_TYPE_S32,
  71. .sync_mode = OMAP_DMA_SYNC_PACKET,
  72. .port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_UP_DATA,
  73. },
  74. };
  75. static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  76. {
  77. __raw_writel(val, mcpdm->io_base + reg);
  78. }
  79. static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  80. {
  81. return __raw_readl(mcpdm->io_base + reg);
  82. }
  83. #ifdef DEBUG
  84. static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
  85. {
  86. dev_dbg(mcpdm->dev, "***********************\n");
  87. dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
  88. omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
  89. dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
  90. omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
  91. dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
  92. omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
  93. dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
  94. omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
  95. dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
  96. omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
  97. dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
  98. omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
  99. dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
  100. omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
  101. dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
  102. omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
  103. dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
  104. omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
  105. dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
  106. omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
  107. dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
  108. omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
  109. dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
  110. omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
  111. dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
  112. omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
  113. dev_dbg(mcpdm->dev, "***********************\n");
  114. }
  115. #else
  116. static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
  117. #endif
  118. /*
  119. * Enables the transfer through the PDM interface to/from the Phoenix
  120. * codec by enabling the corresponding UP or DN channels.
  121. */
  122. static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
  123. {
  124. u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
  125. ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
  126. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
  127. ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
  128. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
  129. ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
  130. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
  131. }
  132. /*
  133. * Disables the transfer through the PDM interface to/from the Phoenix
  134. * codec by disabling the corresponding UP or DN channels.
  135. */
  136. static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
  137. {
  138. u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
  139. ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
  140. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
  141. ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
  142. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
  143. ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
  144. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
  145. }
  146. /*
  147. * Is the physical McPDM interface active.
  148. */
  149. static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
  150. {
  151. return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
  152. (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
  153. }
  154. /*
  155. * Configures McPDM uplink, and downlink for audio.
  156. * This function should be called before omap_mcpdm_start.
  157. */
  158. static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
  159. {
  160. omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
  161. MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
  162. MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
  163. omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
  164. omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
  165. omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
  166. MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
  167. }
  168. /*
  169. * Cleans McPDM uplink, and downlink configuration.
  170. * This function should be called when the stream is closed.
  171. */
  172. static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
  173. {
  174. /* Disable irq request generation for downlink */
  175. omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
  176. MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
  177. /* Disable DMA request generation for downlink */
  178. omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
  179. /* Disable irq request generation for uplink */
  180. omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
  181. MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
  182. /* Disable DMA request generation for uplink */
  183. omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
  184. }
  185. static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
  186. {
  187. struct omap_mcpdm *mcpdm = dev_id;
  188. int irq_status;
  189. irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
  190. /* Acknowledge irq event */
  191. omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
  192. if (irq_status & MCPDM_DN_IRQ_FULL)
  193. dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
  194. if (irq_status & MCPDM_DN_IRQ_EMPTY)
  195. dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
  196. if (irq_status & MCPDM_DN_IRQ)
  197. dev_dbg(mcpdm->dev, "DN (playback) write request\n");
  198. if (irq_status & MCPDM_UP_IRQ_FULL)
  199. dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
  200. if (irq_status & MCPDM_UP_IRQ_EMPTY)
  201. dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
  202. if (irq_status & MCPDM_UP_IRQ)
  203. dev_dbg(mcpdm->dev, "UP (capture) write request\n");
  204. return IRQ_HANDLED;
  205. }
  206. static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
  207. struct snd_soc_dai *dai)
  208. {
  209. struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
  210. mutex_lock(&mcpdm->mutex);
  211. if (!dai->active) {
  212. pm_runtime_get_sync(mcpdm->dev);
  213. /* Enable watch dog for ES above ES 1.0 to avoid saturation */
  214. if (omap_rev() != OMAP4430_REV_ES1_0) {
  215. u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
  216. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
  217. ctrl | MCPDM_WD_EN);
  218. }
  219. omap_mcpdm_open_streams(mcpdm);
  220. }
  221. mutex_unlock(&mcpdm->mutex);
  222. return 0;
  223. }
  224. static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
  225. struct snd_soc_dai *dai)
  226. {
  227. struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
  228. mutex_lock(&mcpdm->mutex);
  229. if (!dai->active) {
  230. if (omap_mcpdm_active(mcpdm)) {
  231. omap_mcpdm_stop(mcpdm);
  232. omap_mcpdm_close_streams(mcpdm);
  233. }
  234. if (!omap_mcpdm_active(mcpdm))
  235. pm_runtime_put_sync(mcpdm->dev);
  236. }
  237. mutex_unlock(&mcpdm->mutex);
  238. }
  239. static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
  240. struct snd_pcm_hw_params *params,
  241. struct snd_soc_dai *dai)
  242. {
  243. struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
  244. int stream = substream->stream;
  245. struct omap_pcm_dma_data *dma_data;
  246. int channels;
  247. int link_mask = 0;
  248. channels = params_channels(params);
  249. switch (channels) {
  250. case 5:
  251. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  252. /* up to 3 channels for capture */
  253. return -EINVAL;
  254. link_mask |= 1 << 4;
  255. case 4:
  256. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  257. /* up to 3 channels for capture */
  258. return -EINVAL;
  259. link_mask |= 1 << 3;
  260. case 3:
  261. link_mask |= 1 << 2;
  262. case 2:
  263. link_mask |= 1 << 1;
  264. case 1:
  265. link_mask |= 1 << 0;
  266. break;
  267. default:
  268. /* unsupported number of channels */
  269. return -EINVAL;
  270. }
  271. dma_data = &omap_mcpdm_dai_dma_params[stream];
  272. /* Configure McPDM channels, and DMA packet size */
  273. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  274. mcpdm->dn_channels = link_mask << 3;
  275. dma_data->packet_size =
  276. (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
  277. } else {
  278. mcpdm->up_channels = link_mask << 0;
  279. dma_data->packet_size = mcpdm->up_threshold * channels;
  280. }
  281. snd_soc_dai_set_dma_data(dai, substream, dma_data);
  282. return 0;
  283. }
  284. static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
  285. struct snd_soc_dai *dai)
  286. {
  287. struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
  288. if (!omap_mcpdm_active(mcpdm)) {
  289. omap_mcpdm_start(mcpdm);
  290. omap_mcpdm_reg_dump(mcpdm);
  291. }
  292. return 0;
  293. }
  294. static struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
  295. .startup = omap_mcpdm_dai_startup,
  296. .shutdown = omap_mcpdm_dai_shutdown,
  297. .hw_params = omap_mcpdm_dai_hw_params,
  298. .prepare = omap_mcpdm_prepare,
  299. };
  300. static int omap_mcpdm_probe(struct snd_soc_dai *dai)
  301. {
  302. struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
  303. int ret;
  304. pm_runtime_enable(mcpdm->dev);
  305. /* Disable lines while request is ongoing */
  306. pm_runtime_get_sync(mcpdm->dev);
  307. omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
  308. ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
  309. 0, "McPDM", (void *)mcpdm);
  310. pm_runtime_put_sync(mcpdm->dev);
  311. if (ret) {
  312. dev_err(mcpdm->dev, "Request for IRQ failed\n");
  313. pm_runtime_disable(mcpdm->dev);
  314. }
  315. /* Configure McPDM threshold values */
  316. mcpdm->dn_threshold = 2;
  317. mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
  318. return ret;
  319. }
  320. static int omap_mcpdm_remove(struct snd_soc_dai *dai)
  321. {
  322. struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
  323. free_irq(mcpdm->irq, (void *)mcpdm);
  324. pm_runtime_disable(mcpdm->dev);
  325. return 0;
  326. }
  327. #define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  328. #define OMAP_MCPDM_FORMATS SNDRV_PCM_FMTBIT_S32_LE
  329. static struct snd_soc_dai_driver omap_mcpdm_dai = {
  330. .probe = omap_mcpdm_probe,
  331. .remove = omap_mcpdm_remove,
  332. .probe_order = SND_SOC_COMP_ORDER_LATE,
  333. .remove_order = SND_SOC_COMP_ORDER_EARLY,
  334. .playback = {
  335. .channels_min = 1,
  336. .channels_max = 5,
  337. .rates = OMAP_MCPDM_RATES,
  338. .formats = OMAP_MCPDM_FORMATS,
  339. },
  340. .capture = {
  341. .channels_min = 1,
  342. .channels_max = 3,
  343. .rates = OMAP_MCPDM_RATES,
  344. .formats = OMAP_MCPDM_FORMATS,
  345. },
  346. .ops = &omap_mcpdm_dai_ops,
  347. };
  348. static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
  349. {
  350. struct omap_mcpdm *mcpdm;
  351. struct resource *res;
  352. int ret = 0;
  353. mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
  354. if (!mcpdm)
  355. return -ENOMEM;
  356. platform_set_drvdata(pdev, mcpdm);
  357. mutex_init(&mcpdm->mutex);
  358. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  359. if (res == NULL) {
  360. dev_err(&pdev->dev, "no resource\n");
  361. goto err_res;
  362. }
  363. if (!request_mem_region(res->start, resource_size(res), "McPDM")) {
  364. ret = -EBUSY;
  365. goto err_res;
  366. }
  367. mcpdm->io_base = ioremap(res->start, resource_size(res));
  368. if (!mcpdm->io_base) {
  369. ret = -ENOMEM;
  370. goto err_iomap;
  371. }
  372. mcpdm->irq = platform_get_irq(pdev, 0);
  373. if (mcpdm->irq < 0) {
  374. ret = mcpdm->irq;
  375. goto err_irq;
  376. }
  377. mcpdm->dev = &pdev->dev;
  378. ret = snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
  379. if (!ret)
  380. return 0;
  381. err_irq:
  382. iounmap(mcpdm->io_base);
  383. err_iomap:
  384. release_mem_region(res->start, resource_size(res));
  385. err_res:
  386. kfree(mcpdm);
  387. return ret;
  388. }
  389. static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
  390. {
  391. struct omap_mcpdm *mcpdm = platform_get_drvdata(pdev);
  392. struct resource *res;
  393. snd_soc_unregister_dai(&pdev->dev);
  394. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  395. iounmap(mcpdm->io_base);
  396. release_mem_region(res->start, resource_size(res));
  397. kfree(mcpdm);
  398. return 0;
  399. }
  400. static struct platform_driver asoc_mcpdm_driver = {
  401. .driver = {
  402. .name = "omap-mcpdm",
  403. .owner = THIS_MODULE,
  404. },
  405. .probe = asoc_mcpdm_probe,
  406. .remove = __devexit_p(asoc_mcpdm_remove),
  407. };
  408. static int __init snd_omap_mcpdm_init(void)
  409. {
  410. return platform_driver_register(&asoc_mcpdm_driver);
  411. }
  412. module_init(snd_omap_mcpdm_init);
  413. static void __exit snd_omap_mcpdm_exit(void)
  414. {
  415. platform_driver_unregister(&asoc_mcpdm_driver);
  416. }
  417. module_exit(snd_omap_mcpdm_exit);
  418. MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
  419. MODULE_DESCRIPTION("OMAP PDM SoC Interface");
  420. MODULE_LICENSE("GPL");