mpt2sas_base.c 132 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2012 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int mpt2sas_fwfault_debug;
  74. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  75. "and halt firmware - (default=0)");
  76. static int disable_discovery = -1;
  77. module_param(disable_discovery, int, 0);
  78. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  79. /**
  80. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  81. *
  82. */
  83. static int
  84. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  85. {
  86. int ret = param_set_int(val, kp);
  87. struct MPT2SAS_ADAPTER *ioc;
  88. if (ret)
  89. return ret;
  90. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  91. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  92. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  93. return 0;
  94. }
  95. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  96. param_get_int, &mpt2sas_fwfault_debug, 0644);
  97. /**
  98. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  99. * @arg: input argument, used to derive ioc
  100. *
  101. * Return 0 if controller is removed from pci subsystem.
  102. * Return -1 for other case.
  103. */
  104. static int mpt2sas_remove_dead_ioc_func(void *arg)
  105. {
  106. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  107. struct pci_dev *pdev;
  108. if ((ioc == NULL))
  109. return -1;
  110. pdev = ioc->pdev;
  111. if ((pdev == NULL))
  112. return -1;
  113. pci_stop_and_remove_bus_device(pdev);
  114. return 0;
  115. }
  116. /**
  117. * _base_fault_reset_work - workq handling ioc fault conditions
  118. * @work: input argument, used to derive ioc
  119. * Context: sleep.
  120. *
  121. * Return nothing.
  122. */
  123. static void
  124. _base_fault_reset_work(struct work_struct *work)
  125. {
  126. struct MPT2SAS_ADAPTER *ioc =
  127. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  128. unsigned long flags;
  129. u32 doorbell;
  130. int rc;
  131. struct task_struct *p;
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->shost_recovery || ioc->pci_error_recovery)
  134. goto rearm_timer;
  135. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  136. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  137. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  138. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  139. ioc->name, __func__);
  140. /* It may be possible that EEH recovery can resolve some of
  141. * pci bus failure issues rather removing the dead ioc function
  142. * by considering controller is in a non-operational state. So
  143. * here priority is given to the EEH recovery. If it doesn't
  144. * not resolve this issue, mpt2sas driver will consider this
  145. * controller to non-operational state and remove the dead ioc
  146. * function.
  147. */
  148. if (ioc->non_operational_loop++ < 5) {
  149. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
  150. flags);
  151. goto rearm_timer;
  152. }
  153. /*
  154. * Call _scsih_flush_pending_cmds callback so that we flush all
  155. * pending commands back to OS. This call is required to aovid
  156. * deadlock at block layer. Dead IOC will fail to do diag reset,
  157. * and this call is safe since dead ioc will never return any
  158. * command back from HW.
  159. */
  160. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  161. /*
  162. * Set remove_host flag early since kernel thread will
  163. * take some time to execute.
  164. */
  165. ioc->remove_host = 1;
  166. /*Remove the Dead Host */
  167. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  168. "mpt2sas_dead_ioc_%d", ioc->id);
  169. if (IS_ERR(p)) {
  170. printk(MPT2SAS_ERR_FMT
  171. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  172. ioc->name, __func__);
  173. } else {
  174. printk(MPT2SAS_ERR_FMT
  175. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  176. ioc->name, __func__);
  177. }
  178. return; /* don't rearm timer */
  179. }
  180. ioc->non_operational_loop = 0;
  181. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  182. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  183. FORCE_BIG_HAMMER);
  184. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  185. __func__, (rc == 0) ? "success" : "failed");
  186. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  187. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  188. mpt2sas_base_fault_info(ioc, doorbell &
  189. MPI2_DOORBELL_DATA_MASK);
  190. }
  191. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  192. rearm_timer:
  193. if (ioc->fault_reset_work_q)
  194. queue_delayed_work(ioc->fault_reset_work_q,
  195. &ioc->fault_reset_work,
  196. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  197. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  198. }
  199. /**
  200. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  201. * @ioc: per adapter object
  202. * Context: sleep.
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  208. {
  209. unsigned long flags;
  210. if (ioc->fault_reset_work_q)
  211. return;
  212. /* initialize fault polling */
  213. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  214. snprintf(ioc->fault_reset_work_q_name,
  215. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  216. ioc->fault_reset_work_q =
  217. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  218. if (!ioc->fault_reset_work_q) {
  219. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  220. ioc->name, __func__, __LINE__);
  221. return;
  222. }
  223. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  224. if (ioc->fault_reset_work_q)
  225. queue_delayed_work(ioc->fault_reset_work_q,
  226. &ioc->fault_reset_work,
  227. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  228. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  229. }
  230. /**
  231. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  232. * @ioc: per adapter object
  233. * Context: sleep.
  234. *
  235. * Return nothing.
  236. */
  237. void
  238. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  239. {
  240. unsigned long flags;
  241. struct workqueue_struct *wq;
  242. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  243. wq = ioc->fault_reset_work_q;
  244. ioc->fault_reset_work_q = NULL;
  245. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  246. if (wq) {
  247. if (!cancel_delayed_work(&ioc->fault_reset_work))
  248. flush_workqueue(wq);
  249. destroy_workqueue(wq);
  250. }
  251. }
  252. /**
  253. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  254. * @ioc: per adapter object
  255. * @fault_code: fault code
  256. *
  257. * Return nothing.
  258. */
  259. void
  260. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  261. {
  262. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  263. ioc->name, fault_code);
  264. }
  265. /**
  266. * mpt2sas_halt_firmware - halt's mpt controller firmware
  267. * @ioc: per adapter object
  268. *
  269. * For debugging timeout related issues. Writing 0xCOFFEE00
  270. * to the doorbell register will halt controller firmware. With
  271. * the purpose to stop both driver and firmware, the enduser can
  272. * obtain a ring buffer from controller UART.
  273. */
  274. void
  275. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  276. {
  277. u32 doorbell;
  278. if (!ioc->fwfault_debug)
  279. return;
  280. dump_stack();
  281. doorbell = readl(&ioc->chip->Doorbell);
  282. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  283. mpt2sas_base_fault_info(ioc , doorbell);
  284. else {
  285. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  286. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  287. "timeout\n", ioc->name);
  288. }
  289. panic("panic in %s\n", __func__);
  290. }
  291. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  292. /**
  293. * _base_sas_ioc_info - verbose translation of the ioc status
  294. * @ioc: per adapter object
  295. * @mpi_reply: reply mf payload returned from firmware
  296. * @request_hdr: request mf
  297. *
  298. * Return nothing.
  299. */
  300. static void
  301. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  302. MPI2RequestHeader_t *request_hdr)
  303. {
  304. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  305. MPI2_IOCSTATUS_MASK;
  306. char *desc = NULL;
  307. u16 frame_sz;
  308. char *func_str = NULL;
  309. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  310. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  311. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  312. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  313. return;
  314. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  315. return;
  316. switch (ioc_status) {
  317. /****************************************************************************
  318. * Common IOCStatus values for all replies
  319. ****************************************************************************/
  320. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  321. desc = "invalid function";
  322. break;
  323. case MPI2_IOCSTATUS_BUSY:
  324. desc = "busy";
  325. break;
  326. case MPI2_IOCSTATUS_INVALID_SGL:
  327. desc = "invalid sgl";
  328. break;
  329. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  330. desc = "internal error";
  331. break;
  332. case MPI2_IOCSTATUS_INVALID_VPID:
  333. desc = "invalid vpid";
  334. break;
  335. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  336. desc = "insufficient resources";
  337. break;
  338. case MPI2_IOCSTATUS_INVALID_FIELD:
  339. desc = "invalid field";
  340. break;
  341. case MPI2_IOCSTATUS_INVALID_STATE:
  342. desc = "invalid state";
  343. break;
  344. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  345. desc = "op state not supported";
  346. break;
  347. /****************************************************************************
  348. * Config IOCStatus values
  349. ****************************************************************************/
  350. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  351. desc = "config invalid action";
  352. break;
  353. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  354. desc = "config invalid type";
  355. break;
  356. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  357. desc = "config invalid page";
  358. break;
  359. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  360. desc = "config invalid data";
  361. break;
  362. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  363. desc = "config no defaults";
  364. break;
  365. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  366. desc = "config cant commit";
  367. break;
  368. /****************************************************************************
  369. * SCSI IO Reply
  370. ****************************************************************************/
  371. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  372. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  373. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  374. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  375. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  376. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  377. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  378. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  379. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  380. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  381. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  382. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  383. break;
  384. /****************************************************************************
  385. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  386. ****************************************************************************/
  387. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  388. desc = "eedp guard error";
  389. break;
  390. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  391. desc = "eedp ref tag error";
  392. break;
  393. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  394. desc = "eedp app tag error";
  395. break;
  396. /****************************************************************************
  397. * SCSI Target values
  398. ****************************************************************************/
  399. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  400. desc = "target invalid io index";
  401. break;
  402. case MPI2_IOCSTATUS_TARGET_ABORTED:
  403. desc = "target aborted";
  404. break;
  405. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  406. desc = "target no conn retryable";
  407. break;
  408. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  409. desc = "target no connection";
  410. break;
  411. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  412. desc = "target xfer count mismatch";
  413. break;
  414. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  415. desc = "target data offset error";
  416. break;
  417. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  418. desc = "target too much write data";
  419. break;
  420. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  421. desc = "target iu too short";
  422. break;
  423. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  424. desc = "target ack nak timeout";
  425. break;
  426. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  427. desc = "target nak received";
  428. break;
  429. /****************************************************************************
  430. * Serial Attached SCSI values
  431. ****************************************************************************/
  432. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  433. desc = "smp request failed";
  434. break;
  435. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  436. desc = "smp data overrun";
  437. break;
  438. /****************************************************************************
  439. * Diagnostic Buffer Post / Diagnostic Release values
  440. ****************************************************************************/
  441. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  442. desc = "diagnostic released";
  443. break;
  444. default:
  445. break;
  446. }
  447. if (!desc)
  448. return;
  449. switch (request_hdr->Function) {
  450. case MPI2_FUNCTION_CONFIG:
  451. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  452. func_str = "config_page";
  453. break;
  454. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  455. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  456. func_str = "task_mgmt";
  457. break;
  458. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  459. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  460. func_str = "sas_iounit_ctl";
  461. break;
  462. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  463. frame_sz = sizeof(Mpi2SepRequest_t);
  464. func_str = "enclosure";
  465. break;
  466. case MPI2_FUNCTION_IOC_INIT:
  467. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  468. func_str = "ioc_init";
  469. break;
  470. case MPI2_FUNCTION_PORT_ENABLE:
  471. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  472. func_str = "port_enable";
  473. break;
  474. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  475. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  476. func_str = "smp_passthru";
  477. break;
  478. default:
  479. frame_sz = 32;
  480. func_str = "unknown";
  481. break;
  482. }
  483. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  484. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  485. _debug_dump_mf(request_hdr, frame_sz/4);
  486. }
  487. /**
  488. * _base_display_event_data - verbose translation of firmware asyn events
  489. * @ioc: per adapter object
  490. * @mpi_reply: reply mf payload returned from firmware
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  496. Mpi2EventNotificationReply_t *mpi_reply)
  497. {
  498. char *desc = NULL;
  499. u16 event;
  500. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  501. return;
  502. event = le16_to_cpu(mpi_reply->Event);
  503. switch (event) {
  504. case MPI2_EVENT_LOG_DATA:
  505. desc = "Log Data";
  506. break;
  507. case MPI2_EVENT_STATE_CHANGE:
  508. desc = "Status Change";
  509. break;
  510. case MPI2_EVENT_HARD_RESET_RECEIVED:
  511. desc = "Hard Reset Received";
  512. break;
  513. case MPI2_EVENT_EVENT_CHANGE:
  514. desc = "Event Change";
  515. break;
  516. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  517. desc = "Device Status Change";
  518. break;
  519. case MPI2_EVENT_IR_OPERATION_STATUS:
  520. if (!ioc->hide_ir_msg)
  521. desc = "IR Operation Status";
  522. break;
  523. case MPI2_EVENT_SAS_DISCOVERY:
  524. {
  525. Mpi2EventDataSasDiscovery_t *event_data =
  526. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  527. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  528. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  529. "start" : "stop");
  530. if (event_data->DiscoveryStatus)
  531. printk("discovery_status(0x%08x)",
  532. le32_to_cpu(event_data->DiscoveryStatus));
  533. printk("\n");
  534. return;
  535. }
  536. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  537. desc = "SAS Broadcast Primitive";
  538. break;
  539. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  540. desc = "SAS Init Device Status Change";
  541. break;
  542. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  543. desc = "SAS Init Table Overflow";
  544. break;
  545. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  546. desc = "SAS Topology Change List";
  547. break;
  548. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  549. desc = "SAS Enclosure Device Status Change";
  550. break;
  551. case MPI2_EVENT_IR_VOLUME:
  552. if (!ioc->hide_ir_msg)
  553. desc = "IR Volume";
  554. break;
  555. case MPI2_EVENT_IR_PHYSICAL_DISK:
  556. if (!ioc->hide_ir_msg)
  557. desc = "IR Physical Disk";
  558. break;
  559. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  560. if (!ioc->hide_ir_msg)
  561. desc = "IR Configuration Change List";
  562. break;
  563. case MPI2_EVENT_LOG_ENTRY_ADDED:
  564. if (!ioc->hide_ir_msg)
  565. desc = "Log Entry Added";
  566. break;
  567. }
  568. if (!desc)
  569. return;
  570. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  571. }
  572. #endif
  573. /**
  574. * _base_sas_log_info - verbose translation of firmware log info
  575. * @ioc: per adapter object
  576. * @log_info: log info
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  582. {
  583. union loginfo_type {
  584. u32 loginfo;
  585. struct {
  586. u32 subcode:16;
  587. u32 code:8;
  588. u32 originator:4;
  589. u32 bus_type:4;
  590. } dw;
  591. };
  592. union loginfo_type sas_loginfo;
  593. char *originator_str = NULL;
  594. sas_loginfo.loginfo = log_info;
  595. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  596. return;
  597. /* each nexus loss loginfo */
  598. if (log_info == 0x31170000)
  599. return;
  600. /* eat the loginfos associated with task aborts */
  601. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  602. 0x31140000 || log_info == 0x31130000))
  603. return;
  604. switch (sas_loginfo.dw.originator) {
  605. case 0:
  606. originator_str = "IOP";
  607. break;
  608. case 1:
  609. originator_str = "PL";
  610. break;
  611. case 2:
  612. if (!ioc->hide_ir_msg)
  613. originator_str = "IR";
  614. else
  615. originator_str = "WarpDrive";
  616. break;
  617. }
  618. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  619. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  620. originator_str, sas_loginfo.dw.code,
  621. sas_loginfo.dw.subcode);
  622. }
  623. /**
  624. * _base_display_reply_info -
  625. * @ioc: per adapter object
  626. * @smid: system request message index
  627. * @msix_index: MSIX table index supplied by the OS
  628. * @reply: reply message frame(lower 32bit addr)
  629. *
  630. * Return nothing.
  631. */
  632. static void
  633. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  634. u32 reply)
  635. {
  636. MPI2DefaultReply_t *mpi_reply;
  637. u16 ioc_status;
  638. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  639. if (unlikely(!mpi_reply)) {
  640. printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
  641. ioc->name, __FILE__, __LINE__, __func__);
  642. return;
  643. }
  644. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  645. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  646. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  647. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  648. _base_sas_ioc_info(ioc , mpi_reply,
  649. mpt2sas_base_get_msg_frame(ioc, smid));
  650. }
  651. #endif
  652. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  653. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  654. }
  655. /**
  656. * mpt2sas_base_done - base internal command completion routine
  657. * @ioc: per adapter object
  658. * @smid: system request message index
  659. * @msix_index: MSIX table index supplied by the OS
  660. * @reply: reply message frame(lower 32bit addr)
  661. *
  662. * Return 1 meaning mf should be freed from _base_interrupt
  663. * 0 means the mf is freed from this function.
  664. */
  665. u8
  666. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  667. u32 reply)
  668. {
  669. MPI2DefaultReply_t *mpi_reply;
  670. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  671. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  672. return 1;
  673. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  674. return 1;
  675. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  676. if (mpi_reply) {
  677. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  678. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  679. }
  680. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  681. complete(&ioc->base_cmds.done);
  682. return 1;
  683. }
  684. /**
  685. * _base_async_event - main callback handler for firmware asyn events
  686. * @ioc: per adapter object
  687. * @msix_index: MSIX table index supplied by the OS
  688. * @reply: reply message frame(lower 32bit addr)
  689. *
  690. * Return 1 meaning mf should be freed from _base_interrupt
  691. * 0 means the mf is freed from this function.
  692. */
  693. static u8
  694. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  695. {
  696. Mpi2EventNotificationReply_t *mpi_reply;
  697. Mpi2EventAckRequest_t *ack_request;
  698. u16 smid;
  699. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  700. if (!mpi_reply)
  701. return 1;
  702. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  703. return 1;
  704. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  705. _base_display_event_data(ioc, mpi_reply);
  706. #endif
  707. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  708. goto out;
  709. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  710. if (!smid) {
  711. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  712. ioc->name, __func__);
  713. goto out;
  714. }
  715. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  716. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  717. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  718. ack_request->Event = mpi_reply->Event;
  719. ack_request->EventContext = mpi_reply->EventContext;
  720. ack_request->VF_ID = 0; /* TODO */
  721. ack_request->VP_ID = 0;
  722. mpt2sas_base_put_smid_default(ioc, smid);
  723. out:
  724. /* scsih callback handler */
  725. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  726. /* ctl callback handler */
  727. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  728. return 1;
  729. }
  730. /**
  731. * _base_get_cb_idx - obtain the callback index
  732. * @ioc: per adapter object
  733. * @smid: system request message index
  734. *
  735. * Return callback index.
  736. */
  737. static u8
  738. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  739. {
  740. int i;
  741. u8 cb_idx;
  742. if (smid < ioc->hi_priority_smid) {
  743. i = smid - 1;
  744. cb_idx = ioc->scsi_lookup[i].cb_idx;
  745. } else if (smid < ioc->internal_smid) {
  746. i = smid - ioc->hi_priority_smid;
  747. cb_idx = ioc->hpr_lookup[i].cb_idx;
  748. } else if (smid <= ioc->hba_queue_depth) {
  749. i = smid - ioc->internal_smid;
  750. cb_idx = ioc->internal_lookup[i].cb_idx;
  751. } else
  752. cb_idx = 0xFF;
  753. return cb_idx;
  754. }
  755. /**
  756. * _base_mask_interrupts - disable interrupts
  757. * @ioc: per adapter object
  758. *
  759. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  760. *
  761. * Return nothing.
  762. */
  763. static void
  764. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  765. {
  766. u32 him_register;
  767. ioc->mask_interrupts = 1;
  768. him_register = readl(&ioc->chip->HostInterruptMask);
  769. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  770. writel(him_register, &ioc->chip->HostInterruptMask);
  771. readl(&ioc->chip->HostInterruptMask);
  772. }
  773. /**
  774. * _base_unmask_interrupts - enable interrupts
  775. * @ioc: per adapter object
  776. *
  777. * Enabling only Reply Interrupts
  778. *
  779. * Return nothing.
  780. */
  781. static void
  782. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  783. {
  784. u32 him_register;
  785. him_register = readl(&ioc->chip->HostInterruptMask);
  786. him_register &= ~MPI2_HIM_RIM;
  787. writel(him_register, &ioc->chip->HostInterruptMask);
  788. ioc->mask_interrupts = 0;
  789. }
  790. union reply_descriptor {
  791. u64 word;
  792. struct {
  793. u32 low;
  794. u32 high;
  795. } u;
  796. };
  797. /**
  798. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  799. * @irq: irq number (not used)
  800. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  801. * @r: pt_regs pointer (not used)
  802. *
  803. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  804. */
  805. static irqreturn_t
  806. _base_interrupt(int irq, void *bus_id)
  807. {
  808. struct adapter_reply_queue *reply_q = bus_id;
  809. union reply_descriptor rd;
  810. u32 completed_cmds;
  811. u8 request_desript_type;
  812. u16 smid;
  813. u8 cb_idx;
  814. u32 reply;
  815. u8 msix_index = reply_q->msix_index;
  816. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  817. Mpi2ReplyDescriptorsUnion_t *rpf;
  818. u8 rc;
  819. if (ioc->mask_interrupts)
  820. return IRQ_NONE;
  821. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  822. return IRQ_NONE;
  823. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  824. request_desript_type = rpf->Default.ReplyFlags
  825. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  826. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  827. atomic_dec(&reply_q->busy);
  828. return IRQ_NONE;
  829. }
  830. completed_cmds = 0;
  831. cb_idx = 0xFF;
  832. do {
  833. rd.word = le64_to_cpu(rpf->Words);
  834. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  835. goto out;
  836. reply = 0;
  837. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  838. if (request_desript_type ==
  839. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  840. reply = le32_to_cpu
  841. (rpf->AddressReply.ReplyFrameAddress);
  842. if (reply > ioc->reply_dma_max_address ||
  843. reply < ioc->reply_dma_min_address)
  844. reply = 0;
  845. } else if (request_desript_type ==
  846. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  847. goto next;
  848. else if (request_desript_type ==
  849. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  850. goto next;
  851. if (smid) {
  852. cb_idx = _base_get_cb_idx(ioc, smid);
  853. if ((likely(cb_idx < MPT_MAX_CALLBACKS))
  854. && (likely(mpt_callbacks[cb_idx] != NULL))) {
  855. rc = mpt_callbacks[cb_idx](ioc, smid,
  856. msix_index, reply);
  857. if (reply)
  858. _base_display_reply_info(ioc, smid,
  859. msix_index, reply);
  860. if (rc)
  861. mpt2sas_base_free_smid(ioc, smid);
  862. }
  863. }
  864. if (!smid)
  865. _base_async_event(ioc, msix_index, reply);
  866. /* reply free queue handling */
  867. if (reply) {
  868. ioc->reply_free_host_index =
  869. (ioc->reply_free_host_index ==
  870. (ioc->reply_free_queue_depth - 1)) ?
  871. 0 : ioc->reply_free_host_index + 1;
  872. ioc->reply_free[ioc->reply_free_host_index] =
  873. cpu_to_le32(reply);
  874. wmb();
  875. writel(ioc->reply_free_host_index,
  876. &ioc->chip->ReplyFreeHostIndex);
  877. }
  878. next:
  879. rpf->Words = cpu_to_le64(ULLONG_MAX);
  880. reply_q->reply_post_host_index =
  881. (reply_q->reply_post_host_index ==
  882. (ioc->reply_post_queue_depth - 1)) ? 0 :
  883. reply_q->reply_post_host_index + 1;
  884. request_desript_type =
  885. reply_q->reply_post_free[reply_q->reply_post_host_index].
  886. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  887. completed_cmds++;
  888. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  889. goto out;
  890. if (!reply_q->reply_post_host_index)
  891. rpf = reply_q->reply_post_free;
  892. else
  893. rpf++;
  894. } while (1);
  895. out:
  896. if (!completed_cmds) {
  897. atomic_dec(&reply_q->busy);
  898. return IRQ_NONE;
  899. }
  900. wmb();
  901. if (ioc->is_warpdrive) {
  902. writel(reply_q->reply_post_host_index,
  903. ioc->reply_post_host_index[msix_index]);
  904. atomic_dec(&reply_q->busy);
  905. return IRQ_HANDLED;
  906. }
  907. writel(reply_q->reply_post_host_index | (msix_index <<
  908. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  909. atomic_dec(&reply_q->busy);
  910. return IRQ_HANDLED;
  911. }
  912. /**
  913. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  914. * @ioc: per adapter object
  915. *
  916. */
  917. static inline int
  918. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  919. {
  920. return (ioc->facts.IOCCapabilities &
  921. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  922. }
  923. /**
  924. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  925. * @ioc: per adapter object
  926. * Context: ISR conext
  927. *
  928. * Called when a Task Management request has completed. We want
  929. * to flush the other reply queues so all the outstanding IO has been
  930. * completed back to OS before we process the TM completetion.
  931. *
  932. * Return nothing.
  933. */
  934. void
  935. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  936. {
  937. struct adapter_reply_queue *reply_q;
  938. /* If MSIX capability is turned off
  939. * then multi-queues are not enabled
  940. */
  941. if (!_base_is_controller_msix_enabled(ioc))
  942. return;
  943. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  944. if (ioc->shost_recovery)
  945. return;
  946. /* TMs are on msix_index == 0 */
  947. if (reply_q->msix_index == 0)
  948. continue;
  949. _base_interrupt(reply_q->vector, (void *)reply_q);
  950. }
  951. }
  952. /**
  953. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  954. * @cb_idx: callback index
  955. *
  956. * Return nothing.
  957. */
  958. void
  959. mpt2sas_base_release_callback_handler(u8 cb_idx)
  960. {
  961. mpt_callbacks[cb_idx] = NULL;
  962. }
  963. /**
  964. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  965. * @cb_func: callback function
  966. *
  967. * Returns cb_func.
  968. */
  969. u8
  970. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  971. {
  972. u8 cb_idx;
  973. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  974. if (mpt_callbacks[cb_idx] == NULL)
  975. break;
  976. mpt_callbacks[cb_idx] = cb_func;
  977. return cb_idx;
  978. }
  979. /**
  980. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  981. *
  982. * Return nothing.
  983. */
  984. void
  985. mpt2sas_base_initialize_callback_handler(void)
  986. {
  987. u8 cb_idx;
  988. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  989. mpt2sas_base_release_callback_handler(cb_idx);
  990. }
  991. /**
  992. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  993. * @ioc: per adapter object
  994. * @paddr: virtual address for SGE
  995. *
  996. * Create a zero length scatter gather entry to insure the IOCs hardware has
  997. * something to use if the target device goes brain dead and tries
  998. * to send data even when none is asked for.
  999. *
  1000. * Return nothing.
  1001. */
  1002. void
  1003. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  1004. {
  1005. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  1006. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1007. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1008. MPI2_SGE_FLAGS_SHIFT);
  1009. ioc->base_add_sg_single(paddr, flags_length, -1);
  1010. }
  1011. /**
  1012. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1013. * @paddr: virtual address for SGE
  1014. * @flags_length: SGE flags and data transfer length
  1015. * @dma_addr: Physical address
  1016. *
  1017. * Return nothing.
  1018. */
  1019. static void
  1020. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1021. {
  1022. Mpi2SGESimple32_t *sgel = paddr;
  1023. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1024. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1025. sgel->FlagsLength = cpu_to_le32(flags_length);
  1026. sgel->Address = cpu_to_le32(dma_addr);
  1027. }
  1028. /**
  1029. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1030. * @paddr: virtual address for SGE
  1031. * @flags_length: SGE flags and data transfer length
  1032. * @dma_addr: Physical address
  1033. *
  1034. * Return nothing.
  1035. */
  1036. static void
  1037. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1038. {
  1039. Mpi2SGESimple64_t *sgel = paddr;
  1040. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1041. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1042. sgel->FlagsLength = cpu_to_le32(flags_length);
  1043. sgel->Address = cpu_to_le64(dma_addr);
  1044. }
  1045. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1046. /**
  1047. * _base_config_dma_addressing - set dma addressing
  1048. * @ioc: per adapter object
  1049. * @pdev: PCI device struct
  1050. *
  1051. * Returns 0 for success, non-zero for failure.
  1052. */
  1053. static int
  1054. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1055. {
  1056. struct sysinfo s;
  1057. char *desc = NULL;
  1058. if (sizeof(dma_addr_t) > 4) {
  1059. const uint64_t required_mask =
  1060. dma_get_required_mask(&pdev->dev);
  1061. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1062. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1063. DMA_BIT_MASK(64))) {
  1064. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1065. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1066. desc = "64";
  1067. goto out;
  1068. }
  1069. }
  1070. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1071. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1072. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1073. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1074. desc = "32";
  1075. } else
  1076. return -ENODEV;
  1077. out:
  1078. si_meminfo(&s);
  1079. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1080. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1081. return 0;
  1082. }
  1083. /**
  1084. * _base_check_enable_msix - checks MSIX capabable.
  1085. * @ioc: per adapter object
  1086. *
  1087. * Check to see if card is capable of MSIX, and set number
  1088. * of available msix vectors
  1089. */
  1090. static int
  1091. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1092. {
  1093. int base;
  1094. u16 message_control;
  1095. /* Check whether controller SAS2008 B0 controller,
  1096. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1097. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1098. ioc->pdev->revision == 0x01) {
  1099. return -EINVAL;
  1100. }
  1101. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1102. if (!base) {
  1103. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1104. "supported\n", ioc->name));
  1105. return -EINVAL;
  1106. }
  1107. /* get msix vector count */
  1108. /* NUMA_IO not supported for older controllers */
  1109. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1110. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1111. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1112. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1113. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1114. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1115. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1116. ioc->msix_vector_count = 1;
  1117. else {
  1118. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1119. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1120. }
  1121. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1122. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1123. return 0;
  1124. }
  1125. /**
  1126. * _base_free_irq - free irq
  1127. * @ioc: per adapter object
  1128. *
  1129. * Freeing respective reply_queue from the list.
  1130. */
  1131. static void
  1132. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1133. {
  1134. struct adapter_reply_queue *reply_q, *next;
  1135. if (list_empty(&ioc->reply_queue_list))
  1136. return;
  1137. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1138. list_del(&reply_q->list);
  1139. synchronize_irq(reply_q->vector);
  1140. free_irq(reply_q->vector, reply_q);
  1141. kfree(reply_q);
  1142. }
  1143. }
  1144. /**
  1145. * _base_request_irq - request irq
  1146. * @ioc: per adapter object
  1147. * @index: msix index into vector table
  1148. * @vector: irq vector
  1149. *
  1150. * Inserting respective reply_queue into the list.
  1151. */
  1152. static int
  1153. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1154. {
  1155. struct adapter_reply_queue *reply_q;
  1156. int r;
  1157. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1158. if (!reply_q) {
  1159. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1160. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1161. return -ENOMEM;
  1162. }
  1163. reply_q->ioc = ioc;
  1164. reply_q->msix_index = index;
  1165. reply_q->vector = vector;
  1166. atomic_set(&reply_q->busy, 0);
  1167. if (ioc->msix_enable)
  1168. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1169. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1170. else
  1171. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1172. MPT2SAS_DRIVER_NAME, ioc->id);
  1173. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1174. reply_q);
  1175. if (r) {
  1176. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1177. reply_q->name, vector);
  1178. kfree(reply_q);
  1179. return -EBUSY;
  1180. }
  1181. INIT_LIST_HEAD(&reply_q->list);
  1182. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1183. return 0;
  1184. }
  1185. /**
  1186. * _base_assign_reply_queues - assigning msix index for each cpu
  1187. * @ioc: per adapter object
  1188. *
  1189. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1190. *
  1191. * It would nice if we could call irq_set_affinity, however it is not
  1192. * an exported symbol
  1193. */
  1194. static void
  1195. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1196. {
  1197. struct adapter_reply_queue *reply_q;
  1198. int cpu_id;
  1199. int cpu_grouping, loop, grouping, grouping_mod;
  1200. if (!_base_is_controller_msix_enabled(ioc))
  1201. return;
  1202. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1203. /* when there are more cpus than available msix vectors,
  1204. * then group cpus togeather on same irq
  1205. */
  1206. if (ioc->cpu_count > ioc->msix_vector_count) {
  1207. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1208. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1209. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1210. cpu_grouping = 2;
  1211. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1212. cpu_grouping = 4;
  1213. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1214. cpu_grouping = 8;
  1215. else
  1216. cpu_grouping = 16;
  1217. } else
  1218. cpu_grouping = 0;
  1219. loop = 0;
  1220. reply_q = list_entry(ioc->reply_queue_list.next,
  1221. struct adapter_reply_queue, list);
  1222. for_each_online_cpu(cpu_id) {
  1223. if (!cpu_grouping) {
  1224. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1225. reply_q = list_entry(reply_q->list.next,
  1226. struct adapter_reply_queue, list);
  1227. } else {
  1228. if (loop < cpu_grouping) {
  1229. ioc->cpu_msix_table[cpu_id] =
  1230. reply_q->msix_index;
  1231. loop++;
  1232. } else {
  1233. reply_q = list_entry(reply_q->list.next,
  1234. struct adapter_reply_queue, list);
  1235. ioc->cpu_msix_table[cpu_id] =
  1236. reply_q->msix_index;
  1237. loop = 1;
  1238. }
  1239. }
  1240. }
  1241. }
  1242. /**
  1243. * _base_disable_msix - disables msix
  1244. * @ioc: per adapter object
  1245. *
  1246. */
  1247. static void
  1248. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1249. {
  1250. if (ioc->msix_enable) {
  1251. pci_disable_msix(ioc->pdev);
  1252. ioc->msix_enable = 0;
  1253. }
  1254. }
  1255. /**
  1256. * _base_enable_msix - enables msix, failback to io_apic
  1257. * @ioc: per adapter object
  1258. *
  1259. */
  1260. static int
  1261. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1262. {
  1263. struct msix_entry *entries, *a;
  1264. int r;
  1265. int i;
  1266. u8 try_msix = 0;
  1267. if (msix_disable == -1 || msix_disable == 0)
  1268. try_msix = 1;
  1269. if (!try_msix)
  1270. goto try_ioapic;
  1271. if (_base_check_enable_msix(ioc) != 0)
  1272. goto try_ioapic;
  1273. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1274. ioc->msix_vector_count);
  1275. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1276. GFP_KERNEL);
  1277. if (!entries) {
  1278. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1279. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1280. __LINE__, __func__));
  1281. goto try_ioapic;
  1282. }
  1283. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1284. a->entry = i;
  1285. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1286. if (r) {
  1287. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1288. "failed (r=%d) !!!\n", ioc->name, r));
  1289. kfree(entries);
  1290. goto try_ioapic;
  1291. }
  1292. ioc->msix_enable = 1;
  1293. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1294. r = _base_request_irq(ioc, i, a->vector);
  1295. if (r) {
  1296. _base_free_irq(ioc);
  1297. _base_disable_msix(ioc);
  1298. kfree(entries);
  1299. goto try_ioapic;
  1300. }
  1301. }
  1302. kfree(entries);
  1303. return 0;
  1304. /* failback to io_apic interrupt routing */
  1305. try_ioapic:
  1306. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1307. return r;
  1308. }
  1309. /**
  1310. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1311. * @ioc: per adapter object
  1312. *
  1313. * Returns 0 for success, non-zero for failure.
  1314. */
  1315. int
  1316. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1317. {
  1318. struct pci_dev *pdev = ioc->pdev;
  1319. u32 memap_sz;
  1320. u32 pio_sz;
  1321. int i, r = 0;
  1322. u64 pio_chip = 0;
  1323. u64 chip_phys = 0;
  1324. struct adapter_reply_queue *reply_q;
  1325. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1326. ioc->name, __func__));
  1327. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1328. if (pci_enable_device_mem(pdev)) {
  1329. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1330. "failed\n", ioc->name);
  1331. ioc->bars = 0;
  1332. return -ENODEV;
  1333. }
  1334. if (pci_request_selected_regions(pdev, ioc->bars,
  1335. MPT2SAS_DRIVER_NAME)) {
  1336. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1337. "failed\n", ioc->name);
  1338. ioc->bars = 0;
  1339. r = -ENODEV;
  1340. goto out_fail;
  1341. }
  1342. /* AER (Advanced Error Reporting) hooks */
  1343. pci_enable_pcie_error_reporting(pdev);
  1344. pci_set_master(pdev);
  1345. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1346. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1347. ioc->name, pci_name(pdev));
  1348. r = -ENODEV;
  1349. goto out_fail;
  1350. }
  1351. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1352. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1353. if (pio_sz)
  1354. continue;
  1355. pio_chip = (u64)pci_resource_start(pdev, i);
  1356. pio_sz = pci_resource_len(pdev, i);
  1357. } else {
  1358. if (memap_sz)
  1359. continue;
  1360. /* verify memory resource is valid before using */
  1361. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1362. ioc->chip_phys = pci_resource_start(pdev, i);
  1363. chip_phys = (u64)ioc->chip_phys;
  1364. memap_sz = pci_resource_len(pdev, i);
  1365. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1366. if (ioc->chip == NULL) {
  1367. printk(MPT2SAS_ERR_FMT "unable to map "
  1368. "adapter memory!\n", ioc->name);
  1369. r = -EINVAL;
  1370. goto out_fail;
  1371. }
  1372. }
  1373. }
  1374. }
  1375. _base_mask_interrupts(ioc);
  1376. r = _base_enable_msix(ioc);
  1377. if (r)
  1378. goto out_fail;
  1379. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1380. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1381. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1382. "IO-APIC enabled"), reply_q->vector);
  1383. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1384. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1385. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1386. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1387. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1388. pci_save_state(pdev);
  1389. return 0;
  1390. out_fail:
  1391. if (ioc->chip_phys)
  1392. iounmap(ioc->chip);
  1393. ioc->chip_phys = 0;
  1394. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1395. pci_disable_pcie_error_reporting(pdev);
  1396. pci_disable_device(pdev);
  1397. return r;
  1398. }
  1399. /**
  1400. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1401. * @ioc: per adapter object
  1402. * @smid: system request message index(smid zero is invalid)
  1403. *
  1404. * Returns virt pointer to message frame.
  1405. */
  1406. void *
  1407. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1408. {
  1409. return (void *)(ioc->request + (smid * ioc->request_sz));
  1410. }
  1411. /**
  1412. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1413. * @ioc: per adapter object
  1414. * @smid: system request message index
  1415. *
  1416. * Returns virt pointer to sense buffer.
  1417. */
  1418. void *
  1419. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1420. {
  1421. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1422. }
  1423. /**
  1424. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1425. * @ioc: per adapter object
  1426. * @smid: system request message index
  1427. *
  1428. * Returns phys pointer to the low 32bit address of the sense buffer.
  1429. */
  1430. __le32
  1431. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1432. {
  1433. return cpu_to_le32(ioc->sense_dma +
  1434. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1435. }
  1436. /**
  1437. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1438. * @ioc: per adapter object
  1439. * @phys_addr: lower 32 physical addr of the reply
  1440. *
  1441. * Converts 32bit lower physical addr into a virt address.
  1442. */
  1443. void *
  1444. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1445. {
  1446. if (!phys_addr)
  1447. return NULL;
  1448. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1449. }
  1450. /**
  1451. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1452. * @ioc: per adapter object
  1453. * @cb_idx: callback index
  1454. *
  1455. * Returns smid (zero is invalid)
  1456. */
  1457. u16
  1458. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1459. {
  1460. unsigned long flags;
  1461. struct request_tracker *request;
  1462. u16 smid;
  1463. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1464. if (list_empty(&ioc->internal_free_list)) {
  1465. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1466. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1467. ioc->name, __func__);
  1468. return 0;
  1469. }
  1470. request = list_entry(ioc->internal_free_list.next,
  1471. struct request_tracker, tracker_list);
  1472. request->cb_idx = cb_idx;
  1473. smid = request->smid;
  1474. list_del(&request->tracker_list);
  1475. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1476. return smid;
  1477. }
  1478. /**
  1479. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1480. * @ioc: per adapter object
  1481. * @cb_idx: callback index
  1482. * @scmd: pointer to scsi command object
  1483. *
  1484. * Returns smid (zero is invalid)
  1485. */
  1486. u16
  1487. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1488. struct scsi_cmnd *scmd)
  1489. {
  1490. unsigned long flags;
  1491. struct scsiio_tracker *request;
  1492. u16 smid;
  1493. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1494. if (list_empty(&ioc->free_list)) {
  1495. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1496. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1497. ioc->name, __func__);
  1498. return 0;
  1499. }
  1500. request = list_entry(ioc->free_list.next,
  1501. struct scsiio_tracker, tracker_list);
  1502. request->scmd = scmd;
  1503. request->cb_idx = cb_idx;
  1504. smid = request->smid;
  1505. list_del(&request->tracker_list);
  1506. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1507. return smid;
  1508. }
  1509. /**
  1510. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1511. * @ioc: per adapter object
  1512. * @cb_idx: callback index
  1513. *
  1514. * Returns smid (zero is invalid)
  1515. */
  1516. u16
  1517. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1518. {
  1519. unsigned long flags;
  1520. struct request_tracker *request;
  1521. u16 smid;
  1522. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1523. if (list_empty(&ioc->hpr_free_list)) {
  1524. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1525. return 0;
  1526. }
  1527. request = list_entry(ioc->hpr_free_list.next,
  1528. struct request_tracker, tracker_list);
  1529. request->cb_idx = cb_idx;
  1530. smid = request->smid;
  1531. list_del(&request->tracker_list);
  1532. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1533. return smid;
  1534. }
  1535. /**
  1536. * mpt2sas_base_free_smid - put smid back on free_list
  1537. * @ioc: per adapter object
  1538. * @smid: system request message index
  1539. *
  1540. * Return nothing.
  1541. */
  1542. void
  1543. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1544. {
  1545. unsigned long flags;
  1546. int i;
  1547. struct chain_tracker *chain_req, *next;
  1548. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1549. if (smid < ioc->hi_priority_smid) {
  1550. /* scsiio queue */
  1551. i = smid - 1;
  1552. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1553. list_for_each_entry_safe(chain_req, next,
  1554. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1555. list_del_init(&chain_req->tracker_list);
  1556. list_add_tail(&chain_req->tracker_list,
  1557. &ioc->free_chain_list);
  1558. }
  1559. }
  1560. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1561. ioc->scsi_lookup[i].scmd = NULL;
  1562. ioc->scsi_lookup[i].direct_io = 0;
  1563. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1564. &ioc->free_list);
  1565. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1566. /*
  1567. * See _wait_for_commands_to_complete() call with regards
  1568. * to this code.
  1569. */
  1570. if (ioc->shost_recovery && ioc->pending_io_count) {
  1571. if (ioc->pending_io_count == 1)
  1572. wake_up(&ioc->reset_wq);
  1573. ioc->pending_io_count--;
  1574. }
  1575. return;
  1576. } else if (smid < ioc->internal_smid) {
  1577. /* hi-priority */
  1578. i = smid - ioc->hi_priority_smid;
  1579. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1580. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1581. &ioc->hpr_free_list);
  1582. } else if (smid <= ioc->hba_queue_depth) {
  1583. /* internal queue */
  1584. i = smid - ioc->internal_smid;
  1585. ioc->internal_lookup[i].cb_idx = 0xFF;
  1586. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1587. &ioc->internal_free_list);
  1588. }
  1589. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1590. }
  1591. /**
  1592. * _base_writeq - 64 bit write to MMIO
  1593. * @ioc: per adapter object
  1594. * @b: data payload
  1595. * @addr: address in MMIO space
  1596. * @writeq_lock: spin lock
  1597. *
  1598. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1599. * care of 32 bit environment where its not quarenteed to send the entire word
  1600. * in one transfer.
  1601. */
  1602. #ifndef writeq
  1603. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1604. spinlock_t *writeq_lock)
  1605. {
  1606. unsigned long flags;
  1607. __u64 data_out = cpu_to_le64(b);
  1608. spin_lock_irqsave(writeq_lock, flags);
  1609. writel((u32)(data_out), addr);
  1610. writel((u32)(data_out >> 32), (addr + 4));
  1611. spin_unlock_irqrestore(writeq_lock, flags);
  1612. }
  1613. #else
  1614. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1615. spinlock_t *writeq_lock)
  1616. {
  1617. writeq(cpu_to_le64(b), addr);
  1618. }
  1619. #endif
  1620. static inline u8
  1621. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1622. {
  1623. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1624. }
  1625. /**
  1626. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1627. * @ioc: per adapter object
  1628. * @smid: system request message index
  1629. * @handle: device handle
  1630. *
  1631. * Return nothing.
  1632. */
  1633. void
  1634. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1635. {
  1636. Mpi2RequestDescriptorUnion_t descriptor;
  1637. u64 *request = (u64 *)&descriptor;
  1638. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1639. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1640. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1641. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1642. descriptor.SCSIIO.LMID = 0;
  1643. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1644. &ioc->scsi_lookup_lock);
  1645. }
  1646. /**
  1647. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1648. * @ioc: per adapter object
  1649. * @smid: system request message index
  1650. *
  1651. * Return nothing.
  1652. */
  1653. void
  1654. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1655. {
  1656. Mpi2RequestDescriptorUnion_t descriptor;
  1657. u64 *request = (u64 *)&descriptor;
  1658. descriptor.HighPriority.RequestFlags =
  1659. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1660. descriptor.HighPriority.MSIxIndex = 0;
  1661. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1662. descriptor.HighPriority.LMID = 0;
  1663. descriptor.HighPriority.Reserved1 = 0;
  1664. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1665. &ioc->scsi_lookup_lock);
  1666. }
  1667. /**
  1668. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1669. * @ioc: per adapter object
  1670. * @smid: system request message index
  1671. *
  1672. * Return nothing.
  1673. */
  1674. void
  1675. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1676. {
  1677. Mpi2RequestDescriptorUnion_t descriptor;
  1678. u64 *request = (u64 *)&descriptor;
  1679. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1680. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1681. descriptor.Default.SMID = cpu_to_le16(smid);
  1682. descriptor.Default.LMID = 0;
  1683. descriptor.Default.DescriptorTypeDependent = 0;
  1684. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1685. &ioc->scsi_lookup_lock);
  1686. }
  1687. /**
  1688. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1689. * @ioc: per adapter object
  1690. * @smid: system request message index
  1691. * @io_index: value used to track the IO
  1692. *
  1693. * Return nothing.
  1694. */
  1695. void
  1696. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1697. u16 io_index)
  1698. {
  1699. Mpi2RequestDescriptorUnion_t descriptor;
  1700. u64 *request = (u64 *)&descriptor;
  1701. descriptor.SCSITarget.RequestFlags =
  1702. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1703. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1704. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1705. descriptor.SCSITarget.LMID = 0;
  1706. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1707. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1708. &ioc->scsi_lookup_lock);
  1709. }
  1710. /**
  1711. * _base_display_dell_branding - Disply branding string
  1712. * @ioc: per adapter object
  1713. *
  1714. * Return nothing.
  1715. */
  1716. static void
  1717. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1718. {
  1719. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1720. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1721. return;
  1722. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1723. switch (ioc->pdev->subsystem_device) {
  1724. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1725. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1726. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1727. break;
  1728. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1729. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1730. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1731. break;
  1732. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1733. strncpy(dell_branding,
  1734. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1735. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1736. break;
  1737. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1738. strncpy(dell_branding,
  1739. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1740. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1741. break;
  1742. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1743. strncpy(dell_branding,
  1744. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1745. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1746. break;
  1747. case MPT2SAS_DELL_PERC_H200_SSDID:
  1748. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1749. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1750. break;
  1751. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1752. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1753. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1754. break;
  1755. default:
  1756. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1757. break;
  1758. }
  1759. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1760. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1761. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1762. ioc->pdev->subsystem_device);
  1763. }
  1764. /**
  1765. * _base_display_intel_branding - Display branding string
  1766. * @ioc: per adapter object
  1767. *
  1768. * Return nothing.
  1769. */
  1770. static void
  1771. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1772. {
  1773. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1774. return;
  1775. switch (ioc->pdev->device) {
  1776. case MPI2_MFGPAGE_DEVID_SAS2008:
  1777. switch (ioc->pdev->subsystem_device) {
  1778. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1779. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1780. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1781. break;
  1782. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1783. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1784. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1785. break;
  1786. case MPT2SAS_INTEL_SSD910_SSDID:
  1787. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1788. MPT2SAS_INTEL_SSD910_BRANDING);
  1789. break;
  1790. default:
  1791. break;
  1792. }
  1793. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1794. switch (ioc->pdev->subsystem_device) {
  1795. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1796. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1797. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1798. break;
  1799. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1800. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1801. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1802. break;
  1803. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1804. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1805. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1806. break;
  1807. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1808. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1809. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1810. break;
  1811. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1812. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1813. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1814. break;
  1815. case MPT2SAS_INTEL_RMS25LB040_SSDID:
  1816. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1817. MPT2SAS_INTEL_RMS25LB040_BRANDING);
  1818. break;
  1819. case MPT2SAS_INTEL_RMS25LB080_SSDID:
  1820. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1821. MPT2SAS_INTEL_RMS25LB080_BRANDING);
  1822. break;
  1823. default:
  1824. break;
  1825. }
  1826. default:
  1827. break;
  1828. }
  1829. }
  1830. /**
  1831. * _base_display_hp_branding - Display branding string
  1832. * @ioc: per adapter object
  1833. *
  1834. * Return nothing.
  1835. */
  1836. static void
  1837. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1838. {
  1839. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1840. return;
  1841. switch (ioc->pdev->device) {
  1842. case MPI2_MFGPAGE_DEVID_SAS2004:
  1843. switch (ioc->pdev->subsystem_device) {
  1844. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1845. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1846. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1847. break;
  1848. default:
  1849. break;
  1850. }
  1851. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1852. switch (ioc->pdev->subsystem_device) {
  1853. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1854. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1855. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1856. break;
  1857. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1858. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1859. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1860. break;
  1861. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1862. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1863. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1864. break;
  1865. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1866. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1867. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1868. break;
  1869. default:
  1870. break;
  1871. }
  1872. default:
  1873. break;
  1874. }
  1875. }
  1876. /**
  1877. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1878. * @ioc: per adapter object
  1879. *
  1880. * Return nothing.
  1881. */
  1882. static void
  1883. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1884. {
  1885. int i = 0;
  1886. char desc[16];
  1887. u32 iounit_pg1_flags;
  1888. u32 bios_version;
  1889. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1890. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1891. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1892. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1893. ioc->name, desc,
  1894. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1895. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1896. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1897. ioc->facts.FWVersion.Word & 0x000000FF,
  1898. ioc->pdev->revision,
  1899. (bios_version & 0xFF000000) >> 24,
  1900. (bios_version & 0x00FF0000) >> 16,
  1901. (bios_version & 0x0000FF00) >> 8,
  1902. bios_version & 0x000000FF);
  1903. _base_display_dell_branding(ioc);
  1904. _base_display_intel_branding(ioc);
  1905. _base_display_hp_branding(ioc);
  1906. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1907. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1908. printk("Initiator");
  1909. i++;
  1910. }
  1911. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1912. printk("%sTarget", i ? "," : "");
  1913. i++;
  1914. }
  1915. i = 0;
  1916. printk("), ");
  1917. printk("Capabilities=(");
  1918. if (!ioc->hide_ir_msg) {
  1919. if (ioc->facts.IOCCapabilities &
  1920. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1921. printk("Raid");
  1922. i++;
  1923. }
  1924. }
  1925. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1926. printk("%sTLR", i ? "," : "");
  1927. i++;
  1928. }
  1929. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1930. printk("%sMulticast", i ? "," : "");
  1931. i++;
  1932. }
  1933. if (ioc->facts.IOCCapabilities &
  1934. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1935. printk("%sBIDI Target", i ? "," : "");
  1936. i++;
  1937. }
  1938. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1939. printk("%sEEDP", i ? "," : "");
  1940. i++;
  1941. }
  1942. if (ioc->facts.IOCCapabilities &
  1943. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1944. printk("%sSnapshot Buffer", i ? "," : "");
  1945. i++;
  1946. }
  1947. if (ioc->facts.IOCCapabilities &
  1948. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1949. printk("%sDiag Trace Buffer", i ? "," : "");
  1950. i++;
  1951. }
  1952. if (ioc->facts.IOCCapabilities &
  1953. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1954. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1955. i++;
  1956. }
  1957. if (ioc->facts.IOCCapabilities &
  1958. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1959. printk("%sTask Set Full", i ? "," : "");
  1960. i++;
  1961. }
  1962. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1963. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1964. printk("%sNCQ", i ? "," : "");
  1965. i++;
  1966. }
  1967. printk(")\n");
  1968. }
  1969. /**
  1970. * mpt2sas_base_update_missing_delay - change the missing delay timers
  1971. * @ioc: per adapter object
  1972. * @device_missing_delay: amount of time till device is reported missing
  1973. * @io_missing_delay: interval IO is returned when there is a missing device
  1974. *
  1975. * Return nothing.
  1976. *
  1977. * Passed on the command line, this function will modify the device missing
  1978. * delay, as well as the io missing delay. This should be called at driver
  1979. * load time.
  1980. */
  1981. void
  1982. mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1983. u16 device_missing_delay, u8 io_missing_delay)
  1984. {
  1985. u16 dmd, dmd_new, dmd_orignal;
  1986. u8 io_missing_delay_original;
  1987. u16 sz;
  1988. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1989. Mpi2ConfigReply_t mpi_reply;
  1990. u8 num_phys = 0;
  1991. u16 ioc_status;
  1992. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1993. if (!num_phys)
  1994. return;
  1995. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1996. sizeof(Mpi2SasIOUnit1PhyData_t));
  1997. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1998. if (!sas_iounit_pg1) {
  1999. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2000. ioc->name, __FILE__, __LINE__, __func__);
  2001. goto out;
  2002. }
  2003. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  2004. sas_iounit_pg1, sz))) {
  2005. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2006. ioc->name, __FILE__, __LINE__, __func__);
  2007. goto out;
  2008. }
  2009. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  2010. MPI2_IOCSTATUS_MASK;
  2011. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  2012. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2013. ioc->name, __FILE__, __LINE__, __func__);
  2014. goto out;
  2015. }
  2016. /* device missing delay */
  2017. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  2018. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2019. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2020. else
  2021. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2022. dmd_orignal = dmd;
  2023. if (device_missing_delay > 0x7F) {
  2024. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2025. device_missing_delay;
  2026. dmd = dmd / 16;
  2027. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2028. } else
  2029. dmd = device_missing_delay;
  2030. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2031. /* io missing delay */
  2032. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2033. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2034. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2035. sz)) {
  2036. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2037. dmd_new = (dmd &
  2038. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2039. else
  2040. dmd_new =
  2041. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2042. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2043. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2044. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2045. "new(%d)\n", ioc->name, io_missing_delay_original,
  2046. io_missing_delay);
  2047. ioc->device_missing_delay = dmd_new;
  2048. ioc->io_missing_delay = io_missing_delay;
  2049. }
  2050. out:
  2051. kfree(sas_iounit_pg1);
  2052. }
  2053. /**
  2054. * _base_static_config_pages - static start of day config pages
  2055. * @ioc: per adapter object
  2056. *
  2057. * Return nothing.
  2058. */
  2059. static void
  2060. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2061. {
  2062. Mpi2ConfigReply_t mpi_reply;
  2063. u32 iounit_pg1_flags;
  2064. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2065. if (ioc->ir_firmware)
  2066. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2067. &ioc->manu_pg10);
  2068. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2069. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2070. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2071. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2072. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2073. _base_display_ioc_capabilities(ioc);
  2074. /*
  2075. * Enable task_set_full handling in iounit_pg1 when the
  2076. * facts capabilities indicate that its supported.
  2077. */
  2078. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2079. if ((ioc->facts.IOCCapabilities &
  2080. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2081. iounit_pg1_flags &=
  2082. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2083. else
  2084. iounit_pg1_flags |=
  2085. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2086. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2087. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2088. }
  2089. /**
  2090. * _base_release_memory_pools - release memory
  2091. * @ioc: per adapter object
  2092. *
  2093. * Free memory allocated from _base_allocate_memory_pools.
  2094. *
  2095. * Return nothing.
  2096. */
  2097. static void
  2098. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2099. {
  2100. int i;
  2101. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2102. __func__));
  2103. if (ioc->request) {
  2104. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2105. ioc->request, ioc->request_dma);
  2106. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2107. ": free\n", ioc->name, ioc->request));
  2108. ioc->request = NULL;
  2109. }
  2110. if (ioc->sense) {
  2111. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2112. if (ioc->sense_dma_pool)
  2113. pci_pool_destroy(ioc->sense_dma_pool);
  2114. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2115. ": free\n", ioc->name, ioc->sense));
  2116. ioc->sense = NULL;
  2117. }
  2118. if (ioc->reply) {
  2119. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2120. if (ioc->reply_dma_pool)
  2121. pci_pool_destroy(ioc->reply_dma_pool);
  2122. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2123. ": free\n", ioc->name, ioc->reply));
  2124. ioc->reply = NULL;
  2125. }
  2126. if (ioc->reply_free) {
  2127. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2128. ioc->reply_free_dma);
  2129. if (ioc->reply_free_dma_pool)
  2130. pci_pool_destroy(ioc->reply_free_dma_pool);
  2131. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2132. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2133. ioc->reply_free = NULL;
  2134. }
  2135. if (ioc->reply_post_free) {
  2136. pci_pool_free(ioc->reply_post_free_dma_pool,
  2137. ioc->reply_post_free, ioc->reply_post_free_dma);
  2138. if (ioc->reply_post_free_dma_pool)
  2139. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2140. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2141. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2142. ioc->reply_post_free));
  2143. ioc->reply_post_free = NULL;
  2144. }
  2145. if (ioc->config_page) {
  2146. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2147. "config_page(0x%p): free\n", ioc->name,
  2148. ioc->config_page));
  2149. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2150. ioc->config_page, ioc->config_page_dma);
  2151. }
  2152. if (ioc->scsi_lookup) {
  2153. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2154. ioc->scsi_lookup = NULL;
  2155. }
  2156. kfree(ioc->hpr_lookup);
  2157. kfree(ioc->internal_lookup);
  2158. if (ioc->chain_lookup) {
  2159. for (i = 0; i < ioc->chain_depth; i++) {
  2160. if (ioc->chain_lookup[i].chain_buffer)
  2161. pci_pool_free(ioc->chain_dma_pool,
  2162. ioc->chain_lookup[i].chain_buffer,
  2163. ioc->chain_lookup[i].chain_buffer_dma);
  2164. }
  2165. if (ioc->chain_dma_pool)
  2166. pci_pool_destroy(ioc->chain_dma_pool);
  2167. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2168. ioc->chain_lookup = NULL;
  2169. }
  2170. }
  2171. /**
  2172. * _base_allocate_memory_pools - allocate start of day memory pools
  2173. * @ioc: per adapter object
  2174. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2175. *
  2176. * Returns 0 success, anything else error
  2177. */
  2178. static int
  2179. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2180. {
  2181. struct mpt2sas_facts *facts;
  2182. u16 max_sge_elements;
  2183. u16 chains_needed_per_io;
  2184. u32 sz, total_sz, reply_post_free_sz;
  2185. u32 retry_sz;
  2186. u16 max_request_credit;
  2187. int i;
  2188. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2189. __func__));
  2190. retry_sz = 0;
  2191. facts = &ioc->facts;
  2192. /* command line tunables for max sgl entries */
  2193. if (max_sgl_entries != -1) {
  2194. ioc->shost->sg_tablesize = (max_sgl_entries <
  2195. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2196. MPT2SAS_SG_DEPTH;
  2197. } else {
  2198. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2199. }
  2200. /* command line tunables for max controller queue depth */
  2201. if (max_queue_depth != -1 && max_queue_depth != 0) {
  2202. max_request_credit = min_t(u16, max_queue_depth +
  2203. ioc->hi_priority_depth + ioc->internal_depth,
  2204. facts->RequestCredit);
  2205. if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
  2206. max_request_credit = MAX_HBA_QUEUE_DEPTH;
  2207. } else
  2208. max_request_credit = min_t(u16, facts->RequestCredit,
  2209. MAX_HBA_QUEUE_DEPTH);
  2210. ioc->hba_queue_depth = max_request_credit;
  2211. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2212. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2213. /* request frame size */
  2214. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2215. /* reply frame size */
  2216. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2217. retry_allocation:
  2218. total_sz = 0;
  2219. /* calculate number of sg elements left over in the 1st frame */
  2220. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2221. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2222. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2223. /* now do the same for a chain buffer */
  2224. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2225. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2226. ioc->chain_offset_value_for_main_message =
  2227. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2228. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2229. /*
  2230. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2231. */
  2232. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2233. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2234. + 1;
  2235. if (chains_needed_per_io > facts->MaxChainDepth) {
  2236. chains_needed_per_io = facts->MaxChainDepth;
  2237. ioc->shost->sg_tablesize = min_t(u16,
  2238. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2239. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2240. }
  2241. ioc->chains_needed_per_io = chains_needed_per_io;
  2242. /* reply free queue sizing - taking into account for 64 FW events */
  2243. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2244. /* calculate reply descriptor post queue depth */
  2245. ioc->reply_post_queue_depth = ioc->hba_queue_depth +
  2246. ioc->reply_free_queue_depth + 1;
  2247. /* align the reply post queue on the next 16 count boundary */
  2248. if (ioc->reply_post_queue_depth % 16)
  2249. ioc->reply_post_queue_depth += 16 -
  2250. (ioc->reply_post_queue_depth % 16);
  2251. if (ioc->reply_post_queue_depth >
  2252. facts->MaxReplyDescriptorPostQueueDepth) {
  2253. ioc->reply_post_queue_depth =
  2254. facts->MaxReplyDescriptorPostQueueDepth -
  2255. (facts->MaxReplyDescriptorPostQueueDepth % 16);
  2256. ioc->hba_queue_depth =
  2257. ((ioc->reply_post_queue_depth - 64) / 2) - 1;
  2258. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2259. }
  2260. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2261. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2262. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2263. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2264. ioc->chains_needed_per_io));
  2265. ioc->scsiio_depth = ioc->hba_queue_depth -
  2266. ioc->hi_priority_depth - ioc->internal_depth;
  2267. /* set the scsi host can_queue depth
  2268. * with some internal commands that could be outstanding
  2269. */
  2270. ioc->shost->can_queue = ioc->scsiio_depth;
  2271. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2272. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2273. /* contiguous pool for request and chains, 16 byte align, one extra "
  2274. * "frame for smid=0
  2275. */
  2276. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2277. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2278. /* hi-priority queue */
  2279. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2280. /* internal queue */
  2281. sz += (ioc->internal_depth * ioc->request_sz);
  2282. ioc->request_dma_sz = sz;
  2283. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2284. if (!ioc->request) {
  2285. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2286. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2287. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2288. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2289. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2290. goto out;
  2291. retry_sz += 64;
  2292. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2293. goto retry_allocation;
  2294. }
  2295. if (retry_sz)
  2296. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2297. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2298. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2299. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2300. /* hi-priority queue */
  2301. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2302. ioc->request_sz);
  2303. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2304. ioc->request_sz);
  2305. /* internal queue */
  2306. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2307. ioc->request_sz);
  2308. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2309. ioc->request_sz);
  2310. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2311. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2312. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2313. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2314. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2315. ioc->name, (unsigned long long) ioc->request_dma));
  2316. total_sz += sz;
  2317. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2318. ioc->scsi_lookup_pages = get_order(sz);
  2319. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2320. GFP_KERNEL, ioc->scsi_lookup_pages);
  2321. if (!ioc->scsi_lookup) {
  2322. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2323. "sz(%d)\n", ioc->name, (int)sz);
  2324. goto out;
  2325. }
  2326. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2327. "depth(%d)\n", ioc->name, ioc->request,
  2328. ioc->scsiio_depth));
  2329. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2330. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2331. ioc->chain_pages = get_order(sz);
  2332. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2333. GFP_KERNEL, ioc->chain_pages);
  2334. if (!ioc->chain_lookup) {
  2335. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2336. "sz(%d)\n", ioc->name, (int)sz);
  2337. goto out;
  2338. }
  2339. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2340. ioc->request_sz, 16, 0);
  2341. if (!ioc->chain_dma_pool) {
  2342. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2343. "failed\n", ioc->name);
  2344. goto out;
  2345. }
  2346. for (i = 0; i < ioc->chain_depth; i++) {
  2347. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2348. ioc->chain_dma_pool , GFP_KERNEL,
  2349. &ioc->chain_lookup[i].chain_buffer_dma);
  2350. if (!ioc->chain_lookup[i].chain_buffer) {
  2351. ioc->chain_depth = i;
  2352. goto chain_done;
  2353. }
  2354. total_sz += ioc->request_sz;
  2355. }
  2356. chain_done:
  2357. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2358. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2359. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2360. ioc->request_sz))/1024));
  2361. /* initialize hi-priority queue smid's */
  2362. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2363. sizeof(struct request_tracker), GFP_KERNEL);
  2364. if (!ioc->hpr_lookup) {
  2365. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2366. ioc->name);
  2367. goto out;
  2368. }
  2369. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2370. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2371. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2372. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2373. /* initialize internal queue smid's */
  2374. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2375. sizeof(struct request_tracker), GFP_KERNEL);
  2376. if (!ioc->internal_lookup) {
  2377. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2378. ioc->name);
  2379. goto out;
  2380. }
  2381. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2382. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2383. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2384. ioc->internal_depth, ioc->internal_smid));
  2385. /* sense buffers, 4 byte align */
  2386. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2387. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2388. 0);
  2389. if (!ioc->sense_dma_pool) {
  2390. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2391. ioc->name);
  2392. goto out;
  2393. }
  2394. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2395. &ioc->sense_dma);
  2396. if (!ioc->sense) {
  2397. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2398. ioc->name);
  2399. goto out;
  2400. }
  2401. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2402. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2403. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2404. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2405. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2406. ioc->name, (unsigned long long)ioc->sense_dma));
  2407. total_sz += sz;
  2408. /* reply pool, 4 byte align */
  2409. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2410. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2411. 0);
  2412. if (!ioc->reply_dma_pool) {
  2413. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2414. ioc->name);
  2415. goto out;
  2416. }
  2417. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2418. &ioc->reply_dma);
  2419. if (!ioc->reply) {
  2420. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2421. ioc->name);
  2422. goto out;
  2423. }
  2424. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2425. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2426. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2427. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2428. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2429. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2430. ioc->name, (unsigned long long)ioc->reply_dma));
  2431. total_sz += sz;
  2432. /* reply free queue, 16 byte align */
  2433. sz = ioc->reply_free_queue_depth * 4;
  2434. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2435. ioc->pdev, sz, 16, 0);
  2436. if (!ioc->reply_free_dma_pool) {
  2437. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2438. "failed\n", ioc->name);
  2439. goto out;
  2440. }
  2441. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2442. &ioc->reply_free_dma);
  2443. if (!ioc->reply_free) {
  2444. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2445. "failed\n", ioc->name);
  2446. goto out;
  2447. }
  2448. memset(ioc->reply_free, 0, sz);
  2449. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2450. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2451. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2452. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2453. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2454. total_sz += sz;
  2455. /* reply post queue, 16 byte align */
  2456. reply_post_free_sz = ioc->reply_post_queue_depth *
  2457. sizeof(Mpi2DefaultReplyDescriptor_t);
  2458. if (_base_is_controller_msix_enabled(ioc))
  2459. sz = reply_post_free_sz * ioc->reply_queue_count;
  2460. else
  2461. sz = reply_post_free_sz;
  2462. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2463. ioc->pdev, sz, 16, 0);
  2464. if (!ioc->reply_post_free_dma_pool) {
  2465. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2466. "failed\n", ioc->name);
  2467. goto out;
  2468. }
  2469. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2470. GFP_KERNEL, &ioc->reply_post_free_dma);
  2471. if (!ioc->reply_post_free) {
  2472. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2473. "failed\n", ioc->name);
  2474. goto out;
  2475. }
  2476. memset(ioc->reply_post_free, 0, sz);
  2477. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2478. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2479. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2480. sz/1024));
  2481. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2482. "(0x%llx)\n", ioc->name, (unsigned long long)
  2483. ioc->reply_post_free_dma));
  2484. total_sz += sz;
  2485. ioc->config_page_sz = 512;
  2486. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2487. ioc->config_page_sz, &ioc->config_page_dma);
  2488. if (!ioc->config_page) {
  2489. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2490. "failed\n", ioc->name);
  2491. goto out;
  2492. }
  2493. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2494. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2495. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2496. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2497. total_sz += ioc->config_page_sz;
  2498. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2499. ioc->name, total_sz/1024);
  2500. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2501. "Max Controller Queue Depth(%d)\n",
  2502. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2503. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2504. ioc->name, ioc->shost->sg_tablesize);
  2505. return 0;
  2506. out:
  2507. return -ENOMEM;
  2508. }
  2509. /**
  2510. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2511. * @ioc: Pointer to MPT_ADAPTER structure
  2512. * @cooked: Request raw or cooked IOC state
  2513. *
  2514. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2515. * Doorbell bits in MPI_IOC_STATE_MASK.
  2516. */
  2517. u32
  2518. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2519. {
  2520. u32 s, sc;
  2521. s = readl(&ioc->chip->Doorbell);
  2522. sc = s & MPI2_IOC_STATE_MASK;
  2523. return cooked ? sc : s;
  2524. }
  2525. /**
  2526. * _base_wait_on_iocstate - waiting on a particular ioc state
  2527. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2528. * @timeout: timeout in second
  2529. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2530. *
  2531. * Returns 0 for success, non-zero for failure.
  2532. */
  2533. static int
  2534. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2535. int sleep_flag)
  2536. {
  2537. u32 count, cntdn;
  2538. u32 current_state;
  2539. count = 0;
  2540. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2541. do {
  2542. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2543. if (current_state == ioc_state)
  2544. return 0;
  2545. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2546. break;
  2547. if (sleep_flag == CAN_SLEEP)
  2548. msleep(1);
  2549. else
  2550. udelay(500);
  2551. count++;
  2552. } while (--cntdn);
  2553. return current_state;
  2554. }
  2555. /**
  2556. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2557. * a write to the doorbell)
  2558. * @ioc: per adapter object
  2559. * @timeout: timeout in second
  2560. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2561. *
  2562. * Returns 0 for success, non-zero for failure.
  2563. *
  2564. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2565. */
  2566. static int
  2567. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2568. int sleep_flag)
  2569. {
  2570. u32 cntdn, count;
  2571. u32 int_status;
  2572. count = 0;
  2573. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2574. do {
  2575. int_status = readl(&ioc->chip->HostInterruptStatus);
  2576. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2577. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2578. "successful count(%d), timeout(%d)\n", ioc->name,
  2579. __func__, count, timeout));
  2580. return 0;
  2581. }
  2582. if (sleep_flag == CAN_SLEEP)
  2583. msleep(1);
  2584. else
  2585. udelay(500);
  2586. count++;
  2587. } while (--cntdn);
  2588. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2589. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2590. return -EFAULT;
  2591. }
  2592. /**
  2593. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2594. * @ioc: per adapter object
  2595. * @timeout: timeout in second
  2596. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2597. *
  2598. * Returns 0 for success, non-zero for failure.
  2599. *
  2600. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2601. * doorbell.
  2602. */
  2603. static int
  2604. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2605. int sleep_flag)
  2606. {
  2607. u32 cntdn, count;
  2608. u32 int_status;
  2609. u32 doorbell;
  2610. count = 0;
  2611. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2612. do {
  2613. int_status = readl(&ioc->chip->HostInterruptStatus);
  2614. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2615. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2616. "successful count(%d), timeout(%d)\n", ioc->name,
  2617. __func__, count, timeout));
  2618. return 0;
  2619. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2620. doorbell = readl(&ioc->chip->Doorbell);
  2621. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2622. MPI2_IOC_STATE_FAULT) {
  2623. mpt2sas_base_fault_info(ioc , doorbell);
  2624. return -EFAULT;
  2625. }
  2626. } else if (int_status == 0xFFFFFFFF)
  2627. goto out;
  2628. if (sleep_flag == CAN_SLEEP)
  2629. msleep(1);
  2630. else
  2631. udelay(500);
  2632. count++;
  2633. } while (--cntdn);
  2634. out:
  2635. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2636. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2637. return -EFAULT;
  2638. }
  2639. /**
  2640. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2641. * @ioc: per adapter object
  2642. * @timeout: timeout in second
  2643. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2644. *
  2645. * Returns 0 for success, non-zero for failure.
  2646. *
  2647. */
  2648. static int
  2649. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2650. int sleep_flag)
  2651. {
  2652. u32 cntdn, count;
  2653. u32 doorbell_reg;
  2654. count = 0;
  2655. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2656. do {
  2657. doorbell_reg = readl(&ioc->chip->Doorbell);
  2658. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2659. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2660. "successful count(%d), timeout(%d)\n", ioc->name,
  2661. __func__, count, timeout));
  2662. return 0;
  2663. }
  2664. if (sleep_flag == CAN_SLEEP)
  2665. msleep(1);
  2666. else
  2667. udelay(500);
  2668. count++;
  2669. } while (--cntdn);
  2670. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2671. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2672. return -EFAULT;
  2673. }
  2674. /**
  2675. * _base_send_ioc_reset - send doorbell reset
  2676. * @ioc: per adapter object
  2677. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2678. * @timeout: timeout in second
  2679. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2680. *
  2681. * Returns 0 for success, non-zero for failure.
  2682. */
  2683. static int
  2684. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2685. int sleep_flag)
  2686. {
  2687. u32 ioc_state;
  2688. int r = 0;
  2689. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2690. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2691. ioc->name, __func__);
  2692. return -EFAULT;
  2693. }
  2694. if (!(ioc->facts.IOCCapabilities &
  2695. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2696. return -EFAULT;
  2697. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2698. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2699. &ioc->chip->Doorbell);
  2700. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2701. r = -EFAULT;
  2702. goto out;
  2703. }
  2704. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2705. timeout, sleep_flag);
  2706. if (ioc_state) {
  2707. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2708. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2709. r = -EFAULT;
  2710. goto out;
  2711. }
  2712. out:
  2713. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2714. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2715. return r;
  2716. }
  2717. /**
  2718. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2719. * @ioc: per adapter object
  2720. * @request_bytes: request length
  2721. * @request: pointer having request payload
  2722. * @reply_bytes: reply length
  2723. * @reply: pointer to reply payload
  2724. * @timeout: timeout in second
  2725. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2726. *
  2727. * Returns 0 for success, non-zero for failure.
  2728. */
  2729. static int
  2730. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2731. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2732. {
  2733. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2734. int i;
  2735. u8 failed;
  2736. u16 dummy;
  2737. __le32 *mfp;
  2738. /* make sure doorbell is not in use */
  2739. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2740. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2741. " (line=%d)\n", ioc->name, __LINE__);
  2742. return -EFAULT;
  2743. }
  2744. /* clear pending doorbell interrupts from previous state changes */
  2745. if (readl(&ioc->chip->HostInterruptStatus) &
  2746. MPI2_HIS_IOC2SYS_DB_STATUS)
  2747. writel(0, &ioc->chip->HostInterruptStatus);
  2748. /* send message to ioc */
  2749. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2750. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2751. &ioc->chip->Doorbell);
  2752. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2753. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2754. "int failed (line=%d)\n", ioc->name, __LINE__);
  2755. return -EFAULT;
  2756. }
  2757. writel(0, &ioc->chip->HostInterruptStatus);
  2758. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2759. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2760. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2761. return -EFAULT;
  2762. }
  2763. /* send message 32-bits at a time */
  2764. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2765. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2766. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2767. failed = 1;
  2768. }
  2769. if (failed) {
  2770. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2771. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2772. return -EFAULT;
  2773. }
  2774. /* now wait for the reply */
  2775. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2776. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2777. "int failed (line=%d)\n", ioc->name, __LINE__);
  2778. return -EFAULT;
  2779. }
  2780. /* read the first two 16-bits, it gives the total length of the reply */
  2781. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2782. & MPI2_DOORBELL_DATA_MASK);
  2783. writel(0, &ioc->chip->HostInterruptStatus);
  2784. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2785. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2786. "int failed (line=%d)\n", ioc->name, __LINE__);
  2787. return -EFAULT;
  2788. }
  2789. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2790. & MPI2_DOORBELL_DATA_MASK);
  2791. writel(0, &ioc->chip->HostInterruptStatus);
  2792. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2793. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2794. printk(MPT2SAS_ERR_FMT "doorbell "
  2795. "handshake int failed (line=%d)\n", ioc->name,
  2796. __LINE__);
  2797. return -EFAULT;
  2798. }
  2799. if (i >= reply_bytes/2) /* overflow case */
  2800. dummy = readl(&ioc->chip->Doorbell);
  2801. else
  2802. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2803. & MPI2_DOORBELL_DATA_MASK);
  2804. writel(0, &ioc->chip->HostInterruptStatus);
  2805. }
  2806. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2807. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2808. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2809. " (line=%d)\n", ioc->name, __LINE__));
  2810. }
  2811. writel(0, &ioc->chip->HostInterruptStatus);
  2812. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2813. mfp = (__le32 *)reply;
  2814. printk(KERN_INFO "\toffset:data\n");
  2815. for (i = 0; i < reply_bytes/4; i++)
  2816. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2817. le32_to_cpu(mfp[i]));
  2818. }
  2819. return 0;
  2820. }
  2821. /**
  2822. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2823. * @ioc: per adapter object
  2824. * @mpi_reply: the reply payload from FW
  2825. * @mpi_request: the request payload sent to FW
  2826. *
  2827. * The SAS IO Unit Control Request message allows the host to perform low-level
  2828. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2829. * to obtain the IOC assigned device handles for a device if it has other
  2830. * identifying information about the device, in addition allows the host to
  2831. * remove IOC resources associated with the device.
  2832. *
  2833. * Returns 0 for success, non-zero for failure.
  2834. */
  2835. int
  2836. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2837. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2838. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2839. {
  2840. u16 smid;
  2841. u32 ioc_state;
  2842. unsigned long timeleft;
  2843. u8 issue_reset;
  2844. int rc;
  2845. void *request;
  2846. u16 wait_state_count;
  2847. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2848. __func__));
  2849. mutex_lock(&ioc->base_cmds.mutex);
  2850. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2851. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2852. ioc->name, __func__);
  2853. rc = -EAGAIN;
  2854. goto out;
  2855. }
  2856. wait_state_count = 0;
  2857. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2858. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2859. if (wait_state_count++ == 10) {
  2860. printk(MPT2SAS_ERR_FMT
  2861. "%s: failed due to ioc not operational\n",
  2862. ioc->name, __func__);
  2863. rc = -EFAULT;
  2864. goto out;
  2865. }
  2866. ssleep(1);
  2867. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2868. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2869. "operational state(count=%d)\n", ioc->name,
  2870. __func__, wait_state_count);
  2871. }
  2872. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2873. if (!smid) {
  2874. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2875. ioc->name, __func__);
  2876. rc = -EAGAIN;
  2877. goto out;
  2878. }
  2879. rc = 0;
  2880. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2881. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2882. ioc->base_cmds.smid = smid;
  2883. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2884. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2885. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2886. ioc->ioc_link_reset_in_progress = 1;
  2887. init_completion(&ioc->base_cmds.done);
  2888. mpt2sas_base_put_smid_default(ioc, smid);
  2889. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2890. msecs_to_jiffies(10000));
  2891. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2892. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2893. ioc->ioc_link_reset_in_progress)
  2894. ioc->ioc_link_reset_in_progress = 0;
  2895. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2896. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2897. ioc->name, __func__);
  2898. _debug_dump_mf(mpi_request,
  2899. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2900. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2901. issue_reset = 1;
  2902. goto issue_host_reset;
  2903. }
  2904. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2905. memcpy(mpi_reply, ioc->base_cmds.reply,
  2906. sizeof(Mpi2SasIoUnitControlReply_t));
  2907. else
  2908. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2909. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2910. goto out;
  2911. issue_host_reset:
  2912. if (issue_reset)
  2913. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2914. FORCE_BIG_HAMMER);
  2915. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2916. rc = -EFAULT;
  2917. out:
  2918. mutex_unlock(&ioc->base_cmds.mutex);
  2919. return rc;
  2920. }
  2921. /**
  2922. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2923. * @ioc: per adapter object
  2924. * @mpi_reply: the reply payload from FW
  2925. * @mpi_request: the request payload sent to FW
  2926. *
  2927. * The SCSI Enclosure Processor request message causes the IOC to
  2928. * communicate with SES devices to control LED status signals.
  2929. *
  2930. * Returns 0 for success, non-zero for failure.
  2931. */
  2932. int
  2933. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2934. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2935. {
  2936. u16 smid;
  2937. u32 ioc_state;
  2938. unsigned long timeleft;
  2939. u8 issue_reset;
  2940. int rc;
  2941. void *request;
  2942. u16 wait_state_count;
  2943. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2944. __func__));
  2945. mutex_lock(&ioc->base_cmds.mutex);
  2946. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2947. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2948. ioc->name, __func__);
  2949. rc = -EAGAIN;
  2950. goto out;
  2951. }
  2952. wait_state_count = 0;
  2953. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2954. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2955. if (wait_state_count++ == 10) {
  2956. printk(MPT2SAS_ERR_FMT
  2957. "%s: failed due to ioc not operational\n",
  2958. ioc->name, __func__);
  2959. rc = -EFAULT;
  2960. goto out;
  2961. }
  2962. ssleep(1);
  2963. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2964. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2965. "operational state(count=%d)\n", ioc->name,
  2966. __func__, wait_state_count);
  2967. }
  2968. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2969. if (!smid) {
  2970. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2971. ioc->name, __func__);
  2972. rc = -EAGAIN;
  2973. goto out;
  2974. }
  2975. rc = 0;
  2976. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2977. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2978. ioc->base_cmds.smid = smid;
  2979. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2980. init_completion(&ioc->base_cmds.done);
  2981. mpt2sas_base_put_smid_default(ioc, smid);
  2982. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2983. msecs_to_jiffies(10000));
  2984. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2985. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2986. ioc->name, __func__);
  2987. _debug_dump_mf(mpi_request,
  2988. sizeof(Mpi2SepRequest_t)/4);
  2989. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2990. issue_reset = 1;
  2991. goto issue_host_reset;
  2992. }
  2993. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2994. memcpy(mpi_reply, ioc->base_cmds.reply,
  2995. sizeof(Mpi2SepReply_t));
  2996. else
  2997. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2998. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2999. goto out;
  3000. issue_host_reset:
  3001. if (issue_reset)
  3002. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  3003. FORCE_BIG_HAMMER);
  3004. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3005. rc = -EFAULT;
  3006. out:
  3007. mutex_unlock(&ioc->base_cmds.mutex);
  3008. return rc;
  3009. }
  3010. /**
  3011. * _base_get_port_facts - obtain port facts reply and save in ioc
  3012. * @ioc: per adapter object
  3013. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3014. *
  3015. * Returns 0 for success, non-zero for failure.
  3016. */
  3017. static int
  3018. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  3019. {
  3020. Mpi2PortFactsRequest_t mpi_request;
  3021. Mpi2PortFactsReply_t mpi_reply;
  3022. struct mpt2sas_port_facts *pfacts;
  3023. int mpi_reply_sz, mpi_request_sz, r;
  3024. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3025. __func__));
  3026. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3027. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3028. memset(&mpi_request, 0, mpi_request_sz);
  3029. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3030. mpi_request.PortNumber = port;
  3031. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3032. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3033. if (r != 0) {
  3034. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3035. ioc->name, __func__, r);
  3036. return r;
  3037. }
  3038. pfacts = &ioc->pfacts[port];
  3039. memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
  3040. pfacts->PortNumber = mpi_reply.PortNumber;
  3041. pfacts->VP_ID = mpi_reply.VP_ID;
  3042. pfacts->VF_ID = mpi_reply.VF_ID;
  3043. pfacts->MaxPostedCmdBuffers =
  3044. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3045. return 0;
  3046. }
  3047. /**
  3048. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3049. * @ioc: per adapter object
  3050. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3051. *
  3052. * Returns 0 for success, non-zero for failure.
  3053. */
  3054. static int
  3055. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3056. {
  3057. Mpi2IOCFactsRequest_t mpi_request;
  3058. Mpi2IOCFactsReply_t mpi_reply;
  3059. struct mpt2sas_facts *facts;
  3060. int mpi_reply_sz, mpi_request_sz, r;
  3061. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3062. __func__));
  3063. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3064. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3065. memset(&mpi_request, 0, mpi_request_sz);
  3066. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3067. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3068. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3069. if (r != 0) {
  3070. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3071. ioc->name, __func__, r);
  3072. return r;
  3073. }
  3074. facts = &ioc->facts;
  3075. memset(facts, 0, sizeof(struct mpt2sas_facts));
  3076. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3077. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3078. facts->VP_ID = mpi_reply.VP_ID;
  3079. facts->VF_ID = mpi_reply.VF_ID;
  3080. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3081. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3082. facts->WhoInit = mpi_reply.WhoInit;
  3083. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3084. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3085. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3086. facts->MaxReplyDescriptorPostQueueDepth =
  3087. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3088. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3089. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3090. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3091. ioc->ir_firmware = 1;
  3092. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3093. facts->IOCRequestFrameSize =
  3094. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3095. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3096. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3097. ioc->shost->max_id = -1;
  3098. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3099. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3100. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3101. facts->HighPriorityCredit =
  3102. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3103. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3104. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3105. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3106. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3107. facts->MaxChainDepth));
  3108. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3109. "reply frame size(%d)\n", ioc->name,
  3110. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3111. return 0;
  3112. }
  3113. /**
  3114. * _base_send_ioc_init - send ioc_init to firmware
  3115. * @ioc: per adapter object
  3116. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3117. *
  3118. * Returns 0 for success, non-zero for failure.
  3119. */
  3120. static int
  3121. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3122. {
  3123. Mpi2IOCInitRequest_t mpi_request;
  3124. Mpi2IOCInitReply_t mpi_reply;
  3125. int r;
  3126. struct timeval current_time;
  3127. u16 ioc_status;
  3128. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3129. __func__));
  3130. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3131. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3132. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3133. mpi_request.VF_ID = 0; /* TODO */
  3134. mpi_request.VP_ID = 0;
  3135. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3136. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3137. if (_base_is_controller_msix_enabled(ioc))
  3138. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3139. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3140. mpi_request.ReplyDescriptorPostQueueDepth =
  3141. cpu_to_le16(ioc->reply_post_queue_depth);
  3142. mpi_request.ReplyFreeQueueDepth =
  3143. cpu_to_le16(ioc->reply_free_queue_depth);
  3144. mpi_request.SenseBufferAddressHigh =
  3145. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3146. mpi_request.SystemReplyAddressHigh =
  3147. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3148. mpi_request.SystemRequestFrameBaseAddress =
  3149. cpu_to_le64((u64)ioc->request_dma);
  3150. mpi_request.ReplyFreeQueueAddress =
  3151. cpu_to_le64((u64)ioc->reply_free_dma);
  3152. mpi_request.ReplyDescriptorPostQueueAddress =
  3153. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3154. /* This time stamp specifies number of milliseconds
  3155. * since epoch ~ midnight January 1, 1970.
  3156. */
  3157. do_gettimeofday(&current_time);
  3158. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3159. (current_time.tv_usec / 1000));
  3160. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3161. __le32 *mfp;
  3162. int i;
  3163. mfp = (__le32 *)&mpi_request;
  3164. printk(KERN_INFO "\toffset:data\n");
  3165. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3166. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3167. le32_to_cpu(mfp[i]));
  3168. }
  3169. r = _base_handshake_req_reply_wait(ioc,
  3170. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3171. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3172. sleep_flag);
  3173. if (r != 0) {
  3174. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3175. ioc->name, __func__, r);
  3176. return r;
  3177. }
  3178. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3179. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3180. mpi_reply.IOCLogInfo) {
  3181. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3182. r = -EIO;
  3183. }
  3184. return 0;
  3185. }
  3186. /**
  3187. * mpt2sas_port_enable_done - command completion routine for port enable
  3188. * @ioc: per adapter object
  3189. * @smid: system request message index
  3190. * @msix_index: MSIX table index supplied by the OS
  3191. * @reply: reply message frame(lower 32bit addr)
  3192. *
  3193. * Return 1 meaning mf should be freed from _base_interrupt
  3194. * 0 means the mf is freed from this function.
  3195. */
  3196. u8
  3197. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3198. u32 reply)
  3199. {
  3200. MPI2DefaultReply_t *mpi_reply;
  3201. u16 ioc_status;
  3202. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3203. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3204. return 1;
  3205. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3206. return 1;
  3207. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3208. if (mpi_reply) {
  3209. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3210. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3211. mpi_reply->MsgLength*4);
  3212. }
  3213. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3214. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3215. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3216. ioc->port_enable_failed = 1;
  3217. if (ioc->is_driver_loading) {
  3218. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3219. mpt2sas_port_enable_complete(ioc);
  3220. return 1;
  3221. } else {
  3222. ioc->start_scan_failed = ioc_status;
  3223. ioc->start_scan = 0;
  3224. return 1;
  3225. }
  3226. }
  3227. complete(&ioc->port_enable_cmds.done);
  3228. return 1;
  3229. }
  3230. /**
  3231. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3232. * @ioc: per adapter object
  3233. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3234. *
  3235. * Returns 0 for success, non-zero for failure.
  3236. */
  3237. static int
  3238. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3239. {
  3240. Mpi2PortEnableRequest_t *mpi_request;
  3241. Mpi2PortEnableReply_t *mpi_reply;
  3242. unsigned long timeleft;
  3243. int r = 0;
  3244. u16 smid;
  3245. u16 ioc_status;
  3246. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3247. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3248. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3249. ioc->name, __func__);
  3250. return -EAGAIN;
  3251. }
  3252. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3253. if (!smid) {
  3254. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3255. ioc->name, __func__);
  3256. return -EAGAIN;
  3257. }
  3258. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3259. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3260. ioc->port_enable_cmds.smid = smid;
  3261. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3262. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3263. init_completion(&ioc->port_enable_cmds.done);
  3264. mpt2sas_base_put_smid_default(ioc, smid);
  3265. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3266. 300*HZ);
  3267. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3268. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3269. ioc->name, __func__);
  3270. _debug_dump_mf(mpi_request,
  3271. sizeof(Mpi2PortEnableRequest_t)/4);
  3272. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3273. r = -EFAULT;
  3274. else
  3275. r = -ETIME;
  3276. goto out;
  3277. }
  3278. mpi_reply = ioc->port_enable_cmds.reply;
  3279. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3280. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3281. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3282. ioc->name, __func__, ioc_status);
  3283. r = -EFAULT;
  3284. goto out;
  3285. }
  3286. out:
  3287. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3288. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3289. "SUCCESS" : "FAILED"));
  3290. return r;
  3291. }
  3292. /**
  3293. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3294. * @ioc: per adapter object
  3295. *
  3296. * Returns 0 for success, non-zero for failure.
  3297. */
  3298. int
  3299. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3300. {
  3301. Mpi2PortEnableRequest_t *mpi_request;
  3302. u16 smid;
  3303. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3304. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3305. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3306. ioc->name, __func__);
  3307. return -EAGAIN;
  3308. }
  3309. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3310. if (!smid) {
  3311. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3312. ioc->name, __func__);
  3313. return -EAGAIN;
  3314. }
  3315. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3316. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3317. ioc->port_enable_cmds.smid = smid;
  3318. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3319. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3320. mpt2sas_base_put_smid_default(ioc, smid);
  3321. return 0;
  3322. }
  3323. /**
  3324. * _base_determine_wait_on_discovery - desposition
  3325. * @ioc: per adapter object
  3326. *
  3327. * Decide whether to wait on discovery to complete. Used to either
  3328. * locate boot device, or report volumes ahead of physical devices.
  3329. *
  3330. * Returns 1 for wait, 0 for don't wait
  3331. */
  3332. static int
  3333. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3334. {
  3335. /* We wait for discovery to complete if IR firmware is loaded.
  3336. * The sas topology events arrive before PD events, so we need time to
  3337. * turn on the bit in ioc->pd_handles to indicate PD
  3338. * Also, it maybe required to report Volumes ahead of physical
  3339. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3340. */
  3341. if (ioc->ir_firmware)
  3342. return 1;
  3343. /* if no Bios, then we don't need to wait */
  3344. if (!ioc->bios_pg3.BiosVersion)
  3345. return 0;
  3346. /* Bios is present, then we drop down here.
  3347. *
  3348. * If there any entries in the Bios Page 2, then we wait
  3349. * for discovery to complete.
  3350. */
  3351. /* Current Boot Device */
  3352. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3353. MPI2_BIOSPAGE2_FORM_MASK) ==
  3354. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3355. /* Request Boot Device */
  3356. (ioc->bios_pg2.ReqBootDeviceForm &
  3357. MPI2_BIOSPAGE2_FORM_MASK) ==
  3358. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3359. /* Alternate Request Boot Device */
  3360. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3361. MPI2_BIOSPAGE2_FORM_MASK) ==
  3362. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3363. return 0;
  3364. return 1;
  3365. }
  3366. /**
  3367. * _base_unmask_events - turn on notification for this event
  3368. * @ioc: per adapter object
  3369. * @event: firmware event
  3370. *
  3371. * The mask is stored in ioc->event_masks.
  3372. */
  3373. static void
  3374. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3375. {
  3376. u32 desired_event;
  3377. if (event >= 128)
  3378. return;
  3379. desired_event = (1 << (event % 32));
  3380. if (event < 32)
  3381. ioc->event_masks[0] &= ~desired_event;
  3382. else if (event < 64)
  3383. ioc->event_masks[1] &= ~desired_event;
  3384. else if (event < 96)
  3385. ioc->event_masks[2] &= ~desired_event;
  3386. else if (event < 128)
  3387. ioc->event_masks[3] &= ~desired_event;
  3388. }
  3389. /**
  3390. * _base_event_notification - send event notification
  3391. * @ioc: per adapter object
  3392. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3393. *
  3394. * Returns 0 for success, non-zero for failure.
  3395. */
  3396. static int
  3397. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3398. {
  3399. Mpi2EventNotificationRequest_t *mpi_request;
  3400. unsigned long timeleft;
  3401. u16 smid;
  3402. int r = 0;
  3403. int i;
  3404. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3405. __func__));
  3406. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3407. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3408. ioc->name, __func__);
  3409. return -EAGAIN;
  3410. }
  3411. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3412. if (!smid) {
  3413. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3414. ioc->name, __func__);
  3415. return -EAGAIN;
  3416. }
  3417. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3418. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3419. ioc->base_cmds.smid = smid;
  3420. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3421. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3422. mpi_request->VF_ID = 0; /* TODO */
  3423. mpi_request->VP_ID = 0;
  3424. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3425. mpi_request->EventMasks[i] =
  3426. cpu_to_le32(ioc->event_masks[i]);
  3427. init_completion(&ioc->base_cmds.done);
  3428. mpt2sas_base_put_smid_default(ioc, smid);
  3429. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3430. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3431. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3432. ioc->name, __func__);
  3433. _debug_dump_mf(mpi_request,
  3434. sizeof(Mpi2EventNotificationRequest_t)/4);
  3435. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3436. r = -EFAULT;
  3437. else
  3438. r = -ETIME;
  3439. } else
  3440. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3441. ioc->name, __func__));
  3442. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3443. return r;
  3444. }
  3445. /**
  3446. * mpt2sas_base_validate_event_type - validating event types
  3447. * @ioc: per adapter object
  3448. * @event: firmware event
  3449. *
  3450. * This will turn on firmware event notification when application
  3451. * ask for that event. We don't mask events that are already enabled.
  3452. */
  3453. void
  3454. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3455. {
  3456. int i, j;
  3457. u32 event_mask, desired_event;
  3458. u8 send_update_to_fw;
  3459. for (i = 0, send_update_to_fw = 0; i <
  3460. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3461. event_mask = ~event_type[i];
  3462. desired_event = 1;
  3463. for (j = 0; j < 32; j++) {
  3464. if (!(event_mask & desired_event) &&
  3465. (ioc->event_masks[i] & desired_event)) {
  3466. ioc->event_masks[i] &= ~desired_event;
  3467. send_update_to_fw = 1;
  3468. }
  3469. desired_event = (desired_event << 1);
  3470. }
  3471. }
  3472. if (!send_update_to_fw)
  3473. return;
  3474. mutex_lock(&ioc->base_cmds.mutex);
  3475. _base_event_notification(ioc, CAN_SLEEP);
  3476. mutex_unlock(&ioc->base_cmds.mutex);
  3477. }
  3478. /**
  3479. * _base_diag_reset - the "big hammer" start of day reset
  3480. * @ioc: per adapter object
  3481. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3482. *
  3483. * Returns 0 for success, non-zero for failure.
  3484. */
  3485. static int
  3486. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3487. {
  3488. u32 host_diagnostic;
  3489. u32 ioc_state;
  3490. u32 count;
  3491. u32 hcb_size;
  3492. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3493. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3494. ioc->name));
  3495. count = 0;
  3496. do {
  3497. /* Write magic sequence to WriteSequence register
  3498. * Loop until in diagnostic mode
  3499. */
  3500. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3501. "sequence\n", ioc->name));
  3502. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3503. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3504. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3505. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3506. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3507. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3508. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3509. /* wait 100 msec */
  3510. if (sleep_flag == CAN_SLEEP)
  3511. msleep(100);
  3512. else
  3513. mdelay(100);
  3514. if (count++ > 20)
  3515. goto out;
  3516. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3517. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3518. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3519. ioc->name, count, host_diagnostic));
  3520. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3521. hcb_size = readl(&ioc->chip->HCBSize);
  3522. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3523. ioc->name));
  3524. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3525. &ioc->chip->HostDiagnostic);
  3526. /* This delay allows the chip PCIe hardware time to finish reset tasks*/
  3527. if (sleep_flag == CAN_SLEEP)
  3528. msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
  3529. else
  3530. mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
  3531. /* Approximately 300 second max wait */
  3532. for (count = 0; count < (300000000 /
  3533. MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
  3534. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3535. if (host_diagnostic == 0xFFFFFFFF)
  3536. goto out;
  3537. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3538. break;
  3539. /* Wait to pass the second read delay window */
  3540. if (sleep_flag == CAN_SLEEP)
  3541. msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
  3542. /1000);
  3543. else
  3544. mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
  3545. /1000);
  3546. }
  3547. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3548. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3549. "assuming the HCB Address points to good F/W\n",
  3550. ioc->name));
  3551. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3552. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3553. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3554. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3555. "re-enable the HCDW\n", ioc->name));
  3556. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3557. &ioc->chip->HCBSize);
  3558. }
  3559. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3560. ioc->name));
  3561. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3562. &ioc->chip->HostDiagnostic);
  3563. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3564. "diagnostic register\n", ioc->name));
  3565. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3566. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3567. "READY state\n", ioc->name));
  3568. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3569. sleep_flag);
  3570. if (ioc_state) {
  3571. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3572. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3573. goto out;
  3574. }
  3575. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3576. return 0;
  3577. out:
  3578. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3579. return -EFAULT;
  3580. }
  3581. /**
  3582. * _base_make_ioc_ready - put controller in READY state
  3583. * @ioc: per adapter object
  3584. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3585. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3586. *
  3587. * Returns 0 for success, non-zero for failure.
  3588. */
  3589. static int
  3590. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3591. enum reset_type type)
  3592. {
  3593. u32 ioc_state;
  3594. int rc;
  3595. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3596. __func__));
  3597. if (ioc->pci_error_recovery)
  3598. return 0;
  3599. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3600. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3601. ioc->name, __func__, ioc_state));
  3602. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3603. return 0;
  3604. if (ioc_state & MPI2_DOORBELL_USED) {
  3605. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3606. "active!\n", ioc->name));
  3607. goto issue_diag_reset;
  3608. }
  3609. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3610. mpt2sas_base_fault_info(ioc, ioc_state &
  3611. MPI2_DOORBELL_DATA_MASK);
  3612. goto issue_diag_reset;
  3613. }
  3614. if (type == FORCE_BIG_HAMMER)
  3615. goto issue_diag_reset;
  3616. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3617. if (!(_base_send_ioc_reset(ioc,
  3618. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3619. ioc->ioc_reset_count++;
  3620. return 0;
  3621. }
  3622. issue_diag_reset:
  3623. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3624. ioc->ioc_reset_count++;
  3625. return rc;
  3626. }
  3627. /**
  3628. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3629. * @ioc: per adapter object
  3630. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3631. *
  3632. * Returns 0 for success, non-zero for failure.
  3633. */
  3634. static int
  3635. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3636. {
  3637. int r, i;
  3638. unsigned long flags;
  3639. u32 reply_address;
  3640. u16 smid;
  3641. struct _tr_list *delayed_tr, *delayed_tr_next;
  3642. u8 hide_flag;
  3643. struct adapter_reply_queue *reply_q;
  3644. long reply_post_free;
  3645. u32 reply_post_free_sz;
  3646. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3647. __func__));
  3648. /* clean the delayed target reset list */
  3649. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3650. &ioc->delayed_tr_list, list) {
  3651. list_del(&delayed_tr->list);
  3652. kfree(delayed_tr);
  3653. }
  3654. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3655. &ioc->delayed_tr_volume_list, list) {
  3656. list_del(&delayed_tr->list);
  3657. kfree(delayed_tr);
  3658. }
  3659. /* initialize the scsi lookup free list */
  3660. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3661. INIT_LIST_HEAD(&ioc->free_list);
  3662. smid = 1;
  3663. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3664. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3665. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3666. ioc->scsi_lookup[i].smid = smid;
  3667. ioc->scsi_lookup[i].scmd = NULL;
  3668. ioc->scsi_lookup[i].direct_io = 0;
  3669. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3670. &ioc->free_list);
  3671. }
  3672. /* hi-priority queue */
  3673. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3674. smid = ioc->hi_priority_smid;
  3675. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3676. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3677. ioc->hpr_lookup[i].smid = smid;
  3678. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3679. &ioc->hpr_free_list);
  3680. }
  3681. /* internal queue */
  3682. INIT_LIST_HEAD(&ioc->internal_free_list);
  3683. smid = ioc->internal_smid;
  3684. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3685. ioc->internal_lookup[i].cb_idx = 0xFF;
  3686. ioc->internal_lookup[i].smid = smid;
  3687. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3688. &ioc->internal_free_list);
  3689. }
  3690. /* chain pool */
  3691. INIT_LIST_HEAD(&ioc->free_chain_list);
  3692. for (i = 0; i < ioc->chain_depth; i++)
  3693. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3694. &ioc->free_chain_list);
  3695. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3696. /* initialize Reply Free Queue */
  3697. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3698. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3699. ioc->reply_sz)
  3700. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3701. /* initialize reply queues */
  3702. if (ioc->is_driver_loading)
  3703. _base_assign_reply_queues(ioc);
  3704. /* initialize Reply Post Free Queue */
  3705. reply_post_free = (long)ioc->reply_post_free;
  3706. reply_post_free_sz = ioc->reply_post_queue_depth *
  3707. sizeof(Mpi2DefaultReplyDescriptor_t);
  3708. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3709. reply_q->reply_post_host_index = 0;
  3710. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3711. reply_post_free;
  3712. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3713. reply_q->reply_post_free[i].Words =
  3714. cpu_to_le64(ULLONG_MAX);
  3715. if (!_base_is_controller_msix_enabled(ioc))
  3716. goto skip_init_reply_post_free_queue;
  3717. reply_post_free += reply_post_free_sz;
  3718. }
  3719. skip_init_reply_post_free_queue:
  3720. r = _base_send_ioc_init(ioc, sleep_flag);
  3721. if (r)
  3722. return r;
  3723. /* initialize reply free host index */
  3724. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3725. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3726. /* initialize reply post host index */
  3727. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3728. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3729. &ioc->chip->ReplyPostHostIndex);
  3730. if (!_base_is_controller_msix_enabled(ioc))
  3731. goto skip_init_reply_post_host_index;
  3732. }
  3733. skip_init_reply_post_host_index:
  3734. _base_unmask_interrupts(ioc);
  3735. r = _base_event_notification(ioc, sleep_flag);
  3736. if (r)
  3737. return r;
  3738. if (sleep_flag == CAN_SLEEP)
  3739. _base_static_config_pages(ioc);
  3740. if (ioc->is_driver_loading) {
  3741. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3742. == 0x80) {
  3743. hide_flag = (u8) (
  3744. le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
  3745. MFG_PAGE10_HIDE_SSDS_MASK);
  3746. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3747. ioc->mfg_pg10_hide_flag = hide_flag;
  3748. }
  3749. ioc->wait_for_discovery_to_complete =
  3750. _base_determine_wait_on_discovery(ioc);
  3751. return r; /* scan_start and scan_finished support */
  3752. }
  3753. r = _base_send_port_enable(ioc, sleep_flag);
  3754. if (r)
  3755. return r;
  3756. return r;
  3757. }
  3758. /**
  3759. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3760. * @ioc: per adapter object
  3761. *
  3762. * Return nothing.
  3763. */
  3764. void
  3765. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3766. {
  3767. struct pci_dev *pdev = ioc->pdev;
  3768. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3769. __func__));
  3770. if (ioc->chip_phys && ioc->chip) {
  3771. _base_mask_interrupts(ioc);
  3772. ioc->shost_recovery = 1;
  3773. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3774. ioc->shost_recovery = 0;
  3775. }
  3776. _base_free_irq(ioc);
  3777. _base_disable_msix(ioc);
  3778. if (ioc->chip_phys && ioc->chip)
  3779. iounmap(ioc->chip);
  3780. ioc->chip_phys = 0;
  3781. if (pci_is_enabled(pdev)) {
  3782. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3783. pci_disable_pcie_error_reporting(pdev);
  3784. pci_disable_device(pdev);
  3785. }
  3786. return;
  3787. }
  3788. /**
  3789. * mpt2sas_base_attach - attach controller instance
  3790. * @ioc: per adapter object
  3791. *
  3792. * Returns 0 for success, non-zero for failure.
  3793. */
  3794. int
  3795. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3796. {
  3797. int r, i;
  3798. int cpu_id, last_cpu_id = 0;
  3799. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3800. __func__));
  3801. /* setup cpu_msix_table */
  3802. ioc->cpu_count = num_online_cpus();
  3803. for_each_online_cpu(cpu_id)
  3804. last_cpu_id = cpu_id;
  3805. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3806. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3807. ioc->reply_queue_count = 1;
  3808. if (!ioc->cpu_msix_table) {
  3809. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3810. "cpu_msix_table failed!!!\n", ioc->name));
  3811. r = -ENOMEM;
  3812. goto out_free_resources;
  3813. }
  3814. if (ioc->is_warpdrive) {
  3815. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3816. sizeof(resource_size_t *), GFP_KERNEL);
  3817. if (!ioc->reply_post_host_index) {
  3818. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3819. "for cpu_msix_table failed!!!\n", ioc->name));
  3820. r = -ENOMEM;
  3821. goto out_free_resources;
  3822. }
  3823. }
  3824. r = mpt2sas_base_map_resources(ioc);
  3825. if (r)
  3826. goto out_free_resources;
  3827. if (ioc->is_warpdrive) {
  3828. ioc->reply_post_host_index[0] =
  3829. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3830. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3831. ioc->reply_post_host_index[i] = (resource_size_t *)
  3832. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3833. * 4)));
  3834. }
  3835. pci_set_drvdata(ioc->pdev, ioc->shost);
  3836. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3837. if (r)
  3838. goto out_free_resources;
  3839. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3840. if (r)
  3841. goto out_free_resources;
  3842. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3843. sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
  3844. if (!ioc->pfacts) {
  3845. r = -ENOMEM;
  3846. goto out_free_resources;
  3847. }
  3848. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3849. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3850. if (r)
  3851. goto out_free_resources;
  3852. }
  3853. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3854. if (r)
  3855. goto out_free_resources;
  3856. init_waitqueue_head(&ioc->reset_wq);
  3857. /* allocate memory pd handle bitmask list */
  3858. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3859. if (ioc->facts.MaxDevHandle % 8)
  3860. ioc->pd_handles_sz++;
  3861. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3862. GFP_KERNEL);
  3863. if (!ioc->pd_handles) {
  3864. r = -ENOMEM;
  3865. goto out_free_resources;
  3866. }
  3867. ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
  3868. GFP_KERNEL);
  3869. if (!ioc->blocking_handles) {
  3870. r = -ENOMEM;
  3871. goto out_free_resources;
  3872. }
  3873. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3874. /* base internal command bits */
  3875. mutex_init(&ioc->base_cmds.mutex);
  3876. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3877. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3878. /* port_enable command bits */
  3879. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3880. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3881. /* transport internal command bits */
  3882. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3883. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3884. mutex_init(&ioc->transport_cmds.mutex);
  3885. /* scsih internal command bits */
  3886. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3887. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3888. mutex_init(&ioc->scsih_cmds.mutex);
  3889. /* task management internal command bits */
  3890. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3891. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3892. mutex_init(&ioc->tm_cmds.mutex);
  3893. /* config page internal command bits */
  3894. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3895. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3896. mutex_init(&ioc->config_cmds.mutex);
  3897. /* ctl module internal command bits */
  3898. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3899. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3900. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3901. mutex_init(&ioc->ctl_cmds.mutex);
  3902. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3903. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3904. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3905. !ioc->ctl_cmds.sense) {
  3906. r = -ENOMEM;
  3907. goto out_free_resources;
  3908. }
  3909. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3910. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3911. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3912. r = -ENOMEM;
  3913. goto out_free_resources;
  3914. }
  3915. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3916. ioc->event_masks[i] = -1;
  3917. /* here we enable the events we care about */
  3918. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3919. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3920. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3921. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3922. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3923. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3924. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3925. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3926. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3927. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3928. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3929. if (r)
  3930. goto out_free_resources;
  3931. ioc->non_operational_loop = 0;
  3932. return 0;
  3933. out_free_resources:
  3934. ioc->remove_host = 1;
  3935. mpt2sas_base_free_resources(ioc);
  3936. _base_release_memory_pools(ioc);
  3937. pci_set_drvdata(ioc->pdev, NULL);
  3938. kfree(ioc->cpu_msix_table);
  3939. if (ioc->is_warpdrive)
  3940. kfree(ioc->reply_post_host_index);
  3941. kfree(ioc->pd_handles);
  3942. kfree(ioc->blocking_handles);
  3943. kfree(ioc->tm_cmds.reply);
  3944. kfree(ioc->transport_cmds.reply);
  3945. kfree(ioc->scsih_cmds.reply);
  3946. kfree(ioc->config_cmds.reply);
  3947. kfree(ioc->base_cmds.reply);
  3948. kfree(ioc->port_enable_cmds.reply);
  3949. kfree(ioc->ctl_cmds.reply);
  3950. kfree(ioc->ctl_cmds.sense);
  3951. kfree(ioc->pfacts);
  3952. ioc->ctl_cmds.reply = NULL;
  3953. ioc->base_cmds.reply = NULL;
  3954. ioc->tm_cmds.reply = NULL;
  3955. ioc->scsih_cmds.reply = NULL;
  3956. ioc->transport_cmds.reply = NULL;
  3957. ioc->config_cmds.reply = NULL;
  3958. ioc->pfacts = NULL;
  3959. return r;
  3960. }
  3961. /**
  3962. * mpt2sas_base_detach - remove controller instance
  3963. * @ioc: per adapter object
  3964. *
  3965. * Return nothing.
  3966. */
  3967. void
  3968. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3969. {
  3970. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3971. __func__));
  3972. mpt2sas_base_stop_watchdog(ioc);
  3973. mpt2sas_base_free_resources(ioc);
  3974. _base_release_memory_pools(ioc);
  3975. pci_set_drvdata(ioc->pdev, NULL);
  3976. kfree(ioc->cpu_msix_table);
  3977. if (ioc->is_warpdrive)
  3978. kfree(ioc->reply_post_host_index);
  3979. kfree(ioc->pd_handles);
  3980. kfree(ioc->blocking_handles);
  3981. kfree(ioc->pfacts);
  3982. kfree(ioc->ctl_cmds.reply);
  3983. kfree(ioc->ctl_cmds.sense);
  3984. kfree(ioc->base_cmds.reply);
  3985. kfree(ioc->port_enable_cmds.reply);
  3986. kfree(ioc->tm_cmds.reply);
  3987. kfree(ioc->transport_cmds.reply);
  3988. kfree(ioc->scsih_cmds.reply);
  3989. kfree(ioc->config_cmds.reply);
  3990. }
  3991. /**
  3992. * _base_reset_handler - reset callback handler (for base)
  3993. * @ioc: per adapter object
  3994. * @reset_phase: phase
  3995. *
  3996. * The handler for doing any required cleanup or initialization.
  3997. *
  3998. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3999. * MPT2_IOC_DONE_RESET
  4000. *
  4001. * Return nothing.
  4002. */
  4003. static void
  4004. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  4005. {
  4006. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  4007. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  4008. switch (reset_phase) {
  4009. case MPT2_IOC_PRE_RESET:
  4010. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4011. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  4012. break;
  4013. case MPT2_IOC_AFTER_RESET:
  4014. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4015. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  4016. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  4017. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  4018. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  4019. complete(&ioc->transport_cmds.done);
  4020. }
  4021. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  4022. ioc->base_cmds.status |= MPT2_CMD_RESET;
  4023. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  4024. complete(&ioc->base_cmds.done);
  4025. }
  4026. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  4027. ioc->port_enable_failed = 1;
  4028. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  4029. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  4030. if (ioc->is_driver_loading) {
  4031. ioc->start_scan_failed =
  4032. MPI2_IOCSTATUS_INTERNAL_ERROR;
  4033. ioc->start_scan = 0;
  4034. ioc->port_enable_cmds.status =
  4035. MPT2_CMD_NOT_USED;
  4036. } else
  4037. complete(&ioc->port_enable_cmds.done);
  4038. }
  4039. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4040. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4041. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4042. ioc->config_cmds.smid = USHRT_MAX;
  4043. complete(&ioc->config_cmds.done);
  4044. }
  4045. break;
  4046. case MPT2_IOC_DONE_RESET:
  4047. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4048. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4049. break;
  4050. }
  4051. }
  4052. /**
  4053. * _wait_for_commands_to_complete - reset controller
  4054. * @ioc: Pointer to MPT_ADAPTER structure
  4055. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4056. *
  4057. * This function waiting(3s) for all pending commands to complete
  4058. * prior to putting controller in reset.
  4059. */
  4060. static void
  4061. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4062. {
  4063. u32 ioc_state;
  4064. unsigned long flags;
  4065. u16 i;
  4066. ioc->pending_io_count = 0;
  4067. if (sleep_flag != CAN_SLEEP)
  4068. return;
  4069. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4070. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4071. return;
  4072. /* pending command count */
  4073. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4074. for (i = 0; i < ioc->scsiio_depth; i++)
  4075. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4076. ioc->pending_io_count++;
  4077. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4078. if (!ioc->pending_io_count)
  4079. return;
  4080. /* wait for pending commands to complete */
  4081. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4082. }
  4083. /**
  4084. * mpt2sas_base_hard_reset_handler - reset controller
  4085. * @ioc: Pointer to MPT_ADAPTER structure
  4086. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4087. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4088. *
  4089. * Returns 0 for success, non-zero for failure.
  4090. */
  4091. int
  4092. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4093. enum reset_type type)
  4094. {
  4095. int r;
  4096. unsigned long flags;
  4097. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4098. __func__));
  4099. if (ioc->pci_error_recovery) {
  4100. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4101. ioc->name, __func__);
  4102. r = 0;
  4103. goto out_unlocked;
  4104. }
  4105. if (mpt2sas_fwfault_debug)
  4106. mpt2sas_halt_firmware(ioc);
  4107. /* TODO - What we really should be doing is pulling
  4108. * out all the code associated with NO_SLEEP; its never used.
  4109. * That is legacy code from mpt fusion driver, ported over.
  4110. * I will leave this BUG_ON here for now till its been resolved.
  4111. */
  4112. BUG_ON(sleep_flag == NO_SLEEP);
  4113. /* wait for an active reset in progress to complete */
  4114. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4115. do {
  4116. ssleep(1);
  4117. } while (ioc->shost_recovery == 1);
  4118. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4119. __func__));
  4120. return ioc->ioc_reset_in_progress_status;
  4121. }
  4122. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4123. ioc->shost_recovery = 1;
  4124. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4125. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4126. _wait_for_commands_to_complete(ioc, sleep_flag);
  4127. _base_mask_interrupts(ioc);
  4128. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4129. if (r)
  4130. goto out;
  4131. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4132. /* If this hard reset is called while port enable is active, then
  4133. * there is no reason to call make_ioc_operational
  4134. */
  4135. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4136. ioc->remove_host = 1;
  4137. r = -EFAULT;
  4138. goto out;
  4139. }
  4140. r = _base_make_ioc_operational(ioc, sleep_flag);
  4141. if (!r)
  4142. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4143. out:
  4144. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4145. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4146. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4147. ioc->ioc_reset_in_progress_status = r;
  4148. ioc->shost_recovery = 0;
  4149. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4150. mutex_unlock(&ioc->reset_in_progress_mutex);
  4151. out_unlocked:
  4152. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4153. __func__));
  4154. return r;
  4155. }