rtc-sa1100.c 9.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384
  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@cam.org>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/rtc.h>
  26. #include <linux/init.h>
  27. #include <linux/fs.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/string.h>
  30. #include <linux/pm.h>
  31. #include <asm/bitops.h>
  32. #include <asm/hardware.h>
  33. #include <asm/irq.h>
  34. #include <asm/rtc.h>
  35. #ifdef CONFIG_ARCH_PXA
  36. #include <asm/arch/pxa-regs.h>
  37. #endif
  38. #define TIMER_FREQ CLOCK_TICK_RATE
  39. #define RTC_DEF_DIVIDER 32768 - 1
  40. #define RTC_DEF_TRIM 0
  41. static unsigned long rtc_freq = 1024;
  42. static struct rtc_time rtc_alarm;
  43. static spinlock_t sa1100_rtc_lock = SPIN_LOCK_UNLOCKED;
  44. static int rtc_update_alarm(struct rtc_time *alrm)
  45. {
  46. struct rtc_time alarm_tm, now_tm;
  47. unsigned long now, time;
  48. int ret;
  49. do {
  50. now = RCNR;
  51. rtc_time_to_tm(now, &now_tm);
  52. rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
  53. ret = rtc_tm_to_time(&alarm_tm, &time);
  54. if (ret != 0)
  55. break;
  56. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  57. RTAR = time;
  58. } while (now != RCNR);
  59. return ret;
  60. }
  61. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id,
  62. struct pt_regs *regs)
  63. {
  64. struct platform_device *pdev = to_platform_device(dev_id);
  65. struct rtc_device *rtc = platform_get_drvdata(pdev);
  66. unsigned int rtsr;
  67. unsigned long events = 0;
  68. spin_lock(&sa1100_rtc_lock);
  69. rtsr = RTSR;
  70. /* clear interrupt sources */
  71. RTSR = 0;
  72. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  73. /* clear alarm interrupt if it has occurred */
  74. if (rtsr & RTSR_AL)
  75. rtsr &= ~RTSR_ALE;
  76. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  77. /* update irq data & counter */
  78. if (rtsr & RTSR_AL)
  79. events |= RTC_AF | RTC_IRQF;
  80. if (rtsr & RTSR_HZ)
  81. events |= RTC_UF | RTC_IRQF;
  82. rtc_update_irq(&rtc->class_dev, 1, events);
  83. if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
  84. rtc_update_alarm(&rtc_alarm);
  85. spin_unlock(&sa1100_rtc_lock);
  86. return IRQ_HANDLED;
  87. }
  88. static int rtc_timer1_count;
  89. static irqreturn_t timer1_interrupt(int irq, void *dev_id,
  90. struct pt_regs *regs)
  91. {
  92. struct platform_device *pdev = to_platform_device(dev_id);
  93. struct rtc_device *rtc = platform_get_drvdata(pdev);
  94. /*
  95. * If we match for the first time, rtc_timer1_count will be 1.
  96. * Otherwise, we wrapped around (very unlikely but
  97. * still possible) so compute the amount of missed periods.
  98. * The match reg is updated only when the data is actually retrieved
  99. * to avoid unnecessary interrupts.
  100. */
  101. OSSR = OSSR_M1; /* clear match on timer1 */
  102. rtc_update_irq(&rtc->class_dev, rtc_timer1_count, RTC_PF | RTC_IRQF);
  103. if (rtc_timer1_count == 1)
  104. rtc_timer1_count = (rtc_freq * ((1<<30)/(TIMER_FREQ>>2)));
  105. return IRQ_HANDLED;
  106. }
  107. static int sa1100_rtc_read_callback(struct device *dev, int data)
  108. {
  109. if (data & RTC_PF) {
  110. /* interpolate missed periods and set match for the next */
  111. unsigned long period = TIMER_FREQ/rtc_freq;
  112. unsigned long oscr = OSCR;
  113. unsigned long osmr1 = OSMR1;
  114. unsigned long missed = (oscr - osmr1)/period;
  115. data += missed << 8;
  116. OSSR = OSSR_M1; /* clear match on timer 1 */
  117. OSMR1 = osmr1 + (missed + 1)*period;
  118. /* Ensure we didn't miss another match in the mean time.
  119. * Here we compare (match - OSCR) 8 instead of 0 --
  120. * see comment in pxa_timer_interrupt() for explanation.
  121. */
  122. while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) {
  123. data += 0x100;
  124. OSSR = OSSR_M1; /* clear match on timer 1 */
  125. OSMR1 = osmr1 + period;
  126. }
  127. }
  128. return data;
  129. }
  130. static int sa1100_rtc_open(struct device *dev)
  131. {
  132. int ret;
  133. ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, SA_INTERRUPT,
  134. "rtc 1Hz", dev);
  135. if (ret) {
  136. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
  137. goto fail_ui;
  138. }
  139. ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, SA_INTERRUPT,
  140. "rtc Alrm", dev);
  141. if (ret) {
  142. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
  143. goto fail_ai;
  144. }
  145. ret = request_irq(IRQ_OST1, timer1_interrupt, SA_INTERRUPT,
  146. "rtc timer", dev);
  147. if (ret) {
  148. dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
  149. goto fail_pi;
  150. }
  151. return 0;
  152. fail_pi:
  153. free_irq(IRQ_RTCAlrm, dev);
  154. fail_ai:
  155. free_irq(IRQ_RTC1Hz, dev);
  156. fail_ui:
  157. return ret;
  158. }
  159. static void sa1100_rtc_release(struct device *dev)
  160. {
  161. spin_lock_irq(&sa1100_rtc_lock);
  162. RTSR = 0;
  163. OIER &= ~OIER_E1;
  164. OSSR = OSSR_M1;
  165. spin_unlock_irq(&sa1100_rtc_lock);
  166. free_irq(IRQ_OST1, dev);
  167. free_irq(IRQ_RTCAlrm, dev);
  168. free_irq(IRQ_RTC1Hz, dev);
  169. }
  170. static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
  171. unsigned long arg)
  172. {
  173. switch(cmd) {
  174. case RTC_AIE_OFF:
  175. spin_lock_irq(&sa1100_rtc_lock);
  176. RTSR &= ~RTSR_ALE;
  177. spin_unlock_irq(&sa1100_rtc_lock);
  178. return 0;
  179. case RTC_AIE_ON:
  180. spin_lock_irq(&sa1100_rtc_lock);
  181. RTSR |= RTSR_ALE;
  182. spin_unlock_irq(&sa1100_rtc_lock);
  183. return 0;
  184. case RTC_UIE_OFF:
  185. spin_lock_irq(&sa1100_rtc_lock);
  186. RTSR &= ~RTSR_HZE;
  187. spin_unlock_irq(&sa1100_rtc_lock);
  188. return 0;
  189. case RTC_UIE_ON:
  190. spin_lock_irq(&sa1100_rtc_lock);
  191. RTSR |= RTSR_HZE;
  192. spin_unlock_irq(&sa1100_rtc_lock);
  193. return 0;
  194. case RTC_PIE_OFF:
  195. spin_lock_irq(&sa1100_rtc_lock);
  196. OIER &= ~OIER_E1;
  197. spin_unlock_irq(&sa1100_rtc_lock);
  198. return 0;
  199. case RTC_PIE_ON:
  200. if ((rtc_freq > 64) && !capable(CAP_SYS_RESOURCE))
  201. return -EACCES;
  202. spin_lock_irq(&sa1100_rtc_lock);
  203. OSMR1 = TIMER_FREQ/rtc_freq + OSCR;
  204. OIER |= OIER_E1;
  205. rtc_timer1_count = 1;
  206. spin_unlock_irq(&sa1100_rtc_lock);
  207. return 0;
  208. case RTC_IRQP_READ:
  209. return put_user(rtc_freq, (unsigned long *)arg);
  210. case RTC_IRQP_SET:
  211. if (arg < 1 || arg > TIMER_FREQ)
  212. return -EINVAL;
  213. if ((arg > 64) && (!capable(CAP_SYS_RESOURCE)))
  214. return -EACCES;
  215. rtc_freq = arg;
  216. return 0;
  217. }
  218. return -ENOIOCTLCMD;
  219. }
  220. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  221. {
  222. rtc_time_to_tm(RCNR, tm);
  223. return 0;
  224. }
  225. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  226. {
  227. unsigned long time;
  228. int ret;
  229. ret = rtc_tm_to_time(tm, &time);
  230. if (ret == 0)
  231. RCNR = time;
  232. return ret;
  233. }
  234. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  235. {
  236. memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
  237. alrm->pending = RTSR & RTSR_AL ? 1 : 0;
  238. return 0;
  239. }
  240. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  241. {
  242. int ret;
  243. spin_lock_irq(&sa1100_rtc_lock);
  244. ret = rtc_update_alarm(&alrm->time);
  245. if (ret == 0) {
  246. memcpy(&rtc_alarm, &alrm->time, sizeof(struct rtc_time));
  247. if (alrm->enabled)
  248. enable_irq_wake(IRQ_RTCAlrm);
  249. else
  250. disable_irq_wake(IRQ_RTCAlrm);
  251. }
  252. spin_unlock_irq(&sa1100_rtc_lock);
  253. return ret;
  254. }
  255. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  256. {
  257. seq_printf(seq, "trim/divider\t: 0x%08lx\n", RTTR);
  258. seq_printf(seq, "alarm_IRQ\t: %s\n",
  259. (RTSR & RTSR_ALE) ? "yes" : "no" );
  260. seq_printf(seq, "update_IRQ\t: %s\n",
  261. (RTSR & RTSR_HZE) ? "yes" : "no");
  262. seq_printf(seq, "periodic_IRQ\t: %s\n",
  263. (OIER & OIER_E1) ? "yes" : "no");
  264. seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq);
  265. return 0;
  266. }
  267. static struct rtc_class_ops sa1100_rtc_ops = {
  268. .open = sa1100_rtc_open,
  269. .read_callback = sa1100_rtc_read_callback,
  270. .release = sa1100_rtc_release,
  271. .ioctl = sa1100_rtc_ioctl,
  272. .read_time = sa1100_rtc_read_time,
  273. .set_time = sa1100_rtc_set_time,
  274. .read_alarm = sa1100_rtc_read_alarm,
  275. .set_alarm = sa1100_rtc_set_alarm,
  276. .proc = sa1100_rtc_proc,
  277. };
  278. static int sa1100_rtc_probe(struct platform_device *pdev)
  279. {
  280. struct rtc_device *rtc;
  281. /*
  282. * According to the manual we should be able to let RTTR be zero
  283. * and then a default diviser for a 32.768KHz clock is used.
  284. * Apparently this doesn't work, at least for my SA1110 rev 5.
  285. * If the clock divider is uninitialized then reset it to the
  286. * default value to get the 1Hz clock.
  287. */
  288. if (RTTR == 0) {
  289. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  290. dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n");
  291. /* The current RTC value probably doesn't make sense either */
  292. RCNR = 0;
  293. }
  294. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  295. THIS_MODULE);
  296. if (IS_ERR(rtc))
  297. return PTR_ERR(rtc);
  298. platform_set_drvdata(pdev, rtc);
  299. return 0;
  300. }
  301. static int sa1100_rtc_remove(struct platform_device *pdev)
  302. {
  303. struct rtc_device *rtc = platform_get_drvdata(pdev);
  304. if (rtc)
  305. rtc_device_unregister(rtc);
  306. return 0;
  307. }
  308. static struct platform_driver sa1100_rtc_driver = {
  309. .probe = sa1100_rtc_probe,
  310. .remove = sa1100_rtc_remove,
  311. .driver = {
  312. .name = "sa1100-rtc",
  313. },
  314. };
  315. static int __init sa1100_rtc_init(void)
  316. {
  317. return platform_driver_register(&sa1100_rtc_driver);
  318. }
  319. static void __exit sa1100_rtc_exit(void)
  320. {
  321. platform_driver_unregister(&sa1100_rtc_driver);
  322. }
  323. module_init(sa1100_rtc_init);
  324. module_exit(sa1100_rtc_exit);
  325. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  326. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  327. MODULE_LICENSE("GPL");