budget-ci.c 30 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include "dvb_ca_en50221.h"
  39. #include "stv0299.h"
  40. #include "stv0297.h"
  41. #include "tda1004x.h"
  42. #include "lnbp21.h"
  43. #include "bsbe1.h"
  44. #include "bsru6.h"
  45. #define DEBIADDR_IR 0x1234
  46. #define DEBIADDR_CICONTROL 0x0000
  47. #define DEBIADDR_CIVERSION 0x4000
  48. #define DEBIADDR_IO 0x1000
  49. #define DEBIADDR_ATTR 0x3000
  50. #define CICONTROL_RESET 0x01
  51. #define CICONTROL_ENABLETS 0x02
  52. #define CICONTROL_CAMDETECT 0x08
  53. #define DEBICICTL 0x00420000
  54. #define DEBICICAM 0x02420000
  55. #define SLOTSTATUS_NONE 1
  56. #define SLOTSTATUS_PRESENT 2
  57. #define SLOTSTATUS_RESET 4
  58. #define SLOTSTATUS_READY 8
  59. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  60. struct budget_ci {
  61. struct budget budget;
  62. struct input_dev *input_dev;
  63. struct tasklet_struct msp430_irq_tasklet;
  64. struct tasklet_struct ciintf_irq_tasklet;
  65. int slot_status;
  66. int ci_irq;
  67. struct dvb_ca_en50221 ca;
  68. char ir_dev_name[50];
  69. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  70. };
  71. /* from reading the following remotes:
  72. Zenith Universal 7 / TV Mode 807 / VCR Mode 837
  73. Hauppauge (from NOVA-CI-s box product)
  74. i've taken a "middle of the road" approach and note the differences
  75. */
  76. static u16 key_map[64] = {
  77. /* 0x0X */
  78. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8,
  79. KEY_9,
  80. KEY_ENTER,
  81. KEY_RED,
  82. KEY_POWER, /* RADIO on Hauppauge */
  83. KEY_MUTE,
  84. 0,
  85. KEY_A, /* TV on Hauppauge */
  86. /* 0x1X */
  87. KEY_VOLUMEUP, KEY_VOLUMEDOWN,
  88. 0, 0,
  89. KEY_B,
  90. 0, 0, 0, 0, 0, 0, 0,
  91. KEY_UP, KEY_DOWN,
  92. KEY_OPTION, /* RESERVED on Hauppauge */
  93. KEY_BREAK,
  94. /* 0x2X */
  95. KEY_CHANNELUP, KEY_CHANNELDOWN,
  96. KEY_PREVIOUS, /* Prev. Ch on Zenith, SOURCE on Hauppauge */
  97. 0, KEY_RESTART, KEY_OK,
  98. KEY_CYCLEWINDOWS, /* MINIMIZE on Hauppauge */
  99. 0,
  100. KEY_ENTER, /* VCR mode on Zenith */
  101. KEY_PAUSE,
  102. 0,
  103. KEY_RIGHT, KEY_LEFT,
  104. 0,
  105. KEY_MENU, /* FULL SCREEN on Hauppauge */
  106. 0,
  107. /* 0x3X */
  108. KEY_SLOW,
  109. KEY_PREVIOUS, /* VCR mode on Zenith */
  110. KEY_REWIND,
  111. 0,
  112. KEY_FASTFORWARD,
  113. KEY_PLAY, KEY_STOP,
  114. KEY_RECORD,
  115. KEY_TUNER, /* TV/VCR on Zenith */
  116. 0,
  117. KEY_C,
  118. 0,
  119. KEY_EXIT,
  120. KEY_POWER2,
  121. KEY_TUNER, /* VCR mode on Zenith */
  122. 0,
  123. };
  124. static void msp430_ir_debounce(unsigned long data)
  125. {
  126. struct input_dev *dev = (struct input_dev *) data;
  127. if (dev->rep[0] == 0 || dev->rep[0] == ~0) {
  128. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  129. return;
  130. }
  131. dev->rep[0] = 0;
  132. dev->timer.expires = jiffies + HZ * 350 / 1000;
  133. add_timer(&dev->timer);
  134. input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */
  135. }
  136. static void msp430_ir_interrupt(unsigned long data)
  137. {
  138. struct budget_ci *budget_ci = (struct budget_ci *) data;
  139. struct input_dev *dev = budget_ci->input_dev;
  140. unsigned int code =
  141. ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  142. if (code & 0x40) {
  143. code &= 0x3f;
  144. if (timer_pending(&dev->timer)) {
  145. if (code == dev->repeat_key) {
  146. ++dev->rep[0];
  147. return;
  148. }
  149. del_timer(&dev->timer);
  150. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  151. }
  152. if (!key_map[code]) {
  153. printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code);
  154. return;
  155. }
  156. /* initialize debounce and repeat */
  157. dev->repeat_key = code;
  158. /* Zenith remote _always_ sends 2 sequences */
  159. dev->rep[0] = ~0;
  160. /* 350 milliseconds */
  161. dev->timer.expires = jiffies + HZ * 350 / 1000;
  162. /* MAKE */
  163. input_event(dev, EV_KEY, key_map[code], !0);
  164. add_timer(&dev->timer);
  165. }
  166. }
  167. static int msp430_ir_init(struct budget_ci *budget_ci)
  168. {
  169. struct saa7146_dev *saa = budget_ci->budget.dev;
  170. struct input_dev *input_dev;
  171. int i;
  172. budget_ci->input_dev = input_dev = input_allocate_device();
  173. if (!input_dev)
  174. return -ENOMEM;
  175. sprintf(budget_ci->ir_dev_name, "Budget-CI dvb ir receiver %s", saa->name);
  176. input_dev->name = budget_ci->ir_dev_name;
  177. set_bit(EV_KEY, input_dev->evbit);
  178. for (i = 0; i < ARRAY_SIZE(key_map); i++)
  179. if (key_map[i])
  180. set_bit(key_map[i], input_dev->keybit);
  181. input_register_device(budget_ci->input_dev);
  182. input_dev->timer.function = msp430_ir_debounce;
  183. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  184. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  185. return 0;
  186. }
  187. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  188. {
  189. struct saa7146_dev *saa = budget_ci->budget.dev;
  190. struct input_dev *dev = budget_ci->input_dev;
  191. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  192. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  193. if (del_timer(&dev->timer))
  194. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  195. input_unregister_device(dev);
  196. }
  197. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  198. {
  199. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  200. if (slot != 0)
  201. return -EINVAL;
  202. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  203. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  204. }
  205. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  206. {
  207. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  208. if (slot != 0)
  209. return -EINVAL;
  210. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  211. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  212. }
  213. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  214. {
  215. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  216. if (slot != 0)
  217. return -EINVAL;
  218. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  219. DEBIADDR_IO | (address & 3), 1, 1, 0);
  220. }
  221. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  222. {
  223. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  224. if (slot != 0)
  225. return -EINVAL;
  226. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  227. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  228. }
  229. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  230. {
  231. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  232. struct saa7146_dev *saa = budget_ci->budget.dev;
  233. if (slot != 0)
  234. return -EINVAL;
  235. if (budget_ci->ci_irq) {
  236. // trigger on RISING edge during reset so we know when READY is re-asserted
  237. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  238. }
  239. budget_ci->slot_status = SLOTSTATUS_RESET;
  240. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  241. msleep(1);
  242. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  243. CICONTROL_RESET, 1, 0);
  244. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  245. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  246. return 0;
  247. }
  248. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  249. {
  250. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  251. struct saa7146_dev *saa = budget_ci->budget.dev;
  252. if (slot != 0)
  253. return -EINVAL;
  254. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  255. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  256. return 0;
  257. }
  258. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  259. {
  260. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  261. struct saa7146_dev *saa = budget_ci->budget.dev;
  262. int tmp;
  263. if (slot != 0)
  264. return -EINVAL;
  265. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  266. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  267. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  268. tmp | CICONTROL_ENABLETS, 1, 0);
  269. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  270. return 0;
  271. }
  272. static void ciintf_interrupt(unsigned long data)
  273. {
  274. struct budget_ci *budget_ci = (struct budget_ci *) data;
  275. struct saa7146_dev *saa = budget_ci->budget.dev;
  276. unsigned int flags;
  277. // ensure we don't get spurious IRQs during initialisation
  278. if (!budget_ci->budget.ci_present)
  279. return;
  280. // read the CAM status
  281. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  282. if (flags & CICONTROL_CAMDETECT) {
  283. // GPIO should be set to trigger on falling edge if a CAM is present
  284. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  285. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  286. // CAM insertion IRQ
  287. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  288. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  289. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  290. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  291. // CAM ready (reset completed)
  292. budget_ci->slot_status = SLOTSTATUS_READY;
  293. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  294. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  295. // FR/DA IRQ
  296. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  297. }
  298. } else {
  299. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  300. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  301. // the CAM might not actually be ready yet.
  302. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  303. // generate a CAM removal IRQ if we haven't already
  304. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  305. // CAM removal IRQ
  306. budget_ci->slot_status = SLOTSTATUS_NONE;
  307. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  308. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  309. }
  310. }
  311. }
  312. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  313. {
  314. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  315. unsigned int flags;
  316. // ensure we don't get spurious IRQs during initialisation
  317. if (!budget_ci->budget.ci_present)
  318. return -EINVAL;
  319. // read the CAM status
  320. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  321. if (flags & CICONTROL_CAMDETECT) {
  322. // mark it as present if it wasn't before
  323. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  324. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  325. }
  326. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  327. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  328. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  329. budget_ci->slot_status = SLOTSTATUS_READY;
  330. }
  331. }
  332. } else {
  333. budget_ci->slot_status = SLOTSTATUS_NONE;
  334. }
  335. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  336. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  337. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  338. }
  339. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  340. }
  341. return 0;
  342. }
  343. static int ciintf_init(struct budget_ci *budget_ci)
  344. {
  345. struct saa7146_dev *saa = budget_ci->budget.dev;
  346. int flags;
  347. int result;
  348. int ci_version;
  349. int ca_flags;
  350. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  351. // enable DEBI pins
  352. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  353. // test if it is there
  354. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  355. if ((ci_version & 0xa0) != 0xa0) {
  356. result = -ENODEV;
  357. goto error;
  358. }
  359. // determine whether a CAM is present or not
  360. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  361. budget_ci->slot_status = SLOTSTATUS_NONE;
  362. if (flags & CICONTROL_CAMDETECT)
  363. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  364. // version 0xa2 of the CI firmware doesn't generate interrupts
  365. if (ci_version == 0xa2) {
  366. ca_flags = 0;
  367. budget_ci->ci_irq = 0;
  368. } else {
  369. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  370. DVB_CA_EN50221_FLAG_IRQ_FR |
  371. DVB_CA_EN50221_FLAG_IRQ_DA;
  372. budget_ci->ci_irq = 1;
  373. }
  374. // register CI interface
  375. budget_ci->ca.owner = THIS_MODULE;
  376. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  377. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  378. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  379. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  380. budget_ci->ca.slot_reset = ciintf_slot_reset;
  381. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  382. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  383. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  384. budget_ci->ca.data = budget_ci;
  385. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  386. &budget_ci->ca,
  387. ca_flags, 1)) != 0) {
  388. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  389. goto error;
  390. }
  391. // Setup CI slot IRQ
  392. if (budget_ci->ci_irq) {
  393. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  394. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  395. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  396. } else {
  397. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  398. }
  399. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  400. }
  401. // enable interface
  402. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  403. CICONTROL_RESET, 1, 0);
  404. // success!
  405. printk("budget_ci: CI interface initialised\n");
  406. budget_ci->budget.ci_present = 1;
  407. // forge a fake CI IRQ so the CAM state is setup correctly
  408. if (budget_ci->ci_irq) {
  409. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  410. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  411. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  412. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  413. }
  414. return 0;
  415. error:
  416. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  417. return result;
  418. }
  419. static void ciintf_deinit(struct budget_ci *budget_ci)
  420. {
  421. struct saa7146_dev *saa = budget_ci->budget.dev;
  422. // disable CI interrupts
  423. if (budget_ci->ci_irq) {
  424. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  425. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  426. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  427. }
  428. // reset interface
  429. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  430. msleep(1);
  431. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  432. CICONTROL_RESET, 1, 0);
  433. // disable TS data stream to CI interface
  434. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  435. // release the CA device
  436. dvb_ca_en50221_release(&budget_ci->ca);
  437. // disable DEBI pins
  438. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  439. }
  440. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  441. {
  442. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  443. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  444. if (*isr & MASK_06)
  445. tasklet_schedule(&budget_ci->msp430_irq_tasklet);
  446. if (*isr & MASK_10)
  447. ttpci_budget_irq10_handler(dev, isr);
  448. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  449. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  450. }
  451. static u8 philips_su1278_tt_inittab[] = {
  452. 0x01, 0x0f,
  453. 0x02, 0x30,
  454. 0x03, 0x00,
  455. 0x04, 0x5b,
  456. 0x05, 0x85,
  457. 0x06, 0x02,
  458. 0x07, 0x00,
  459. 0x08, 0x02,
  460. 0x09, 0x00,
  461. 0x0C, 0x01,
  462. 0x0D, 0x81,
  463. 0x0E, 0x44,
  464. 0x0f, 0x14,
  465. 0x10, 0x3c,
  466. 0x11, 0x84,
  467. 0x12, 0xda,
  468. 0x13, 0x97,
  469. 0x14, 0x95,
  470. 0x15, 0xc9,
  471. 0x16, 0x19,
  472. 0x17, 0x8c,
  473. 0x18, 0x59,
  474. 0x19, 0xf8,
  475. 0x1a, 0xfe,
  476. 0x1c, 0x7f,
  477. 0x1d, 0x00,
  478. 0x1e, 0x00,
  479. 0x1f, 0x50,
  480. 0x20, 0x00,
  481. 0x21, 0x00,
  482. 0x22, 0x00,
  483. 0x23, 0x00,
  484. 0x28, 0x00,
  485. 0x29, 0x28,
  486. 0x2a, 0x14,
  487. 0x2b, 0x0f,
  488. 0x2c, 0x09,
  489. 0x2d, 0x09,
  490. 0x31, 0x1f,
  491. 0x32, 0x19,
  492. 0x33, 0xfc,
  493. 0x34, 0x93,
  494. 0xff, 0xff
  495. };
  496. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  497. {
  498. stv0299_writereg(fe, 0x0e, 0x44);
  499. if (srate >= 10000000) {
  500. stv0299_writereg(fe, 0x13, 0x97);
  501. stv0299_writereg(fe, 0x14, 0x95);
  502. stv0299_writereg(fe, 0x15, 0xc9);
  503. stv0299_writereg(fe, 0x17, 0x8c);
  504. stv0299_writereg(fe, 0x1a, 0xfe);
  505. stv0299_writereg(fe, 0x1c, 0x7f);
  506. stv0299_writereg(fe, 0x2d, 0x09);
  507. } else {
  508. stv0299_writereg(fe, 0x13, 0x99);
  509. stv0299_writereg(fe, 0x14, 0x8d);
  510. stv0299_writereg(fe, 0x15, 0xce);
  511. stv0299_writereg(fe, 0x17, 0x43);
  512. stv0299_writereg(fe, 0x1a, 0x1d);
  513. stv0299_writereg(fe, 0x1c, 0x12);
  514. stv0299_writereg(fe, 0x2d, 0x05);
  515. }
  516. stv0299_writereg(fe, 0x0e, 0x23);
  517. stv0299_writereg(fe, 0x0f, 0x94);
  518. stv0299_writereg(fe, 0x10, 0x39);
  519. stv0299_writereg(fe, 0x15, 0xc9);
  520. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  521. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  522. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  523. return 0;
  524. }
  525. static int philips_su1278_tt_pll_set(struct dvb_frontend *fe,
  526. struct i2c_adapter *i2c,
  527. struct dvb_frontend_parameters *params)
  528. {
  529. u32 div;
  530. u8 buf[4];
  531. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  532. if ((params->frequency < 950000) || (params->frequency > 2150000))
  533. return -EINVAL;
  534. div = (params->frequency + (500 - 1)) / 500; // round correctly
  535. buf[0] = (div >> 8) & 0x7f;
  536. buf[1] = div & 0xff;
  537. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  538. buf[3] = 0x20;
  539. if (params->u.qpsk.symbol_rate < 4000000)
  540. buf[3] |= 1;
  541. if (params->frequency < 1250000)
  542. buf[3] |= 0;
  543. else if (params->frequency < 1550000)
  544. buf[3] |= 0x40;
  545. else if (params->frequency < 2050000)
  546. buf[3] |= 0x80;
  547. else if (params->frequency < 2150000)
  548. buf[3] |= 0xC0;
  549. if (i2c_transfer(i2c, &msg, 1) != 1)
  550. return -EIO;
  551. return 0;
  552. }
  553. static struct stv0299_config philips_su1278_tt_config = {
  554. .demod_address = 0x68,
  555. .inittab = philips_su1278_tt_inittab,
  556. .mclk = 64000000UL,
  557. .invert = 0,
  558. .skip_reinit = 1,
  559. .lock_output = STV0229_LOCKOUTPUT_1,
  560. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  561. .min_delay_ms = 50,
  562. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  563. .pll_set = philips_su1278_tt_pll_set,
  564. };
  565. static int philips_tdm1316l_pll_init(struct dvb_frontend *fe)
  566. {
  567. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  568. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  569. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  570. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  571. sizeof(td1316_init) };
  572. // setup PLL configuration
  573. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  574. return -EIO;
  575. msleep(1);
  576. // disable the mc44BC374c (do not check for errors)
  577. tuner_msg.addr = 0x65;
  578. tuner_msg.buf = disable_mc44BC374c;
  579. tuner_msg.len = sizeof(disable_mc44BC374c);
  580. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  581. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  582. }
  583. return 0;
  584. }
  585. static int philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  586. {
  587. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  588. u8 tuner_buf[4];
  589. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  590. int tuner_frequency = 0;
  591. u8 band, cp, filter;
  592. // determine charge pump
  593. tuner_frequency = params->frequency + 36130000;
  594. if (tuner_frequency < 87000000)
  595. return -EINVAL;
  596. else if (tuner_frequency < 130000000)
  597. cp = 3;
  598. else if (tuner_frequency < 160000000)
  599. cp = 5;
  600. else if (tuner_frequency < 200000000)
  601. cp = 6;
  602. else if (tuner_frequency < 290000000)
  603. cp = 3;
  604. else if (tuner_frequency < 420000000)
  605. cp = 5;
  606. else if (tuner_frequency < 480000000)
  607. cp = 6;
  608. else if (tuner_frequency < 620000000)
  609. cp = 3;
  610. else if (tuner_frequency < 830000000)
  611. cp = 5;
  612. else if (tuner_frequency < 895000000)
  613. cp = 7;
  614. else
  615. return -EINVAL;
  616. // determine band
  617. if (params->frequency < 49000000)
  618. return -EINVAL;
  619. else if (params->frequency < 159000000)
  620. band = 1;
  621. else if (params->frequency < 444000000)
  622. band = 2;
  623. else if (params->frequency < 861000000)
  624. band = 4;
  625. else
  626. return -EINVAL;
  627. // setup PLL filter and TDA9889
  628. switch (params->u.ofdm.bandwidth) {
  629. case BANDWIDTH_6_MHZ:
  630. tda1004x_write_byte(fe, 0x0C, 0x14);
  631. filter = 0;
  632. break;
  633. case BANDWIDTH_7_MHZ:
  634. tda1004x_write_byte(fe, 0x0C, 0x80);
  635. filter = 0;
  636. break;
  637. case BANDWIDTH_8_MHZ:
  638. tda1004x_write_byte(fe, 0x0C, 0x14);
  639. filter = 1;
  640. break;
  641. default:
  642. return -EINVAL;
  643. }
  644. // calculate divisor
  645. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  646. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  647. // setup tuner buffer
  648. tuner_buf[0] = tuner_frequency >> 8;
  649. tuner_buf[1] = tuner_frequency & 0xff;
  650. tuner_buf[2] = 0xca;
  651. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  652. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  653. return -EIO;
  654. msleep(1);
  655. return 0;
  656. }
  657. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  658. const struct firmware **fw, char *name)
  659. {
  660. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  661. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  662. }
  663. static struct tda1004x_config philips_tdm1316l_config = {
  664. .demod_address = 0x8,
  665. .invert = 0,
  666. .invert_oclk = 0,
  667. .xtal_freq = TDA10046_XTAL_4M,
  668. .agc_config = TDA10046_AGC_DEFAULT,
  669. .if_freq = TDA10046_FREQ_3617,
  670. .pll_init = philips_tdm1316l_pll_init,
  671. .pll_set = philips_tdm1316l_pll_set,
  672. .pll_sleep = NULL,
  673. .request_firmware = philips_tdm1316l_request_firmware,
  674. };
  675. static int dvbc_philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  676. {
  677. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  678. u8 tuner_buf[5];
  679. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  680. .flags = 0,
  681. .buf = tuner_buf,
  682. .len = sizeof(tuner_buf) };
  683. int tuner_frequency = 0;
  684. u8 band, cp, filter;
  685. // determine charge pump
  686. tuner_frequency = params->frequency + 36125000;
  687. if (tuner_frequency < 87000000)
  688. return -EINVAL;
  689. else if (tuner_frequency < 130000000) {
  690. cp = 3;
  691. band = 1;
  692. } else if (tuner_frequency < 160000000) {
  693. cp = 5;
  694. band = 1;
  695. } else if (tuner_frequency < 200000000) {
  696. cp = 6;
  697. band = 1;
  698. } else if (tuner_frequency < 290000000) {
  699. cp = 3;
  700. band = 2;
  701. } else if (tuner_frequency < 420000000) {
  702. cp = 5;
  703. band = 2;
  704. } else if (tuner_frequency < 480000000) {
  705. cp = 6;
  706. band = 2;
  707. } else if (tuner_frequency < 620000000) {
  708. cp = 3;
  709. band = 4;
  710. } else if (tuner_frequency < 830000000) {
  711. cp = 5;
  712. band = 4;
  713. } else if (tuner_frequency < 895000000) {
  714. cp = 7;
  715. band = 4;
  716. } else
  717. return -EINVAL;
  718. // assume PLL filter should always be 8MHz for the moment.
  719. filter = 1;
  720. // calculate divisor
  721. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  722. // setup tuner buffer
  723. tuner_buf[0] = tuner_frequency >> 8;
  724. tuner_buf[1] = tuner_frequency & 0xff;
  725. tuner_buf[2] = 0xc8;
  726. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  727. tuner_buf[4] = 0x80;
  728. stv0297_enable_plli2c(fe);
  729. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  730. return -EIO;
  731. msleep(50);
  732. stv0297_enable_plli2c(fe);
  733. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  734. return -EIO;
  735. msleep(1);
  736. return 0;
  737. }
  738. static u8 dvbc_philips_tdm1316l_inittab[] = {
  739. 0x80, 0x01,
  740. 0x80, 0x00,
  741. 0x81, 0x01,
  742. 0x81, 0x00,
  743. 0x00, 0x09,
  744. 0x01, 0x69,
  745. 0x03, 0x00,
  746. 0x04, 0x00,
  747. 0x07, 0x00,
  748. 0x08, 0x00,
  749. 0x20, 0x00,
  750. 0x21, 0x40,
  751. 0x22, 0x00,
  752. 0x23, 0x00,
  753. 0x24, 0x40,
  754. 0x25, 0x88,
  755. 0x30, 0xff,
  756. 0x31, 0x00,
  757. 0x32, 0xff,
  758. 0x33, 0x00,
  759. 0x34, 0x50,
  760. 0x35, 0x7f,
  761. 0x36, 0x00,
  762. 0x37, 0x20,
  763. 0x38, 0x00,
  764. 0x40, 0x1c,
  765. 0x41, 0xff,
  766. 0x42, 0x29,
  767. 0x43, 0x20,
  768. 0x44, 0xff,
  769. 0x45, 0x00,
  770. 0x46, 0x00,
  771. 0x49, 0x04,
  772. 0x4a, 0x00,
  773. 0x4b, 0x7b,
  774. 0x52, 0x30,
  775. 0x55, 0xae,
  776. 0x56, 0x47,
  777. 0x57, 0xe1,
  778. 0x58, 0x3a,
  779. 0x5a, 0x1e,
  780. 0x5b, 0x34,
  781. 0x60, 0x00,
  782. 0x63, 0x00,
  783. 0x64, 0x00,
  784. 0x65, 0x00,
  785. 0x66, 0x00,
  786. 0x67, 0x00,
  787. 0x68, 0x00,
  788. 0x69, 0x00,
  789. 0x6a, 0x02,
  790. 0x6b, 0x00,
  791. 0x70, 0xff,
  792. 0x71, 0x00,
  793. 0x72, 0x00,
  794. 0x73, 0x00,
  795. 0x74, 0x0c,
  796. 0x80, 0x00,
  797. 0x81, 0x00,
  798. 0x82, 0x00,
  799. 0x83, 0x00,
  800. 0x84, 0x04,
  801. 0x85, 0x80,
  802. 0x86, 0x24,
  803. 0x87, 0x78,
  804. 0x88, 0x10,
  805. 0x89, 0x00,
  806. 0x90, 0x01,
  807. 0x91, 0x01,
  808. 0xa0, 0x04,
  809. 0xa1, 0x00,
  810. 0xa2, 0x00,
  811. 0xb0, 0x91,
  812. 0xb1, 0x0b,
  813. 0xc0, 0x53,
  814. 0xc1, 0x70,
  815. 0xc2, 0x12,
  816. 0xd0, 0x00,
  817. 0xd1, 0x00,
  818. 0xd2, 0x00,
  819. 0xd3, 0x00,
  820. 0xd4, 0x00,
  821. 0xd5, 0x00,
  822. 0xde, 0x00,
  823. 0xdf, 0x00,
  824. 0x61, 0x38,
  825. 0x62, 0x0a,
  826. 0x53, 0x13,
  827. 0x59, 0x08,
  828. 0xff, 0xff,
  829. };
  830. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  831. .demod_address = 0x1c,
  832. .inittab = dvbc_philips_tdm1316l_inittab,
  833. .invert = 0,
  834. .pll_set = dvbc_philips_tdm1316l_pll_set,
  835. };
  836. static void frontend_init(struct budget_ci *budget_ci)
  837. {
  838. switch (budget_ci->budget.dev->pci->subsystem_device) {
  839. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  840. budget_ci->budget.dvb_frontend =
  841. stv0299_attach(&alps_bsru6_config, &budget_ci->budget.i2c_adap);
  842. if (budget_ci->budget.dvb_frontend) {
  843. break;
  844. }
  845. break;
  846. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  847. budget_ci->budget.dvb_frontend =
  848. stv0299_attach(&philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  849. if (budget_ci->budget.dvb_frontend) {
  850. break;
  851. }
  852. break;
  853. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  854. budget_ci->tuner_pll_address = 0x61;
  855. budget_ci->budget.dvb_frontend =
  856. stv0297_attach(&dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  857. if (budget_ci->budget.dvb_frontend) {
  858. break;
  859. }
  860. break;
  861. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  862. budget_ci->tuner_pll_address = 0x63;
  863. budget_ci->budget.dvb_frontend =
  864. tda10045_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  865. if (budget_ci->budget.dvb_frontend) {
  866. break;
  867. }
  868. break;
  869. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  870. budget_ci->tuner_pll_address = 0x60;
  871. budget_ci->budget.dvb_frontend =
  872. tda10046_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  873. if (budget_ci->budget.dvb_frontend) {
  874. break;
  875. }
  876. break;
  877. case 0x1017: // TT S-1500 PCI
  878. budget_ci->budget.dvb_frontend = stv0299_attach(&alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  879. if (budget_ci->budget.dvb_frontend) {
  880. budget_ci->budget.dvb_frontend->ops->dishnetwork_send_legacy_command = NULL;
  881. if (lnbp21_init(budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0)) {
  882. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  883. if (budget_ci->budget.dvb_frontend->ops->release)
  884. budget_ci->budget.dvb_frontend->ops->release(budget_ci->budget.dvb_frontend);
  885. budget_ci->budget.dvb_frontend = NULL;
  886. }
  887. }
  888. break;
  889. }
  890. if (budget_ci->budget.dvb_frontend == NULL) {
  891. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  892. budget_ci->budget.dev->pci->vendor,
  893. budget_ci->budget.dev->pci->device,
  894. budget_ci->budget.dev->pci->subsystem_vendor,
  895. budget_ci->budget.dev->pci->subsystem_device);
  896. } else {
  897. if (dvb_register_frontend
  898. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  899. printk("budget-ci: Frontend registration failed!\n");
  900. if (budget_ci->budget.dvb_frontend->ops->release)
  901. budget_ci->budget.dvb_frontend->ops->release(budget_ci->budget.dvb_frontend);
  902. budget_ci->budget.dvb_frontend = NULL;
  903. }
  904. }
  905. }
  906. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  907. {
  908. struct budget_ci *budget_ci;
  909. int err;
  910. if (!(budget_ci = kmalloc(sizeof(struct budget_ci), GFP_KERNEL)))
  911. return -ENOMEM;
  912. dprintk(2, "budget_ci: %p\n", budget_ci);
  913. budget_ci->budget.ci_present = 0;
  914. dev->ext_priv = budget_ci;
  915. if ((err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE))) {
  916. kfree(budget_ci);
  917. return err;
  918. }
  919. tasklet_init(&budget_ci->msp430_irq_tasklet, msp430_ir_interrupt,
  920. (unsigned long) budget_ci);
  921. msp430_ir_init(budget_ci);
  922. ciintf_init(budget_ci);
  923. budget_ci->budget.dvb_adapter.priv = budget_ci;
  924. frontend_init(budget_ci);
  925. return 0;
  926. }
  927. static int budget_ci_detach(struct saa7146_dev *dev)
  928. {
  929. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  930. struct saa7146_dev *saa = budget_ci->budget.dev;
  931. int err;
  932. if (budget_ci->budget.ci_present)
  933. ciintf_deinit(budget_ci);
  934. if (budget_ci->budget.dvb_frontend)
  935. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  936. err = ttpci_budget_deinit(&budget_ci->budget);
  937. tasklet_kill(&budget_ci->msp430_irq_tasklet);
  938. msp430_ir_deinit(budget_ci);
  939. // disable frontend and CI interface
  940. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  941. kfree(budget_ci);
  942. return err;
  943. }
  944. static struct saa7146_extension budget_extension;
  945. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  946. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  947. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  948. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  949. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  950. static struct pci_device_id pci_tbl[] = {
  951. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  952. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  953. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  954. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  955. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  956. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  957. {
  958. .vendor = 0,
  959. }
  960. };
  961. MODULE_DEVICE_TABLE(pci, pci_tbl);
  962. static struct saa7146_extension budget_extension = {
  963. .name = "budget_ci dvb\0",
  964. .flags = SAA7146_I2C_SHORT_DELAY,
  965. .module = THIS_MODULE,
  966. .pci_tbl = &pci_tbl[0],
  967. .attach = budget_ci_attach,
  968. .detach = budget_ci_detach,
  969. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  970. .irq_func = budget_ci_irq,
  971. };
  972. static int __init budget_ci_init(void)
  973. {
  974. return saa7146_register_extension(&budget_extension);
  975. }
  976. static void __exit budget_ci_exit(void)
  977. {
  978. saa7146_unregister_extension(&budget_extension);
  979. }
  980. module_init(budget_ci_init);
  981. module_exit(budget_ci_exit);
  982. MODULE_LICENSE("GPL");
  983. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  984. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  985. "budget PCI DVB cards w/ CI-module produced by "
  986. "Siemens, Technotrend, Hauppauge");