events.c 28 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <asm/desc.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/irq.h>
  34. #include <asm/idle.h>
  35. #include <asm/io_apic.h>
  36. #include <asm/sync_bitops.h>
  37. #include <asm/xen/hypercall.h>
  38. #include <asm/xen/hypervisor.h>
  39. #include <xen/xen.h>
  40. #include <xen/hvm.h>
  41. #include <xen/xen-ops.h>
  42. #include <xen/events.h>
  43. #include <xen/interface/xen.h>
  44. #include <xen/interface/event_channel.h>
  45. #include <xen/interface/hvm/hvm_op.h>
  46. #include <xen/interface/hvm/params.h>
  47. /*
  48. * This lock protects updates to the following mapping and reference-count
  49. * arrays. The lock does not need to be acquired to read the mapping tables.
  50. */
  51. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  52. /* IRQ <-> VIRQ mapping. */
  53. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  54. /* IRQ <-> IPI mapping */
  55. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  56. /* Interrupt types. */
  57. enum xen_irq_type {
  58. IRQT_UNBOUND = 0,
  59. IRQT_PIRQ,
  60. IRQT_VIRQ,
  61. IRQT_IPI,
  62. IRQT_EVTCHN
  63. };
  64. /*
  65. * Packed IRQ information:
  66. * type - enum xen_irq_type
  67. * event channel - irq->event channel mapping
  68. * cpu - cpu this event channel is bound to
  69. * index - type-specific information:
  70. * PIRQ - vector, with MSB being "needs EIO"
  71. * VIRQ - virq number
  72. * IPI - IPI vector
  73. * EVTCHN -
  74. */
  75. struct irq_info
  76. {
  77. enum xen_irq_type type; /* type */
  78. unsigned short evtchn; /* event channel */
  79. unsigned short cpu; /* cpu bound */
  80. union {
  81. unsigned short virq;
  82. enum ipi_vector ipi;
  83. struct {
  84. unsigned short gsi;
  85. unsigned char vector;
  86. unsigned char flags;
  87. } pirq;
  88. } u;
  89. };
  90. #define PIRQ_NEEDS_EOI (1 << 0)
  91. static struct irq_info *irq_info;
  92. static int *evtchn_to_irq;
  93. struct cpu_evtchn_s {
  94. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  95. };
  96. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  97. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  98. };
  99. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  100. static inline unsigned long *cpu_evtchn_mask(int cpu)
  101. {
  102. return cpu_evtchn_mask_p[cpu].bits;
  103. }
  104. /* Xen will never allocate port zero for any purpose. */
  105. #define VALID_EVTCHN(chn) ((chn) != 0)
  106. static struct irq_chip xen_dynamic_chip;
  107. static struct irq_chip xen_percpu_chip;
  108. static struct irq_chip xen_pirq_chip;
  109. /* Constructor for packed IRQ information. */
  110. static struct irq_info mk_unbound_info(void)
  111. {
  112. return (struct irq_info) { .type = IRQT_UNBOUND };
  113. }
  114. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  115. {
  116. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  117. .cpu = 0 };
  118. }
  119. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  120. {
  121. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  122. .cpu = 0, .u.ipi = ipi };
  123. }
  124. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  125. {
  126. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  127. .cpu = 0, .u.virq = virq };
  128. }
  129. static struct irq_info mk_pirq_info(unsigned short evtchn,
  130. unsigned short gsi, unsigned short vector)
  131. {
  132. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  133. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  134. }
  135. /*
  136. * Accessors for packed IRQ information.
  137. */
  138. static struct irq_info *info_for_irq(unsigned irq)
  139. {
  140. return &irq_info[irq];
  141. }
  142. static unsigned int evtchn_from_irq(unsigned irq)
  143. {
  144. return info_for_irq(irq)->evtchn;
  145. }
  146. unsigned irq_from_evtchn(unsigned int evtchn)
  147. {
  148. return evtchn_to_irq[evtchn];
  149. }
  150. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  151. static enum ipi_vector ipi_from_irq(unsigned irq)
  152. {
  153. struct irq_info *info = info_for_irq(irq);
  154. BUG_ON(info == NULL);
  155. BUG_ON(info->type != IRQT_IPI);
  156. return info->u.ipi;
  157. }
  158. static unsigned virq_from_irq(unsigned irq)
  159. {
  160. struct irq_info *info = info_for_irq(irq);
  161. BUG_ON(info == NULL);
  162. BUG_ON(info->type != IRQT_VIRQ);
  163. return info->u.virq;
  164. }
  165. static unsigned gsi_from_irq(unsigned irq)
  166. {
  167. struct irq_info *info = info_for_irq(irq);
  168. BUG_ON(info == NULL);
  169. BUG_ON(info->type != IRQT_PIRQ);
  170. return info->u.pirq.gsi;
  171. }
  172. static unsigned vector_from_irq(unsigned irq)
  173. {
  174. struct irq_info *info = info_for_irq(irq);
  175. BUG_ON(info == NULL);
  176. BUG_ON(info->type != IRQT_PIRQ);
  177. return info->u.pirq.vector;
  178. }
  179. static enum xen_irq_type type_from_irq(unsigned irq)
  180. {
  181. return info_for_irq(irq)->type;
  182. }
  183. static unsigned cpu_from_irq(unsigned irq)
  184. {
  185. return info_for_irq(irq)->cpu;
  186. }
  187. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  188. {
  189. int irq = evtchn_to_irq[evtchn];
  190. unsigned ret = 0;
  191. if (irq != -1)
  192. ret = cpu_from_irq(irq);
  193. return ret;
  194. }
  195. static bool pirq_needs_eoi(unsigned irq)
  196. {
  197. struct irq_info *info = info_for_irq(irq);
  198. BUG_ON(info->type != IRQT_PIRQ);
  199. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  200. }
  201. static inline unsigned long active_evtchns(unsigned int cpu,
  202. struct shared_info *sh,
  203. unsigned int idx)
  204. {
  205. return (sh->evtchn_pending[idx] &
  206. cpu_evtchn_mask(cpu)[idx] &
  207. ~sh->evtchn_mask[idx]);
  208. }
  209. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  210. {
  211. int irq = evtchn_to_irq[chn];
  212. BUG_ON(irq == -1);
  213. #ifdef CONFIG_SMP
  214. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  215. #endif
  216. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  217. __set_bit(chn, cpu_evtchn_mask(cpu));
  218. irq_info[irq].cpu = cpu;
  219. }
  220. static void init_evtchn_cpu_bindings(void)
  221. {
  222. #ifdef CONFIG_SMP
  223. struct irq_desc *desc;
  224. int i;
  225. /* By default all event channels notify CPU#0. */
  226. for_each_irq_desc(i, desc) {
  227. cpumask_copy(desc->affinity, cpumask_of(0));
  228. }
  229. #endif
  230. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  231. }
  232. static inline void clear_evtchn(int port)
  233. {
  234. struct shared_info *s = HYPERVISOR_shared_info;
  235. sync_clear_bit(port, &s->evtchn_pending[0]);
  236. }
  237. static inline void set_evtchn(int port)
  238. {
  239. struct shared_info *s = HYPERVISOR_shared_info;
  240. sync_set_bit(port, &s->evtchn_pending[0]);
  241. }
  242. static inline int test_evtchn(int port)
  243. {
  244. struct shared_info *s = HYPERVISOR_shared_info;
  245. return sync_test_bit(port, &s->evtchn_pending[0]);
  246. }
  247. /**
  248. * notify_remote_via_irq - send event to remote end of event channel via irq
  249. * @irq: irq of event channel to send event to
  250. *
  251. * Unlike notify_remote_via_evtchn(), this is safe to use across
  252. * save/restore. Notifications on a broken connection are silently
  253. * dropped.
  254. */
  255. void notify_remote_via_irq(int irq)
  256. {
  257. int evtchn = evtchn_from_irq(irq);
  258. if (VALID_EVTCHN(evtchn))
  259. notify_remote_via_evtchn(evtchn);
  260. }
  261. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  262. static void mask_evtchn(int port)
  263. {
  264. struct shared_info *s = HYPERVISOR_shared_info;
  265. sync_set_bit(port, &s->evtchn_mask[0]);
  266. }
  267. static void unmask_evtchn(int port)
  268. {
  269. struct shared_info *s = HYPERVISOR_shared_info;
  270. unsigned int cpu = get_cpu();
  271. BUG_ON(!irqs_disabled());
  272. /* Slow path (hypercall) if this is a non-local port. */
  273. if (unlikely(cpu != cpu_from_evtchn(port))) {
  274. struct evtchn_unmask unmask = { .port = port };
  275. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  276. } else {
  277. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  278. sync_clear_bit(port, &s->evtchn_mask[0]);
  279. /*
  280. * The following is basically the equivalent of
  281. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  282. * the interrupt edge' if the channel is masked.
  283. */
  284. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  285. !sync_test_and_set_bit(port / BITS_PER_LONG,
  286. &vcpu_info->evtchn_pending_sel))
  287. vcpu_info->evtchn_upcall_pending = 1;
  288. }
  289. put_cpu();
  290. }
  291. static int get_nr_hw_irqs(void)
  292. {
  293. int ret = 1;
  294. #ifdef CONFIG_X86_IO_APIC
  295. ret = get_nr_irqs_gsi();
  296. #endif
  297. return ret;
  298. }
  299. static int find_unbound_irq(void)
  300. {
  301. struct irq_data *data;
  302. int irq, res;
  303. for (irq = 0; irq < nr_irqs; irq++) {
  304. data = irq_get_irq_data(irq);
  305. /* only 0->15 have init'd desc; handle irq > 16 */
  306. if (!data)
  307. break;
  308. if (data->chip == &no_irq_chip)
  309. break;
  310. if (data->chip != &xen_dynamic_chip)
  311. continue;
  312. if (irq_info[irq].type == IRQT_UNBOUND)
  313. return irq;
  314. }
  315. if (irq == nr_irqs)
  316. panic("No available IRQ to bind to: increase nr_irqs!\n");
  317. res = irq_alloc_desc_at(irq, 0);
  318. if (WARN_ON(res != irq))
  319. return -1;
  320. return irq;
  321. }
  322. static bool identity_mapped_irq(unsigned irq)
  323. {
  324. /* identity map all the hardware irqs */
  325. return irq < get_nr_hw_irqs();
  326. }
  327. static void pirq_unmask_notify(int irq)
  328. {
  329. struct physdev_eoi eoi = { .irq = irq };
  330. if (unlikely(pirq_needs_eoi(irq))) {
  331. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  332. WARN_ON(rc);
  333. }
  334. }
  335. static void pirq_query_unmask(int irq)
  336. {
  337. struct physdev_irq_status_query irq_status;
  338. struct irq_info *info = info_for_irq(irq);
  339. BUG_ON(info->type != IRQT_PIRQ);
  340. irq_status.irq = irq;
  341. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  342. irq_status.flags = 0;
  343. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  344. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  345. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  346. }
  347. static bool probing_irq(int irq)
  348. {
  349. struct irq_desc *desc = irq_to_desc(irq);
  350. return desc && desc->action == NULL;
  351. }
  352. static unsigned int startup_pirq(unsigned int irq)
  353. {
  354. struct evtchn_bind_pirq bind_pirq;
  355. struct irq_info *info = info_for_irq(irq);
  356. int evtchn = evtchn_from_irq(irq);
  357. BUG_ON(info->type != IRQT_PIRQ);
  358. if (VALID_EVTCHN(evtchn))
  359. goto out;
  360. bind_pirq.pirq = irq;
  361. /* NB. We are happy to share unless we are probing. */
  362. bind_pirq.flags = probing_irq(irq) ? 0 : BIND_PIRQ__WILL_SHARE;
  363. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq) != 0) {
  364. if (!probing_irq(irq))
  365. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  366. irq);
  367. return 0;
  368. }
  369. evtchn = bind_pirq.port;
  370. pirq_query_unmask(irq);
  371. evtchn_to_irq[evtchn] = irq;
  372. bind_evtchn_to_cpu(evtchn, 0);
  373. info->evtchn = evtchn;
  374. out:
  375. unmask_evtchn(evtchn);
  376. pirq_unmask_notify(irq);
  377. return 0;
  378. }
  379. static void shutdown_pirq(unsigned int irq)
  380. {
  381. struct evtchn_close close;
  382. struct irq_info *info = info_for_irq(irq);
  383. int evtchn = evtchn_from_irq(irq);
  384. BUG_ON(info->type != IRQT_PIRQ);
  385. if (!VALID_EVTCHN(evtchn))
  386. return;
  387. mask_evtchn(evtchn);
  388. close.port = evtchn;
  389. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  390. BUG();
  391. bind_evtchn_to_cpu(evtchn, 0);
  392. evtchn_to_irq[evtchn] = -1;
  393. info->evtchn = 0;
  394. }
  395. static void enable_pirq(unsigned int irq)
  396. {
  397. startup_pirq(irq);
  398. }
  399. static void disable_pirq(unsigned int irq)
  400. {
  401. }
  402. static void ack_pirq(unsigned int irq)
  403. {
  404. int evtchn = evtchn_from_irq(irq);
  405. move_native_irq(irq);
  406. if (VALID_EVTCHN(evtchn)) {
  407. mask_evtchn(evtchn);
  408. clear_evtchn(evtchn);
  409. }
  410. }
  411. static void end_pirq(unsigned int irq)
  412. {
  413. int evtchn = evtchn_from_irq(irq);
  414. struct irq_desc *desc = irq_to_desc(irq);
  415. if (WARN_ON(!desc))
  416. return;
  417. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  418. (IRQ_DISABLED|IRQ_PENDING)) {
  419. shutdown_pirq(irq);
  420. } else if (VALID_EVTCHN(evtchn)) {
  421. unmask_evtchn(evtchn);
  422. pirq_unmask_notify(irq);
  423. }
  424. }
  425. static int find_irq_by_gsi(unsigned gsi)
  426. {
  427. int irq;
  428. for (irq = 0; irq < nr_irqs; irq++) {
  429. struct irq_info *info = info_for_irq(irq);
  430. if (info == NULL || info->type != IRQT_PIRQ)
  431. continue;
  432. if (gsi_from_irq(irq) == gsi)
  433. return irq;
  434. }
  435. return -1;
  436. }
  437. /*
  438. * Allocate a physical irq, along with a vector. We don't assign an
  439. * event channel until the irq actually started up. Return an
  440. * existing irq if we've already got one for the gsi.
  441. */
  442. int xen_allocate_pirq(unsigned gsi, char *name)
  443. {
  444. int irq;
  445. struct physdev_irq irq_op;
  446. spin_lock(&irq_mapping_update_lock);
  447. irq = find_irq_by_gsi(gsi);
  448. if (irq != -1) {
  449. printk(KERN_INFO "xen_allocate_pirq: returning irq %d for gsi %u\n",
  450. irq, gsi);
  451. goto out; /* XXX need refcount? */
  452. }
  453. if (identity_mapped_irq(gsi)) {
  454. irq = gsi;
  455. irq_to_desc_alloc_node(irq, 0);
  456. dynamic_irq_init(irq);
  457. } else
  458. irq = find_unbound_irq();
  459. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  460. handle_level_irq, name);
  461. irq_op.irq = irq;
  462. if (HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  463. dynamic_irq_cleanup(irq);
  464. irq = -ENOSPC;
  465. goto out;
  466. }
  467. irq_info[irq] = mk_pirq_info(0, gsi, irq_op.vector);
  468. out:
  469. spin_unlock(&irq_mapping_update_lock);
  470. return irq;
  471. }
  472. int xen_vector_from_irq(unsigned irq)
  473. {
  474. return vector_from_irq(irq);
  475. }
  476. int xen_gsi_from_irq(unsigned irq)
  477. {
  478. return gsi_from_irq(irq);
  479. }
  480. int bind_evtchn_to_irq(unsigned int evtchn)
  481. {
  482. int irq;
  483. spin_lock(&irq_mapping_update_lock);
  484. irq = evtchn_to_irq[evtchn];
  485. if (irq == -1) {
  486. irq = find_unbound_irq();
  487. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  488. handle_edge_irq, "event");
  489. evtchn_to_irq[evtchn] = irq;
  490. irq_info[irq] = mk_evtchn_info(evtchn);
  491. }
  492. spin_unlock(&irq_mapping_update_lock);
  493. return irq;
  494. }
  495. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  496. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  497. {
  498. struct evtchn_bind_ipi bind_ipi;
  499. int evtchn, irq;
  500. spin_lock(&irq_mapping_update_lock);
  501. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  502. if (irq == -1) {
  503. irq = find_unbound_irq();
  504. if (irq < 0)
  505. goto out;
  506. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  507. handle_percpu_irq, "ipi");
  508. bind_ipi.vcpu = cpu;
  509. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  510. &bind_ipi) != 0)
  511. BUG();
  512. evtchn = bind_ipi.port;
  513. evtchn_to_irq[evtchn] = irq;
  514. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  515. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  516. bind_evtchn_to_cpu(evtchn, cpu);
  517. }
  518. out:
  519. spin_unlock(&irq_mapping_update_lock);
  520. return irq;
  521. }
  522. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  523. {
  524. struct evtchn_bind_virq bind_virq;
  525. int evtchn, irq;
  526. spin_lock(&irq_mapping_update_lock);
  527. irq = per_cpu(virq_to_irq, cpu)[virq];
  528. if (irq == -1) {
  529. bind_virq.virq = virq;
  530. bind_virq.vcpu = cpu;
  531. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  532. &bind_virq) != 0)
  533. BUG();
  534. evtchn = bind_virq.port;
  535. irq = find_unbound_irq();
  536. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  537. handle_percpu_irq, "virq");
  538. evtchn_to_irq[evtchn] = irq;
  539. irq_info[irq] = mk_virq_info(evtchn, virq);
  540. per_cpu(virq_to_irq, cpu)[virq] = irq;
  541. bind_evtchn_to_cpu(evtchn, cpu);
  542. }
  543. spin_unlock(&irq_mapping_update_lock);
  544. return irq;
  545. }
  546. static void unbind_from_irq(unsigned int irq)
  547. {
  548. struct evtchn_close close;
  549. int evtchn = evtchn_from_irq(irq);
  550. spin_lock(&irq_mapping_update_lock);
  551. if (VALID_EVTCHN(evtchn)) {
  552. close.port = evtchn;
  553. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  554. BUG();
  555. switch (type_from_irq(irq)) {
  556. case IRQT_VIRQ:
  557. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  558. [virq_from_irq(irq)] = -1;
  559. break;
  560. case IRQT_IPI:
  561. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  562. [ipi_from_irq(irq)] = -1;
  563. break;
  564. default:
  565. break;
  566. }
  567. /* Closed ports are implicitly re-bound to VCPU0. */
  568. bind_evtchn_to_cpu(evtchn, 0);
  569. evtchn_to_irq[evtchn] = -1;
  570. }
  571. if (irq_info[irq].type != IRQT_UNBOUND) {
  572. irq_info[irq] = mk_unbound_info();
  573. irq_free_desc(irq);
  574. }
  575. spin_unlock(&irq_mapping_update_lock);
  576. }
  577. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  578. irq_handler_t handler,
  579. unsigned long irqflags,
  580. const char *devname, void *dev_id)
  581. {
  582. unsigned int irq;
  583. int retval;
  584. irq = bind_evtchn_to_irq(evtchn);
  585. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  586. if (retval != 0) {
  587. unbind_from_irq(irq);
  588. return retval;
  589. }
  590. return irq;
  591. }
  592. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  593. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  594. irq_handler_t handler,
  595. unsigned long irqflags, const char *devname, void *dev_id)
  596. {
  597. unsigned int irq;
  598. int retval;
  599. irq = bind_virq_to_irq(virq, cpu);
  600. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  601. if (retval != 0) {
  602. unbind_from_irq(irq);
  603. return retval;
  604. }
  605. return irq;
  606. }
  607. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  608. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  609. unsigned int cpu,
  610. irq_handler_t handler,
  611. unsigned long irqflags,
  612. const char *devname,
  613. void *dev_id)
  614. {
  615. int irq, retval;
  616. irq = bind_ipi_to_irq(ipi, cpu);
  617. if (irq < 0)
  618. return irq;
  619. irqflags |= IRQF_NO_SUSPEND;
  620. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  621. if (retval != 0) {
  622. unbind_from_irq(irq);
  623. return retval;
  624. }
  625. return irq;
  626. }
  627. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  628. {
  629. free_irq(irq, dev_id);
  630. unbind_from_irq(irq);
  631. }
  632. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  633. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  634. {
  635. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  636. BUG_ON(irq < 0);
  637. notify_remote_via_irq(irq);
  638. }
  639. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  640. {
  641. struct shared_info *sh = HYPERVISOR_shared_info;
  642. int cpu = smp_processor_id();
  643. int i;
  644. unsigned long flags;
  645. static DEFINE_SPINLOCK(debug_lock);
  646. spin_lock_irqsave(&debug_lock, flags);
  647. printk("vcpu %d\n ", cpu);
  648. for_each_online_cpu(i) {
  649. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  650. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  651. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  652. v->evtchn_upcall_pending,
  653. v->evtchn_pending_sel);
  654. }
  655. printk("pending:\n ");
  656. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  657. printk("%08lx%s", sh->evtchn_pending[i],
  658. i % 8 == 0 ? "\n " : " ");
  659. printk("\nmasks:\n ");
  660. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  661. printk("%08lx%s", sh->evtchn_mask[i],
  662. i % 8 == 0 ? "\n " : " ");
  663. printk("\nunmasked:\n ");
  664. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  665. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  666. i % 8 == 0 ? "\n " : " ");
  667. printk("\npending list:\n");
  668. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  669. if (sync_test_bit(i, sh->evtchn_pending)) {
  670. printk(" %d: event %d -> irq %d\n",
  671. cpu_from_evtchn(i), i,
  672. evtchn_to_irq[i]);
  673. }
  674. }
  675. spin_unlock_irqrestore(&debug_lock, flags);
  676. return IRQ_HANDLED;
  677. }
  678. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  679. /*
  680. * Search the CPUs pending events bitmasks. For each one found, map
  681. * the event number to an irq, and feed it into do_IRQ() for
  682. * handling.
  683. *
  684. * Xen uses a two-level bitmap to speed searching. The first level is
  685. * a bitset of words which contain pending event bits. The second
  686. * level is a bitset of pending events themselves.
  687. */
  688. static void __xen_evtchn_do_upcall(void)
  689. {
  690. int cpu = get_cpu();
  691. struct shared_info *s = HYPERVISOR_shared_info;
  692. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  693. unsigned count;
  694. do {
  695. unsigned long pending_words;
  696. vcpu_info->evtchn_upcall_pending = 0;
  697. if (__get_cpu_var(xed_nesting_count)++)
  698. goto out;
  699. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  700. /* Clear master flag /before/ clearing selector flag. */
  701. wmb();
  702. #endif
  703. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  704. while (pending_words != 0) {
  705. unsigned long pending_bits;
  706. int word_idx = __ffs(pending_words);
  707. pending_words &= ~(1UL << word_idx);
  708. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  709. int bit_idx = __ffs(pending_bits);
  710. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  711. int irq = evtchn_to_irq[port];
  712. struct irq_desc *desc;
  713. if (irq != -1) {
  714. desc = irq_to_desc(irq);
  715. if (desc)
  716. generic_handle_irq_desc(irq, desc);
  717. }
  718. }
  719. }
  720. BUG_ON(!irqs_disabled());
  721. count = __get_cpu_var(xed_nesting_count);
  722. __get_cpu_var(xed_nesting_count) = 0;
  723. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  724. out:
  725. put_cpu();
  726. }
  727. void xen_evtchn_do_upcall(struct pt_regs *regs)
  728. {
  729. struct pt_regs *old_regs = set_irq_regs(regs);
  730. exit_idle();
  731. irq_enter();
  732. __xen_evtchn_do_upcall();
  733. irq_exit();
  734. set_irq_regs(old_regs);
  735. }
  736. void xen_hvm_evtchn_do_upcall(void)
  737. {
  738. __xen_evtchn_do_upcall();
  739. }
  740. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  741. /* Rebind a new event channel to an existing irq. */
  742. void rebind_evtchn_irq(int evtchn, int irq)
  743. {
  744. struct irq_info *info = info_for_irq(irq);
  745. /* Make sure the irq is masked, since the new event channel
  746. will also be masked. */
  747. disable_irq(irq);
  748. spin_lock(&irq_mapping_update_lock);
  749. /* After resume the irq<->evtchn mappings are all cleared out */
  750. BUG_ON(evtchn_to_irq[evtchn] != -1);
  751. /* Expect irq to have been bound before,
  752. so there should be a proper type */
  753. BUG_ON(info->type == IRQT_UNBOUND);
  754. evtchn_to_irq[evtchn] = irq;
  755. irq_info[irq] = mk_evtchn_info(evtchn);
  756. spin_unlock(&irq_mapping_update_lock);
  757. /* new event channels are always bound to cpu 0 */
  758. irq_set_affinity(irq, cpumask_of(0));
  759. /* Unmask the event channel. */
  760. enable_irq(irq);
  761. }
  762. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  763. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  764. {
  765. struct evtchn_bind_vcpu bind_vcpu;
  766. int evtchn = evtchn_from_irq(irq);
  767. /* events delivered via platform PCI interrupts are always
  768. * routed to vcpu 0 */
  769. if (!VALID_EVTCHN(evtchn) ||
  770. (xen_hvm_domain() && !xen_have_vector_callback))
  771. return -1;
  772. /* Send future instances of this interrupt to other vcpu. */
  773. bind_vcpu.port = evtchn;
  774. bind_vcpu.vcpu = tcpu;
  775. /*
  776. * If this fails, it usually just indicates that we're dealing with a
  777. * virq or IPI channel, which don't actually need to be rebound. Ignore
  778. * it, but don't do the xenlinux-level rebind in that case.
  779. */
  780. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  781. bind_evtchn_to_cpu(evtchn, tcpu);
  782. return 0;
  783. }
  784. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  785. {
  786. unsigned tcpu = cpumask_first(dest);
  787. return rebind_irq_to_cpu(irq, tcpu);
  788. }
  789. int resend_irq_on_evtchn(unsigned int irq)
  790. {
  791. int masked, evtchn = evtchn_from_irq(irq);
  792. struct shared_info *s = HYPERVISOR_shared_info;
  793. if (!VALID_EVTCHN(evtchn))
  794. return 1;
  795. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  796. sync_set_bit(evtchn, s->evtchn_pending);
  797. if (!masked)
  798. unmask_evtchn(evtchn);
  799. return 1;
  800. }
  801. static void enable_dynirq(unsigned int irq)
  802. {
  803. int evtchn = evtchn_from_irq(irq);
  804. if (VALID_EVTCHN(evtchn))
  805. unmask_evtchn(evtchn);
  806. }
  807. static void disable_dynirq(unsigned int irq)
  808. {
  809. int evtchn = evtchn_from_irq(irq);
  810. if (VALID_EVTCHN(evtchn))
  811. mask_evtchn(evtchn);
  812. }
  813. static void ack_dynirq(unsigned int irq)
  814. {
  815. int evtchn = evtchn_from_irq(irq);
  816. move_native_irq(irq);
  817. if (VALID_EVTCHN(evtchn))
  818. clear_evtchn(evtchn);
  819. }
  820. static int retrigger_dynirq(unsigned int irq)
  821. {
  822. int evtchn = evtchn_from_irq(irq);
  823. struct shared_info *sh = HYPERVISOR_shared_info;
  824. int ret = 0;
  825. if (VALID_EVTCHN(evtchn)) {
  826. int masked;
  827. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  828. sync_set_bit(evtchn, sh->evtchn_pending);
  829. if (!masked)
  830. unmask_evtchn(evtchn);
  831. ret = 1;
  832. }
  833. return ret;
  834. }
  835. static void restore_cpu_virqs(unsigned int cpu)
  836. {
  837. struct evtchn_bind_virq bind_virq;
  838. int virq, irq, evtchn;
  839. for (virq = 0; virq < NR_VIRQS; virq++) {
  840. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  841. continue;
  842. BUG_ON(virq_from_irq(irq) != virq);
  843. /* Get a new binding from Xen. */
  844. bind_virq.virq = virq;
  845. bind_virq.vcpu = cpu;
  846. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  847. &bind_virq) != 0)
  848. BUG();
  849. evtchn = bind_virq.port;
  850. /* Record the new mapping. */
  851. evtchn_to_irq[evtchn] = irq;
  852. irq_info[irq] = mk_virq_info(evtchn, virq);
  853. bind_evtchn_to_cpu(evtchn, cpu);
  854. /* Ready for use. */
  855. unmask_evtchn(evtchn);
  856. }
  857. }
  858. static void restore_cpu_ipis(unsigned int cpu)
  859. {
  860. struct evtchn_bind_ipi bind_ipi;
  861. int ipi, irq, evtchn;
  862. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  863. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  864. continue;
  865. BUG_ON(ipi_from_irq(irq) != ipi);
  866. /* Get a new binding from Xen. */
  867. bind_ipi.vcpu = cpu;
  868. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  869. &bind_ipi) != 0)
  870. BUG();
  871. evtchn = bind_ipi.port;
  872. /* Record the new mapping. */
  873. evtchn_to_irq[evtchn] = irq;
  874. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  875. bind_evtchn_to_cpu(evtchn, cpu);
  876. /* Ready for use. */
  877. unmask_evtchn(evtchn);
  878. }
  879. }
  880. /* Clear an irq's pending state, in preparation for polling on it */
  881. void xen_clear_irq_pending(int irq)
  882. {
  883. int evtchn = evtchn_from_irq(irq);
  884. if (VALID_EVTCHN(evtchn))
  885. clear_evtchn(evtchn);
  886. }
  887. void xen_set_irq_pending(int irq)
  888. {
  889. int evtchn = evtchn_from_irq(irq);
  890. if (VALID_EVTCHN(evtchn))
  891. set_evtchn(evtchn);
  892. }
  893. bool xen_test_irq_pending(int irq)
  894. {
  895. int evtchn = evtchn_from_irq(irq);
  896. bool ret = false;
  897. if (VALID_EVTCHN(evtchn))
  898. ret = test_evtchn(evtchn);
  899. return ret;
  900. }
  901. /* Poll waiting for an irq to become pending. In the usual case, the
  902. irq will be disabled so it won't deliver an interrupt. */
  903. void xen_poll_irq(int irq)
  904. {
  905. evtchn_port_t evtchn = evtchn_from_irq(irq);
  906. if (VALID_EVTCHN(evtchn)) {
  907. struct sched_poll poll;
  908. poll.nr_ports = 1;
  909. poll.timeout = 0;
  910. set_xen_guest_handle(poll.ports, &evtchn);
  911. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  912. BUG();
  913. }
  914. }
  915. void xen_irq_resume(void)
  916. {
  917. unsigned int cpu, irq, evtchn;
  918. init_evtchn_cpu_bindings();
  919. /* New event-channel space is not 'live' yet. */
  920. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  921. mask_evtchn(evtchn);
  922. /* No IRQ <-> event-channel mappings. */
  923. for (irq = 0; irq < nr_irqs; irq++)
  924. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  925. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  926. evtchn_to_irq[evtchn] = -1;
  927. for_each_possible_cpu(cpu) {
  928. restore_cpu_virqs(cpu);
  929. restore_cpu_ipis(cpu);
  930. }
  931. }
  932. static struct irq_chip xen_dynamic_chip __read_mostly = {
  933. .name = "xen-dyn",
  934. .disable = disable_dynirq,
  935. .mask = disable_dynirq,
  936. .unmask = enable_dynirq,
  937. .ack = ack_dynirq,
  938. .set_affinity = set_affinity_irq,
  939. .retrigger = retrigger_dynirq,
  940. };
  941. static struct irq_chip xen_pirq_chip __read_mostly = {
  942. .name = "xen-pirq",
  943. .startup = startup_pirq,
  944. .shutdown = shutdown_pirq,
  945. .enable = enable_pirq,
  946. .unmask = enable_pirq,
  947. .disable = disable_pirq,
  948. .mask = disable_pirq,
  949. .ack = ack_pirq,
  950. .end = end_pirq,
  951. .set_affinity = set_affinity_irq,
  952. .retrigger = retrigger_dynirq,
  953. };
  954. static struct irq_chip xen_percpu_chip __read_mostly = {
  955. .name = "xen-percpu",
  956. .disable = disable_dynirq,
  957. .mask = disable_dynirq,
  958. .unmask = enable_dynirq,
  959. .ack = ack_dynirq,
  960. };
  961. int xen_set_callback_via(uint64_t via)
  962. {
  963. struct xen_hvm_param a;
  964. a.domid = DOMID_SELF;
  965. a.index = HVM_PARAM_CALLBACK_IRQ;
  966. a.value = via;
  967. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  968. }
  969. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  970. #ifdef CONFIG_XEN_PVHVM
  971. /* Vector callbacks are better than PCI interrupts to receive event
  972. * channel notifications because we can receive vector callbacks on any
  973. * vcpu and we don't need PCI support or APIC interactions. */
  974. void xen_callback_vector(void)
  975. {
  976. int rc;
  977. uint64_t callback_via;
  978. if (xen_have_vector_callback) {
  979. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  980. rc = xen_set_callback_via(callback_via);
  981. if (rc) {
  982. printk(KERN_ERR "Request for Xen HVM callback vector"
  983. " failed.\n");
  984. xen_have_vector_callback = 0;
  985. return;
  986. }
  987. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  988. "enabled\n");
  989. /* in the restore case the vector has already been allocated */
  990. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  991. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  992. }
  993. }
  994. #else
  995. void xen_callback_vector(void) {}
  996. #endif
  997. void __init xen_init_IRQ(void)
  998. {
  999. int i;
  1000. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1001. GFP_KERNEL);
  1002. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1003. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1004. GFP_KERNEL);
  1005. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1006. evtchn_to_irq[i] = -1;
  1007. init_evtchn_cpu_bindings();
  1008. /* No event channels are 'live' right now. */
  1009. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1010. mask_evtchn(i);
  1011. if (xen_hvm_domain()) {
  1012. xen_callback_vector();
  1013. native_init_IRQ();
  1014. } else {
  1015. irq_ctx_init(smp_processor_id());
  1016. }
  1017. }