book3s_64_mmu_host.c 10 KB

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  1. /*
  2. * Copyright (C) 2009 SUSE Linux Products GmbH. All rights reserved.
  3. *
  4. * Authors:
  5. * Alexander Graf <agraf@suse.de>
  6. * Kevin Wolf <mail@kevin-wolf.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License, version 2, as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kvm_host.h>
  22. #include <linux/hash.h>
  23. #include <asm/kvm_ppc.h>
  24. #include <asm/kvm_book3s.h>
  25. #include <asm/mmu-hash64.h>
  26. #include <asm/machdep.h>
  27. #include <asm/mmu_context.h>
  28. #include <asm/hw_irq.h>
  29. #define PTE_SIZE 12
  30. #define VSID_ALL 0
  31. /* #define DEBUG_MMU */
  32. /* #define DEBUG_SLB */
  33. #ifdef DEBUG_MMU
  34. #define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  35. #else
  36. #define dprintk_mmu(a, ...) do { } while(0)
  37. #endif
  38. #ifdef DEBUG_SLB
  39. #define dprintk_slb(a, ...) printk(KERN_INFO a, __VA_ARGS__)
  40. #else
  41. #define dprintk_slb(a, ...) do { } while(0)
  42. #endif
  43. static void invalidate_pte(struct hpte_cache *pte)
  44. {
  45. dprintk_mmu("KVM: Flushing SPT: 0x%lx (0x%llx) -> 0x%llx\n",
  46. pte->pte.eaddr, pte->pte.vpage, pte->host_va);
  47. ppc_md.hpte_invalidate(pte->slot, pte->host_va,
  48. MMU_PAGE_4K, MMU_SEGSIZE_256M,
  49. false);
  50. pte->host_va = 0;
  51. if (pte->pte.may_write)
  52. kvm_release_pfn_dirty(pte->pfn);
  53. else
  54. kvm_release_pfn_clean(pte->pfn);
  55. }
  56. void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
  57. {
  58. int i;
  59. dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%lx & 0x%lx\n",
  60. vcpu->arch.hpte_cache_offset, guest_ea, ea_mask);
  61. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  62. guest_ea &= ea_mask;
  63. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  64. struct hpte_cache *pte;
  65. pte = &vcpu->arch.hpte_cache[i];
  66. if (!pte->host_va)
  67. continue;
  68. if ((pte->pte.eaddr & ea_mask) == guest_ea) {
  69. invalidate_pte(pte);
  70. }
  71. }
  72. /* Doing a complete flush -> start from scratch */
  73. if (!ea_mask)
  74. vcpu->arch.hpte_cache_offset = 0;
  75. }
  76. void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask)
  77. {
  78. int i;
  79. dprintk_mmu("KVM: Flushing %d Shadow vPTEs: 0x%llx & 0x%llx\n",
  80. vcpu->arch.hpte_cache_offset, guest_vp, vp_mask);
  81. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  82. guest_vp &= vp_mask;
  83. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  84. struct hpte_cache *pte;
  85. pte = &vcpu->arch.hpte_cache[i];
  86. if (!pte->host_va)
  87. continue;
  88. if ((pte->pte.vpage & vp_mask) == guest_vp) {
  89. invalidate_pte(pte);
  90. }
  91. }
  92. }
  93. void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end)
  94. {
  95. int i;
  96. dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%lx & 0x%lx\n",
  97. vcpu->arch.hpte_cache_offset, pa_start, pa_end);
  98. BUG_ON(vcpu->arch.hpte_cache_offset > HPTEG_CACHE_NUM);
  99. for (i = 0; i < vcpu->arch.hpte_cache_offset; i++) {
  100. struct hpte_cache *pte;
  101. pte = &vcpu->arch.hpte_cache[i];
  102. if (!pte->host_va)
  103. continue;
  104. if ((pte->pte.raddr >= pa_start) &&
  105. (pte->pte.raddr < pa_end)) {
  106. invalidate_pte(pte);
  107. }
  108. }
  109. }
  110. static int kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu)
  111. {
  112. if (vcpu->arch.hpte_cache_offset == HPTEG_CACHE_NUM)
  113. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  114. return vcpu->arch.hpte_cache_offset++;
  115. }
  116. /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
  117. * a hash, so we don't waste cycles on looping */
  118. static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
  119. {
  120. return hash_64(gvsid, SID_MAP_BITS);
  121. }
  122. static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
  123. {
  124. struct kvmppc_sid_map *map;
  125. u16 sid_map_mask;
  126. if (vcpu->arch.msr & MSR_PR)
  127. gvsid |= VSID_PR;
  128. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  129. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  130. if (map->guest_vsid == gvsid) {
  131. dprintk_slb("SLB: Searching: 0x%llx -> 0x%llx\n",
  132. gvsid, map->host_vsid);
  133. return map;
  134. }
  135. map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
  136. if (map->guest_vsid == gvsid) {
  137. dprintk_slb("SLB: Searching 0x%llx -> 0x%llx\n",
  138. gvsid, map->host_vsid);
  139. return map;
  140. }
  141. dprintk_slb("SLB: Searching %d/%d: 0x%llx -> not found\n",
  142. sid_map_mask, SID_MAP_MASK - sid_map_mask, gvsid);
  143. return NULL;
  144. }
  145. int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
  146. {
  147. pfn_t hpaddr;
  148. ulong hash, hpteg, va;
  149. u64 vsid;
  150. int ret;
  151. int rflags = 0x192;
  152. int vflags = 0;
  153. int attempt = 0;
  154. struct kvmppc_sid_map *map;
  155. /* Get host physical address for gpa */
  156. hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  157. if (kvm_is_error_hva(hpaddr)) {
  158. printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", orig_pte->eaddr);
  159. return -EINVAL;
  160. }
  161. hpaddr <<= PAGE_SHIFT;
  162. #if PAGE_SHIFT == 12
  163. #elif PAGE_SHIFT == 16
  164. hpaddr |= orig_pte->raddr & 0xf000;
  165. #else
  166. #error Unknown page size
  167. #endif
  168. /* and write the mapping ea -> hpa into the pt */
  169. vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
  170. map = find_sid_vsid(vcpu, vsid);
  171. if (!map) {
  172. ret = kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr);
  173. WARN_ON(ret < 0);
  174. map = find_sid_vsid(vcpu, vsid);
  175. }
  176. if (!map) {
  177. printk(KERN_ERR "KVM: Segment map for 0x%llx (0x%lx) failed\n",
  178. vsid, orig_pte->eaddr);
  179. WARN_ON(true);
  180. return -EINVAL;
  181. }
  182. vsid = map->host_vsid;
  183. va = hpt_va(orig_pte->eaddr, vsid, MMU_SEGSIZE_256M);
  184. if (!orig_pte->may_write)
  185. rflags |= HPTE_R_PP;
  186. else
  187. mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
  188. if (!orig_pte->may_execute)
  189. rflags |= HPTE_R_N;
  190. hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
  191. map_again:
  192. hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
  193. /* In case we tried normal mapping already, let's nuke old entries */
  194. if (attempt > 1)
  195. if (ppc_md.hpte_remove(hpteg) < 0)
  196. return -1;
  197. ret = ppc_md.hpte_insert(hpteg, va, hpaddr, rflags, vflags, MMU_PAGE_4K, MMU_SEGSIZE_256M);
  198. if (ret < 0) {
  199. /* If we couldn't map a primary PTE, try a secondary */
  200. hash = ~hash;
  201. vflags ^= HPTE_V_SECONDARY;
  202. attempt++;
  203. goto map_again;
  204. } else {
  205. int hpte_id = kvmppc_mmu_hpte_cache_next(vcpu);
  206. struct hpte_cache *pte = &vcpu->arch.hpte_cache[hpte_id];
  207. dprintk_mmu("KVM: %c%c Map 0x%lx: [%lx] 0x%lx (0x%llx) -> %lx\n",
  208. ((rflags & HPTE_R_PP) == 3) ? '-' : 'w',
  209. (rflags & HPTE_R_N) ? '-' : 'x',
  210. orig_pte->eaddr, hpteg, va, orig_pte->vpage, hpaddr);
  211. /* The ppc_md code may give us a secondary entry even though we
  212. asked for a primary. Fix up. */
  213. if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) {
  214. hash = ~hash;
  215. hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
  216. }
  217. pte->slot = hpteg + (ret & 7);
  218. pte->host_va = va;
  219. pte->pte = *orig_pte;
  220. pte->pfn = hpaddr >> PAGE_SHIFT;
  221. }
  222. return 0;
  223. }
  224. static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
  225. {
  226. struct kvmppc_sid_map *map;
  227. struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
  228. u16 sid_map_mask;
  229. static int backwards_map = 0;
  230. if (vcpu->arch.msr & MSR_PR)
  231. gvsid |= VSID_PR;
  232. /* We might get collisions that trap in preceding order, so let's
  233. map them differently */
  234. sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
  235. if (backwards_map)
  236. sid_map_mask = SID_MAP_MASK - sid_map_mask;
  237. map = &to_book3s(vcpu)->sid_map[sid_map_mask];
  238. /* Make sure we're taking the other map next time */
  239. backwards_map = !backwards_map;
  240. /* Uh-oh ... out of mappings. Let's flush! */
  241. if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) {
  242. vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
  243. memset(vcpu_book3s->sid_map, 0,
  244. sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
  245. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  246. kvmppc_mmu_flush_segments(vcpu);
  247. }
  248. map->host_vsid = vcpu_book3s->vsid_next++;
  249. map->guest_vsid = gvsid;
  250. map->valid = true;
  251. dprintk_slb("SLB: New mapping at %d: 0x%llx -> 0x%llx\n",
  252. sid_map_mask, gvsid, map->host_vsid);
  253. return map;
  254. }
  255. static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid)
  256. {
  257. int i;
  258. int max_slb_size = 64;
  259. int found_inval = -1;
  260. int r;
  261. if (!to_svcpu(vcpu)->slb_max)
  262. to_svcpu(vcpu)->slb_max = 1;
  263. /* Are we overwriting? */
  264. for (i = 1; i < to_svcpu(vcpu)->slb_max; i++) {
  265. if (!(to_svcpu(vcpu)->slb[i].esid & SLB_ESID_V))
  266. found_inval = i;
  267. else if ((to_svcpu(vcpu)->slb[i].esid & ESID_MASK) == esid)
  268. return i;
  269. }
  270. /* Found a spare entry that was invalidated before */
  271. if (found_inval > 0)
  272. return found_inval;
  273. /* No spare invalid entry, so create one */
  274. if (mmu_slb_size < 64)
  275. max_slb_size = mmu_slb_size;
  276. /* Overflowing -> purge */
  277. if ((to_svcpu(vcpu)->slb_max) == max_slb_size)
  278. kvmppc_mmu_flush_segments(vcpu);
  279. r = to_svcpu(vcpu)->slb_max;
  280. to_svcpu(vcpu)->slb_max++;
  281. return r;
  282. }
  283. int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
  284. {
  285. u64 esid = eaddr >> SID_SHIFT;
  286. u64 slb_esid = (eaddr & ESID_MASK) | SLB_ESID_V;
  287. u64 slb_vsid = SLB_VSID_USER;
  288. u64 gvsid;
  289. int slb_index;
  290. struct kvmppc_sid_map *map;
  291. slb_index = kvmppc_mmu_next_segment(vcpu, eaddr & ESID_MASK);
  292. if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
  293. /* Invalidate an entry */
  294. to_svcpu(vcpu)->slb[slb_index].esid = 0;
  295. return -ENOENT;
  296. }
  297. map = find_sid_vsid(vcpu, gvsid);
  298. if (!map)
  299. map = create_sid_map(vcpu, gvsid);
  300. map->guest_esid = esid;
  301. slb_vsid |= (map->host_vsid << 12);
  302. slb_vsid &= ~SLB_VSID_KP;
  303. slb_esid |= slb_index;
  304. to_svcpu(vcpu)->slb[slb_index].esid = slb_esid;
  305. to_svcpu(vcpu)->slb[slb_index].vsid = slb_vsid;
  306. dprintk_slb("slbmte %#llx, %#llx\n", slb_vsid, slb_esid);
  307. return 0;
  308. }
  309. void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
  310. {
  311. to_svcpu(vcpu)->slb_max = 1;
  312. to_svcpu(vcpu)->slb[0].esid = 0;
  313. }
  314. void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
  315. {
  316. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  317. __destroy_context(to_book3s(vcpu)->context_id);
  318. }
  319. int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
  320. {
  321. struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
  322. int err;
  323. err = __init_new_context();
  324. if (err < 0)
  325. return -1;
  326. vcpu3s->context_id = err;
  327. vcpu3s->vsid_max = ((vcpu3s->context_id + 1) << USER_ESID_BITS) - 1;
  328. vcpu3s->vsid_first = vcpu3s->context_id << USER_ESID_BITS;
  329. vcpu3s->vsid_next = vcpu3s->vsid_first;
  330. return 0;
  331. }