intelfb.h 5.8 KB

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  1. #ifndef _INTELFB_H
  2. #define _INTELFB_H
  3. /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
  4. #include <linux/agp_backend.h>
  5. #include <linux/fb.h>
  6. /*** Version/name ***/
  7. #define INTELFB_VERSION "0.9.4"
  8. #define INTELFB_MODULE_NAME "intelfb"
  9. #define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM"
  10. /*** Debug/feature defines ***/
  11. #ifndef DEBUG
  12. #define DEBUG 0
  13. #endif
  14. #ifndef VERBOSE
  15. #define VERBOSE 0
  16. #endif
  17. #ifndef REGDUMP
  18. #define REGDUMP 0
  19. #endif
  20. #ifndef DETECT_VGA_CLASS_ONLY
  21. #define DETECT_VGA_CLASS_ONLY 1
  22. #endif
  23. #ifndef ALLOCATE_FOR_PANNING
  24. #define ALLOCATE_FOR_PANNING 1
  25. #endif
  26. #ifndef PREFERRED_MODE
  27. #define PREFERRED_MODE "1024x768-32@70"
  28. #endif
  29. /*** hw-related values ***/
  30. /* Resource Allocation */
  31. #define INTELFB_FB_ACQUIRED 1
  32. #define INTELFB_MMIO_ACQUIRED 2
  33. /* PCI ids for supported devices */
  34. #define PCI_DEVICE_ID_INTEL_830M 0x3577
  35. #define PCI_DEVICE_ID_INTEL_845G 0x2562
  36. #define PCI_DEVICE_ID_INTEL_85XGM 0x3582
  37. #define PCI_DEVICE_ID_INTEL_865G 0x2572
  38. #define PCI_DEVICE_ID_INTEL_915G 0x2582
  39. #define PCI_DEVICE_ID_INTEL_915GM 0x2592
  40. #define PCI_DEVICE_ID_INTEL_945G 0x2772
  41. #define PCI_DEVICE_ID_INTEL_945GM 0x27A2
  42. /* Size of MMIO region */
  43. #define INTEL_REG_SIZE 0x80000
  44. #define STRIDE_ALIGNMENT 16
  45. #define PALETTE_8_ENTRIES 256
  46. /*** Macros ***/
  47. /* basic arithmetic */
  48. #define KB(x) ((x) * 1024)
  49. #define MB(x) ((x) * 1024 * 1024)
  50. #define BtoKB(x) ((x) / 1024)
  51. #define BtoMB(x) ((x) / 1024 / 1024)
  52. #define GTT_PAGE_SIZE KB(4)
  53. #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
  54. #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
  55. #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
  56. #define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
  57. /* messages */
  58. #define PFX INTELFB_MODULE_NAME ": "
  59. #define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
  60. #define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
  61. #define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
  62. #define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
  63. #if DEBUG
  64. #define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
  65. #else
  66. #define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
  67. #endif
  68. /* get commonly used pointers */
  69. #define GET_DINFO(info) (info)->par
  70. /* misc macros */
  71. #define ACCEL(d, i) \
  72. ((d)->accel && !(d)->ring_lockup && \
  73. ((i)->var.accel_flags & FB_ACCELF_TEXT))
  74. /*#define NOACCEL_CHIPSET(d) \
  75. ((d)->chipset != INTEL_865G)*/
  76. #define NOACCEL_CHIPSET(d) \
  77. (0)
  78. #define FIXED_MODE(d) ((d)->fixed_mode)
  79. /*** Driver paramters ***/
  80. #define RINGBUFFER_SIZE KB(64)
  81. #define HW_CURSOR_SIZE KB(4)
  82. /* Intel agpgart driver */
  83. #define AGP_PHYSICAL_MEMORY 2
  84. /*** Data Types ***/
  85. /* supported chipsets */
  86. enum intel_chips {
  87. INTEL_830M,
  88. INTEL_845G,
  89. INTEL_85XGM,
  90. INTEL_852GM,
  91. INTEL_852GME,
  92. INTEL_855GM,
  93. INTEL_855GME,
  94. INTEL_865G,
  95. INTEL_915G,
  96. INTEL_915GM,
  97. INTEL_945G,
  98. INTEL_945GM,
  99. };
  100. struct intelfb_hwstate {
  101. u32 vga0_divisor;
  102. u32 vga1_divisor;
  103. u32 vga_pd;
  104. u32 dpll_a;
  105. u32 dpll_b;
  106. u32 fpa0;
  107. u32 fpa1;
  108. u32 fpb0;
  109. u32 fpb1;
  110. u32 palette_a[PALETTE_8_ENTRIES];
  111. u32 palette_b[PALETTE_8_ENTRIES];
  112. u32 htotal_a;
  113. u32 hblank_a;
  114. u32 hsync_a;
  115. u32 vtotal_a;
  116. u32 vblank_a;
  117. u32 vsync_a;
  118. u32 src_size_a;
  119. u32 bclrpat_a;
  120. u32 htotal_b;
  121. u32 hblank_b;
  122. u32 hsync_b;
  123. u32 vtotal_b;
  124. u32 vblank_b;
  125. u32 vsync_b;
  126. u32 src_size_b;
  127. u32 bclrpat_b;
  128. u32 adpa;
  129. u32 dvoa;
  130. u32 dvob;
  131. u32 dvoc;
  132. u32 dvoa_srcdim;
  133. u32 dvob_srcdim;
  134. u32 dvoc_srcdim;
  135. u32 lvds;
  136. u32 pipe_a_conf;
  137. u32 pipe_b_conf;
  138. u32 disp_arb;
  139. u32 cursor_a_control;
  140. u32 cursor_b_control;
  141. u32 cursor_a_base;
  142. u32 cursor_b_base;
  143. u32 cursor_size;
  144. u32 disp_a_ctrl;
  145. u32 disp_b_ctrl;
  146. u32 disp_a_base;
  147. u32 disp_b_base;
  148. u32 cursor_a_palette[4];
  149. u32 cursor_b_palette[4];
  150. u32 disp_a_stride;
  151. u32 disp_b_stride;
  152. u32 vgacntrl;
  153. u32 add_id;
  154. u32 swf0x[7];
  155. u32 swf1x[7];
  156. u32 swf3x[3];
  157. u32 fence[8];
  158. u32 instpm;
  159. u32 mem_mode;
  160. u32 fw_blc_0;
  161. u32 fw_blc_1;
  162. };
  163. struct intelfb_heap_data {
  164. u32 physical;
  165. u8 __iomem *virtual;
  166. u32 offset; // in GATT pages
  167. u32 size; // in bytes
  168. };
  169. struct intelfb_info {
  170. struct fb_info *info;
  171. struct fb_ops *fbops;
  172. struct pci_dev *pdev;
  173. struct intelfb_hwstate save_state;
  174. /* agpgart structs */
  175. struct agp_memory *gtt_fb_mem; // use all stolen memory or vram
  176. struct agp_memory *gtt_ring_mem; // ring buffer
  177. struct agp_memory *gtt_cursor_mem; // hw cursor
  178. /* use a gart reserved fb mem */
  179. u8 fbmem_gart;
  180. /* mtrr support */
  181. u32 mtrr_reg;
  182. u32 has_mtrr;
  183. /* heap data */
  184. struct intelfb_heap_data aperture;
  185. struct intelfb_heap_data fb;
  186. struct intelfb_heap_data ring;
  187. struct intelfb_heap_data cursor;
  188. /* mmio regs */
  189. u32 mmio_base_phys;
  190. u8 __iomem *mmio_base;
  191. /* fb start offset (in bytes) */
  192. u32 fb_start;
  193. /* ring buffer */
  194. u8 __iomem *ring_head;
  195. u32 ring_tail;
  196. u32 ring_tail_mask;
  197. u32 ring_space;
  198. u32 ring_lockup;
  199. /* palette */
  200. u32 pseudo_palette[17];
  201. /* chip info */
  202. int pci_chipset;
  203. int chipset;
  204. const char *name;
  205. int mobile;
  206. /* current mode */
  207. int bpp, depth;
  208. u32 visual;
  209. int xres, yres, pitch;
  210. int pixclock;
  211. /* current pipe */
  212. int pipe;
  213. /* some flags */
  214. int accel;
  215. int hwcursor;
  216. int fixed_mode;
  217. int ring_active;
  218. int flag;
  219. /* hw cursor */
  220. int cursor_on;
  221. int cursor_blanked;
  222. u8 cursor_src[64];
  223. /* initial parameters */
  224. int initial_vga;
  225. struct fb_var_screeninfo initial_var;
  226. u32 initial_fb_base;
  227. u32 initial_video_ram;
  228. u32 initial_pitch;
  229. /* driver registered */
  230. int registered;
  231. /* index into plls */
  232. int pll_index;
  233. };
  234. #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G)||(dinfo->chipset == INTEL_915GM)||((dinfo)->chipset == INTEL_945G)||(dinfo->chipset==INTEL_945GM))
  235. /*** function prototypes ***/
  236. extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
  237. #endif /* _INTELFB_H */