exynos_thermal.c 28 KB

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  1. /*
  2. * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
  3. *
  4. * Copyright (C) 2011 Samsung Electronics
  5. * Donggeun Kim <dg77.kim@samsung.com>
  6. * Amit Daniel Kachhap <amit.kachhap@linaro.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/workqueue.h>
  31. #include <linux/sysfs.h>
  32. #include <linux/kobject.h>
  33. #include <linux/io.h>
  34. #include <linux/mutex.h>
  35. #include <linux/platform_data/exynos_thermal.h>
  36. #include <linux/thermal.h>
  37. #include <linux/cpufreq.h>
  38. #include <linux/cpu_cooling.h>
  39. #include <linux/of.h>
  40. #include <plat/cpu.h>
  41. /* Exynos generic registers */
  42. #define EXYNOS_TMU_REG_TRIMINFO 0x0
  43. #define EXYNOS_TMU_REG_CONTROL 0x20
  44. #define EXYNOS_TMU_REG_STATUS 0x28
  45. #define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
  46. #define EXYNOS_TMU_REG_INTEN 0x70
  47. #define EXYNOS_TMU_REG_INTSTAT 0x74
  48. #define EXYNOS_TMU_REG_INTCLEAR 0x78
  49. #define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
  50. #define EXYNOS_TMU_GAIN_SHIFT 8
  51. #define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
  52. #define EXYNOS_TMU_CORE_ON 3
  53. #define EXYNOS_TMU_CORE_OFF 2
  54. #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
  55. /* Exynos4210 specific registers */
  56. #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
  57. #define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
  58. #define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
  59. #define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
  60. #define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
  61. #define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
  62. #define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
  63. #define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
  64. #define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
  65. #define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1
  66. #define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10
  67. #define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100
  68. #define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000
  69. #define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111
  70. /* Exynos5250 and Exynos4412 specific registers */
  71. #define EXYNOS_TMU_TRIMINFO_CON 0x14
  72. #define EXYNOS_THD_TEMP_RISE 0x50
  73. #define EXYNOS_THD_TEMP_FALL 0x54
  74. #define EXYNOS_EMUL_CON 0x80
  75. #define EXYNOS_TRIMINFO_RELOAD 0x1
  76. #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
  77. #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
  78. #define EXYNOS_MUX_ADDR_VALUE 6
  79. #define EXYNOS_MUX_ADDR_SHIFT 20
  80. #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
  81. #define EFUSE_MIN_VALUE 40
  82. #define EFUSE_MAX_VALUE 100
  83. /* In-kernel thermal framework related macros & definations */
  84. #define SENSOR_NAME_LEN 16
  85. #define MAX_TRIP_COUNT 8
  86. #define MAX_COOLING_DEVICE 4
  87. #define ACTIVE_INTERVAL 500
  88. #define IDLE_INTERVAL 10000
  89. #define MCELSIUS 1000
  90. #ifdef CONFIG_EXYNOS_THERMAL_EMUL
  91. #define EXYNOS_EMUL_TIME 0x57F0
  92. #define EXYNOS_EMUL_TIME_SHIFT 16
  93. #define EXYNOS_EMUL_DATA_SHIFT 8
  94. #define EXYNOS_EMUL_DATA_MASK 0xFF
  95. #define EXYNOS_EMUL_ENABLE 0x1
  96. #endif /* CONFIG_EXYNOS_THERMAL_EMUL */
  97. /* CPU Zone information */
  98. #define PANIC_ZONE 4
  99. #define WARN_ZONE 3
  100. #define MONITOR_ZONE 2
  101. #define SAFE_ZONE 1
  102. #define GET_ZONE(trip) (trip + 2)
  103. #define GET_TRIP(zone) (zone - 2)
  104. #define EXYNOS_ZONE_COUNT 3
  105. struct exynos_tmu_data {
  106. struct exynos_tmu_platform_data *pdata;
  107. struct resource *mem;
  108. void __iomem *base;
  109. int irq;
  110. enum soc_type soc;
  111. struct work_struct irq_work;
  112. struct mutex lock;
  113. struct clk *clk;
  114. u8 temp_error1, temp_error2;
  115. };
  116. struct thermal_trip_point_conf {
  117. int trip_val[MAX_TRIP_COUNT];
  118. int trip_count;
  119. };
  120. struct thermal_cooling_conf {
  121. struct freq_clip_table freq_data[MAX_TRIP_COUNT];
  122. int freq_clip_count;
  123. };
  124. struct thermal_sensor_conf {
  125. char name[SENSOR_NAME_LEN];
  126. int (*read_temperature)(void *data);
  127. struct thermal_trip_point_conf trip_data;
  128. struct thermal_cooling_conf cooling_data;
  129. void *private_data;
  130. };
  131. struct exynos_thermal_zone {
  132. enum thermal_device_mode mode;
  133. struct thermal_zone_device *therm_dev;
  134. struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
  135. unsigned int cool_dev_size;
  136. struct platform_device *exynos4_dev;
  137. struct thermal_sensor_conf *sensor_conf;
  138. bool bind;
  139. };
  140. static struct exynos_thermal_zone *th_zone;
  141. static void exynos_unregister_thermal(void);
  142. static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
  143. /* Get mode callback functions for thermal zone */
  144. static int exynos_get_mode(struct thermal_zone_device *thermal,
  145. enum thermal_device_mode *mode)
  146. {
  147. if (th_zone)
  148. *mode = th_zone->mode;
  149. return 0;
  150. }
  151. /* Set mode callback functions for thermal zone */
  152. static int exynos_set_mode(struct thermal_zone_device *thermal,
  153. enum thermal_device_mode mode)
  154. {
  155. if (!th_zone->therm_dev) {
  156. pr_notice("thermal zone not registered\n");
  157. return 0;
  158. }
  159. mutex_lock(&th_zone->therm_dev->lock);
  160. if (mode == THERMAL_DEVICE_ENABLED)
  161. th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
  162. else
  163. th_zone->therm_dev->polling_delay = 0;
  164. mutex_unlock(&th_zone->therm_dev->lock);
  165. th_zone->mode = mode;
  166. thermal_zone_device_update(th_zone->therm_dev);
  167. pr_info("thermal polling set for duration=%d msec\n",
  168. th_zone->therm_dev->polling_delay);
  169. return 0;
  170. }
  171. /* Get trip type callback functions for thermal zone */
  172. static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
  173. enum thermal_trip_type *type)
  174. {
  175. switch (GET_ZONE(trip)) {
  176. case MONITOR_ZONE:
  177. case WARN_ZONE:
  178. *type = THERMAL_TRIP_ACTIVE;
  179. break;
  180. case PANIC_ZONE:
  181. *type = THERMAL_TRIP_CRITICAL;
  182. break;
  183. default:
  184. return -EINVAL;
  185. }
  186. return 0;
  187. }
  188. /* Get trip temperature callback functions for thermal zone */
  189. static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
  190. unsigned long *temp)
  191. {
  192. if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
  193. return -EINVAL;
  194. *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
  195. /* convert the temperature into millicelsius */
  196. *temp = *temp * MCELSIUS;
  197. return 0;
  198. }
  199. /* Get critical temperature callback functions for thermal zone */
  200. static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
  201. unsigned long *temp)
  202. {
  203. int ret;
  204. /* Panic zone */
  205. ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
  206. return ret;
  207. }
  208. static int exynos_get_frequency_level(unsigned int cpu, unsigned int freq)
  209. {
  210. int i = 0, ret = -EINVAL;
  211. struct cpufreq_frequency_table *table = NULL;
  212. #ifdef CONFIG_CPU_FREQ
  213. table = cpufreq_frequency_get_table(cpu);
  214. #endif
  215. if (!table)
  216. return ret;
  217. while (table[i].frequency != CPUFREQ_TABLE_END) {
  218. if (table[i].frequency == CPUFREQ_ENTRY_INVALID)
  219. continue;
  220. if (table[i].frequency == freq)
  221. return i;
  222. i++;
  223. }
  224. return ret;
  225. }
  226. /* Bind callback functions for thermal zone */
  227. static int exynos_bind(struct thermal_zone_device *thermal,
  228. struct thermal_cooling_device *cdev)
  229. {
  230. int ret = 0, i, tab_size, level;
  231. struct freq_clip_table *tab_ptr, *clip_data;
  232. struct thermal_sensor_conf *data = th_zone->sensor_conf;
  233. tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
  234. tab_size = data->cooling_data.freq_clip_count;
  235. if (tab_ptr == NULL || tab_size == 0)
  236. return -EINVAL;
  237. /* find the cooling device registered*/
  238. for (i = 0; i < th_zone->cool_dev_size; i++)
  239. if (cdev == th_zone->cool_dev[i])
  240. break;
  241. /* No matching cooling device */
  242. if (i == th_zone->cool_dev_size)
  243. return 0;
  244. /* Bind the thermal zone to the cpufreq cooling device */
  245. for (i = 0; i < tab_size; i++) {
  246. clip_data = (struct freq_clip_table *)&(tab_ptr[i]);
  247. level = exynos_get_frequency_level(0, clip_data->freq_clip_max);
  248. if (level < 0)
  249. return 0;
  250. switch (GET_ZONE(i)) {
  251. case MONITOR_ZONE:
  252. case WARN_ZONE:
  253. if (thermal_zone_bind_cooling_device(thermal, i, cdev,
  254. level, level)) {
  255. pr_err("error binding cdev inst %d\n", i);
  256. ret = -EINVAL;
  257. }
  258. th_zone->bind = true;
  259. break;
  260. default:
  261. ret = -EINVAL;
  262. }
  263. }
  264. return ret;
  265. }
  266. /* Unbind callback functions for thermal zone */
  267. static int exynos_unbind(struct thermal_zone_device *thermal,
  268. struct thermal_cooling_device *cdev)
  269. {
  270. int ret = 0, i, tab_size;
  271. struct thermal_sensor_conf *data = th_zone->sensor_conf;
  272. if (th_zone->bind == false)
  273. return 0;
  274. tab_size = data->cooling_data.freq_clip_count;
  275. if (tab_size == 0)
  276. return -EINVAL;
  277. /* find the cooling device registered*/
  278. for (i = 0; i < th_zone->cool_dev_size; i++)
  279. if (cdev == th_zone->cool_dev[i])
  280. break;
  281. /* No matching cooling device */
  282. if (i == th_zone->cool_dev_size)
  283. return 0;
  284. /* Bind the thermal zone to the cpufreq cooling device */
  285. for (i = 0; i < tab_size; i++) {
  286. switch (GET_ZONE(i)) {
  287. case MONITOR_ZONE:
  288. case WARN_ZONE:
  289. if (thermal_zone_unbind_cooling_device(thermal, i,
  290. cdev)) {
  291. pr_err("error unbinding cdev inst=%d\n", i);
  292. ret = -EINVAL;
  293. }
  294. th_zone->bind = false;
  295. break;
  296. default:
  297. ret = -EINVAL;
  298. }
  299. }
  300. return ret;
  301. }
  302. /* Get temperature callback functions for thermal zone */
  303. static int exynos_get_temp(struct thermal_zone_device *thermal,
  304. unsigned long *temp)
  305. {
  306. void *data;
  307. if (!th_zone->sensor_conf) {
  308. pr_info("Temperature sensor not initialised\n");
  309. return -EINVAL;
  310. }
  311. data = th_zone->sensor_conf->private_data;
  312. *temp = th_zone->sensor_conf->read_temperature(data);
  313. /* convert the temperature into millicelsius */
  314. *temp = *temp * MCELSIUS;
  315. return 0;
  316. }
  317. /* Get the temperature trend */
  318. static int exynos_get_trend(struct thermal_zone_device *thermal,
  319. int trip, enum thermal_trend *trend)
  320. {
  321. int ret;
  322. unsigned long trip_temp;
  323. ret = exynos_get_trip_temp(thermal, trip, &trip_temp);
  324. if (ret < 0)
  325. return ret;
  326. if (thermal->temperature >= trip_temp)
  327. *trend = THERMAL_TREND_RAISING;
  328. else
  329. *trend = THERMAL_TREND_DROPPING;
  330. return 0;
  331. }
  332. /* Operation callback functions for thermal zone */
  333. static struct thermal_zone_device_ops const exynos_dev_ops = {
  334. .bind = exynos_bind,
  335. .unbind = exynos_unbind,
  336. .get_temp = exynos_get_temp,
  337. .get_trend = exynos_get_trend,
  338. .get_mode = exynos_get_mode,
  339. .set_mode = exynos_set_mode,
  340. .get_trip_type = exynos_get_trip_type,
  341. .get_trip_temp = exynos_get_trip_temp,
  342. .get_crit_temp = exynos_get_crit_temp,
  343. };
  344. /*
  345. * This function may be called from interrupt based temperature sensor
  346. * when threshold is changed.
  347. */
  348. static void exynos_report_trigger(void)
  349. {
  350. unsigned int i;
  351. char data[10];
  352. char *envp[] = { data, NULL };
  353. if (!th_zone || !th_zone->therm_dev)
  354. return;
  355. if (th_zone->bind == false) {
  356. for (i = 0; i < th_zone->cool_dev_size; i++) {
  357. if (!th_zone->cool_dev[i])
  358. continue;
  359. exynos_bind(th_zone->therm_dev,
  360. th_zone->cool_dev[i]);
  361. }
  362. }
  363. thermal_zone_device_update(th_zone->therm_dev);
  364. mutex_lock(&th_zone->therm_dev->lock);
  365. /* Find the level for which trip happened */
  366. for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
  367. if (th_zone->therm_dev->last_temperature <
  368. th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
  369. break;
  370. }
  371. if (th_zone->mode == THERMAL_DEVICE_ENABLED) {
  372. if (i > 0)
  373. th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
  374. else
  375. th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
  376. }
  377. snprintf(data, sizeof(data), "%u", i);
  378. kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
  379. mutex_unlock(&th_zone->therm_dev->lock);
  380. }
  381. /* Register with the in-kernel thermal management */
  382. static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
  383. {
  384. int ret;
  385. struct cpumask mask_val;
  386. if (!sensor_conf || !sensor_conf->read_temperature) {
  387. pr_err("Temperature sensor not initialised\n");
  388. return -EINVAL;
  389. }
  390. th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
  391. if (!th_zone)
  392. return -ENOMEM;
  393. th_zone->sensor_conf = sensor_conf;
  394. cpumask_set_cpu(0, &mask_val);
  395. th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
  396. if (IS_ERR(th_zone->cool_dev[0])) {
  397. pr_err("Failed to register cpufreq cooling device\n");
  398. ret = -EINVAL;
  399. goto err_unregister;
  400. }
  401. th_zone->cool_dev_size++;
  402. th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
  403. EXYNOS_ZONE_COUNT, 0, NULL, &exynos_dev_ops, NULL, 0,
  404. IDLE_INTERVAL);
  405. if (IS_ERR(th_zone->therm_dev)) {
  406. pr_err("Failed to register thermal zone device\n");
  407. ret = -EINVAL;
  408. goto err_unregister;
  409. }
  410. th_zone->mode = THERMAL_DEVICE_ENABLED;
  411. pr_info("Exynos: Kernel Thermal management registered\n");
  412. return 0;
  413. err_unregister:
  414. exynos_unregister_thermal();
  415. return ret;
  416. }
  417. /* Un-Register with the in-kernel thermal management */
  418. static void exynos_unregister_thermal(void)
  419. {
  420. int i;
  421. if (!th_zone)
  422. return;
  423. if (th_zone->therm_dev)
  424. thermal_zone_device_unregister(th_zone->therm_dev);
  425. for (i = 0; i < th_zone->cool_dev_size; i++) {
  426. if (th_zone->cool_dev[i])
  427. cpufreq_cooling_unregister(th_zone->cool_dev[i]);
  428. }
  429. kfree(th_zone);
  430. pr_info("Exynos: Kernel Thermal management unregistered\n");
  431. }
  432. /*
  433. * TMU treats temperature as a mapped temperature code.
  434. * The temperature is converted differently depending on the calibration type.
  435. */
  436. static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
  437. {
  438. struct exynos_tmu_platform_data *pdata = data->pdata;
  439. int temp_code;
  440. if (data->soc == SOC_ARCH_EXYNOS4210)
  441. /* temp should range between 25 and 125 */
  442. if (temp < 25 || temp > 125) {
  443. temp_code = -EINVAL;
  444. goto out;
  445. }
  446. switch (pdata->cal_type) {
  447. case TYPE_TWO_POINT_TRIMMING:
  448. temp_code = (temp - 25) *
  449. (data->temp_error2 - data->temp_error1) /
  450. (85 - 25) + data->temp_error1;
  451. break;
  452. case TYPE_ONE_POINT_TRIMMING:
  453. temp_code = temp + data->temp_error1 - 25;
  454. break;
  455. default:
  456. temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
  457. break;
  458. }
  459. out:
  460. return temp_code;
  461. }
  462. /*
  463. * Calculate a temperature value from a temperature code.
  464. * The unit of the temperature is degree Celsius.
  465. */
  466. static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
  467. {
  468. struct exynos_tmu_platform_data *pdata = data->pdata;
  469. int temp;
  470. if (data->soc == SOC_ARCH_EXYNOS4210)
  471. /* temp_code should range between 75 and 175 */
  472. if (temp_code < 75 || temp_code > 175) {
  473. temp = -ENODATA;
  474. goto out;
  475. }
  476. switch (pdata->cal_type) {
  477. case TYPE_TWO_POINT_TRIMMING:
  478. temp = (temp_code - data->temp_error1) * (85 - 25) /
  479. (data->temp_error2 - data->temp_error1) + 25;
  480. break;
  481. case TYPE_ONE_POINT_TRIMMING:
  482. temp = temp_code - data->temp_error1 + 25;
  483. break;
  484. default:
  485. temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
  486. break;
  487. }
  488. out:
  489. return temp;
  490. }
  491. static int exynos_tmu_initialize(struct platform_device *pdev)
  492. {
  493. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  494. struct exynos_tmu_platform_data *pdata = data->pdata;
  495. unsigned int status, trim_info, rising_threshold;
  496. int ret = 0, threshold_code;
  497. mutex_lock(&data->lock);
  498. clk_enable(data->clk);
  499. status = readb(data->base + EXYNOS_TMU_REG_STATUS);
  500. if (!status) {
  501. ret = -EBUSY;
  502. goto out;
  503. }
  504. if (data->soc == SOC_ARCH_EXYNOS) {
  505. __raw_writel(EXYNOS_TRIMINFO_RELOAD,
  506. data->base + EXYNOS_TMU_TRIMINFO_CON);
  507. }
  508. /* Save trimming info in order to perform calibration */
  509. trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
  510. data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
  511. data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
  512. if ((EFUSE_MIN_VALUE > data->temp_error1) ||
  513. (data->temp_error1 > EFUSE_MAX_VALUE) ||
  514. (data->temp_error2 != 0))
  515. data->temp_error1 = pdata->efuse_value;
  516. if (data->soc == SOC_ARCH_EXYNOS4210) {
  517. /* Write temperature code for threshold */
  518. threshold_code = temp_to_code(data, pdata->threshold);
  519. if (threshold_code < 0) {
  520. ret = threshold_code;
  521. goto out;
  522. }
  523. writeb(threshold_code,
  524. data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
  525. writeb(pdata->trigger_levels[0],
  526. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0);
  527. writeb(pdata->trigger_levels[1],
  528. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL1);
  529. writeb(pdata->trigger_levels[2],
  530. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL2);
  531. writeb(pdata->trigger_levels[3],
  532. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL3);
  533. writel(EXYNOS4210_TMU_INTCLEAR_VAL,
  534. data->base + EXYNOS_TMU_REG_INTCLEAR);
  535. } else if (data->soc == SOC_ARCH_EXYNOS) {
  536. /* Write temperature code for threshold */
  537. threshold_code = temp_to_code(data, pdata->trigger_levels[0]);
  538. if (threshold_code < 0) {
  539. ret = threshold_code;
  540. goto out;
  541. }
  542. rising_threshold = threshold_code;
  543. threshold_code = temp_to_code(data, pdata->trigger_levels[1]);
  544. if (threshold_code < 0) {
  545. ret = threshold_code;
  546. goto out;
  547. }
  548. rising_threshold |= (threshold_code << 8);
  549. threshold_code = temp_to_code(data, pdata->trigger_levels[2]);
  550. if (threshold_code < 0) {
  551. ret = threshold_code;
  552. goto out;
  553. }
  554. rising_threshold |= (threshold_code << 16);
  555. writel(rising_threshold,
  556. data->base + EXYNOS_THD_TEMP_RISE);
  557. writel(0, data->base + EXYNOS_THD_TEMP_FALL);
  558. writel(EXYNOS_TMU_CLEAR_RISE_INT|EXYNOS_TMU_CLEAR_FALL_INT,
  559. data->base + EXYNOS_TMU_REG_INTCLEAR);
  560. }
  561. out:
  562. clk_disable(data->clk);
  563. mutex_unlock(&data->lock);
  564. return ret;
  565. }
  566. static void exynos_tmu_control(struct platform_device *pdev, bool on)
  567. {
  568. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  569. struct exynos_tmu_platform_data *pdata = data->pdata;
  570. unsigned int con, interrupt_en;
  571. mutex_lock(&data->lock);
  572. clk_enable(data->clk);
  573. con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
  574. pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
  575. if (data->soc == SOC_ARCH_EXYNOS) {
  576. con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
  577. con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
  578. }
  579. if (on) {
  580. con |= EXYNOS_TMU_CORE_ON;
  581. interrupt_en = pdata->trigger_level3_en << 12 |
  582. pdata->trigger_level2_en << 8 |
  583. pdata->trigger_level1_en << 4 |
  584. pdata->trigger_level0_en;
  585. } else {
  586. con |= EXYNOS_TMU_CORE_OFF;
  587. interrupt_en = 0; /* Disable all interrupts */
  588. }
  589. writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
  590. writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
  591. clk_disable(data->clk);
  592. mutex_unlock(&data->lock);
  593. }
  594. static int exynos_tmu_read(struct exynos_tmu_data *data)
  595. {
  596. u8 temp_code;
  597. int temp;
  598. mutex_lock(&data->lock);
  599. clk_enable(data->clk);
  600. temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
  601. temp = code_to_temp(data, temp_code);
  602. clk_disable(data->clk);
  603. mutex_unlock(&data->lock);
  604. return temp;
  605. }
  606. static void exynos_tmu_work(struct work_struct *work)
  607. {
  608. struct exynos_tmu_data *data = container_of(work,
  609. struct exynos_tmu_data, irq_work);
  610. exynos_report_trigger();
  611. mutex_lock(&data->lock);
  612. clk_enable(data->clk);
  613. if (data->soc == SOC_ARCH_EXYNOS)
  614. writel(EXYNOS_TMU_CLEAR_RISE_INT,
  615. data->base + EXYNOS_TMU_REG_INTCLEAR);
  616. else
  617. writel(EXYNOS4210_TMU_INTCLEAR_VAL,
  618. data->base + EXYNOS_TMU_REG_INTCLEAR);
  619. clk_disable(data->clk);
  620. mutex_unlock(&data->lock);
  621. enable_irq(data->irq);
  622. }
  623. static irqreturn_t exynos_tmu_irq(int irq, void *id)
  624. {
  625. struct exynos_tmu_data *data = id;
  626. disable_irq_nosync(irq);
  627. schedule_work(&data->irq_work);
  628. return IRQ_HANDLED;
  629. }
  630. static struct thermal_sensor_conf exynos_sensor_conf = {
  631. .name = "exynos-therm",
  632. .read_temperature = (int (*)(void *))exynos_tmu_read,
  633. };
  634. #if defined(CONFIG_CPU_EXYNOS4210)
  635. static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
  636. .threshold = 80,
  637. .trigger_levels[0] = 5,
  638. .trigger_levels[1] = 20,
  639. .trigger_levels[2] = 30,
  640. .trigger_level0_en = 1,
  641. .trigger_level1_en = 1,
  642. .trigger_level2_en = 1,
  643. .trigger_level3_en = 0,
  644. .gain = 15,
  645. .reference_voltage = 7,
  646. .cal_type = TYPE_ONE_POINT_TRIMMING,
  647. .freq_tab[0] = {
  648. .freq_clip_max = 800 * 1000,
  649. .temp_level = 85,
  650. },
  651. .freq_tab[1] = {
  652. .freq_clip_max = 200 * 1000,
  653. .temp_level = 100,
  654. },
  655. .freq_tab_count = 2,
  656. .type = SOC_ARCH_EXYNOS4210,
  657. };
  658. #define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
  659. #else
  660. #define EXYNOS4210_TMU_DRV_DATA (NULL)
  661. #endif
  662. #if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
  663. static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
  664. .trigger_levels[0] = 85,
  665. .trigger_levels[1] = 103,
  666. .trigger_levels[2] = 110,
  667. .trigger_level0_en = 1,
  668. .trigger_level1_en = 1,
  669. .trigger_level2_en = 1,
  670. .trigger_level3_en = 0,
  671. .gain = 8,
  672. .reference_voltage = 16,
  673. .noise_cancel_mode = 4,
  674. .cal_type = TYPE_ONE_POINT_TRIMMING,
  675. .efuse_value = 55,
  676. .freq_tab[0] = {
  677. .freq_clip_max = 800 * 1000,
  678. .temp_level = 85,
  679. },
  680. .freq_tab[1] = {
  681. .freq_clip_max = 200 * 1000,
  682. .temp_level = 103,
  683. },
  684. .freq_tab_count = 2,
  685. .type = SOC_ARCH_EXYNOS,
  686. };
  687. #define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
  688. #else
  689. #define EXYNOS_TMU_DRV_DATA (NULL)
  690. #endif
  691. #ifdef CONFIG_OF
  692. static const struct of_device_id exynos_tmu_match[] = {
  693. {
  694. .compatible = "samsung,exynos4210-tmu",
  695. .data = (void *)EXYNOS4210_TMU_DRV_DATA,
  696. },
  697. {
  698. .compatible = "samsung,exynos5250-tmu",
  699. .data = (void *)EXYNOS_TMU_DRV_DATA,
  700. },
  701. {},
  702. };
  703. MODULE_DEVICE_TABLE(of, exynos_tmu_match);
  704. #endif
  705. static struct platform_device_id exynos_tmu_driver_ids[] = {
  706. {
  707. .name = "exynos4210-tmu",
  708. .driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
  709. },
  710. {
  711. .name = "exynos5250-tmu",
  712. .driver_data = (kernel_ulong_t)EXYNOS_TMU_DRV_DATA,
  713. },
  714. { },
  715. };
  716. MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
  717. static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
  718. struct platform_device *pdev)
  719. {
  720. #ifdef CONFIG_OF
  721. if (pdev->dev.of_node) {
  722. const struct of_device_id *match;
  723. match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
  724. if (!match)
  725. return NULL;
  726. return (struct exynos_tmu_platform_data *) match->data;
  727. }
  728. #endif
  729. return (struct exynos_tmu_platform_data *)
  730. platform_get_device_id(pdev)->driver_data;
  731. }
  732. #ifdef CONFIG_EXYNOS_THERMAL_EMUL
  733. static ssize_t exynos_tmu_emulation_show(struct device *dev,
  734. struct device_attribute *attr,
  735. char *buf)
  736. {
  737. struct platform_device *pdev = container_of(dev,
  738. struct platform_device, dev);
  739. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  740. unsigned int reg;
  741. u8 temp_code;
  742. int temp = 0;
  743. if (data->soc == SOC_ARCH_EXYNOS4210)
  744. goto out;
  745. mutex_lock(&data->lock);
  746. clk_enable(data->clk);
  747. reg = readl(data->base + EXYNOS_EMUL_CON);
  748. clk_disable(data->clk);
  749. mutex_unlock(&data->lock);
  750. if (reg & EXYNOS_EMUL_ENABLE) {
  751. reg >>= EXYNOS_EMUL_DATA_SHIFT;
  752. temp_code = reg & EXYNOS_EMUL_DATA_MASK;
  753. temp = code_to_temp(data, temp_code);
  754. }
  755. out:
  756. return sprintf(buf, "%d\n", temp * MCELSIUS);
  757. }
  758. static ssize_t exynos_tmu_emulation_store(struct device *dev,
  759. struct device_attribute *attr,
  760. const char *buf, size_t count)
  761. {
  762. struct platform_device *pdev = container_of(dev,
  763. struct platform_device, dev);
  764. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  765. unsigned int reg;
  766. int temp;
  767. if (data->soc == SOC_ARCH_EXYNOS4210)
  768. goto out;
  769. if (!sscanf(buf, "%d\n", &temp) || temp < 0)
  770. return -EINVAL;
  771. mutex_lock(&data->lock);
  772. clk_enable(data->clk);
  773. reg = readl(data->base + EXYNOS_EMUL_CON);
  774. if (temp) {
  775. /* Both CELSIUS and MCELSIUS type are available for input */
  776. if (temp > MCELSIUS)
  777. temp /= MCELSIUS;
  778. reg = (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT) |
  779. (temp_to_code(data, (temp / MCELSIUS))
  780. << EXYNOS_EMUL_DATA_SHIFT) | EXYNOS_EMUL_ENABLE;
  781. } else {
  782. reg &= ~EXYNOS_EMUL_ENABLE;
  783. }
  784. writel(reg, data->base + EXYNOS_EMUL_CON);
  785. clk_disable(data->clk);
  786. mutex_unlock(&data->lock);
  787. out:
  788. return count;
  789. }
  790. static DEVICE_ATTR(emulation, 0644, exynos_tmu_emulation_show,
  791. exynos_tmu_emulation_store);
  792. static int create_emulation_sysfs(struct device *dev)
  793. {
  794. return device_create_file(dev, &dev_attr_emulation);
  795. }
  796. static void remove_emulation_sysfs(struct device *dev)
  797. {
  798. device_remove_file(dev, &dev_attr_emulation);
  799. }
  800. #else
  801. static inline int create_emulation_sysfs(struct device *dev) { return 0; }
  802. static inline void remove_emulation_sysfs(struct device *dev) {}
  803. #endif
  804. static int __devinit exynos_tmu_probe(struct platform_device *pdev)
  805. {
  806. struct exynos_tmu_data *data;
  807. struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
  808. int ret, i;
  809. if (!pdata)
  810. pdata = exynos_get_driver_data(pdev);
  811. if (!pdata) {
  812. dev_err(&pdev->dev, "No platform init data supplied.\n");
  813. return -ENODEV;
  814. }
  815. data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
  816. GFP_KERNEL);
  817. if (!data) {
  818. dev_err(&pdev->dev, "Failed to allocate driver structure\n");
  819. return -ENOMEM;
  820. }
  821. data->irq = platform_get_irq(pdev, 0);
  822. if (data->irq < 0) {
  823. dev_err(&pdev->dev, "Failed to get platform irq\n");
  824. return data->irq;
  825. }
  826. INIT_WORK(&data->irq_work, exynos_tmu_work);
  827. data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  828. if (!data->mem) {
  829. dev_err(&pdev->dev, "Failed to get platform resource\n");
  830. return -ENOENT;
  831. }
  832. data->base = devm_request_and_ioremap(&pdev->dev, data->mem);
  833. if (!data->base) {
  834. dev_err(&pdev->dev, "Failed to ioremap memory\n");
  835. return -ENODEV;
  836. }
  837. ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
  838. IRQF_TRIGGER_RISING, "exynos-tmu", data);
  839. if (ret) {
  840. dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
  841. return ret;
  842. }
  843. data->clk = clk_get(NULL, "tmu_apbif");
  844. if (IS_ERR(data->clk)) {
  845. dev_err(&pdev->dev, "Failed to get clock\n");
  846. return PTR_ERR(data->clk);
  847. }
  848. if (pdata->type == SOC_ARCH_EXYNOS ||
  849. pdata->type == SOC_ARCH_EXYNOS4210)
  850. data->soc = pdata->type;
  851. else {
  852. ret = -EINVAL;
  853. dev_err(&pdev->dev, "Platform not supported\n");
  854. goto err_clk;
  855. }
  856. data->pdata = pdata;
  857. platform_set_drvdata(pdev, data);
  858. mutex_init(&data->lock);
  859. ret = exynos_tmu_initialize(pdev);
  860. if (ret) {
  861. dev_err(&pdev->dev, "Failed to initialize TMU\n");
  862. goto err_clk;
  863. }
  864. exynos_tmu_control(pdev, true);
  865. /* Register the sensor with thermal management interface */
  866. (&exynos_sensor_conf)->private_data = data;
  867. exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
  868. pdata->trigger_level1_en + pdata->trigger_level2_en +
  869. pdata->trigger_level3_en;
  870. for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
  871. exynos_sensor_conf.trip_data.trip_val[i] =
  872. pdata->threshold + pdata->trigger_levels[i];
  873. exynos_sensor_conf.cooling_data.freq_clip_count =
  874. pdata->freq_tab_count;
  875. for (i = 0; i < pdata->freq_tab_count; i++) {
  876. exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
  877. pdata->freq_tab[i].freq_clip_max;
  878. exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
  879. pdata->freq_tab[i].temp_level;
  880. }
  881. ret = exynos_register_thermal(&exynos_sensor_conf);
  882. if (ret) {
  883. dev_err(&pdev->dev, "Failed to register thermal interface\n");
  884. goto err_clk;
  885. }
  886. ret = create_emulation_sysfs(&pdev->dev);
  887. if (ret)
  888. dev_err(&pdev->dev, "Failed to create emulation mode sysfs node\n");
  889. return 0;
  890. err_clk:
  891. platform_set_drvdata(pdev, NULL);
  892. clk_put(data->clk);
  893. return ret;
  894. }
  895. static int __devexit exynos_tmu_remove(struct platform_device *pdev)
  896. {
  897. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  898. remove_emulation_sysfs(&pdev->dev);
  899. exynos_tmu_control(pdev, false);
  900. exynos_unregister_thermal();
  901. clk_put(data->clk);
  902. platform_set_drvdata(pdev, NULL);
  903. return 0;
  904. }
  905. #ifdef CONFIG_PM_SLEEP
  906. static int exynos_tmu_suspend(struct device *dev)
  907. {
  908. exynos_tmu_control(to_platform_device(dev), false);
  909. return 0;
  910. }
  911. static int exynos_tmu_resume(struct device *dev)
  912. {
  913. struct platform_device *pdev = to_platform_device(dev);
  914. exynos_tmu_initialize(pdev);
  915. exynos_tmu_control(pdev, true);
  916. return 0;
  917. }
  918. static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
  919. exynos_tmu_suspend, exynos_tmu_resume);
  920. #define EXYNOS_TMU_PM (&exynos_tmu_pm)
  921. #else
  922. #define EXYNOS_TMU_PM NULL
  923. #endif
  924. static struct platform_driver exynos_tmu_driver = {
  925. .driver = {
  926. .name = "exynos-tmu",
  927. .owner = THIS_MODULE,
  928. .pm = EXYNOS_TMU_PM,
  929. .of_match_table = of_match_ptr(exynos_tmu_match),
  930. },
  931. .probe = exynos_tmu_probe,
  932. .remove = __devexit_p(exynos_tmu_remove),
  933. .id_table = exynos_tmu_driver_ids,
  934. };
  935. module_platform_driver(exynos_tmu_driver);
  936. MODULE_DESCRIPTION("EXYNOS TMU Driver");
  937. MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
  938. MODULE_LICENSE("GPL");
  939. MODULE_ALIAS("platform:exynos-tmu");