iwl-core.c 90 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232
  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h" /* FIXME: remove */
  34. #include "iwl-debug.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-power.h"
  38. #include "iwl-sta.h"
  39. #include "iwl-helpers.h"
  40. MODULE_DESCRIPTION("iwl core");
  41. MODULE_VERSION(IWLWIFI_VERSION);
  42. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  43. MODULE_LICENSE("GPL");
  44. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  45. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  46. IWL_RATE_SISO_##s##M_PLCP, \
  47. IWL_RATE_MIMO2_##s##M_PLCP,\
  48. IWL_RATE_MIMO3_##s##M_PLCP,\
  49. IWL_RATE_##r##M_IEEE, \
  50. IWL_RATE_##ip##M_INDEX, \
  51. IWL_RATE_##in##M_INDEX, \
  52. IWL_RATE_##rp##M_INDEX, \
  53. IWL_RATE_##rn##M_INDEX, \
  54. IWL_RATE_##pp##M_INDEX, \
  55. IWL_RATE_##np##M_INDEX }
  56. u32 iwl_debug_level;
  57. EXPORT_SYMBOL(iwl_debug_level);
  58. static irqreturn_t iwl_isr(int irq, void *data);
  59. /*
  60. * Parameter order:
  61. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  62. *
  63. * If there isn't a valid next or previous rate then INV is used which
  64. * maps to IWL_RATE_INVALID
  65. *
  66. */
  67. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  68. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  69. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  70. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  71. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  72. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  73. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  74. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  75. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  76. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  77. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  78. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  79. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  81. /* FIXME:RS: ^^ should be INV (legacy) */
  82. };
  83. EXPORT_SYMBOL(iwl_rates);
  84. /**
  85. * translate ucode response to mac80211 tx status control values
  86. */
  87. void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  88. struct ieee80211_tx_info *info)
  89. {
  90. int rate_index;
  91. struct ieee80211_tx_rate *r = &info->control.rates[0];
  92. info->antenna_sel_tx =
  93. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  94. if (rate_n_flags & RATE_MCS_HT_MSK)
  95. r->flags |= IEEE80211_TX_RC_MCS;
  96. if (rate_n_flags & RATE_MCS_GF_MSK)
  97. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  98. if (rate_n_flags & RATE_MCS_HT40_MSK)
  99. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  100. if (rate_n_flags & RATE_MCS_DUP_MSK)
  101. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  102. if (rate_n_flags & RATE_MCS_SGI_MSK)
  103. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  104. rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
  105. if (info->band == IEEE80211_BAND_5GHZ)
  106. rate_index -= IWL_FIRST_OFDM_RATE;
  107. r->idx = rate_index;
  108. }
  109. EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
  110. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  111. {
  112. int idx = 0;
  113. /* HT rate format */
  114. if (rate_n_flags & RATE_MCS_HT_MSK) {
  115. idx = (rate_n_flags & 0xff);
  116. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  117. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  118. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  119. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  120. idx += IWL_FIRST_OFDM_RATE;
  121. /* skip 9M not supported in ht*/
  122. if (idx >= IWL_RATE_9M_INDEX)
  123. idx += 1;
  124. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  125. return idx;
  126. /* legacy rate format, search for match in table */
  127. } else {
  128. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  129. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  130. return idx;
  131. }
  132. return -1;
  133. }
  134. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  135. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  136. {
  137. int i;
  138. u8 ind = ant;
  139. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  140. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  141. if (priv->hw_params.valid_tx_ant & BIT(ind))
  142. return ind;
  143. }
  144. return ant;
  145. }
  146. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  147. EXPORT_SYMBOL(iwl_bcast_addr);
  148. /* This function both allocates and initializes hw and priv. */
  149. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  150. struct ieee80211_ops *hw_ops)
  151. {
  152. struct iwl_priv *priv;
  153. /* mac80211 allocates memory for this device instance, including
  154. * space for this driver's private structure */
  155. struct ieee80211_hw *hw =
  156. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  157. if (hw == NULL) {
  158. printk(KERN_ERR "%s: Can not allocate network device\n",
  159. cfg->name);
  160. goto out;
  161. }
  162. priv = hw->priv;
  163. priv->hw = hw;
  164. out:
  165. return hw;
  166. }
  167. EXPORT_SYMBOL(iwl_alloc_all);
  168. void iwl_hw_detect(struct iwl_priv *priv)
  169. {
  170. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  171. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  172. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  173. }
  174. EXPORT_SYMBOL(iwl_hw_detect);
  175. int iwl_hw_nic_init(struct iwl_priv *priv)
  176. {
  177. unsigned long flags;
  178. struct iwl_rx_queue *rxq = &priv->rxq;
  179. int ret;
  180. /* nic_init */
  181. spin_lock_irqsave(&priv->lock, flags);
  182. priv->cfg->ops->lib->apm_ops.init(priv);
  183. iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
  184. spin_unlock_irqrestore(&priv->lock, flags);
  185. ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
  186. priv->cfg->ops->lib->apm_ops.config(priv);
  187. /* Allocate the RX queue, or reset if it is already allocated */
  188. if (!rxq->bd) {
  189. ret = iwl_rx_queue_alloc(priv);
  190. if (ret) {
  191. IWL_ERR(priv, "Unable to initialize Rx queue\n");
  192. return -ENOMEM;
  193. }
  194. } else
  195. iwl_rx_queue_reset(priv, rxq);
  196. iwl_rx_replenish(priv);
  197. iwl_rx_init(priv, rxq);
  198. spin_lock_irqsave(&priv->lock, flags);
  199. rxq->need_update = 1;
  200. iwl_rx_queue_update_write_ptr(priv, rxq);
  201. spin_unlock_irqrestore(&priv->lock, flags);
  202. /* Allocate and init all Tx and Command queues */
  203. ret = iwl_txq_ctx_reset(priv);
  204. if (ret)
  205. return ret;
  206. set_bit(STATUS_INIT, &priv->status);
  207. return 0;
  208. }
  209. EXPORT_SYMBOL(iwl_hw_nic_init);
  210. /*
  211. * QoS support
  212. */
  213. void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  214. {
  215. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  216. return;
  217. priv->qos_data.def_qos_parm.qos_flags = 0;
  218. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  219. !priv->qos_data.qos_cap.q_AP.txop_request)
  220. priv->qos_data.def_qos_parm.qos_flags |=
  221. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  222. if (priv->qos_data.qos_active)
  223. priv->qos_data.def_qos_parm.qos_flags |=
  224. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  225. if (priv->current_ht_config.is_ht)
  226. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  227. if (force || iwl_is_associated(priv)) {
  228. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  229. priv->qos_data.qos_active,
  230. priv->qos_data.def_qos_parm.qos_flags);
  231. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  232. sizeof(struct iwl_qosparam_cmd),
  233. &priv->qos_data.def_qos_parm, NULL);
  234. }
  235. }
  236. EXPORT_SYMBOL(iwl_activate_qos);
  237. /*
  238. * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
  239. * (802.11b) (802.11a/g)
  240. * AC_BK 15 1023 7 0 0
  241. * AC_BE 15 1023 3 0 0
  242. * AC_VI 7 15 2 6.016ms 3.008ms
  243. * AC_VO 3 7 2 3.264ms 1.504ms
  244. */
  245. void iwl_reset_qos(struct iwl_priv *priv)
  246. {
  247. u16 cw_min = 15;
  248. u16 cw_max = 1023;
  249. u8 aifs = 2;
  250. bool is_legacy = false;
  251. unsigned long flags;
  252. int i;
  253. spin_lock_irqsave(&priv->lock, flags);
  254. /* QoS always active in AP and ADHOC mode
  255. * In STA mode wait for association
  256. */
  257. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  258. priv->iw_mode == NL80211_IFTYPE_AP)
  259. priv->qos_data.qos_active = 1;
  260. else
  261. priv->qos_data.qos_active = 0;
  262. /* check for legacy mode */
  263. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  264. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  265. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  266. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  267. cw_min = 31;
  268. is_legacy = 1;
  269. }
  270. if (priv->qos_data.qos_active)
  271. aifs = 3;
  272. /* AC_BE */
  273. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  274. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  275. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  276. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  277. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  278. if (priv->qos_data.qos_active) {
  279. /* AC_BK */
  280. i = 1;
  281. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  282. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  283. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  284. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  285. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  286. /* AC_VI */
  287. i = 2;
  288. priv->qos_data.def_qos_parm.ac[i].cw_min =
  289. cpu_to_le16((cw_min + 1) / 2 - 1);
  290. priv->qos_data.def_qos_parm.ac[i].cw_max =
  291. cpu_to_le16(cw_min);
  292. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  293. if (is_legacy)
  294. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  295. cpu_to_le16(6016);
  296. else
  297. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  298. cpu_to_le16(3008);
  299. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  300. /* AC_VO */
  301. i = 3;
  302. priv->qos_data.def_qos_parm.ac[i].cw_min =
  303. cpu_to_le16((cw_min + 1) / 4 - 1);
  304. priv->qos_data.def_qos_parm.ac[i].cw_max =
  305. cpu_to_le16((cw_min + 1) / 2 - 1);
  306. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  307. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  308. if (is_legacy)
  309. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  310. cpu_to_le16(3264);
  311. else
  312. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  313. cpu_to_le16(1504);
  314. } else {
  315. for (i = 1; i < 4; i++) {
  316. priv->qos_data.def_qos_parm.ac[i].cw_min =
  317. cpu_to_le16(cw_min);
  318. priv->qos_data.def_qos_parm.ac[i].cw_max =
  319. cpu_to_le16(cw_max);
  320. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  321. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  322. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  323. }
  324. }
  325. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  326. spin_unlock_irqrestore(&priv->lock, flags);
  327. }
  328. EXPORT_SYMBOL(iwl_reset_qos);
  329. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  330. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  331. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  332. struct ieee80211_sta_ht_cap *ht_info,
  333. enum ieee80211_band band)
  334. {
  335. u16 max_bit_rate = 0;
  336. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  337. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  338. ht_info->cap = 0;
  339. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  340. ht_info->ht_supported = true;
  341. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  342. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  343. ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
  344. (WLAN_HT_CAP_SM_PS_DISABLED << 2));
  345. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  346. if (priv->hw_params.ht40_channel & BIT(band)) {
  347. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  348. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  349. ht_info->mcs.rx_mask[4] = 0x01;
  350. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  351. }
  352. if (priv->cfg->mod_params->amsdu_size_8K)
  353. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  354. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  355. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  356. ht_info->mcs.rx_mask[0] = 0xFF;
  357. if (rx_chains_num >= 2)
  358. ht_info->mcs.rx_mask[1] = 0xFF;
  359. if (rx_chains_num >= 3)
  360. ht_info->mcs.rx_mask[2] = 0xFF;
  361. /* Highest supported Rx data rate */
  362. max_bit_rate *= rx_chains_num;
  363. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  364. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  365. /* Tx MCS capabilities */
  366. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  367. if (tx_chains_num != rx_chains_num) {
  368. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  369. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  370. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  371. }
  372. }
  373. static void iwlcore_init_hw_rates(struct iwl_priv *priv,
  374. struct ieee80211_rate *rates)
  375. {
  376. int i;
  377. for (i = 0; i < IWL_RATE_COUNT; i++) {
  378. rates[i].bitrate = iwl_rates[i].ieee * 5;
  379. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  380. rates[i].hw_value_short = i;
  381. rates[i].flags = 0;
  382. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  383. /*
  384. * If CCK != 1M then set short preamble rate flag.
  385. */
  386. rates[i].flags |=
  387. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  388. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  389. }
  390. }
  391. }
  392. /**
  393. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  394. */
  395. int iwlcore_init_geos(struct iwl_priv *priv)
  396. {
  397. struct iwl_channel_info *ch;
  398. struct ieee80211_supported_band *sband;
  399. struct ieee80211_channel *channels;
  400. struct ieee80211_channel *geo_ch;
  401. struct ieee80211_rate *rates;
  402. int i = 0;
  403. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  404. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  405. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  406. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  407. return 0;
  408. }
  409. channels = kzalloc(sizeof(struct ieee80211_channel) *
  410. priv->channel_count, GFP_KERNEL);
  411. if (!channels)
  412. return -ENOMEM;
  413. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  414. GFP_KERNEL);
  415. if (!rates) {
  416. kfree(channels);
  417. return -ENOMEM;
  418. }
  419. /* 5.2GHz channels start after the 2.4GHz channels */
  420. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  421. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  422. /* just OFDM */
  423. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  424. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  425. if (priv->cfg->sku & IWL_SKU_N)
  426. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  427. IEEE80211_BAND_5GHZ);
  428. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  429. sband->channels = channels;
  430. /* OFDM & CCK */
  431. sband->bitrates = rates;
  432. sband->n_bitrates = IWL_RATE_COUNT;
  433. if (priv->cfg->sku & IWL_SKU_N)
  434. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  435. IEEE80211_BAND_2GHZ);
  436. priv->ieee_channels = channels;
  437. priv->ieee_rates = rates;
  438. for (i = 0; i < priv->channel_count; i++) {
  439. ch = &priv->channel_info[i];
  440. /* FIXME: might be removed if scan is OK */
  441. if (!is_channel_valid(ch))
  442. continue;
  443. if (is_channel_a_band(ch))
  444. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  445. else
  446. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  447. geo_ch = &sband->channels[sband->n_channels++];
  448. geo_ch->center_freq =
  449. ieee80211_channel_to_frequency(ch->channel);
  450. geo_ch->max_power = ch->max_power_avg;
  451. geo_ch->max_antenna_gain = 0xff;
  452. geo_ch->hw_value = ch->channel;
  453. if (is_channel_valid(ch)) {
  454. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  455. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  456. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  457. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  458. if (ch->flags & EEPROM_CHANNEL_RADAR)
  459. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  460. geo_ch->flags |= ch->ht40_extension_channel;
  461. if (ch->max_power_avg > priv->tx_power_channel_lmt)
  462. priv->tx_power_channel_lmt = ch->max_power_avg;
  463. } else {
  464. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  465. }
  466. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  467. ch->channel, geo_ch->center_freq,
  468. is_channel_a_band(ch) ? "5.2" : "2.4",
  469. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  470. "restricted" : "valid",
  471. geo_ch->flags);
  472. }
  473. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  474. priv->cfg->sku & IWL_SKU_A) {
  475. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  476. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  477. priv->pci_dev->device,
  478. priv->pci_dev->subsystem_device);
  479. priv->cfg->sku &= ~IWL_SKU_A;
  480. }
  481. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  482. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  483. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  484. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  485. return 0;
  486. }
  487. EXPORT_SYMBOL(iwlcore_init_geos);
  488. /*
  489. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  490. */
  491. void iwlcore_free_geos(struct iwl_priv *priv)
  492. {
  493. kfree(priv->ieee_channels);
  494. kfree(priv->ieee_rates);
  495. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  496. }
  497. EXPORT_SYMBOL(iwlcore_free_geos);
  498. static bool is_single_rx_stream(struct iwl_priv *priv)
  499. {
  500. return !priv->current_ht_config.is_ht ||
  501. ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
  502. (priv->current_ht_config.mcs.rx_mask[2] == 0));
  503. }
  504. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  505. enum ieee80211_band band,
  506. u16 channel, u8 extension_chan_offset)
  507. {
  508. const struct iwl_channel_info *ch_info;
  509. ch_info = iwl_get_channel_info(priv, band, channel);
  510. if (!is_channel_valid(ch_info))
  511. return 0;
  512. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  513. return !(ch_info->ht40_extension_channel &
  514. IEEE80211_CHAN_NO_HT40PLUS);
  515. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  516. return !(ch_info->ht40_extension_channel &
  517. IEEE80211_CHAN_NO_HT40MINUS);
  518. return 0;
  519. }
  520. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  521. struct ieee80211_sta_ht_cap *sta_ht_inf)
  522. {
  523. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  524. if ((!iwl_ht_conf->is_ht) ||
  525. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
  526. return 0;
  527. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  528. * the bit will not set if it is pure 40MHz case
  529. */
  530. if (sta_ht_inf) {
  531. if (!sta_ht_inf->ht_supported)
  532. return 0;
  533. }
  534. #ifdef CONFIG_IWLWIFI_DEBUG
  535. if (priv->disable_ht40)
  536. return 0;
  537. #endif
  538. return iwl_is_channel_extension(priv, priv->band,
  539. le16_to_cpu(priv->staging_rxon.channel),
  540. iwl_ht_conf->extension_chan_offset);
  541. }
  542. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  543. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  544. {
  545. u16 new_val = 0;
  546. u16 beacon_factor = 0;
  547. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  548. new_val = beacon_val / beacon_factor;
  549. if (!new_val)
  550. new_val = max_beacon_val;
  551. return new_val;
  552. }
  553. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  554. {
  555. u64 tsf;
  556. s32 interval_tm, rem;
  557. unsigned long flags;
  558. struct ieee80211_conf *conf = NULL;
  559. u16 beacon_int;
  560. conf = ieee80211_get_hw_conf(priv->hw);
  561. spin_lock_irqsave(&priv->lock, flags);
  562. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  563. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  564. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  565. beacon_int = priv->beacon_int;
  566. priv->rxon_timing.atim_window = 0;
  567. } else {
  568. beacon_int = priv->vif->bss_conf.beacon_int;
  569. /* TODO: we need to get atim_window from upper stack
  570. * for now we set to 0 */
  571. priv->rxon_timing.atim_window = 0;
  572. }
  573. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  574. priv->hw_params.max_beacon_itrvl * 1024);
  575. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  576. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  577. interval_tm = beacon_int * 1024;
  578. rem = do_div(tsf, interval_tm);
  579. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  580. spin_unlock_irqrestore(&priv->lock, flags);
  581. IWL_DEBUG_ASSOC(priv,
  582. "beacon interval %d beacon timer %d beacon tim %d\n",
  583. le16_to_cpu(priv->rxon_timing.beacon_interval),
  584. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  585. le16_to_cpu(priv->rxon_timing.atim_window));
  586. }
  587. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  588. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  589. {
  590. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  591. if (hw_decrypt)
  592. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  593. else
  594. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  595. }
  596. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  597. /**
  598. * iwl_check_rxon_cmd - validate RXON structure is valid
  599. *
  600. * NOTE: This is really only useful during development and can eventually
  601. * be #ifdef'd out once the driver is stable and folks aren't actively
  602. * making changes
  603. */
  604. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  605. {
  606. int error = 0;
  607. int counter = 1;
  608. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  609. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  610. error |= le32_to_cpu(rxon->flags &
  611. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  612. RXON_FLG_RADAR_DETECT_MSK));
  613. if (error)
  614. IWL_WARN(priv, "check 24G fields %d | %d\n",
  615. counter++, error);
  616. } else {
  617. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  618. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  619. if (error)
  620. IWL_WARN(priv, "check 52 fields %d | %d\n",
  621. counter++, error);
  622. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  623. if (error)
  624. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  625. counter++, error);
  626. }
  627. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  628. if (error)
  629. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  630. /* make sure basic rates 6Mbps and 1Mbps are supported */
  631. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  632. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  633. if (error)
  634. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  635. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  636. if (error)
  637. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  638. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  639. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  640. if (error)
  641. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  642. counter++, error);
  643. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  644. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  645. if (error)
  646. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  647. counter++, error);
  648. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  649. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  650. if (error)
  651. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  652. counter++, error);
  653. if (error)
  654. IWL_WARN(priv, "Tuning to channel %d\n",
  655. le16_to_cpu(rxon->channel));
  656. if (error) {
  657. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  658. return -1;
  659. }
  660. return 0;
  661. }
  662. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  663. /**
  664. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  665. * @priv: staging_rxon is compared to active_rxon
  666. *
  667. * If the RXON structure is changing enough to require a new tune,
  668. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  669. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  670. */
  671. int iwl_full_rxon_required(struct iwl_priv *priv)
  672. {
  673. /* These items are only settable from the full RXON command */
  674. if (!(iwl_is_associated(priv)) ||
  675. compare_ether_addr(priv->staging_rxon.bssid_addr,
  676. priv->active_rxon.bssid_addr) ||
  677. compare_ether_addr(priv->staging_rxon.node_addr,
  678. priv->active_rxon.node_addr) ||
  679. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  680. priv->active_rxon.wlap_bssid_addr) ||
  681. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  682. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  683. (priv->staging_rxon.air_propagation !=
  684. priv->active_rxon.air_propagation) ||
  685. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  686. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  687. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  688. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  689. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  690. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  691. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  692. return 1;
  693. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  694. * be updated with the RXON_ASSOC command -- however only some
  695. * flag transitions are allowed using RXON_ASSOC */
  696. /* Check if we are not switching bands */
  697. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  698. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  699. return 1;
  700. /* Check if we are switching association toggle */
  701. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  702. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  703. return 1;
  704. return 0;
  705. }
  706. EXPORT_SYMBOL(iwl_full_rxon_required);
  707. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  708. {
  709. int i;
  710. int rate_mask;
  711. /* Set rate mask*/
  712. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  713. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  714. else
  715. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  716. /* Find lowest valid rate */
  717. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  718. i = iwl_rates[i].next_ieee) {
  719. if (rate_mask & (1 << i))
  720. return iwl_rates[i].plcp;
  721. }
  722. /* No valid rate was found. Assign the lowest one */
  723. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  724. return IWL_RATE_1M_PLCP;
  725. else
  726. return IWL_RATE_6M_PLCP;
  727. }
  728. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  729. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
  730. {
  731. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  732. if (!ht_info->is_ht) {
  733. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  734. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  735. RXON_FLG_HT40_PROT_MSK |
  736. RXON_FLG_HT_PROT_MSK);
  737. return;
  738. }
  739. /* FIXME: if the definition of ht_protection changed, the "translation"
  740. * will be needed for rxon->flags
  741. */
  742. rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  743. /* Set up channel bandwidth:
  744. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  745. /* clear the HT channel mode before set the mode */
  746. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  747. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  748. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  749. /* pure ht40 */
  750. if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  751. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  752. /* Note: control channel is opposite of extension channel */
  753. switch (ht_info->extension_chan_offset) {
  754. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  755. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  756. break;
  757. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  758. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  759. break;
  760. }
  761. } else {
  762. /* Note: control channel is opposite of extension channel */
  763. switch (ht_info->extension_chan_offset) {
  764. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  765. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  766. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  767. break;
  768. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  769. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  770. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  771. break;
  772. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  773. default:
  774. /* channel location only valid if in Mixed mode */
  775. IWL_ERR(priv, "invalid extension channel offset\n");
  776. break;
  777. }
  778. }
  779. } else {
  780. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  781. }
  782. if (priv->cfg->ops->hcmd->set_rxon_chain)
  783. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  784. IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
  785. "rxon flags 0x%X operation mode :0x%X "
  786. "extension channel offset 0x%x\n",
  787. ht_info->mcs.rx_mask[0],
  788. ht_info->mcs.rx_mask[1],
  789. ht_info->mcs.rx_mask[2],
  790. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  791. ht_info->extension_chan_offset);
  792. return;
  793. }
  794. EXPORT_SYMBOL(iwl_set_rxon_ht);
  795. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  796. #define IWL_NUM_RX_CHAINS_SINGLE 2
  797. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  798. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  799. /* Determine how many receiver/antenna chains to use.
  800. * More provides better reception via diversity. Fewer saves power.
  801. * MIMO (dual stream) requires at least 2, but works better with 3.
  802. * This does not determine *which* chains to use, just how many.
  803. */
  804. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  805. {
  806. bool is_single = is_single_rx_stream(priv);
  807. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  808. /* # of Rx chains to use when expecting MIMO. */
  809. if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
  810. WLAN_HT_CAP_SM_PS_STATIC)))
  811. return IWL_NUM_RX_CHAINS_SINGLE;
  812. else
  813. return IWL_NUM_RX_CHAINS_MULTIPLE;
  814. }
  815. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  816. {
  817. int idle_cnt;
  818. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  819. /* # Rx chains when idling and maybe trying to save power */
  820. switch (priv->current_ht_config.sm_ps) {
  821. case WLAN_HT_CAP_SM_PS_STATIC:
  822. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  823. idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
  824. IWL_NUM_IDLE_CHAINS_SINGLE;
  825. break;
  826. case WLAN_HT_CAP_SM_PS_DISABLED:
  827. idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
  828. break;
  829. case WLAN_HT_CAP_SM_PS_INVALID:
  830. default:
  831. IWL_ERR(priv, "invalid mimo ps mode %d\n",
  832. priv->current_ht_config.sm_ps);
  833. WARN_ON(1);
  834. idle_cnt = -1;
  835. break;
  836. }
  837. return idle_cnt;
  838. }
  839. /* up to 4 chains */
  840. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  841. {
  842. u8 res;
  843. res = (chain_bitmap & BIT(0)) >> 0;
  844. res += (chain_bitmap & BIT(1)) >> 1;
  845. res += (chain_bitmap & BIT(2)) >> 2;
  846. res += (chain_bitmap & BIT(4)) >> 4;
  847. return res;
  848. }
  849. /**
  850. * iwl_is_monitor_mode - Determine if interface in monitor mode
  851. *
  852. * priv->iw_mode is set in add_interface, but add_interface is
  853. * never called for monitor mode. The only way mac80211 informs us about
  854. * monitor mode is through configuring filters (call to configure_filter).
  855. */
  856. bool iwl_is_monitor_mode(struct iwl_priv *priv)
  857. {
  858. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  859. }
  860. EXPORT_SYMBOL(iwl_is_monitor_mode);
  861. /**
  862. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  863. *
  864. * Selects how many and which Rx receivers/antennas/chains to use.
  865. * This should not be used for scan command ... it puts data in wrong place.
  866. */
  867. void iwl_set_rxon_chain(struct iwl_priv *priv)
  868. {
  869. bool is_single = is_single_rx_stream(priv);
  870. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  871. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  872. u32 active_chains;
  873. u16 rx_chain;
  874. /* Tell uCode which antennas are actually connected.
  875. * Before first association, we assume all antennas are connected.
  876. * Just after first association, iwl_chain_noise_calibration()
  877. * checks which antennas actually *are* connected. */
  878. if (priv->chain_noise_data.active_chains)
  879. active_chains = priv->chain_noise_data.active_chains;
  880. else
  881. active_chains = priv->hw_params.valid_rx_ant;
  882. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  883. /* How many receivers should we use? */
  884. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  885. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  886. /* correct rx chain count according hw settings
  887. * and chain noise calibration
  888. */
  889. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  890. if (valid_rx_cnt < active_rx_cnt)
  891. active_rx_cnt = valid_rx_cnt;
  892. if (valid_rx_cnt < idle_rx_cnt)
  893. idle_rx_cnt = valid_rx_cnt;
  894. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  895. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  896. /* copied from 'iwl_bg_request_scan()' */
  897. /* Force use of chains B and C (0x6) for Rx for 4965
  898. * Avoid A (0x1) because of its off-channel reception on A-band.
  899. * MIMO is not used here, but value is required */
  900. if (iwl_is_monitor_mode(priv) &&
  901. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  902. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  903. rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
  904. rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
  905. rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  906. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  907. }
  908. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  909. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  910. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  911. else
  912. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  913. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  914. priv->staging_rxon.rx_chain,
  915. active_rx_cnt, idle_rx_cnt);
  916. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  917. active_rx_cnt < idle_rx_cnt);
  918. }
  919. EXPORT_SYMBOL(iwl_set_rxon_chain);
  920. /**
  921. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  922. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  923. * @channel: Any channel valid for the requested phymode
  924. * In addition to setting the staging RXON, priv->phymode is also set.
  925. *
  926. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  927. * in the staging RXON flag structure based on the phymode
  928. */
  929. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  930. {
  931. enum ieee80211_band band = ch->band;
  932. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  933. if (!iwl_get_channel_info(priv, band, channel)) {
  934. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  935. channel, band);
  936. return -EINVAL;
  937. }
  938. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  939. (priv->band == band))
  940. return 0;
  941. priv->staging_rxon.channel = cpu_to_le16(channel);
  942. if (band == IEEE80211_BAND_5GHZ)
  943. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  944. else
  945. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  946. priv->band = band;
  947. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  948. return 0;
  949. }
  950. EXPORT_SYMBOL(iwl_set_rxon_channel);
  951. void iwl_set_flags_for_band(struct iwl_priv *priv,
  952. enum ieee80211_band band)
  953. {
  954. if (band == IEEE80211_BAND_5GHZ) {
  955. priv->staging_rxon.flags &=
  956. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  957. | RXON_FLG_CCK_MSK);
  958. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  959. } else {
  960. /* Copied from iwl_post_associate() */
  961. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  962. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  963. else
  964. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  965. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  966. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  967. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  968. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  969. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  970. }
  971. }
  972. /*
  973. * initialize rxon structure with default values from eeprom
  974. */
  975. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  976. {
  977. const struct iwl_channel_info *ch_info;
  978. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  979. switch (mode) {
  980. case NL80211_IFTYPE_AP:
  981. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  982. break;
  983. case NL80211_IFTYPE_STATION:
  984. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  985. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  986. break;
  987. case NL80211_IFTYPE_ADHOC:
  988. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  989. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  990. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  991. RXON_FILTER_ACCEPT_GRP_MSK;
  992. break;
  993. default:
  994. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  995. break;
  996. }
  997. #if 0
  998. /* TODO: Figure out when short_preamble would be set and cache from
  999. * that */
  1000. if (!hw_to_local(priv->hw)->short_preamble)
  1001. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1002. else
  1003. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1004. #endif
  1005. ch_info = iwl_get_channel_info(priv, priv->band,
  1006. le16_to_cpu(priv->active_rxon.channel));
  1007. if (!ch_info)
  1008. ch_info = &priv->channel_info[0];
  1009. /*
  1010. * in some case A channels are all non IBSS
  1011. * in this case force B/G channel
  1012. */
  1013. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
  1014. !(is_channel_ibss(ch_info)))
  1015. ch_info = &priv->channel_info[0];
  1016. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1017. priv->band = ch_info->band;
  1018. iwl_set_flags_for_band(priv, priv->band);
  1019. priv->staging_rxon.ofdm_basic_rates =
  1020. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1021. priv->staging_rxon.cck_basic_rates =
  1022. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1023. /* clear both MIX and PURE40 mode flag */
  1024. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  1025. RXON_FLG_CHANNEL_MODE_PURE_40);
  1026. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1027. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1028. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1029. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1030. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  1031. }
  1032. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  1033. static void iwl_set_rate(struct iwl_priv *priv)
  1034. {
  1035. const struct ieee80211_supported_band *hw = NULL;
  1036. struct ieee80211_rate *rate;
  1037. int i;
  1038. hw = iwl_get_hw_mode(priv, priv->band);
  1039. if (!hw) {
  1040. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1041. return;
  1042. }
  1043. priv->active_rate = 0;
  1044. priv->active_rate_basic = 0;
  1045. for (i = 0; i < hw->n_bitrates; i++) {
  1046. rate = &(hw->bitrates[i]);
  1047. if (rate->hw_value < IWL_RATE_COUNT)
  1048. priv->active_rate |= (1 << rate->hw_value);
  1049. }
  1050. IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
  1051. priv->active_rate, priv->active_rate_basic);
  1052. /*
  1053. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1054. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1055. * OFDM
  1056. */
  1057. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1058. priv->staging_rxon.cck_basic_rates =
  1059. ((priv->active_rate_basic &
  1060. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1061. else
  1062. priv->staging_rxon.cck_basic_rates =
  1063. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1064. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1065. priv->staging_rxon.ofdm_basic_rates =
  1066. ((priv->active_rate_basic &
  1067. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1068. IWL_FIRST_OFDM_RATE) & 0xFF;
  1069. else
  1070. priv->staging_rxon.ofdm_basic_rates =
  1071. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1072. }
  1073. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1074. {
  1075. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1076. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  1077. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1078. IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
  1079. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1080. rxon->channel = csa->channel;
  1081. priv->staging_rxon.channel = csa->channel;
  1082. }
  1083. EXPORT_SYMBOL(iwl_rx_csa);
  1084. #ifdef CONFIG_IWLWIFI_DEBUG
  1085. static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  1086. {
  1087. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  1088. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  1089. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  1090. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  1091. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  1092. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  1093. le32_to_cpu(rxon->filter_flags));
  1094. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  1095. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  1096. rxon->ofdm_basic_rates);
  1097. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  1098. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  1099. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  1100. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  1101. }
  1102. static const char *desc_lookup_text[] = {
  1103. "OK",
  1104. "FAIL",
  1105. "BAD_PARAM",
  1106. "BAD_CHECKSUM",
  1107. "NMI_INTERRUPT_WDG",
  1108. "SYSASSERT",
  1109. "FATAL_ERROR",
  1110. "BAD_COMMAND",
  1111. "HW_ERROR_TUNE_LOCK",
  1112. "HW_ERROR_TEMPERATURE",
  1113. "ILLEGAL_CHAN_FREQ",
  1114. "VCC_NOT_STABLE",
  1115. "FH_ERROR",
  1116. "NMI_INTERRUPT_HOST",
  1117. "NMI_INTERRUPT_ACTION_PT",
  1118. "NMI_INTERRUPT_UNKNOWN",
  1119. "UCODE_VERSION_MISMATCH",
  1120. "HW_ERROR_ABS_LOCK",
  1121. "HW_ERROR_CAL_LOCK_FAIL",
  1122. "NMI_INTERRUPT_INST_ACTION_PT",
  1123. "NMI_INTERRUPT_DATA_ACTION_PT",
  1124. "NMI_TRM_HW_ER",
  1125. "NMI_INTERRUPT_TRM",
  1126. "NMI_INTERRUPT_BREAK_POINT"
  1127. "DEBUG_0",
  1128. "DEBUG_1",
  1129. "DEBUG_2",
  1130. "DEBUG_3",
  1131. "UNKNOWN"
  1132. };
  1133. static const char *desc_lookup(int i)
  1134. {
  1135. int max = ARRAY_SIZE(desc_lookup_text) - 1;
  1136. if (i < 0 || i > max)
  1137. i = max;
  1138. return desc_lookup_text[i];
  1139. }
  1140. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1141. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1142. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  1143. {
  1144. u32 data2, line;
  1145. u32 desc, time, count, base, data1;
  1146. u32 blink1, blink2, ilink1, ilink2;
  1147. if (priv->ucode_type == UCODE_INIT)
  1148. base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
  1149. else
  1150. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1151. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1152. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1153. return;
  1154. }
  1155. count = iwl_read_targ_mem(priv, base);
  1156. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1157. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1158. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1159. priv->status, count);
  1160. }
  1161. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  1162. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  1163. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  1164. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  1165. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  1166. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  1167. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  1168. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  1169. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  1170. IWL_ERR(priv, "Desc Time "
  1171. "data1 data2 line\n");
  1172. IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
  1173. desc_lookup(desc), desc, time, data1, data2, line);
  1174. IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
  1175. IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  1176. ilink1, ilink2);
  1177. }
  1178. #define EVENT_START_OFFSET (4 * sizeof(u32))
  1179. /**
  1180. * iwl_print_event_log - Dump error event log to syslog
  1181. *
  1182. */
  1183. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1184. u32 num_events, u32 mode)
  1185. {
  1186. u32 i;
  1187. u32 base; /* SRAM byte address of event log header */
  1188. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1189. u32 ptr; /* SRAM byte address of log data */
  1190. u32 ev, time, data; /* event log data */
  1191. if (num_events == 0)
  1192. return;
  1193. if (priv->ucode_type == UCODE_INIT)
  1194. base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
  1195. else
  1196. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1197. if (mode == 0)
  1198. event_size = 2 * sizeof(u32);
  1199. else
  1200. event_size = 3 * sizeof(u32);
  1201. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1202. /* "time" is actually "data" for mode 0 (no timestamp).
  1203. * place event id # at far right for easier visual parsing. */
  1204. for (i = 0; i < num_events; i++) {
  1205. ev = iwl_read_targ_mem(priv, ptr);
  1206. ptr += sizeof(u32);
  1207. time = iwl_read_targ_mem(priv, ptr);
  1208. ptr += sizeof(u32);
  1209. if (mode == 0) {
  1210. /* data, ev */
  1211. IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
  1212. } else {
  1213. data = iwl_read_targ_mem(priv, ptr);
  1214. ptr += sizeof(u32);
  1215. IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
  1216. time, data, ev);
  1217. }
  1218. }
  1219. }
  1220. void iwl_dump_nic_event_log(struct iwl_priv *priv)
  1221. {
  1222. u32 base; /* SRAM byte address of event log header */
  1223. u32 capacity; /* event log capacity in # entries */
  1224. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1225. u32 num_wraps; /* # times uCode wrapped to top of log */
  1226. u32 next_entry; /* index of next entry to be written by uCode */
  1227. u32 size; /* # entries that we'll print */
  1228. if (priv->ucode_type == UCODE_INIT)
  1229. base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
  1230. else
  1231. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1232. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1233. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1234. return;
  1235. }
  1236. /* event log header */
  1237. capacity = iwl_read_targ_mem(priv, base);
  1238. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1239. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1240. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1241. size = num_wraps ? capacity : next_entry;
  1242. /* bail out if nothing in log */
  1243. if (size == 0) {
  1244. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1245. return;
  1246. }
  1247. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1248. size, num_wraps);
  1249. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1250. * i.e the next one that uCode would fill. */
  1251. if (num_wraps)
  1252. iwl_print_event_log(priv, next_entry,
  1253. capacity - next_entry, mode);
  1254. /* (then/else) start at top of log */
  1255. iwl_print_event_log(priv, 0, next_entry, mode);
  1256. }
  1257. #endif
  1258. /**
  1259. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  1260. */
  1261. void iwl_irq_handle_error(struct iwl_priv *priv)
  1262. {
  1263. /* Set the FW error flag -- cleared on iwl_down */
  1264. set_bit(STATUS_FW_ERROR, &priv->status);
  1265. /* Cancel currently queued command. */
  1266. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1267. #ifdef CONFIG_IWLWIFI_DEBUG
  1268. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
  1269. iwl_dump_nic_error_log(priv);
  1270. iwl_dump_nic_event_log(priv);
  1271. iwl_print_rx_config_cmd(priv);
  1272. }
  1273. #endif
  1274. wake_up_interruptible(&priv->wait_command_queue);
  1275. /* Keep the restart process from trying to send host
  1276. * commands by clearing the INIT status bit */
  1277. clear_bit(STATUS_READY, &priv->status);
  1278. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1279. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1280. "Restarting adapter due to uCode error.\n");
  1281. if (priv->cfg->mod_params->restart_fw)
  1282. queue_work(priv->workqueue, &priv->restart);
  1283. }
  1284. }
  1285. EXPORT_SYMBOL(iwl_irq_handle_error);
  1286. void iwl_configure_filter(struct ieee80211_hw *hw,
  1287. unsigned int changed_flags,
  1288. unsigned int *total_flags,
  1289. int mc_count, struct dev_addr_list *mc_list)
  1290. {
  1291. struct iwl_priv *priv = hw->priv;
  1292. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1293. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1294. changed_flags, *total_flags);
  1295. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1296. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1297. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1298. else
  1299. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1300. }
  1301. if (changed_flags & FIF_ALLMULTI) {
  1302. if (*total_flags & FIF_ALLMULTI)
  1303. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1304. else
  1305. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1306. }
  1307. if (changed_flags & FIF_CONTROL) {
  1308. if (*total_flags & FIF_CONTROL)
  1309. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1310. else
  1311. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1312. }
  1313. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1314. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1315. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1316. else
  1317. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1318. }
  1319. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1320. * since mac80211 will call ieee80211_hw_config immediately.
  1321. * (mc_list is not supported at this time). Otherwise, we need to
  1322. * queue a background iwl_commit_rxon work.
  1323. */
  1324. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1325. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1326. }
  1327. EXPORT_SYMBOL(iwl_configure_filter);
  1328. int iwl_setup_mac(struct iwl_priv *priv)
  1329. {
  1330. int ret;
  1331. struct ieee80211_hw *hw = priv->hw;
  1332. hw->rate_control_algorithm = "iwl-agn-rs";
  1333. /* Tell mac80211 our characteristics */
  1334. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1335. IEEE80211_HW_NOISE_DBM |
  1336. IEEE80211_HW_AMPDU_AGGREGATION |
  1337. IEEE80211_HW_SPECTRUM_MGMT |
  1338. IEEE80211_HW_SUPPORTS_PS;
  1339. hw->wiphy->interface_modes =
  1340. BIT(NL80211_IFTYPE_STATION) |
  1341. BIT(NL80211_IFTYPE_ADHOC);
  1342. hw->wiphy->custom_regulatory = true;
  1343. /* Firmware does not support this */
  1344. hw->wiphy->disable_beacon_hints = true;
  1345. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  1346. /* we create the 802.11 header and a zero-length SSID element */
  1347. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  1348. /* Default value; 4 EDCA QOS priorities */
  1349. hw->queues = 4;
  1350. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  1351. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  1352. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1353. &priv->bands[IEEE80211_BAND_2GHZ];
  1354. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  1355. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1356. &priv->bands[IEEE80211_BAND_5GHZ];
  1357. ret = ieee80211_register_hw(priv->hw);
  1358. if (ret) {
  1359. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  1360. return ret;
  1361. }
  1362. priv->mac80211_registered = 1;
  1363. return 0;
  1364. }
  1365. EXPORT_SYMBOL(iwl_setup_mac);
  1366. int iwl_set_hw_params(struct iwl_priv *priv)
  1367. {
  1368. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1369. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1370. if (priv->cfg->mod_params->amsdu_size_8K)
  1371. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1372. else
  1373. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1374. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  1375. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1376. if (priv->cfg->mod_params->disable_11n)
  1377. priv->cfg->sku &= ~IWL_SKU_N;
  1378. /* Device-specific setup */
  1379. return priv->cfg->ops->lib->set_hw_params(priv);
  1380. }
  1381. EXPORT_SYMBOL(iwl_set_hw_params);
  1382. int iwl_init_drv(struct iwl_priv *priv)
  1383. {
  1384. int ret;
  1385. priv->ibss_beacon = NULL;
  1386. spin_lock_init(&priv->lock);
  1387. spin_lock_init(&priv->sta_lock);
  1388. spin_lock_init(&priv->hcmd_lock);
  1389. INIT_LIST_HEAD(&priv->free_frames);
  1390. mutex_init(&priv->mutex);
  1391. /* Clear the driver's (not device's) station table */
  1392. iwl_clear_stations_table(priv);
  1393. priv->data_retry_limit = -1;
  1394. priv->ieee_channels = NULL;
  1395. priv->ieee_rates = NULL;
  1396. priv->band = IEEE80211_BAND_2GHZ;
  1397. priv->iw_mode = NL80211_IFTYPE_STATION;
  1398. priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
  1399. /* Choose which receivers/antennas to use */
  1400. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1401. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1402. iwl_init_scan_params(priv);
  1403. iwl_reset_qos(priv);
  1404. priv->qos_data.qos_active = 0;
  1405. priv->qos_data.qos_cap.val = 0;
  1406. priv->rates_mask = IWL_RATES_MASK;
  1407. /* If power management is turned on, default to CAM mode */
  1408. priv->power_mode = IWL_POWER_MODE_CAM;
  1409. priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
  1410. ret = iwl_init_channel_map(priv);
  1411. if (ret) {
  1412. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  1413. goto err;
  1414. }
  1415. ret = iwlcore_init_geos(priv);
  1416. if (ret) {
  1417. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  1418. goto err_free_channel_map;
  1419. }
  1420. iwlcore_init_hw_rates(priv, priv->ieee_rates);
  1421. return 0;
  1422. err_free_channel_map:
  1423. iwl_free_channel_map(priv);
  1424. err:
  1425. return ret;
  1426. }
  1427. EXPORT_SYMBOL(iwl_init_drv);
  1428. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1429. {
  1430. int ret = 0;
  1431. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1432. IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
  1433. tx_power,
  1434. IWL_TX_POWER_TARGET_POWER_MIN);
  1435. return -EINVAL;
  1436. }
  1437. if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
  1438. IWL_WARN(priv, "Requested user TXPOWER %d above upper limit %d.\n",
  1439. tx_power,
  1440. IWL_TX_POWER_TARGET_POWER_MAX);
  1441. return -EINVAL;
  1442. }
  1443. if (priv->tx_power_user_lmt != tx_power)
  1444. force = true;
  1445. priv->tx_power_user_lmt = tx_power;
  1446. /* if nic is not up don't send command */
  1447. if (!iwl_is_ready_rf(priv))
  1448. return ret;
  1449. if (force && priv->cfg->ops->lib->send_tx_power)
  1450. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1451. return ret;
  1452. }
  1453. EXPORT_SYMBOL(iwl_set_tx_power);
  1454. void iwl_uninit_drv(struct iwl_priv *priv)
  1455. {
  1456. iwl_calib_free_results(priv);
  1457. iwlcore_free_geos(priv);
  1458. iwl_free_channel_map(priv);
  1459. kfree(priv->scan);
  1460. }
  1461. EXPORT_SYMBOL(iwl_uninit_drv);
  1462. #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
  1463. /* Free dram table */
  1464. void iwl_free_isr_ict(struct iwl_priv *priv)
  1465. {
  1466. if (priv->ict_tbl_vir) {
  1467. pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
  1468. PAGE_SIZE, priv->ict_tbl_vir,
  1469. priv->ict_tbl_dma);
  1470. priv->ict_tbl_vir = NULL;
  1471. }
  1472. }
  1473. EXPORT_SYMBOL(iwl_free_isr_ict);
  1474. /* allocate dram shared table it is a PAGE_SIZE aligned
  1475. * also reset all data related to ICT table interrupt.
  1476. */
  1477. int iwl_alloc_isr_ict(struct iwl_priv *priv)
  1478. {
  1479. if (priv->cfg->use_isr_legacy)
  1480. return 0;
  1481. /* allocate shrared data table */
  1482. priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
  1483. ICT_COUNT) + PAGE_SIZE,
  1484. &priv->ict_tbl_dma);
  1485. if (!priv->ict_tbl_vir)
  1486. return -ENOMEM;
  1487. /* align table to PAGE_SIZE boundry */
  1488. priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
  1489. IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
  1490. (unsigned long long)priv->ict_tbl_dma,
  1491. (unsigned long long)priv->aligned_ict_tbl_dma,
  1492. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1493. priv->ict_tbl = priv->ict_tbl_vir +
  1494. (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
  1495. IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
  1496. priv->ict_tbl, priv->ict_tbl_vir,
  1497. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1498. /* reset table and index to all 0 */
  1499. memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
  1500. priv->ict_index = 0;
  1501. /* add periodic RX interrupt */
  1502. priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
  1503. return 0;
  1504. }
  1505. EXPORT_SYMBOL(iwl_alloc_isr_ict);
  1506. /* Device is going up inform it about using ICT interrupt table,
  1507. * also we need to tell the driver to start using ICT interrupt.
  1508. */
  1509. int iwl_reset_ict(struct iwl_priv *priv)
  1510. {
  1511. u32 val;
  1512. unsigned long flags;
  1513. if (!priv->ict_tbl_vir)
  1514. return 0;
  1515. spin_lock_irqsave(&priv->lock, flags);
  1516. iwl_disable_interrupts(priv);
  1517. memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
  1518. val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
  1519. val |= CSR_DRAM_INT_TBL_ENABLE;
  1520. val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
  1521. IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
  1522. "aligned dma address %Lx\n",
  1523. val, (unsigned long long)priv->aligned_ict_tbl_dma);
  1524. iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
  1525. priv->use_ict = true;
  1526. priv->ict_index = 0;
  1527. iwl_write32(priv, CSR_INT, priv->inta_mask);
  1528. iwl_enable_interrupts(priv);
  1529. spin_unlock_irqrestore(&priv->lock, flags);
  1530. return 0;
  1531. }
  1532. EXPORT_SYMBOL(iwl_reset_ict);
  1533. /* Device is going down disable ict interrupt usage */
  1534. void iwl_disable_ict(struct iwl_priv *priv)
  1535. {
  1536. unsigned long flags;
  1537. spin_lock_irqsave(&priv->lock, flags);
  1538. priv->use_ict = false;
  1539. spin_unlock_irqrestore(&priv->lock, flags);
  1540. }
  1541. EXPORT_SYMBOL(iwl_disable_ict);
  1542. /* interrupt handler using ict table, with this interrupt driver will
  1543. * stop using INTA register to get device's interrupt, reading this register
  1544. * is expensive, device will write interrupts in ICT dram table, increment
  1545. * index then will fire interrupt to driver, driver will OR all ICT table
  1546. * entries from current index up to table entry with 0 value. the result is
  1547. * the interrupt we need to service, driver will set the entries back to 0 and
  1548. * set index.
  1549. */
  1550. irqreturn_t iwl_isr_ict(int irq, void *data)
  1551. {
  1552. struct iwl_priv *priv = data;
  1553. u32 inta, inta_mask;
  1554. u32 val = 0;
  1555. if (!priv)
  1556. return IRQ_NONE;
  1557. /* dram interrupt table not set yet,
  1558. * use legacy interrupt.
  1559. */
  1560. if (!priv->use_ict)
  1561. return iwl_isr(irq, data);
  1562. spin_lock(&priv->lock);
  1563. /* Disable (but don't clear!) interrupts here to avoid
  1564. * back-to-back ISRs and sporadic interrupts from our NIC.
  1565. * If we have something to service, the tasklet will re-enable ints.
  1566. * If we *don't* have something, we'll re-enable before leaving here.
  1567. */
  1568. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1569. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1570. /* Ignore interrupt if there's nothing in NIC to service.
  1571. * This may be due to IRQ shared with another device,
  1572. * or due to sporadic interrupts thrown from our NIC. */
  1573. if (!priv->ict_tbl[priv->ict_index]) {
  1574. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1575. goto none;
  1576. }
  1577. /* read all entries that not 0 start with ict_index */
  1578. while (priv->ict_tbl[priv->ict_index]) {
  1579. val |= priv->ict_tbl[priv->ict_index];
  1580. IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
  1581. priv->ict_index,
  1582. priv->ict_tbl[priv->ict_index]);
  1583. priv->ict_tbl[priv->ict_index] = 0;
  1584. priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
  1585. ICT_COUNT);
  1586. }
  1587. /* We should not get this value, just ignore it. */
  1588. if (val == 0xffffffff)
  1589. val = 0;
  1590. inta = (0xff & val) | ((0xff00 & val) << 16);
  1591. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
  1592. inta, inta_mask, val);
  1593. inta &= priv->inta_mask;
  1594. priv->inta |= inta;
  1595. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1596. if (likely(inta))
  1597. tasklet_schedule(&priv->irq_tasklet);
  1598. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
  1599. /* Allow interrupt if was disabled by this handler and
  1600. * no tasklet was schedules, We should not enable interrupt,
  1601. * tasklet will enable it.
  1602. */
  1603. iwl_enable_interrupts(priv);
  1604. }
  1605. spin_unlock(&priv->lock);
  1606. return IRQ_HANDLED;
  1607. none:
  1608. /* re-enable interrupts here since we don't have anything to service.
  1609. * only Re-enable if disabled by irq.
  1610. */
  1611. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1612. iwl_enable_interrupts(priv);
  1613. spin_unlock(&priv->lock);
  1614. return IRQ_NONE;
  1615. }
  1616. EXPORT_SYMBOL(iwl_isr_ict);
  1617. static irqreturn_t iwl_isr(int irq, void *data)
  1618. {
  1619. struct iwl_priv *priv = data;
  1620. u32 inta, inta_mask;
  1621. #ifdef CONFIG_IWLWIFI_DEBUG
  1622. u32 inta_fh;
  1623. #endif
  1624. if (!priv)
  1625. return IRQ_NONE;
  1626. spin_lock(&priv->lock);
  1627. /* Disable (but don't clear!) interrupts here to avoid
  1628. * back-to-back ISRs and sporadic interrupts from our NIC.
  1629. * If we have something to service, the tasklet will re-enable ints.
  1630. * If we *don't* have something, we'll re-enable before leaving here. */
  1631. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1632. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1633. /* Discover which interrupts are active/pending */
  1634. inta = iwl_read32(priv, CSR_INT);
  1635. /* Ignore interrupt if there's nothing in NIC to service.
  1636. * This may be due to IRQ shared with another device,
  1637. * or due to sporadic interrupts thrown from our NIC. */
  1638. if (!inta) {
  1639. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1640. goto none;
  1641. }
  1642. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1643. /* Hardware disappeared. It might have already raised
  1644. * an interrupt */
  1645. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1646. goto unplugged;
  1647. }
  1648. #ifdef CONFIG_IWLWIFI_DEBUG
  1649. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1650. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1651. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
  1652. "fh 0x%08x\n", inta, inta_mask, inta_fh);
  1653. }
  1654. #endif
  1655. priv->inta |= inta;
  1656. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1657. if (likely(inta))
  1658. tasklet_schedule(&priv->irq_tasklet);
  1659. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1660. iwl_enable_interrupts(priv);
  1661. unplugged:
  1662. spin_unlock(&priv->lock);
  1663. return IRQ_HANDLED;
  1664. none:
  1665. /* re-enable interrupts here since we don't have anything to service. */
  1666. /* only Re-enable if diabled by irq and no schedules tasklet. */
  1667. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1668. iwl_enable_interrupts(priv);
  1669. spin_unlock(&priv->lock);
  1670. return IRQ_NONE;
  1671. }
  1672. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1673. {
  1674. struct iwl_priv *priv = data;
  1675. u32 inta, inta_mask;
  1676. u32 inta_fh;
  1677. if (!priv)
  1678. return IRQ_NONE;
  1679. spin_lock(&priv->lock);
  1680. /* Disable (but don't clear!) interrupts here to avoid
  1681. * back-to-back ISRs and sporadic interrupts from our NIC.
  1682. * If we have something to service, the tasklet will re-enable ints.
  1683. * If we *don't* have something, we'll re-enable before leaving here. */
  1684. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1685. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1686. /* Discover which interrupts are active/pending */
  1687. inta = iwl_read32(priv, CSR_INT);
  1688. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1689. /* Ignore interrupt if there's nothing in NIC to service.
  1690. * This may be due to IRQ shared with another device,
  1691. * or due to sporadic interrupts thrown from our NIC. */
  1692. if (!inta && !inta_fh) {
  1693. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1694. goto none;
  1695. }
  1696. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1697. /* Hardware disappeared. It might have already raised
  1698. * an interrupt */
  1699. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1700. goto unplugged;
  1701. }
  1702. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1703. inta, inta_mask, inta_fh);
  1704. inta &= ~CSR_INT_BIT_SCD;
  1705. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1706. if (likely(inta || inta_fh))
  1707. tasklet_schedule(&priv->irq_tasklet);
  1708. unplugged:
  1709. spin_unlock(&priv->lock);
  1710. return IRQ_HANDLED;
  1711. none:
  1712. /* re-enable interrupts here since we don't have anything to service. */
  1713. /* only Re-enable if diabled by irq */
  1714. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1715. iwl_enable_interrupts(priv);
  1716. spin_unlock(&priv->lock);
  1717. return IRQ_NONE;
  1718. }
  1719. EXPORT_SYMBOL(iwl_isr_legacy);
  1720. int iwl_send_bt_config(struct iwl_priv *priv)
  1721. {
  1722. struct iwl_bt_cmd bt_cmd = {
  1723. .flags = 3,
  1724. .lead_time = 0xAA,
  1725. .max_kill = 1,
  1726. .kill_ack_mask = 0,
  1727. .kill_cts_mask = 0,
  1728. };
  1729. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1730. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1731. }
  1732. EXPORT_SYMBOL(iwl_send_bt_config);
  1733. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
  1734. {
  1735. u32 stat_flags = 0;
  1736. struct iwl_host_cmd cmd = {
  1737. .id = REPLY_STATISTICS_CMD,
  1738. .flags = flags,
  1739. .len = sizeof(stat_flags),
  1740. .data = (u8 *) &stat_flags,
  1741. };
  1742. return iwl_send_cmd(priv, &cmd);
  1743. }
  1744. EXPORT_SYMBOL(iwl_send_statistics_request);
  1745. /**
  1746. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1747. * using sample data 100 bytes apart. If these sample points are good,
  1748. * it's a pretty good bet that everything between them is good, too.
  1749. */
  1750. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1751. {
  1752. u32 val;
  1753. int ret = 0;
  1754. u32 errcnt = 0;
  1755. u32 i;
  1756. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1757. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1758. /* read data comes through single port, auto-incr addr */
  1759. /* NOTE: Use the debugless read so we don't flood kernel log
  1760. * if IWL_DL_IO is set */
  1761. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1762. i + IWL49_RTC_INST_LOWER_BOUND);
  1763. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1764. if (val != le32_to_cpu(*image)) {
  1765. ret = -EIO;
  1766. errcnt++;
  1767. if (errcnt >= 3)
  1768. break;
  1769. }
  1770. }
  1771. return ret;
  1772. }
  1773. /**
  1774. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1775. * looking at all data.
  1776. */
  1777. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1778. u32 len)
  1779. {
  1780. u32 val;
  1781. u32 save_len = len;
  1782. int ret = 0;
  1783. u32 errcnt;
  1784. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1785. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1786. IWL49_RTC_INST_LOWER_BOUND);
  1787. errcnt = 0;
  1788. for (; len > 0; len -= sizeof(u32), image++) {
  1789. /* read data comes through single port, auto-incr addr */
  1790. /* NOTE: Use the debugless read so we don't flood kernel log
  1791. * if IWL_DL_IO is set */
  1792. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1793. if (val != le32_to_cpu(*image)) {
  1794. IWL_ERR(priv, "uCode INST section is invalid at "
  1795. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1796. save_len - len, val, le32_to_cpu(*image));
  1797. ret = -EIO;
  1798. errcnt++;
  1799. if (errcnt >= 20)
  1800. break;
  1801. }
  1802. }
  1803. if (!errcnt)
  1804. IWL_DEBUG_INFO(priv,
  1805. "ucode image in INSTRUCTION memory is good\n");
  1806. return ret;
  1807. }
  1808. /**
  1809. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1810. * and verify its contents
  1811. */
  1812. int iwl_verify_ucode(struct iwl_priv *priv)
  1813. {
  1814. __le32 *image;
  1815. u32 len;
  1816. int ret;
  1817. /* Try bootstrap */
  1818. image = (__le32 *)priv->ucode_boot.v_addr;
  1819. len = priv->ucode_boot.len;
  1820. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1821. if (!ret) {
  1822. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1823. return 0;
  1824. }
  1825. /* Try initialize */
  1826. image = (__le32 *)priv->ucode_init.v_addr;
  1827. len = priv->ucode_init.len;
  1828. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1829. if (!ret) {
  1830. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1831. return 0;
  1832. }
  1833. /* Try runtime/protocol */
  1834. image = (__le32 *)priv->ucode_code.v_addr;
  1835. len = priv->ucode_code.len;
  1836. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1837. if (!ret) {
  1838. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1839. return 0;
  1840. }
  1841. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1842. /* Since nothing seems to match, show first several data entries in
  1843. * instruction SRAM, so maybe visual inspection will give a clue.
  1844. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1845. image = (__le32 *)priv->ucode_boot.v_addr;
  1846. len = priv->ucode_boot.len;
  1847. ret = iwl_verify_inst_full(priv, image, len);
  1848. return ret;
  1849. }
  1850. EXPORT_SYMBOL(iwl_verify_ucode);
  1851. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1852. {
  1853. struct iwl_ct_kill_config cmd;
  1854. struct iwl_ct_kill_throttling_config adv_cmd;
  1855. unsigned long flags;
  1856. int ret = 0;
  1857. spin_lock_irqsave(&priv->lock, flags);
  1858. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1859. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1860. spin_unlock_irqrestore(&priv->lock, flags);
  1861. priv->thermal_throttle.ct_kill_toggle = false;
  1862. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  1863. case CSR_HW_REV_TYPE_1000:
  1864. case CSR_HW_REV_TYPE_6x00:
  1865. case CSR_HW_REV_TYPE_6x50:
  1866. adv_cmd.critical_temperature_enter =
  1867. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1868. adv_cmd.critical_temperature_exit =
  1869. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1870. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1871. sizeof(adv_cmd), &adv_cmd);
  1872. break;
  1873. default:
  1874. cmd.critical_temperature_R =
  1875. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1876. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1877. sizeof(cmd), &cmd);
  1878. break;
  1879. }
  1880. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1881. sizeof(cmd), &cmd);
  1882. if (ret)
  1883. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1884. else
  1885. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
  1886. "critical temperature is %d\n",
  1887. cmd.critical_temperature_R);
  1888. }
  1889. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1890. /*
  1891. * CARD_STATE_CMD
  1892. *
  1893. * Use: Sets the device's internal card state to enable, disable, or halt
  1894. *
  1895. * When in the 'enable' state the card operates as normal.
  1896. * When in the 'disable' state, the card enters into a low power mode.
  1897. * When in the 'halt' state, the card is shut down and must be fully
  1898. * restarted to come back on.
  1899. */
  1900. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1901. {
  1902. struct iwl_host_cmd cmd = {
  1903. .id = REPLY_CARD_STATE_CMD,
  1904. .len = sizeof(u32),
  1905. .data = &flags,
  1906. .flags = meta_flag,
  1907. };
  1908. return iwl_send_cmd(priv, &cmd);
  1909. }
  1910. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1911. struct iwl_rx_mem_buffer *rxb)
  1912. {
  1913. #ifdef CONFIG_IWLWIFI_DEBUG
  1914. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1915. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1916. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1917. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1918. #endif
  1919. }
  1920. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1921. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1922. struct iwl_rx_mem_buffer *rxb)
  1923. {
  1924. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1925. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1926. "notification for %s:\n",
  1927. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  1928. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  1929. }
  1930. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1931. void iwl_rx_reply_error(struct iwl_priv *priv,
  1932. struct iwl_rx_mem_buffer *rxb)
  1933. {
  1934. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1935. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1936. "seq 0x%04X ser 0x%08X\n",
  1937. le32_to_cpu(pkt->u.err_resp.error_type),
  1938. get_cmd_string(pkt->u.err_resp.cmd_id),
  1939. pkt->u.err_resp.cmd_id,
  1940. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1941. le32_to_cpu(pkt->u.err_resp.error_info));
  1942. }
  1943. EXPORT_SYMBOL(iwl_rx_reply_error);
  1944. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1945. {
  1946. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1947. }
  1948. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1949. const struct ieee80211_tx_queue_params *params)
  1950. {
  1951. struct iwl_priv *priv = hw->priv;
  1952. unsigned long flags;
  1953. int q;
  1954. IWL_DEBUG_MAC80211(priv, "enter\n");
  1955. if (!iwl_is_ready_rf(priv)) {
  1956. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1957. return -EIO;
  1958. }
  1959. if (queue >= AC_NUM) {
  1960. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1961. return 0;
  1962. }
  1963. q = AC_NUM - 1 - queue;
  1964. spin_lock_irqsave(&priv->lock, flags);
  1965. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1966. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1967. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1968. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1969. cpu_to_le16((params->txop * 32));
  1970. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1971. priv->qos_data.qos_active = 1;
  1972. if (priv->iw_mode == NL80211_IFTYPE_AP)
  1973. iwl_activate_qos(priv, 1);
  1974. else if (priv->assoc_id && iwl_is_associated(priv))
  1975. iwl_activate_qos(priv, 0);
  1976. spin_unlock_irqrestore(&priv->lock, flags);
  1977. IWL_DEBUG_MAC80211(priv, "leave\n");
  1978. return 0;
  1979. }
  1980. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1981. static void iwl_ht_conf(struct iwl_priv *priv,
  1982. struct ieee80211_bss_conf *bss_conf)
  1983. {
  1984. struct ieee80211_sta_ht_cap *ht_conf;
  1985. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  1986. struct ieee80211_sta *sta;
  1987. IWL_DEBUG_MAC80211(priv, "enter: \n");
  1988. if (!iwl_conf->is_ht)
  1989. return;
  1990. /*
  1991. * It is totally wrong to base global information on something
  1992. * that is valid only when associated, alas, this driver works
  1993. * that way and I don't know how to fix it.
  1994. */
  1995. rcu_read_lock();
  1996. sta = ieee80211_find_sta(priv->hw, priv->bssid);
  1997. if (!sta) {
  1998. rcu_read_unlock();
  1999. return;
  2000. }
  2001. ht_conf = &sta->ht_cap;
  2002. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  2003. iwl_conf->sgf |= HT_SHORT_GI_20MHZ;
  2004. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  2005. iwl_conf->sgf |= HT_SHORT_GI_40MHZ;
  2006. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  2007. iwl_conf->max_amsdu_size =
  2008. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  2009. iwl_conf->supported_chan_width =
  2010. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40);
  2011. /*
  2012. * XXX: The HT configuration needs to be moved into iwl_mac_config()
  2013. * to be done there correctly.
  2014. */
  2015. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2016. if (conf_is_ht40_minus(&priv->hw->conf))
  2017. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2018. else if (conf_is_ht40_plus(&priv->hw->conf))
  2019. iwl_conf->extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2020. /* If no above or below channel supplied disable HT40 channel */
  2021. if (iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_ABOVE &&
  2022. iwl_conf->extension_chan_offset != IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2023. iwl_conf->supported_chan_width = 0;
  2024. iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
  2025. memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
  2026. iwl_conf->tx_chan_width = iwl_conf->supported_chan_width != 0;
  2027. iwl_conf->ht_protection =
  2028. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  2029. iwl_conf->non_GF_STA_present =
  2030. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  2031. rcu_read_unlock();
  2032. IWL_DEBUG_MAC80211(priv, "leave\n");
  2033. }
  2034. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  2035. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  2036. struct ieee80211_vif *vif,
  2037. struct ieee80211_bss_conf *bss_conf,
  2038. u32 changes)
  2039. {
  2040. struct iwl_priv *priv = hw->priv;
  2041. int ret;
  2042. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  2043. if (!iwl_is_alive(priv))
  2044. return;
  2045. mutex_lock(&priv->mutex);
  2046. if (changes & BSS_CHANGED_BEACON &&
  2047. priv->iw_mode == NL80211_IFTYPE_AP) {
  2048. dev_kfree_skb(priv->ibss_beacon);
  2049. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  2050. }
  2051. if (changes & BSS_CHANGED_BEACON_INT) {
  2052. priv->beacon_int = bss_conf->beacon_int;
  2053. /* TODO: in AP mode, do something to make this take effect */
  2054. }
  2055. if (changes & BSS_CHANGED_BSSID) {
  2056. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  2057. /*
  2058. * If there is currently a HW scan going on in the
  2059. * background then we need to cancel it else the RXON
  2060. * below/in post_associate will fail.
  2061. */
  2062. if (iwl_scan_cancel_timeout(priv, 100)) {
  2063. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  2064. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  2065. mutex_unlock(&priv->mutex);
  2066. return;
  2067. }
  2068. /* mac80211 only sets assoc when in STATION mode */
  2069. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  2070. bss_conf->assoc) {
  2071. memcpy(priv->staging_rxon.bssid_addr,
  2072. bss_conf->bssid, ETH_ALEN);
  2073. /* currently needed in a few places */
  2074. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  2075. } else {
  2076. priv->staging_rxon.filter_flags &=
  2077. ~RXON_FILTER_ASSOC_MSK;
  2078. }
  2079. }
  2080. /*
  2081. * This needs to be after setting the BSSID in case
  2082. * mac80211 decides to do both changes at once because
  2083. * it will invoke post_associate.
  2084. */
  2085. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2086. changes & BSS_CHANGED_BEACON) {
  2087. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  2088. if (beacon)
  2089. iwl_mac_beacon_update(hw, beacon);
  2090. }
  2091. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  2092. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  2093. bss_conf->use_short_preamble);
  2094. if (bss_conf->use_short_preamble)
  2095. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2096. else
  2097. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2098. }
  2099. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  2100. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  2101. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  2102. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  2103. else
  2104. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  2105. }
  2106. if (changes & BSS_CHANGED_BASIC_RATES) {
  2107. /* XXX use this information
  2108. *
  2109. * To do that, remove code from iwl_set_rate() and put something
  2110. * like this here:
  2111. *
  2112. if (A-band)
  2113. priv->staging_rxon.ofdm_basic_rates =
  2114. bss_conf->basic_rates;
  2115. else
  2116. priv->staging_rxon.ofdm_basic_rates =
  2117. bss_conf->basic_rates >> 4;
  2118. priv->staging_rxon.cck_basic_rates =
  2119. bss_conf->basic_rates & 0xF;
  2120. */
  2121. }
  2122. if (changes & BSS_CHANGED_HT) {
  2123. iwl_ht_conf(priv, bss_conf);
  2124. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2125. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2126. }
  2127. if (changes & BSS_CHANGED_ASSOC) {
  2128. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  2129. if (bss_conf->assoc) {
  2130. priv->assoc_id = bss_conf->aid;
  2131. priv->beacon_int = bss_conf->beacon_int;
  2132. priv->power_data.dtim_period = bss_conf->dtim_period;
  2133. priv->timestamp = bss_conf->timestamp;
  2134. priv->assoc_capability = bss_conf->assoc_capability;
  2135. /*
  2136. * We have just associated, don't start scan too early
  2137. * leave time for EAPOL exchange to complete.
  2138. *
  2139. * XXX: do this in mac80211
  2140. */
  2141. priv->next_scan_jiffies = jiffies +
  2142. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  2143. if (!iwl_is_rfkill(priv))
  2144. priv->cfg->ops->lib->post_associate(priv);
  2145. } else
  2146. priv->assoc_id = 0;
  2147. }
  2148. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  2149. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  2150. changes);
  2151. ret = iwl_send_rxon_assoc(priv);
  2152. if (!ret) {
  2153. /* Sync active_rxon with latest change. */
  2154. memcpy((void *)&priv->active_rxon,
  2155. &priv->staging_rxon,
  2156. sizeof(struct iwl_rxon_cmd));
  2157. }
  2158. }
  2159. mutex_unlock(&priv->mutex);
  2160. IWL_DEBUG_MAC80211(priv, "leave\n");
  2161. }
  2162. EXPORT_SYMBOL(iwl_bss_info_changed);
  2163. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  2164. {
  2165. struct iwl_priv *priv = hw->priv;
  2166. unsigned long flags;
  2167. __le64 timestamp;
  2168. IWL_DEBUG_MAC80211(priv, "enter\n");
  2169. if (!iwl_is_ready_rf(priv)) {
  2170. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2171. return -EIO;
  2172. }
  2173. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2174. IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
  2175. return -EIO;
  2176. }
  2177. spin_lock_irqsave(&priv->lock, flags);
  2178. if (priv->ibss_beacon)
  2179. dev_kfree_skb(priv->ibss_beacon);
  2180. priv->ibss_beacon = skb;
  2181. priv->assoc_id = 0;
  2182. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  2183. priv->timestamp = le64_to_cpu(timestamp);
  2184. IWL_DEBUG_MAC80211(priv, "leave\n");
  2185. spin_unlock_irqrestore(&priv->lock, flags);
  2186. iwl_reset_qos(priv);
  2187. priv->cfg->ops->lib->post_associate(priv);
  2188. return 0;
  2189. }
  2190. EXPORT_SYMBOL(iwl_mac_beacon_update);
  2191. int iwl_set_mode(struct iwl_priv *priv, int mode)
  2192. {
  2193. if (mode == NL80211_IFTYPE_ADHOC) {
  2194. const struct iwl_channel_info *ch_info;
  2195. ch_info = iwl_get_channel_info(priv,
  2196. priv->band,
  2197. le16_to_cpu(priv->staging_rxon.channel));
  2198. if (!ch_info || !is_channel_ibss(ch_info)) {
  2199. IWL_ERR(priv, "channel %d not IBSS channel\n",
  2200. le16_to_cpu(priv->staging_rxon.channel));
  2201. return -EINVAL;
  2202. }
  2203. }
  2204. iwl_connection_init_rx_config(priv, mode);
  2205. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2206. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2207. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2208. iwl_clear_stations_table(priv);
  2209. /* dont commit rxon if rf-kill is on*/
  2210. if (!iwl_is_ready_rf(priv))
  2211. return -EAGAIN;
  2212. iwlcore_commit_rxon(priv);
  2213. return 0;
  2214. }
  2215. EXPORT_SYMBOL(iwl_set_mode);
  2216. int iwl_mac_add_interface(struct ieee80211_hw *hw,
  2217. struct ieee80211_if_init_conf *conf)
  2218. {
  2219. struct iwl_priv *priv = hw->priv;
  2220. unsigned long flags;
  2221. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
  2222. if (priv->vif) {
  2223. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  2224. return -EOPNOTSUPP;
  2225. }
  2226. spin_lock_irqsave(&priv->lock, flags);
  2227. priv->vif = conf->vif;
  2228. priv->iw_mode = conf->type;
  2229. spin_unlock_irqrestore(&priv->lock, flags);
  2230. mutex_lock(&priv->mutex);
  2231. if (conf->mac_addr) {
  2232. IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
  2233. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  2234. }
  2235. if (iwl_set_mode(priv, conf->type) == -EAGAIN)
  2236. /* we are not ready, will run again when ready */
  2237. set_bit(STATUS_MODE_PENDING, &priv->status);
  2238. mutex_unlock(&priv->mutex);
  2239. IWL_DEBUG_MAC80211(priv, "leave\n");
  2240. return 0;
  2241. }
  2242. EXPORT_SYMBOL(iwl_mac_add_interface);
  2243. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  2244. struct ieee80211_if_init_conf *conf)
  2245. {
  2246. struct iwl_priv *priv = hw->priv;
  2247. IWL_DEBUG_MAC80211(priv, "enter\n");
  2248. mutex_lock(&priv->mutex);
  2249. if (iwl_is_ready_rf(priv)) {
  2250. iwl_scan_cancel_timeout(priv, 100);
  2251. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2252. iwlcore_commit_rxon(priv);
  2253. }
  2254. if (priv->vif == conf->vif) {
  2255. priv->vif = NULL;
  2256. memset(priv->bssid, 0, ETH_ALEN);
  2257. }
  2258. mutex_unlock(&priv->mutex);
  2259. IWL_DEBUG_MAC80211(priv, "leave\n");
  2260. }
  2261. EXPORT_SYMBOL(iwl_mac_remove_interface);
  2262. /**
  2263. * iwl_mac_config - mac80211 config callback
  2264. *
  2265. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  2266. * be set inappropriately and the driver currently sets the hardware up to
  2267. * use it whenever needed.
  2268. */
  2269. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  2270. {
  2271. struct iwl_priv *priv = hw->priv;
  2272. const struct iwl_channel_info *ch_info;
  2273. struct ieee80211_conf *conf = &hw->conf;
  2274. unsigned long flags = 0;
  2275. int ret = 0;
  2276. u16 ch;
  2277. int scan_active = 0;
  2278. mutex_lock(&priv->mutex);
  2279. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  2280. conf->channel->hw_value, changed);
  2281. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  2282. test_bit(STATUS_SCANNING, &priv->status))) {
  2283. scan_active = 1;
  2284. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  2285. }
  2286. /* during scanning mac80211 will delay channel setting until
  2287. * scan finish with changed = 0
  2288. */
  2289. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  2290. if (scan_active)
  2291. goto set_ch_out;
  2292. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  2293. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  2294. if (!is_channel_valid(ch_info)) {
  2295. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  2296. ret = -EINVAL;
  2297. goto set_ch_out;
  2298. }
  2299. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2300. !is_channel_ibss(ch_info)) {
  2301. IWL_ERR(priv, "channel %d in band %d not "
  2302. "IBSS channel\n",
  2303. conf->channel->hw_value, conf->channel->band);
  2304. ret = -EINVAL;
  2305. goto set_ch_out;
  2306. }
  2307. priv->current_ht_config.is_ht = conf_is_ht(conf);
  2308. spin_lock_irqsave(&priv->lock, flags);
  2309. /* if we are switching from ht to 2.4 clear flags
  2310. * from any ht related info since 2.4 does not
  2311. * support ht */
  2312. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  2313. priv->staging_rxon.flags = 0;
  2314. iwl_set_rxon_channel(priv, conf->channel);
  2315. iwl_set_flags_for_band(priv, conf->channel->band);
  2316. spin_unlock_irqrestore(&priv->lock, flags);
  2317. set_ch_out:
  2318. /* The list of supported rates and rate mask can be different
  2319. * for each band; since the band may have changed, reset
  2320. * the rate mask to what mac80211 lists */
  2321. iwl_set_rate(priv);
  2322. }
  2323. if (changed & IEEE80211_CONF_CHANGE_PS &&
  2324. priv->iw_mode == NL80211_IFTYPE_STATION) {
  2325. priv->power_data.power_disabled =
  2326. !(conf->flags & IEEE80211_CONF_PS);
  2327. ret = iwl_power_update_mode(priv, 0);
  2328. if (ret)
  2329. IWL_DEBUG_MAC80211(priv, "Error setting power level\n");
  2330. }
  2331. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  2332. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  2333. priv->tx_power_user_lmt, conf->power_level);
  2334. iwl_set_tx_power(priv, conf->power_level, false);
  2335. }
  2336. /* call to ensure that 4965 rx_chain is set properly in monitor mode */
  2337. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2338. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2339. if (!iwl_is_ready(priv)) {
  2340. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2341. goto out;
  2342. }
  2343. if (scan_active)
  2344. goto out;
  2345. if (memcmp(&priv->active_rxon,
  2346. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2347. iwlcore_commit_rxon(priv);
  2348. else
  2349. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  2350. out:
  2351. IWL_DEBUG_MAC80211(priv, "leave\n");
  2352. mutex_unlock(&priv->mutex);
  2353. return ret;
  2354. }
  2355. EXPORT_SYMBOL(iwl_mac_config);
  2356. int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  2357. struct ieee80211_tx_queue_stats *stats)
  2358. {
  2359. struct iwl_priv *priv = hw->priv;
  2360. int i, avail;
  2361. struct iwl_tx_queue *txq;
  2362. struct iwl_queue *q;
  2363. unsigned long flags;
  2364. IWL_DEBUG_MAC80211(priv, "enter\n");
  2365. if (!iwl_is_ready_rf(priv)) {
  2366. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2367. return -EIO;
  2368. }
  2369. spin_lock_irqsave(&priv->lock, flags);
  2370. for (i = 0; i < AC_NUM; i++) {
  2371. txq = &priv->txq[i];
  2372. q = &txq->q;
  2373. avail = iwl_queue_space(q);
  2374. stats[i].len = q->n_window - avail;
  2375. stats[i].limit = q->n_window - q->high_mark;
  2376. stats[i].count = q->n_window;
  2377. }
  2378. spin_unlock_irqrestore(&priv->lock, flags);
  2379. IWL_DEBUG_MAC80211(priv, "leave\n");
  2380. return 0;
  2381. }
  2382. EXPORT_SYMBOL(iwl_mac_get_tx_stats);
  2383. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2384. {
  2385. struct iwl_priv *priv = hw->priv;
  2386. unsigned long flags;
  2387. mutex_lock(&priv->mutex);
  2388. IWL_DEBUG_MAC80211(priv, "enter\n");
  2389. spin_lock_irqsave(&priv->lock, flags);
  2390. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  2391. spin_unlock_irqrestore(&priv->lock, flags);
  2392. iwl_reset_qos(priv);
  2393. spin_lock_irqsave(&priv->lock, flags);
  2394. priv->assoc_id = 0;
  2395. priv->assoc_capability = 0;
  2396. priv->assoc_station_added = 0;
  2397. /* new association get rid of ibss beacon skb */
  2398. if (priv->ibss_beacon)
  2399. dev_kfree_skb(priv->ibss_beacon);
  2400. priv->ibss_beacon = NULL;
  2401. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  2402. priv->timestamp = 0;
  2403. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  2404. priv->beacon_int = 0;
  2405. spin_unlock_irqrestore(&priv->lock, flags);
  2406. if (!iwl_is_ready_rf(priv)) {
  2407. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2408. mutex_unlock(&priv->mutex);
  2409. return;
  2410. }
  2411. /* we are restarting association process
  2412. * clear RXON_FILTER_ASSOC_MSK bit
  2413. */
  2414. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2415. iwl_scan_cancel_timeout(priv, 100);
  2416. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2417. iwlcore_commit_rxon(priv);
  2418. }
  2419. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2420. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  2421. mutex_unlock(&priv->mutex);
  2422. return;
  2423. }
  2424. iwl_set_rate(priv);
  2425. mutex_unlock(&priv->mutex);
  2426. IWL_DEBUG_MAC80211(priv, "leave\n");
  2427. }
  2428. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  2429. #ifdef CONFIG_IWLWIFI_DEBUGFS
  2430. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  2431. void iwl_reset_traffic_log(struct iwl_priv *priv)
  2432. {
  2433. priv->tx_traffic_idx = 0;
  2434. priv->rx_traffic_idx = 0;
  2435. if (priv->tx_traffic)
  2436. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2437. if (priv->rx_traffic)
  2438. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2439. }
  2440. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2441. {
  2442. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2443. if (iwl_debug_level & IWL_DL_TX) {
  2444. if (!priv->tx_traffic) {
  2445. priv->tx_traffic =
  2446. kzalloc(traffic_size, GFP_KERNEL);
  2447. if (!priv->tx_traffic)
  2448. return -ENOMEM;
  2449. }
  2450. }
  2451. if (iwl_debug_level & IWL_DL_RX) {
  2452. if (!priv->rx_traffic) {
  2453. priv->rx_traffic =
  2454. kzalloc(traffic_size, GFP_KERNEL);
  2455. if (!priv->rx_traffic)
  2456. return -ENOMEM;
  2457. }
  2458. }
  2459. iwl_reset_traffic_log(priv);
  2460. return 0;
  2461. }
  2462. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2463. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2464. {
  2465. kfree(priv->tx_traffic);
  2466. priv->tx_traffic = NULL;
  2467. kfree(priv->rx_traffic);
  2468. priv->rx_traffic = NULL;
  2469. }
  2470. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2471. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2472. u16 length, struct ieee80211_hdr *header)
  2473. {
  2474. __le16 fc;
  2475. u16 len;
  2476. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2477. return;
  2478. if (!priv->tx_traffic)
  2479. return;
  2480. fc = header->frame_control;
  2481. if (ieee80211_is_data(fc)) {
  2482. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2483. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2484. memcpy((priv->tx_traffic +
  2485. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2486. header, len);
  2487. priv->tx_traffic_idx =
  2488. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2489. }
  2490. }
  2491. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2492. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2493. u16 length, struct ieee80211_hdr *header)
  2494. {
  2495. __le16 fc;
  2496. u16 len;
  2497. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2498. return;
  2499. if (!priv->rx_traffic)
  2500. return;
  2501. fc = header->frame_control;
  2502. if (ieee80211_is_data(fc)) {
  2503. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2504. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2505. memcpy((priv->rx_traffic +
  2506. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2507. header, len);
  2508. priv->rx_traffic_idx =
  2509. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2510. }
  2511. }
  2512. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2513. const char *get_mgmt_string(int cmd)
  2514. {
  2515. switch (cmd) {
  2516. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2517. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2518. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2519. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2520. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2521. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2522. IWL_CMD(MANAGEMENT_BEACON);
  2523. IWL_CMD(MANAGEMENT_ATIM);
  2524. IWL_CMD(MANAGEMENT_DISASSOC);
  2525. IWL_CMD(MANAGEMENT_AUTH);
  2526. IWL_CMD(MANAGEMENT_DEAUTH);
  2527. IWL_CMD(MANAGEMENT_ACTION);
  2528. default:
  2529. return "UNKNOWN";
  2530. }
  2531. }
  2532. const char *get_ctrl_string(int cmd)
  2533. {
  2534. switch (cmd) {
  2535. IWL_CMD(CONTROL_BACK_REQ);
  2536. IWL_CMD(CONTROL_BACK);
  2537. IWL_CMD(CONTROL_PSPOLL);
  2538. IWL_CMD(CONTROL_RTS);
  2539. IWL_CMD(CONTROL_CTS);
  2540. IWL_CMD(CONTROL_ACK);
  2541. IWL_CMD(CONTROL_CFEND);
  2542. IWL_CMD(CONTROL_CFENDACK);
  2543. default:
  2544. return "UNKNOWN";
  2545. }
  2546. }
  2547. void iwl_clear_tx_stats(struct iwl_priv *priv)
  2548. {
  2549. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2550. }
  2551. void iwl_clear_rx_stats(struct iwl_priv *priv)
  2552. {
  2553. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2554. }
  2555. /*
  2556. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2557. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2558. * Use debugFs to display the rx/rx_statistics
  2559. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2560. * information will be recorded, but DATA pkt still will be recorded
  2561. * for the reason of iwl_led.c need to control the led blinking based on
  2562. * number of tx and rx data.
  2563. *
  2564. */
  2565. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2566. {
  2567. struct traffic_stats *stats;
  2568. if (is_tx)
  2569. stats = &priv->tx_stats;
  2570. else
  2571. stats = &priv->rx_stats;
  2572. if (ieee80211_is_mgmt(fc)) {
  2573. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2574. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2575. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2576. break;
  2577. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2578. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2579. break;
  2580. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2581. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2582. break;
  2583. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2584. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2585. break;
  2586. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2587. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2588. break;
  2589. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2590. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2591. break;
  2592. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2593. stats->mgmt[MANAGEMENT_BEACON]++;
  2594. break;
  2595. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2596. stats->mgmt[MANAGEMENT_ATIM]++;
  2597. break;
  2598. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2599. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2600. break;
  2601. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2602. stats->mgmt[MANAGEMENT_AUTH]++;
  2603. break;
  2604. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2605. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2606. break;
  2607. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2608. stats->mgmt[MANAGEMENT_ACTION]++;
  2609. break;
  2610. }
  2611. } else if (ieee80211_is_ctl(fc)) {
  2612. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2613. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2614. stats->ctrl[CONTROL_BACK_REQ]++;
  2615. break;
  2616. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2617. stats->ctrl[CONTROL_BACK]++;
  2618. break;
  2619. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2620. stats->ctrl[CONTROL_PSPOLL]++;
  2621. break;
  2622. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2623. stats->ctrl[CONTROL_RTS]++;
  2624. break;
  2625. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2626. stats->ctrl[CONTROL_CTS]++;
  2627. break;
  2628. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2629. stats->ctrl[CONTROL_ACK]++;
  2630. break;
  2631. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2632. stats->ctrl[CONTROL_CFEND]++;
  2633. break;
  2634. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2635. stats->ctrl[CONTROL_CFENDACK]++;
  2636. break;
  2637. }
  2638. } else {
  2639. /* data */
  2640. stats->data_cnt++;
  2641. stats->data_bytes += len;
  2642. }
  2643. }
  2644. EXPORT_SYMBOL(iwl_update_stats);
  2645. #else
  2646. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2647. {
  2648. struct traffic_stats *stats;
  2649. if (is_tx)
  2650. stats = &priv->tx_stats;
  2651. else
  2652. stats = &priv->rx_stats;
  2653. if (ieee80211_is_data(fc)) {
  2654. /* data */
  2655. stats->data_bytes += len;
  2656. }
  2657. }
  2658. #endif
  2659. #ifdef CONFIG_PM
  2660. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2661. {
  2662. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2663. /*
  2664. * This function is called when system goes into suspend state
  2665. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2666. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2667. * it will not call apm_ops.stop() to stop the DMA operation.
  2668. * Calling apm_ops.stop here to make sure we stop the DMA.
  2669. */
  2670. priv->cfg->ops->lib->apm_ops.stop(priv);
  2671. pci_save_state(pdev);
  2672. pci_disable_device(pdev);
  2673. pci_set_power_state(pdev, PCI_D3hot);
  2674. return 0;
  2675. }
  2676. EXPORT_SYMBOL(iwl_pci_suspend);
  2677. int iwl_pci_resume(struct pci_dev *pdev)
  2678. {
  2679. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2680. int ret;
  2681. pci_set_power_state(pdev, PCI_D0);
  2682. ret = pci_enable_device(pdev);
  2683. if (ret)
  2684. return ret;
  2685. pci_restore_state(pdev);
  2686. iwl_enable_interrupts(priv);
  2687. return 0;
  2688. }
  2689. EXPORT_SYMBOL(iwl_pci_resume);
  2690. #endif /* CONFIG_PM */