hp_sdc.c 28 KB

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  1. /*
  2. * HP i8042-based System Device Controller driver.
  3. *
  4. * Copyright (c) 2001 Brian S. Julin
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. The name of the author may not be used to endorse or promote products
  14. * derived from this software without specific prior written permission.
  15. *
  16. * Alternatively, this software may be distributed under the terms of the
  17. * GNU General Public License ("GPL").
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28. *
  29. * References:
  30. * System Device Controller Microprocessor Firmware Theory of Operation
  31. * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
  32. * Helge Deller's original hilkbd.c port for PA-RISC.
  33. *
  34. *
  35. * Driver theory of operation:
  36. *
  37. * hp_sdc_put does all writing to the SDC. ISR can run on a different
  38. * CPU than hp_sdc_put, but only one CPU runs hp_sdc_put at a time
  39. * (it cannot really benefit from SMP anyway.) A tasket fit this perfectly.
  40. *
  41. * All data coming back from the SDC is sent via interrupt and can be read
  42. * fully in the ISR, so there are no latency/throughput problems there.
  43. * The problem is with output, due to the slow clock speed of the SDC
  44. * compared to the CPU. This should not be too horrible most of the time,
  45. * but if used with HIL devices that support the multibyte transfer command,
  46. * keeping outbound throughput flowing at the 6500KBps that the HIL is
  47. * capable of is more than can be done at HZ=100.
  48. *
  49. * Busy polling for IBF clear wastes CPU cycles and bus cycles. hp_sdc.ibf
  50. * is set to 0 when the IBF flag in the status register has cleared. ISR
  51. * may do this, and may also access the parts of queued transactions related
  52. * to reading data back from the SDC, but otherwise will not touch the
  53. * hp_sdc state. Whenever a register is written hp_sdc.ibf is set to 1.
  54. *
  55. * The i8042 write index and the values in the 4-byte input buffer
  56. * starting at 0x70 are kept track of in hp_sdc.wi, and .r7[], respectively,
  57. * to minimize the amount of IO needed to the SDC. However these values
  58. * do not need to be locked since they are only ever accessed by hp_sdc_put.
  59. *
  60. * A timer task schedules the tasklet once per second just to make
  61. * sure it doesn't freeze up and to allow for bad reads to time out.
  62. */
  63. #include <linux/hp_sdc.h>
  64. #include <linux/errno.h>
  65. #include <linux/init.h>
  66. #include <linux/module.h>
  67. #include <linux/ioport.h>
  68. #include <linux/time.h>
  69. #include <linux/slab.h>
  70. #include <linux/hil.h>
  71. #include <asm/io.h>
  72. #include <asm/system.h>
  73. /* Machine-specific abstraction */
  74. #if defined(__hppa__)
  75. # include <asm/parisc-device.h>
  76. # define sdc_readb(p) gsc_readb(p)
  77. # define sdc_writeb(v,p) gsc_writeb((v),(p))
  78. #elif defined(__mc68000__)
  79. # include <asm/uaccess.h>
  80. # define sdc_readb(p) in_8(p)
  81. # define sdc_writeb(v,p) out_8((p),(v))
  82. #else
  83. # error "HIL is not supported on this platform"
  84. #endif
  85. #define PREFIX "HP SDC: "
  86. MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
  87. MODULE_DESCRIPTION("HP i8042-based SDC Driver");
  88. MODULE_LICENSE("Dual BSD/GPL");
  89. EXPORT_SYMBOL(hp_sdc_request_timer_irq);
  90. EXPORT_SYMBOL(hp_sdc_request_hil_irq);
  91. EXPORT_SYMBOL(hp_sdc_request_cooked_irq);
  92. EXPORT_SYMBOL(hp_sdc_release_timer_irq);
  93. EXPORT_SYMBOL(hp_sdc_release_hil_irq);
  94. EXPORT_SYMBOL(hp_sdc_release_cooked_irq);
  95. EXPORT_SYMBOL(hp_sdc_enqueue_transaction);
  96. EXPORT_SYMBOL(hp_sdc_dequeue_transaction);
  97. static hp_i8042_sdc hp_sdc; /* All driver state is kept in here. */
  98. /*************** primitives for use in any context *********************/
  99. static inline uint8_t hp_sdc_status_in8 (void) {
  100. uint8_t status;
  101. unsigned long flags;
  102. write_lock_irqsave(&hp_sdc.ibf_lock, flags);
  103. status = sdc_readb(hp_sdc.status_io);
  104. if (!(status & HP_SDC_STATUS_IBF)) hp_sdc.ibf = 0;
  105. write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
  106. return status;
  107. }
  108. static inline uint8_t hp_sdc_data_in8 (void) {
  109. return sdc_readb(hp_sdc.data_io);
  110. }
  111. static inline void hp_sdc_status_out8 (uint8_t val) {
  112. unsigned long flags;
  113. write_lock_irqsave(&hp_sdc.ibf_lock, flags);
  114. hp_sdc.ibf = 1;
  115. if ((val & 0xf0) == 0xe0) hp_sdc.wi = 0xff;
  116. sdc_writeb(val, hp_sdc.status_io);
  117. write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
  118. }
  119. static inline void hp_sdc_data_out8 (uint8_t val) {
  120. unsigned long flags;
  121. write_lock_irqsave(&hp_sdc.ibf_lock, flags);
  122. hp_sdc.ibf = 1;
  123. sdc_writeb(val, hp_sdc.data_io);
  124. write_unlock_irqrestore(&hp_sdc.ibf_lock, flags);
  125. }
  126. /* Care must be taken to only invoke hp_sdc_spin_ibf when
  127. * absolutely needed, or in rarely invoked subroutines.
  128. * Not only does it waste CPU cycles, it also wastes bus cycles.
  129. */
  130. static inline void hp_sdc_spin_ibf(void) {
  131. unsigned long flags;
  132. rwlock_t *lock;
  133. lock = &hp_sdc.ibf_lock;
  134. read_lock_irqsave(lock, flags);
  135. if (!hp_sdc.ibf) {
  136. read_unlock_irqrestore(lock, flags);
  137. return;
  138. }
  139. read_unlock(lock);
  140. write_lock(lock);
  141. while (sdc_readb(hp_sdc.status_io) & HP_SDC_STATUS_IBF) {};
  142. hp_sdc.ibf = 0;
  143. write_unlock_irqrestore(lock, flags);
  144. }
  145. /************************ Interrupt context functions ************************/
  146. static void hp_sdc_take (int irq, void *dev_id, uint8_t status, uint8_t data) {
  147. hp_sdc_transaction *curr;
  148. read_lock(&hp_sdc.rtq_lock);
  149. if (hp_sdc.rcurr < 0) {
  150. read_unlock(&hp_sdc.rtq_lock);
  151. return;
  152. }
  153. curr = hp_sdc.tq[hp_sdc.rcurr];
  154. read_unlock(&hp_sdc.rtq_lock);
  155. curr->seq[curr->idx++] = status;
  156. curr->seq[curr->idx++] = data;
  157. hp_sdc.rqty -= 2;
  158. do_gettimeofday(&hp_sdc.rtv);
  159. if (hp_sdc.rqty <= 0) {
  160. /* All data has been gathered. */
  161. if(curr->seq[curr->actidx] & HP_SDC_ACT_SEMAPHORE) {
  162. if (curr->act.semaphore) up(curr->act.semaphore);
  163. }
  164. if(curr->seq[curr->actidx] & HP_SDC_ACT_CALLBACK) {
  165. if (curr->act.irqhook)
  166. curr->act.irqhook(irq, dev_id, status, data);
  167. }
  168. curr->actidx = curr->idx;
  169. curr->idx++;
  170. /* Return control of this transaction */
  171. write_lock(&hp_sdc.rtq_lock);
  172. hp_sdc.rcurr = -1;
  173. hp_sdc.rqty = 0;
  174. write_unlock(&hp_sdc.rtq_lock);
  175. tasklet_schedule(&hp_sdc.task);
  176. }
  177. }
  178. static irqreturn_t hp_sdc_isr(int irq, void *dev_id) {
  179. uint8_t status, data;
  180. status = hp_sdc_status_in8();
  181. /* Read data unconditionally to advance i8042. */
  182. data = hp_sdc_data_in8();
  183. /* For now we are ignoring these until we get the SDC to behave. */
  184. if (((status & 0xf1) == 0x51) && data == 0x82) {
  185. return IRQ_HANDLED;
  186. }
  187. switch(status & HP_SDC_STATUS_IRQMASK) {
  188. case 0: /* This case is not documented. */
  189. break;
  190. case HP_SDC_STATUS_USERTIMER:
  191. case HP_SDC_STATUS_PERIODIC:
  192. case HP_SDC_STATUS_TIMER:
  193. read_lock(&hp_sdc.hook_lock);
  194. if (hp_sdc.timer != NULL)
  195. hp_sdc.timer(irq, dev_id, status, data);
  196. read_unlock(&hp_sdc.hook_lock);
  197. break;
  198. case HP_SDC_STATUS_REG:
  199. hp_sdc_take(irq, dev_id, status, data);
  200. break;
  201. case HP_SDC_STATUS_HILCMD:
  202. case HP_SDC_STATUS_HILDATA:
  203. read_lock(&hp_sdc.hook_lock);
  204. if (hp_sdc.hil != NULL)
  205. hp_sdc.hil(irq, dev_id, status, data);
  206. read_unlock(&hp_sdc.hook_lock);
  207. break;
  208. case HP_SDC_STATUS_PUP:
  209. read_lock(&hp_sdc.hook_lock);
  210. if (hp_sdc.pup != NULL)
  211. hp_sdc.pup(irq, dev_id, status, data);
  212. else printk(KERN_INFO PREFIX "HP SDC reports successful PUP.\n");
  213. read_unlock(&hp_sdc.hook_lock);
  214. break;
  215. default:
  216. read_lock(&hp_sdc.hook_lock);
  217. if (hp_sdc.cooked != NULL)
  218. hp_sdc.cooked(irq, dev_id, status, data);
  219. read_unlock(&hp_sdc.hook_lock);
  220. break;
  221. }
  222. return IRQ_HANDLED;
  223. }
  224. static irqreturn_t hp_sdc_nmisr(int irq, void *dev_id) {
  225. int status;
  226. status = hp_sdc_status_in8();
  227. printk(KERN_WARNING PREFIX "NMI !\n");
  228. #if 0
  229. if (status & HP_SDC_NMISTATUS_FHS) {
  230. read_lock(&hp_sdc.hook_lock);
  231. if (hp_sdc.timer != NULL)
  232. hp_sdc.timer(irq, dev_id, status, 0);
  233. read_unlock(&hp_sdc.hook_lock);
  234. }
  235. else {
  236. /* TODO: pass this on to the HIL handler, or do SAK here? */
  237. printk(KERN_WARNING PREFIX "HIL NMI\n");
  238. }
  239. #endif
  240. return IRQ_HANDLED;
  241. }
  242. /***************** Kernel (tasklet) context functions ****************/
  243. unsigned long hp_sdc_put(void);
  244. static void hp_sdc_tasklet(unsigned long foo) {
  245. write_lock_irq(&hp_sdc.rtq_lock);
  246. if (hp_sdc.rcurr >= 0) {
  247. struct timeval tv;
  248. do_gettimeofday(&tv);
  249. if (tv.tv_sec > hp_sdc.rtv.tv_sec) tv.tv_usec += 1000000;
  250. if (tv.tv_usec - hp_sdc.rtv.tv_usec > HP_SDC_MAX_REG_DELAY) {
  251. hp_sdc_transaction *curr;
  252. uint8_t tmp;
  253. curr = hp_sdc.tq[hp_sdc.rcurr];
  254. /* If this turns out to be a normal failure mode
  255. * we'll need to figure out a way to communicate
  256. * it back to the application. and be less verbose.
  257. */
  258. printk(KERN_WARNING PREFIX "read timeout (%ius)!\n",
  259. tv.tv_usec - hp_sdc.rtv.tv_usec);
  260. curr->idx += hp_sdc.rqty;
  261. hp_sdc.rqty = 0;
  262. tmp = curr->seq[curr->actidx];
  263. curr->seq[curr->actidx] |= HP_SDC_ACT_DEAD;
  264. if(tmp & HP_SDC_ACT_SEMAPHORE) {
  265. if (curr->act.semaphore)
  266. up(curr->act.semaphore);
  267. }
  268. if(tmp & HP_SDC_ACT_CALLBACK) {
  269. /* Note this means that irqhooks may be called
  270. * in tasklet/bh context.
  271. */
  272. if (curr->act.irqhook)
  273. curr->act.irqhook(0, NULL, 0, 0);
  274. }
  275. curr->actidx = curr->idx;
  276. curr->idx++;
  277. hp_sdc.rcurr = -1;
  278. }
  279. }
  280. write_unlock_irq(&hp_sdc.rtq_lock);
  281. hp_sdc_put();
  282. }
  283. unsigned long hp_sdc_put(void) {
  284. hp_sdc_transaction *curr;
  285. uint8_t act;
  286. int idx, curridx;
  287. int limit = 0;
  288. write_lock(&hp_sdc.lock);
  289. /* If i8042 buffers are full, we cannot do anything that
  290. requires output, so we skip to the administrativa. */
  291. if (hp_sdc.ibf) {
  292. hp_sdc_status_in8();
  293. if (hp_sdc.ibf) goto finish;
  294. }
  295. anew:
  296. /* See if we are in the middle of a sequence. */
  297. if (hp_sdc.wcurr < 0) hp_sdc.wcurr = 0;
  298. read_lock_irq(&hp_sdc.rtq_lock);
  299. if (hp_sdc.rcurr == hp_sdc.wcurr) hp_sdc.wcurr++;
  300. read_unlock_irq(&hp_sdc.rtq_lock);
  301. if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN) hp_sdc.wcurr = 0;
  302. curridx = hp_sdc.wcurr;
  303. if (hp_sdc.tq[curridx] != NULL) goto start;
  304. while (++curridx != hp_sdc.wcurr) {
  305. if (curridx >= HP_SDC_QUEUE_LEN) {
  306. curridx = -1; /* Wrap to top */
  307. continue;
  308. }
  309. read_lock_irq(&hp_sdc.rtq_lock);
  310. if (hp_sdc.rcurr == curridx) {
  311. read_unlock_irq(&hp_sdc.rtq_lock);
  312. continue;
  313. }
  314. read_unlock_irq(&hp_sdc.rtq_lock);
  315. if (hp_sdc.tq[curridx] != NULL) break; /* Found one. */
  316. }
  317. if (curridx == hp_sdc.wcurr) { /* There's nothing queued to do. */
  318. curridx = -1;
  319. }
  320. hp_sdc.wcurr = curridx;
  321. start:
  322. /* Check to see if the interrupt mask needs to be set. */
  323. if (hp_sdc.set_im) {
  324. hp_sdc_status_out8(hp_sdc.im | HP_SDC_CMD_SET_IM);
  325. hp_sdc.set_im = 0;
  326. goto finish;
  327. }
  328. if (hp_sdc.wcurr == -1) goto done;
  329. curr = hp_sdc.tq[curridx];
  330. idx = curr->actidx;
  331. if (curr->actidx >= curr->endidx) {
  332. hp_sdc.tq[curridx] = NULL;
  333. /* Interleave outbound data between the transactions. */
  334. hp_sdc.wcurr++;
  335. if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN) hp_sdc.wcurr = 0;
  336. goto finish;
  337. }
  338. act = curr->seq[idx];
  339. idx++;
  340. if (curr->idx >= curr->endidx) {
  341. if (act & HP_SDC_ACT_DEALLOC) kfree(curr);
  342. hp_sdc.tq[curridx] = NULL;
  343. /* Interleave outbound data between the transactions. */
  344. hp_sdc.wcurr++;
  345. if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN) hp_sdc.wcurr = 0;
  346. goto finish;
  347. }
  348. while (act & HP_SDC_ACT_PRECMD) {
  349. if (curr->idx != idx) {
  350. idx++;
  351. act &= ~HP_SDC_ACT_PRECMD;
  352. break;
  353. }
  354. hp_sdc_status_out8(curr->seq[idx]);
  355. curr->idx++;
  356. /* act finished? */
  357. if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_PRECMD)
  358. goto actdone;
  359. /* skip quantity field if data-out sequence follows. */
  360. if (act & HP_SDC_ACT_DATAOUT) curr->idx++;
  361. goto finish;
  362. }
  363. if (act & HP_SDC_ACT_DATAOUT) {
  364. int qty;
  365. qty = curr->seq[idx];
  366. idx++;
  367. if (curr->idx - idx < qty) {
  368. hp_sdc_data_out8(curr->seq[curr->idx]);
  369. curr->idx++;
  370. /* act finished? */
  371. if ((curr->idx - idx >= qty) &&
  372. ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAOUT))
  373. goto actdone;
  374. goto finish;
  375. }
  376. idx += qty;
  377. act &= ~HP_SDC_ACT_DATAOUT;
  378. }
  379. else while (act & HP_SDC_ACT_DATAREG) {
  380. int mask;
  381. uint8_t w7[4];
  382. mask = curr->seq[idx];
  383. if (idx != curr->idx) {
  384. idx++;
  385. idx += !!(mask & 1);
  386. idx += !!(mask & 2);
  387. idx += !!(mask & 4);
  388. idx += !!(mask & 8);
  389. act &= ~HP_SDC_ACT_DATAREG;
  390. break;
  391. }
  392. w7[0] = (mask & 1) ? curr->seq[++idx] : hp_sdc.r7[0];
  393. w7[1] = (mask & 2) ? curr->seq[++idx] : hp_sdc.r7[1];
  394. w7[2] = (mask & 4) ? curr->seq[++idx] : hp_sdc.r7[2];
  395. w7[3] = (mask & 8) ? curr->seq[++idx] : hp_sdc.r7[3];
  396. if (hp_sdc.wi > 0x73 || hp_sdc.wi < 0x70 ||
  397. w7[hp_sdc.wi-0x70] == hp_sdc.r7[hp_sdc.wi-0x70]) {
  398. int i = 0;
  399. /* Need to point the write index register */
  400. while ((i < 4) && w7[i] == hp_sdc.r7[i]) i++;
  401. if (i < 4) {
  402. hp_sdc_status_out8(HP_SDC_CMD_SET_D0 + i);
  403. hp_sdc.wi = 0x70 + i;
  404. goto finish;
  405. }
  406. idx++;
  407. if ((act & HP_SDC_ACT_DURING) == HP_SDC_ACT_DATAREG)
  408. goto actdone;
  409. curr->idx = idx;
  410. act &= ~HP_SDC_ACT_DATAREG;
  411. break;
  412. }
  413. hp_sdc_data_out8(w7[hp_sdc.wi - 0x70]);
  414. hp_sdc.r7[hp_sdc.wi - 0x70] = w7[hp_sdc.wi - 0x70];
  415. hp_sdc.wi++; /* write index register autoincrements */
  416. {
  417. int i = 0;
  418. while ((i < 4) && w7[i] == hp_sdc.r7[i]) i++;
  419. if (i >= 4) {
  420. curr->idx = idx + 1;
  421. if ((act & HP_SDC_ACT_DURING) ==
  422. HP_SDC_ACT_DATAREG)
  423. goto actdone;
  424. }
  425. }
  426. goto finish;
  427. }
  428. /* We don't go any further in the command if there is a pending read,
  429. because we don't want interleaved results. */
  430. read_lock_irq(&hp_sdc.rtq_lock);
  431. if (hp_sdc.rcurr >= 0) {
  432. read_unlock_irq(&hp_sdc.rtq_lock);
  433. goto finish;
  434. }
  435. read_unlock_irq(&hp_sdc.rtq_lock);
  436. if (act & HP_SDC_ACT_POSTCMD) {
  437. uint8_t postcmd;
  438. /* curr->idx should == idx at this point. */
  439. postcmd = curr->seq[idx];
  440. curr->idx++;
  441. if (act & HP_SDC_ACT_DATAIN) {
  442. /* Start a new read */
  443. hp_sdc.rqty = curr->seq[curr->idx];
  444. do_gettimeofday(&hp_sdc.rtv);
  445. curr->idx++;
  446. /* Still need to lock here in case of spurious irq. */
  447. write_lock_irq(&hp_sdc.rtq_lock);
  448. hp_sdc.rcurr = curridx;
  449. write_unlock_irq(&hp_sdc.rtq_lock);
  450. hp_sdc_status_out8(postcmd);
  451. goto finish;
  452. }
  453. hp_sdc_status_out8(postcmd);
  454. goto actdone;
  455. }
  456. actdone:
  457. if (act & HP_SDC_ACT_SEMAPHORE) {
  458. up(curr->act.semaphore);
  459. }
  460. else if (act & HP_SDC_ACT_CALLBACK) {
  461. curr->act.irqhook(0,NULL,0,0);
  462. }
  463. if (curr->idx >= curr->endidx) { /* This transaction is over. */
  464. if (act & HP_SDC_ACT_DEALLOC) kfree(curr);
  465. hp_sdc.tq[curridx] = NULL;
  466. }
  467. else {
  468. curr->actidx = idx + 1;
  469. curr->idx = idx + 2;
  470. }
  471. /* Interleave outbound data between the transactions. */
  472. hp_sdc.wcurr++;
  473. if (hp_sdc.wcurr >= HP_SDC_QUEUE_LEN) hp_sdc.wcurr = 0;
  474. finish:
  475. /* If by some quirk IBF has cleared and our ISR has run to
  476. see that that has happened, do it all again. */
  477. if (!hp_sdc.ibf && limit++ < 20) goto anew;
  478. done:
  479. if (hp_sdc.wcurr >= 0) tasklet_schedule(&hp_sdc.task);
  480. write_unlock(&hp_sdc.lock);
  481. return 0;
  482. }
  483. /******* Functions called in either user or kernel context ****/
  484. int hp_sdc_enqueue_transaction(hp_sdc_transaction *this) {
  485. unsigned long flags;
  486. int i;
  487. if (this == NULL) {
  488. tasklet_schedule(&hp_sdc.task);
  489. return -EINVAL;
  490. };
  491. write_lock_irqsave(&hp_sdc.lock, flags);
  492. /* Can't have same transaction on queue twice */
  493. for (i=0; i < HP_SDC_QUEUE_LEN; i++)
  494. if (hp_sdc.tq[i] == this) goto fail;
  495. this->actidx = 0;
  496. this->idx = 1;
  497. /* Search for empty slot */
  498. for (i=0; i < HP_SDC_QUEUE_LEN; i++) {
  499. if (hp_sdc.tq[i] == NULL) {
  500. hp_sdc.tq[i] = this;
  501. write_unlock_irqrestore(&hp_sdc.lock, flags);
  502. tasklet_schedule(&hp_sdc.task);
  503. return 0;
  504. }
  505. }
  506. write_unlock_irqrestore(&hp_sdc.lock, flags);
  507. printk(KERN_WARNING PREFIX "No free slot to add transaction.\n");
  508. return -EBUSY;
  509. fail:
  510. write_unlock_irqrestore(&hp_sdc.lock,flags);
  511. printk(KERN_WARNING PREFIX "Transaction add failed: transaction already queued?\n");
  512. return -EINVAL;
  513. }
  514. int hp_sdc_dequeue_transaction(hp_sdc_transaction *this) {
  515. unsigned long flags;
  516. int i;
  517. write_lock_irqsave(&hp_sdc.lock, flags);
  518. /* TODO: don't remove it if it's not done. */
  519. for (i=0; i < HP_SDC_QUEUE_LEN; i++)
  520. if (hp_sdc.tq[i] == this) hp_sdc.tq[i] = NULL;
  521. write_unlock_irqrestore(&hp_sdc.lock, flags);
  522. return 0;
  523. }
  524. /********************** User context functions **************************/
  525. int hp_sdc_request_timer_irq(hp_sdc_irqhook *callback) {
  526. if (callback == NULL || hp_sdc.dev == NULL) {
  527. return -EINVAL;
  528. }
  529. write_lock_irq(&hp_sdc.hook_lock);
  530. if (hp_sdc.timer != NULL) {
  531. write_unlock_irq(&hp_sdc.hook_lock);
  532. return -EBUSY;
  533. }
  534. hp_sdc.timer = callback;
  535. /* Enable interrupts from the timers */
  536. hp_sdc.im &= ~HP_SDC_IM_FH;
  537. hp_sdc.im &= ~HP_SDC_IM_PT;
  538. hp_sdc.im &= ~HP_SDC_IM_TIMERS;
  539. hp_sdc.set_im = 1;
  540. write_unlock_irq(&hp_sdc.hook_lock);
  541. tasklet_schedule(&hp_sdc.task);
  542. return 0;
  543. }
  544. int hp_sdc_request_hil_irq(hp_sdc_irqhook *callback) {
  545. if (callback == NULL || hp_sdc.dev == NULL) {
  546. return -EINVAL;
  547. }
  548. write_lock_irq(&hp_sdc.hook_lock);
  549. if (hp_sdc.hil != NULL) {
  550. write_unlock_irq(&hp_sdc.hook_lock);
  551. return -EBUSY;
  552. }
  553. hp_sdc.hil = callback;
  554. hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
  555. hp_sdc.set_im = 1;
  556. write_unlock_irq(&hp_sdc.hook_lock);
  557. tasklet_schedule(&hp_sdc.task);
  558. return 0;
  559. }
  560. int hp_sdc_request_cooked_irq(hp_sdc_irqhook *callback) {
  561. if (callback == NULL || hp_sdc.dev == NULL) {
  562. return -EINVAL;
  563. }
  564. write_lock_irq(&hp_sdc.hook_lock);
  565. if (hp_sdc.cooked != NULL) {
  566. write_unlock_irq(&hp_sdc.hook_lock);
  567. return -EBUSY;
  568. }
  569. /* Enable interrupts from the HIL MLC */
  570. hp_sdc.cooked = callback;
  571. hp_sdc.im &= ~(HP_SDC_IM_HIL | HP_SDC_IM_RESET);
  572. hp_sdc.set_im = 1;
  573. write_unlock_irq(&hp_sdc.hook_lock);
  574. tasklet_schedule(&hp_sdc.task);
  575. return 0;
  576. }
  577. int hp_sdc_release_timer_irq(hp_sdc_irqhook *callback) {
  578. write_lock_irq(&hp_sdc.hook_lock);
  579. if ((callback != hp_sdc.timer) ||
  580. (hp_sdc.timer == NULL)) {
  581. write_unlock_irq(&hp_sdc.hook_lock);
  582. return -EINVAL;
  583. }
  584. /* Disable interrupts from the timers */
  585. hp_sdc.timer = NULL;
  586. hp_sdc.im |= HP_SDC_IM_TIMERS;
  587. hp_sdc.im |= HP_SDC_IM_FH;
  588. hp_sdc.im |= HP_SDC_IM_PT;
  589. hp_sdc.set_im = 1;
  590. write_unlock_irq(&hp_sdc.hook_lock);
  591. tasklet_schedule(&hp_sdc.task);
  592. return 0;
  593. }
  594. int hp_sdc_release_hil_irq(hp_sdc_irqhook *callback) {
  595. write_lock_irq(&hp_sdc.hook_lock);
  596. if ((callback != hp_sdc.hil) ||
  597. (hp_sdc.hil == NULL)) {
  598. write_unlock_irq(&hp_sdc.hook_lock);
  599. return -EINVAL;
  600. }
  601. hp_sdc.hil = NULL;
  602. /* Disable interrupts from HIL only if there is no cooked driver. */
  603. if(hp_sdc.cooked == NULL) {
  604. hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
  605. hp_sdc.set_im = 1;
  606. }
  607. write_unlock_irq(&hp_sdc.hook_lock);
  608. tasklet_schedule(&hp_sdc.task);
  609. return 0;
  610. }
  611. int hp_sdc_release_cooked_irq(hp_sdc_irqhook *callback) {
  612. write_lock_irq(&hp_sdc.hook_lock);
  613. if ((callback != hp_sdc.cooked) ||
  614. (hp_sdc.cooked == NULL)) {
  615. write_unlock_irq(&hp_sdc.hook_lock);
  616. return -EINVAL;
  617. }
  618. hp_sdc.cooked = NULL;
  619. /* Disable interrupts from HIL only if there is no raw HIL driver. */
  620. if(hp_sdc.hil == NULL) {
  621. hp_sdc.im |= (HP_SDC_IM_HIL | HP_SDC_IM_RESET);
  622. hp_sdc.set_im = 1;
  623. }
  624. write_unlock_irq(&hp_sdc.hook_lock);
  625. tasklet_schedule(&hp_sdc.task);
  626. return 0;
  627. }
  628. /************************* Keepalive timer task *********************/
  629. void hp_sdc_kicker (unsigned long data) {
  630. tasklet_schedule(&hp_sdc.task);
  631. /* Re-insert the periodic task. */
  632. mod_timer(&hp_sdc.kicker, jiffies + HZ);
  633. }
  634. /************************** Module Initialization ***************************/
  635. #if defined(__hppa__)
  636. static const struct parisc_device_id hp_sdc_tbl[] = {
  637. {
  638. .hw_type = HPHW_FIO,
  639. .hversion_rev = HVERSION_REV_ANY_ID,
  640. .hversion = HVERSION_ANY_ID,
  641. .sversion = 0x73,
  642. },
  643. { 0, }
  644. };
  645. MODULE_DEVICE_TABLE(parisc, hp_sdc_tbl);
  646. static int __init hp_sdc_init_hppa(struct parisc_device *d);
  647. static struct parisc_driver hp_sdc_driver = {
  648. .name = "hp_sdc",
  649. .id_table = hp_sdc_tbl,
  650. .probe = hp_sdc_init_hppa,
  651. };
  652. #endif /* __hppa__ */
  653. static int __init hp_sdc_init(void)
  654. {
  655. int i;
  656. char *errstr;
  657. hp_sdc_transaction t_sync;
  658. uint8_t ts_sync[6];
  659. struct semaphore s_sync;
  660. rwlock_init(&hp_sdc.lock);
  661. rwlock_init(&hp_sdc.ibf_lock);
  662. rwlock_init(&hp_sdc.rtq_lock);
  663. rwlock_init(&hp_sdc.hook_lock);
  664. hp_sdc.timer = NULL;
  665. hp_sdc.hil = NULL;
  666. hp_sdc.pup = NULL;
  667. hp_sdc.cooked = NULL;
  668. hp_sdc.im = HP_SDC_IM_MASK; /* Mask maskable irqs */
  669. hp_sdc.set_im = 1;
  670. hp_sdc.wi = 0xff;
  671. hp_sdc.r7[0] = 0xff;
  672. hp_sdc.r7[1] = 0xff;
  673. hp_sdc.r7[2] = 0xff;
  674. hp_sdc.r7[3] = 0xff;
  675. hp_sdc.ibf = 1;
  676. for (i = 0; i < HP_SDC_QUEUE_LEN; i++) hp_sdc.tq[i] = NULL;
  677. hp_sdc.wcurr = -1;
  678. hp_sdc.rcurr = -1;
  679. hp_sdc.rqty = 0;
  680. hp_sdc.dev_err = -ENODEV;
  681. errstr = "IO not found for";
  682. if (!hp_sdc.base_io) goto err0;
  683. errstr = "IRQ not found for";
  684. if (!hp_sdc.irq) goto err0;
  685. hp_sdc.dev_err = -EBUSY;
  686. #if defined(__hppa__)
  687. errstr = "IO not available for";
  688. if (request_region(hp_sdc.data_io, 2, hp_sdc_driver.name)) goto err0;
  689. #endif
  690. errstr = "IRQ not available for";
  691. if (request_irq(hp_sdc.irq, &hp_sdc_isr, IRQF_SHARED|IRQF_SAMPLE_RANDOM,
  692. "HP SDC", &hp_sdc)) goto err1;
  693. errstr = "NMI not available for";
  694. if (request_irq(hp_sdc.nmi, &hp_sdc_nmisr, IRQF_SHARED,
  695. "HP SDC NMI", &hp_sdc)) goto err2;
  696. printk(KERN_INFO PREFIX "HP SDC at 0x%p, IRQ %d (NMI IRQ %d)\n",
  697. (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
  698. hp_sdc_status_in8();
  699. hp_sdc_data_in8();
  700. tasklet_init(&hp_sdc.task, hp_sdc_tasklet, 0);
  701. /* Sync the output buffer registers, thus scheduling hp_sdc_tasklet. */
  702. t_sync.actidx = 0;
  703. t_sync.idx = 1;
  704. t_sync.endidx = 6;
  705. t_sync.seq = ts_sync;
  706. ts_sync[0] = HP_SDC_ACT_DATAREG | HP_SDC_ACT_SEMAPHORE;
  707. ts_sync[1] = 0x0f;
  708. ts_sync[2] = ts_sync[3] = ts_sync[4] = ts_sync[5] = 0;
  709. t_sync.act.semaphore = &s_sync;
  710. init_MUTEX_LOCKED(&s_sync);
  711. hp_sdc_enqueue_transaction(&t_sync);
  712. down(&s_sync); /* Wait for t_sync to complete */
  713. /* Create the keepalive task */
  714. init_timer(&hp_sdc.kicker);
  715. hp_sdc.kicker.expires = jiffies + HZ;
  716. hp_sdc.kicker.function = &hp_sdc_kicker;
  717. add_timer(&hp_sdc.kicker);
  718. hp_sdc.dev_err = 0;
  719. return 0;
  720. err2:
  721. free_irq(hp_sdc.irq, &hp_sdc);
  722. err1:
  723. release_region(hp_sdc.data_io, 2);
  724. err0:
  725. printk(KERN_WARNING PREFIX ": %s SDC IO=0x%p IRQ=0x%x NMI=0x%x\n",
  726. errstr, (void *)hp_sdc.base_io, hp_sdc.irq, hp_sdc.nmi);
  727. hp_sdc.dev = NULL;
  728. return hp_sdc.dev_err;
  729. }
  730. #if defined(__hppa__)
  731. static int __init hp_sdc_init_hppa(struct parisc_device *d)
  732. {
  733. if (!d) return 1;
  734. if (hp_sdc.dev != NULL) return 1; /* We only expect one SDC */
  735. hp_sdc.dev = d;
  736. hp_sdc.irq = d->irq;
  737. hp_sdc.nmi = d->aux_irq;
  738. hp_sdc.base_io = d->hpa.start;
  739. hp_sdc.data_io = d->hpa.start + 0x800;
  740. hp_sdc.status_io = d->hpa.start + 0x801;
  741. return hp_sdc_init();
  742. }
  743. #endif /* __hppa__ */
  744. #if !defined(__mc68000__) /* Link error on m68k! */
  745. static void __exit hp_sdc_exit(void)
  746. #else
  747. static void hp_sdc_exit(void)
  748. #endif
  749. {
  750. write_lock_irq(&hp_sdc.lock);
  751. /* Turn off all maskable "sub-function" irq's. */
  752. hp_sdc_spin_ibf();
  753. sdc_writeb(HP_SDC_CMD_SET_IM | HP_SDC_IM_MASK, hp_sdc.status_io);
  754. /* Wait until we know this has been processed by the i8042 */
  755. hp_sdc_spin_ibf();
  756. free_irq(hp_sdc.nmi, &hp_sdc);
  757. free_irq(hp_sdc.irq, &hp_sdc);
  758. write_unlock_irq(&hp_sdc.lock);
  759. del_timer(&hp_sdc.kicker);
  760. tasklet_kill(&hp_sdc.task);
  761. /* release_region(hp_sdc.data_io, 2); */
  762. #if defined(__hppa__)
  763. if (unregister_parisc_driver(&hp_sdc_driver))
  764. printk(KERN_WARNING PREFIX "Error unregistering HP SDC");
  765. #endif
  766. }
  767. static int __init hp_sdc_register(void)
  768. {
  769. hp_sdc_transaction tq_init;
  770. uint8_t tq_init_seq[5];
  771. struct semaphore tq_init_sem;
  772. #if defined(__mc68000__)
  773. mm_segment_t fs;
  774. unsigned char i;
  775. #endif
  776. hp_sdc.dev = NULL;
  777. hp_sdc.dev_err = 0;
  778. #if defined(__hppa__)
  779. if (register_parisc_driver(&hp_sdc_driver)) {
  780. printk(KERN_WARNING PREFIX "Error registering SDC with system bus tree.\n");
  781. return -ENODEV;
  782. }
  783. #elif defined(__mc68000__)
  784. if (!MACH_IS_HP300)
  785. return -ENODEV;
  786. hp_sdc.irq = 1;
  787. hp_sdc.nmi = 7;
  788. hp_sdc.base_io = (unsigned long) 0xf0428000;
  789. hp_sdc.data_io = (unsigned long) hp_sdc.base_io + 1;
  790. hp_sdc.status_io = (unsigned long) hp_sdc.base_io + 3;
  791. fs = get_fs();
  792. set_fs(KERNEL_DS);
  793. if (!get_user(i, (unsigned char *)hp_sdc.data_io))
  794. hp_sdc.dev = (void *)1;
  795. set_fs(fs);
  796. hp_sdc.dev_err = hp_sdc_init();
  797. #endif
  798. if (hp_sdc.dev == NULL) {
  799. printk(KERN_WARNING PREFIX "No SDC found.\n");
  800. return hp_sdc.dev_err;
  801. }
  802. init_MUTEX_LOCKED(&tq_init_sem);
  803. tq_init.actidx = 0;
  804. tq_init.idx = 1;
  805. tq_init.endidx = 5;
  806. tq_init.seq = tq_init_seq;
  807. tq_init.act.semaphore = &tq_init_sem;
  808. tq_init_seq[0] =
  809. HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN | HP_SDC_ACT_SEMAPHORE;
  810. tq_init_seq[1] = HP_SDC_CMD_READ_KCC;
  811. tq_init_seq[2] = 1;
  812. tq_init_seq[3] = 0;
  813. tq_init_seq[4] = 0;
  814. hp_sdc_enqueue_transaction(&tq_init);
  815. down(&tq_init_sem);
  816. up(&tq_init_sem);
  817. if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
  818. printk(KERN_WARNING PREFIX "Error reading config byte.\n");
  819. hp_sdc_exit();
  820. return -ENODEV;
  821. }
  822. hp_sdc.r11 = tq_init_seq[4];
  823. if (hp_sdc.r11 & HP_SDC_CFG_NEW) {
  824. char *str;
  825. printk(KERN_INFO PREFIX "New style SDC\n");
  826. tq_init_seq[1] = HP_SDC_CMD_READ_XTD;
  827. tq_init.actidx = 0;
  828. tq_init.idx = 1;
  829. down(&tq_init_sem);
  830. hp_sdc_enqueue_transaction(&tq_init);
  831. down(&tq_init_sem);
  832. up(&tq_init_sem);
  833. if ((tq_init_seq[0] & HP_SDC_ACT_DEAD) == HP_SDC_ACT_DEAD) {
  834. printk(KERN_WARNING PREFIX "Error reading extended config byte.\n");
  835. return -ENODEV;
  836. }
  837. hp_sdc.r7e = tq_init_seq[4];
  838. HP_SDC_XTD_REV_STRINGS(hp_sdc.r7e & HP_SDC_XTD_REV, str)
  839. printk(KERN_INFO PREFIX "Revision: %s\n", str);
  840. if (hp_sdc.r7e & HP_SDC_XTD_BEEPER) {
  841. printk(KERN_INFO PREFIX "TI SN76494 beeper present\n");
  842. }
  843. if (hp_sdc.r7e & HP_SDC_XTD_BBRTC) {
  844. printk(KERN_INFO PREFIX "OKI MSM-58321 BBRTC present\n");
  845. }
  846. printk(KERN_INFO PREFIX "Spunking the self test register to force PUP "
  847. "on next firmware reset.\n");
  848. tq_init_seq[0] = HP_SDC_ACT_PRECMD |
  849. HP_SDC_ACT_DATAOUT | HP_SDC_ACT_SEMAPHORE;
  850. tq_init_seq[1] = HP_SDC_CMD_SET_STR;
  851. tq_init_seq[2] = 1;
  852. tq_init_seq[3] = 0;
  853. tq_init.actidx = 0;
  854. tq_init.idx = 1;
  855. tq_init.endidx = 4;
  856. down(&tq_init_sem);
  857. hp_sdc_enqueue_transaction(&tq_init);
  858. down(&tq_init_sem);
  859. up(&tq_init_sem);
  860. }
  861. else {
  862. printk(KERN_INFO PREFIX "Old style SDC (1820-%s).\n",
  863. (hp_sdc.r11 & HP_SDC_CFG_REV) ? "3300" : "2564/3087");
  864. }
  865. return 0;
  866. }
  867. module_init(hp_sdc_register);
  868. module_exit(hp_sdc_exit);
  869. /* Timing notes: These measurements taken on my 64MHz 7100-LC (715/64)
  870. * cycles cycles-adj time
  871. * between two consecutive mfctl(16)'s: 4 n/a 63ns
  872. * hp_sdc_spin_ibf when idle: 119 115 1.7us
  873. * gsc_writeb status register: 83 79 1.2us
  874. * IBF to clear after sending SET_IM: 6204 6006 93us
  875. * IBF to clear after sending LOAD_RT: 4467 4352 68us
  876. * IBF to clear after sending two LOAD_RTs: 18974 18859 295us
  877. * READ_T1, read status/data, IRQ, call handler: 35564 n/a 556us
  878. * cmd to ~IBF READ_T1 2nd time right after: 5158403 n/a 81ms
  879. * between IRQ received and ~IBF for above: 2578877 n/a 40ms
  880. *
  881. * Performance stats after a run of this module configuring HIL and
  882. * receiving a few mouse events:
  883. *
  884. * status in8 282508 cycles 7128 calls
  885. * status out8 8404 cycles 341 calls
  886. * data out8 1734 cycles 78 calls
  887. * isr 174324 cycles 617 calls (includes take)
  888. * take 1241 cycles 2 calls
  889. * put 1411504 cycles 6937 calls
  890. * task 1655209 cycles 6937 calls (includes put)
  891. *
  892. */