cdv_intel_crt.c 8.8 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/i2c.h>
  27. #include <drm/drmP.h>
  28. #include "intel_bios.h"
  29. #include "psb_drv.h"
  30. #include "psb_intel_drv.h"
  31. #include "psb_intel_reg.h"
  32. #include "power.h"
  33. #include "cdv_device.h"
  34. #include <linux/pm_runtime.h>
  35. static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
  36. {
  37. struct drm_device *dev = encoder->dev;
  38. u32 temp, reg;
  39. reg = ADPA;
  40. temp = REG_READ(reg);
  41. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  42. temp &= ~ADPA_DAC_ENABLE;
  43. switch (mode) {
  44. case DRM_MODE_DPMS_ON:
  45. temp |= ADPA_DAC_ENABLE;
  46. break;
  47. case DRM_MODE_DPMS_STANDBY:
  48. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  49. break;
  50. case DRM_MODE_DPMS_SUSPEND:
  51. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  52. break;
  53. case DRM_MODE_DPMS_OFF:
  54. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  55. break;
  56. }
  57. REG_WRITE(reg, temp);
  58. }
  59. static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
  60. struct drm_display_mode *mode)
  61. {
  62. int max_clock = 0;
  63. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  64. return MODE_NO_DBLESCAN;
  65. /* The lowest clock for CDV is 20000KHz */
  66. if (mode->clock < 20000)
  67. return MODE_CLOCK_LOW;
  68. /* The max clock for CDV is 355 instead of 400 */
  69. max_clock = 355000;
  70. if (mode->clock > max_clock)
  71. return MODE_CLOCK_HIGH;
  72. if (mode->hdisplay > 1680 || mode->vdisplay > 1050)
  73. return MODE_PANEL;
  74. return MODE_OK;
  75. }
  76. static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder,
  77. struct drm_display_mode *mode,
  78. struct drm_display_mode *adjusted_mode)
  79. {
  80. return true;
  81. }
  82. static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
  83. struct drm_display_mode *mode,
  84. struct drm_display_mode *adjusted_mode)
  85. {
  86. struct drm_device *dev = encoder->dev;
  87. struct drm_crtc *crtc = encoder->crtc;
  88. struct psb_intel_crtc *psb_intel_crtc =
  89. to_psb_intel_crtc(crtc);
  90. int dpll_md_reg;
  91. u32 adpa, dpll_md;
  92. u32 adpa_reg;
  93. if (psb_intel_crtc->pipe == 0)
  94. dpll_md_reg = DPLL_A_MD;
  95. else
  96. dpll_md_reg = DPLL_B_MD;
  97. adpa_reg = ADPA;
  98. /*
  99. * Disable separate mode multiplier used when cloning SDVO to CRT
  100. * XXX this needs to be adjusted when we really are cloning
  101. */
  102. {
  103. dpll_md = REG_READ(dpll_md_reg);
  104. REG_WRITE(dpll_md_reg,
  105. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  106. }
  107. adpa = 0;
  108. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  109. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  110. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  111. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  112. if (psb_intel_crtc->pipe == 0)
  113. adpa |= ADPA_PIPE_A_SELECT;
  114. else
  115. adpa |= ADPA_PIPE_B_SELECT;
  116. REG_WRITE(adpa_reg, adpa);
  117. }
  118. /**
  119. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  120. *
  121. * \return true if CRT is connected.
  122. * \return false if CRT is disconnected.
  123. */
  124. static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
  125. bool force)
  126. {
  127. struct drm_device *dev = connector->dev;
  128. u32 hotplug_en;
  129. int i, tries = 0, ret = false;
  130. u32 adpa_orig;
  131. /* disable the DAC when doing the hotplug detection */
  132. adpa_orig = REG_READ(ADPA);
  133. REG_WRITE(ADPA, adpa_orig & ~(ADPA_DAC_ENABLE));
  134. /*
  135. * On a CDV thep, CRT detect sequence need to be done twice
  136. * to get a reliable result.
  137. */
  138. tries = 2;
  139. hotplug_en = REG_READ(PORT_HOTPLUG_EN);
  140. hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
  141. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  142. hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
  143. hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
  144. for (i = 0; i < tries ; i++) {
  145. unsigned long timeout;
  146. /* turn on the FORCE_DETECT */
  147. REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  148. timeout = jiffies + msecs_to_jiffies(1000);
  149. /* wait for FORCE_DETECT to go off */
  150. do {
  151. if (!(REG_READ(PORT_HOTPLUG_EN) &
  152. CRT_HOTPLUG_FORCE_DETECT))
  153. break;
  154. msleep(1);
  155. } while (time_after(timeout, jiffies));
  156. }
  157. if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
  158. CRT_HOTPLUG_MONITOR_NONE)
  159. ret = true;
  160. /* Restore the saved ADPA */
  161. REG_WRITE(ADPA, adpa_orig);
  162. return ret;
  163. }
  164. static enum drm_connector_status cdv_intel_crt_detect(
  165. struct drm_connector *connector, bool force)
  166. {
  167. if (cdv_intel_crt_detect_hotplug(connector, force))
  168. return connector_status_connected;
  169. else
  170. return connector_status_disconnected;
  171. }
  172. static void cdv_intel_crt_destroy(struct drm_connector *connector)
  173. {
  174. struct psb_intel_encoder *psb_intel_encoder =
  175. psb_intel_attached_encoder(connector);
  176. psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
  177. drm_sysfs_connector_remove(connector);
  178. drm_connector_cleanup(connector);
  179. kfree(connector);
  180. }
  181. static int cdv_intel_crt_get_modes(struct drm_connector *connector)
  182. {
  183. struct psb_intel_encoder *psb_intel_encoder =
  184. psb_intel_attached_encoder(connector);
  185. return psb_intel_ddc_get_modes(connector, &psb_intel_encoder->ddc_bus->adapter);
  186. }
  187. static int cdv_intel_crt_set_property(struct drm_connector *connector,
  188. struct drm_property *property,
  189. uint64_t value)
  190. {
  191. return 0;
  192. }
  193. /*
  194. * Routines for controlling stuff on the analog port
  195. */
  196. static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
  197. .dpms = cdv_intel_crt_dpms,
  198. .mode_fixup = cdv_intel_crt_mode_fixup,
  199. .prepare = psb_intel_encoder_prepare,
  200. .commit = psb_intel_encoder_commit,
  201. .mode_set = cdv_intel_crt_mode_set,
  202. };
  203. static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
  204. .dpms = drm_helper_connector_dpms,
  205. .detect = cdv_intel_crt_detect,
  206. .fill_modes = drm_helper_probe_single_connector_modes,
  207. .destroy = cdv_intel_crt_destroy,
  208. .set_property = cdv_intel_crt_set_property,
  209. };
  210. static const struct drm_connector_helper_funcs
  211. cdv_intel_crt_connector_helper_funcs = {
  212. .mode_valid = cdv_intel_crt_mode_valid,
  213. .get_modes = cdv_intel_crt_get_modes,
  214. .best_encoder = psb_intel_best_encoder,
  215. };
  216. static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
  217. {
  218. drm_encoder_cleanup(encoder);
  219. }
  220. static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
  221. .destroy = cdv_intel_crt_enc_destroy,
  222. };
  223. void cdv_intel_crt_init(struct drm_device *dev,
  224. struct psb_intel_mode_device *mode_dev)
  225. {
  226. struct psb_intel_connector *psb_intel_connector;
  227. struct psb_intel_encoder *psb_intel_encoder;
  228. struct drm_connector *connector;
  229. struct drm_encoder *encoder;
  230. u32 i2c_reg;
  231. psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
  232. if (!psb_intel_encoder)
  233. return;
  234. psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
  235. if (!psb_intel_connector)
  236. goto failed_connector;
  237. connector = &psb_intel_connector->base;
  238. drm_connector_init(dev, connector,
  239. &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  240. encoder = &psb_intel_encoder->base;
  241. drm_encoder_init(dev, encoder,
  242. &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
  243. psb_intel_connector_attach_encoder(psb_intel_connector,
  244. psb_intel_encoder);
  245. /* Set up the DDC bus. */
  246. i2c_reg = GPIOA;
  247. /* Remove the following code for CDV */
  248. /*
  249. if (dev_priv->crt_ddc_bus != 0)
  250. i2c_reg = dev_priv->crt_ddc_bus;
  251. }*/
  252. psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev,
  253. i2c_reg, "CRTDDC_A");
  254. if (!psb_intel_encoder->ddc_bus) {
  255. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  256. "failed.\n");
  257. goto failed_ddc;
  258. }
  259. psb_intel_encoder->type = INTEL_OUTPUT_ANALOG;
  260. /*
  261. psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
  262. psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
  263. */
  264. connector->interlace_allowed = 0;
  265. connector->doublescan_allowed = 0;
  266. drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
  267. drm_connector_helper_add(connector,
  268. &cdv_intel_crt_connector_helper_funcs);
  269. drm_sysfs_connector_add(connector);
  270. return;
  271. failed_ddc:
  272. drm_encoder_cleanup(&psb_intel_encoder->base);
  273. drm_connector_cleanup(&psb_intel_connector->base);
  274. kfree(psb_intel_connector);
  275. failed_connector:
  276. kfree(psb_intel_encoder);
  277. return;
  278. }