qla_init.c 142 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  107. static void
  108. qla2x00_async_iocb_timeout(srb_t *sp)
  109. {
  110. fc_port_t *fcport = sp->fcport;
  111. struct srb_ctx *ctx = sp->ctx;
  112. DEBUG2(printk(KERN_WARNING
  113. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  114. fcport->vha->host_no, sp->handle,
  115. ctx->name, fcport->d_id.b.domain,
  116. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  117. fcport->flags &= ~FCF_ASYNC_SENT;
  118. if (ctx->type == SRB_LOGIN_CMD) {
  119. struct srb_iocb *lio = ctx->u.iocb_cmd;
  120. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  121. /* Retry as needed. */
  122. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  123. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  124. QLA_LOGIO_LOGIN_RETRIED : 0;
  125. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  126. lio->u.logio.data);
  127. }
  128. }
  129. static void
  130. qla2x00_async_login_ctx_done(srb_t *sp)
  131. {
  132. struct srb_ctx *ctx = sp->ctx;
  133. struct srb_iocb *lio = ctx->u.iocb_cmd;
  134. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  135. lio->u.logio.data);
  136. lio->free(sp);
  137. }
  138. int
  139. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  140. uint16_t *data)
  141. {
  142. struct qla_hw_data *ha = vha->hw;
  143. srb_t *sp;
  144. struct srb_ctx *ctx;
  145. struct srb_iocb *lio;
  146. int rval;
  147. rval = QLA_FUNCTION_FAILED;
  148. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  149. ELS_TMO_2_RATOV(ha) + 2);
  150. if (!sp)
  151. goto done;
  152. ctx = sp->ctx;
  153. ctx->type = SRB_LOGIN_CMD;
  154. ctx->name = "login";
  155. lio = ctx->u.iocb_cmd;
  156. lio->timeout = qla2x00_async_iocb_timeout;
  157. lio->done = qla2x00_async_login_ctx_done;
  158. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  159. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  160. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  161. rval = qla2x00_start_sp(sp);
  162. if (rval != QLA_SUCCESS)
  163. goto done_free_sp;
  164. DEBUG2(printk(KERN_DEBUG
  165. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  166. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  167. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  168. fcport->login_retry));
  169. return rval;
  170. done_free_sp:
  171. lio->free(sp);
  172. done:
  173. return rval;
  174. }
  175. static void
  176. qla2x00_async_logout_ctx_done(srb_t *sp)
  177. {
  178. struct srb_ctx *ctx = sp->ctx;
  179. struct srb_iocb *lio = ctx->u.iocb_cmd;
  180. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  181. lio->u.logio.data);
  182. lio->free(sp);
  183. }
  184. int
  185. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  186. {
  187. struct qla_hw_data *ha = vha->hw;
  188. srb_t *sp;
  189. struct srb_ctx *ctx;
  190. struct srb_iocb *lio;
  191. int rval;
  192. rval = QLA_FUNCTION_FAILED;
  193. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  194. ELS_TMO_2_RATOV(ha) + 2);
  195. if (!sp)
  196. goto done;
  197. ctx = sp->ctx;
  198. ctx->type = SRB_LOGOUT_CMD;
  199. ctx->name = "logout";
  200. lio = ctx->u.iocb_cmd;
  201. lio->timeout = qla2x00_async_iocb_timeout;
  202. lio->done = qla2x00_async_logout_ctx_done;
  203. rval = qla2x00_start_sp(sp);
  204. if (rval != QLA_SUCCESS)
  205. goto done_free_sp;
  206. DEBUG2(printk(KERN_DEBUG
  207. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  208. fcport->vha->host_no, sp->handle, fcport->loop_id,
  209. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  210. return rval;
  211. done_free_sp:
  212. lio->free(sp);
  213. done:
  214. return rval;
  215. }
  216. static void
  217. qla2x00_async_adisc_ctx_done(srb_t *sp)
  218. {
  219. struct srb_ctx *ctx = sp->ctx;
  220. struct srb_iocb *lio = ctx->u.iocb_cmd;
  221. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  222. lio->u.logio.data);
  223. lio->free(sp);
  224. }
  225. int
  226. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  227. uint16_t *data)
  228. {
  229. struct qla_hw_data *ha = vha->hw;
  230. srb_t *sp;
  231. struct srb_ctx *ctx;
  232. struct srb_iocb *lio;
  233. int rval;
  234. rval = QLA_FUNCTION_FAILED;
  235. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  236. ELS_TMO_2_RATOV(ha) + 2);
  237. if (!sp)
  238. goto done;
  239. ctx = sp->ctx;
  240. ctx->type = SRB_ADISC_CMD;
  241. ctx->name = "adisc";
  242. lio = ctx->u.iocb_cmd;
  243. lio->timeout = qla2x00_async_iocb_timeout;
  244. lio->done = qla2x00_async_adisc_ctx_done;
  245. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  246. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  247. rval = qla2x00_start_sp(sp);
  248. if (rval != QLA_SUCCESS)
  249. goto done_free_sp;
  250. DEBUG2(printk(KERN_DEBUG
  251. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  252. fcport->vha->host_no, sp->handle, fcport->loop_id,
  253. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  254. return rval;
  255. done_free_sp:
  256. lio->free(sp);
  257. done:
  258. return rval;
  259. }
  260. static void
  261. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  262. {
  263. struct srb_ctx *ctx = sp->ctx;
  264. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  265. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  266. iocb->free(sp);
  267. }
  268. int
  269. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  270. uint32_t tag)
  271. {
  272. struct scsi_qla_host *vha = fcport->vha;
  273. struct qla_hw_data *ha = vha->hw;
  274. srb_t *sp;
  275. struct srb_ctx *ctx;
  276. struct srb_iocb *tcf;
  277. int rval;
  278. rval = QLA_FUNCTION_FAILED;
  279. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  280. ELS_TMO_2_RATOV(ha) + 2);
  281. if (!sp)
  282. goto done;
  283. ctx = sp->ctx;
  284. ctx->type = SRB_TM_CMD;
  285. ctx->name = "tmf";
  286. tcf = ctx->u.iocb_cmd;
  287. tcf->u.tmf.flags = flags;
  288. tcf->u.tmf.lun = lun;
  289. tcf->u.tmf.data = tag;
  290. tcf->timeout = qla2x00_async_iocb_timeout;
  291. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  292. rval = qla2x00_start_sp(sp);
  293. if (rval != QLA_SUCCESS)
  294. goto done_free_sp;
  295. DEBUG2(printk(KERN_DEBUG
  296. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  297. fcport->vha->host_no, sp->handle, fcport->loop_id,
  298. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  299. return rval;
  300. done_free_sp:
  301. tcf->free(sp);
  302. done:
  303. return rval;
  304. }
  305. static void
  306. qla2x00_async_marker_ctx_done(srb_t *sp)
  307. {
  308. struct srb_ctx *ctx = sp->ctx;
  309. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  310. qla2x00_async_marker_done(sp->fcport->vha, sp->fcport, iocb);
  311. iocb->free(sp);
  312. }
  313. int
  314. qla2x00_async_marker(fc_port_t *fcport, uint16_t lun, uint8_t modif)
  315. {
  316. struct scsi_qla_host *vha = fcport->vha;
  317. srb_t *sp;
  318. struct srb_ctx *ctx;
  319. struct srb_iocb *mrk;
  320. int rval;
  321. rval = QLA_FUNCTION_FAILED;
  322. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 0);
  323. if (!sp)
  324. goto done;
  325. ctx = sp->ctx;
  326. ctx->type = SRB_MARKER_CMD;
  327. ctx->name = "marker";
  328. mrk = ctx->u.iocb_cmd;
  329. mrk->u.marker.lun = lun;
  330. mrk->u.marker.modif = modif;
  331. mrk->timeout = qla2x00_async_iocb_timeout;
  332. mrk->done = qla2x00_async_marker_ctx_done;
  333. rval = qla2x00_start_sp(sp);
  334. if (rval != QLA_SUCCESS)
  335. goto done_free_sp;
  336. DEBUG2(printk(KERN_DEBUG
  337. "scsi(%ld:%x): Async-marker - loop-id=%x "
  338. "portid=%02x%02x%02x.\n",
  339. fcport->vha->host_no, sp->handle, fcport->loop_id,
  340. fcport->d_id.b.domain, fcport->d_id.b.area,
  341. fcport->d_id.b.al_pa));
  342. return rval;
  343. done_free_sp:
  344. mrk->free(sp);
  345. done:
  346. return rval;
  347. }
  348. void
  349. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  350. uint16_t *data)
  351. {
  352. int rval;
  353. switch (data[0]) {
  354. case MBS_COMMAND_COMPLETE:
  355. if (fcport->flags & FCF_FCP2_DEVICE) {
  356. fcport->flags |= FCF_ASYNC_SENT;
  357. qla2x00_post_async_adisc_work(vha, fcport, data);
  358. break;
  359. }
  360. qla2x00_update_fcport(vha, fcport);
  361. break;
  362. case MBS_COMMAND_ERROR:
  363. fcport->flags &= ~FCF_ASYNC_SENT;
  364. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  365. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  366. else
  367. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  368. break;
  369. case MBS_PORT_ID_USED:
  370. fcport->loop_id = data[1];
  371. qla2x00_post_async_logout_work(vha, fcport, NULL);
  372. qla2x00_post_async_login_work(vha, fcport, NULL);
  373. break;
  374. case MBS_LOOP_ID_USED:
  375. fcport->loop_id++;
  376. rval = qla2x00_find_new_loop_id(vha, fcport);
  377. if (rval != QLA_SUCCESS) {
  378. fcport->flags &= ~FCF_ASYNC_SENT;
  379. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  380. break;
  381. }
  382. qla2x00_post_async_login_work(vha, fcport, NULL);
  383. break;
  384. }
  385. return;
  386. }
  387. void
  388. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  389. uint16_t *data)
  390. {
  391. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  392. return;
  393. }
  394. void
  395. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  396. uint16_t *data)
  397. {
  398. if (data[0] == MBS_COMMAND_COMPLETE) {
  399. qla2x00_update_fcport(vha, fcport);
  400. return;
  401. }
  402. /* Retry login. */
  403. fcport->flags &= ~FCF_ASYNC_SENT;
  404. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  405. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  406. else
  407. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  408. return;
  409. }
  410. void
  411. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  412. struct srb_iocb *iocb)
  413. {
  414. int rval;
  415. uint32_t flags;
  416. uint16_t lun;
  417. flags = iocb->u.tmf.flags;
  418. lun = (uint16_t)iocb->u.tmf.lun;
  419. /* Issue Marker IOCB */
  420. rval = qla2x00_async_marker(fcport, lun,
  421. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  422. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  423. DEBUG2_3_11(printk(KERN_WARNING
  424. "%s(%ld): TM IOCB failed (%x).\n",
  425. __func__, vha->host_no, rval));
  426. }
  427. return;
  428. }
  429. void
  430. qla2x00_async_marker_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  431. struct srb_iocb *iocb)
  432. {
  433. /*
  434. * Currently we dont have any specific post response processing
  435. * for this IOCB. We'll just return success or failed
  436. * depending on whether the IOCB command succeeded or failed.
  437. */
  438. if (iocb->u.tmf.data) {
  439. DEBUG2_3_11(printk(KERN_WARNING
  440. "%s(%ld): Marker IOCB failed (%x).\n",
  441. __func__, vha->host_no, iocb->u.tmf.data));
  442. }
  443. return;
  444. }
  445. /****************************************************************************/
  446. /* QLogic ISP2x00 Hardware Support Functions. */
  447. /****************************************************************************/
  448. /*
  449. * qla2x00_initialize_adapter
  450. * Initialize board.
  451. *
  452. * Input:
  453. * ha = adapter block pointer.
  454. *
  455. * Returns:
  456. * 0 = success
  457. */
  458. int
  459. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  460. {
  461. int rval;
  462. struct qla_hw_data *ha = vha->hw;
  463. struct req_que *req = ha->req_q_map[0];
  464. /* Clear adapter flags. */
  465. vha->flags.online = 0;
  466. ha->flags.chip_reset_done = 0;
  467. vha->flags.reset_active = 0;
  468. ha->flags.pci_channel_io_perm_failure = 0;
  469. ha->flags.eeh_busy = 0;
  470. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  471. atomic_set(&vha->loop_state, LOOP_DOWN);
  472. vha->device_flags = DFLG_NO_CABLE;
  473. vha->dpc_flags = 0;
  474. vha->flags.management_server_logged_in = 0;
  475. vha->marker_needed = 0;
  476. ha->isp_abort_cnt = 0;
  477. ha->beacon_blink_led = 0;
  478. set_bit(0, ha->req_qid_map);
  479. set_bit(0, ha->rsp_qid_map);
  480. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  481. rval = ha->isp_ops->pci_config(vha);
  482. if (rval) {
  483. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  484. vha->host_no));
  485. return (rval);
  486. }
  487. ha->isp_ops->reset_chip(vha);
  488. rval = qla2xxx_get_flash_info(vha);
  489. if (rval) {
  490. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  491. vha->host_no));
  492. return (rval);
  493. }
  494. ha->isp_ops->get_flash_version(vha, req->ring);
  495. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  496. ha->isp_ops->nvram_config(vha);
  497. if (ha->flags.disable_serdes) {
  498. /* Mask HBA via NVRAM settings? */
  499. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  500. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  501. vha->port_name[0], vha->port_name[1],
  502. vha->port_name[2], vha->port_name[3],
  503. vha->port_name[4], vha->port_name[5],
  504. vha->port_name[6], vha->port_name[7]);
  505. return QLA_FUNCTION_FAILED;
  506. }
  507. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  508. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  509. rval = ha->isp_ops->chip_diag(vha);
  510. if (rval)
  511. return (rval);
  512. rval = qla2x00_setup_chip(vha);
  513. if (rval)
  514. return (rval);
  515. }
  516. if (IS_QLA84XX(ha)) {
  517. ha->cs84xx = qla84xx_get_chip(vha);
  518. if (!ha->cs84xx) {
  519. qla_printk(KERN_ERR, ha,
  520. "Unable to configure ISP84XX.\n");
  521. return QLA_FUNCTION_FAILED;
  522. }
  523. }
  524. rval = qla2x00_init_rings(vha);
  525. ha->flags.chip_reset_done = 1;
  526. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  527. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  528. rval = qla84xx_init_chip(vha);
  529. if (rval != QLA_SUCCESS) {
  530. qla_printk(KERN_ERR, ha,
  531. "Unable to initialize ISP84XX.\n");
  532. qla84xx_put_chip(vha);
  533. }
  534. }
  535. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) {
  536. if (qla24xx_read_fcp_prio_cfg(vha))
  537. qla_printk(KERN_ERR, ha,
  538. "Unable to read FCP priority data.\n");
  539. }
  540. return (rval);
  541. }
  542. /**
  543. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  544. * @ha: HA context
  545. *
  546. * Returns 0 on success.
  547. */
  548. int
  549. qla2100_pci_config(scsi_qla_host_t *vha)
  550. {
  551. uint16_t w;
  552. unsigned long flags;
  553. struct qla_hw_data *ha = vha->hw;
  554. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  555. pci_set_master(ha->pdev);
  556. pci_try_set_mwi(ha->pdev);
  557. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  558. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  559. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  560. pci_disable_rom(ha->pdev);
  561. /* Get PCI bus information. */
  562. spin_lock_irqsave(&ha->hardware_lock, flags);
  563. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  564. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  565. return QLA_SUCCESS;
  566. }
  567. /**
  568. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  569. * @ha: HA context
  570. *
  571. * Returns 0 on success.
  572. */
  573. int
  574. qla2300_pci_config(scsi_qla_host_t *vha)
  575. {
  576. uint16_t w;
  577. unsigned long flags = 0;
  578. uint32_t cnt;
  579. struct qla_hw_data *ha = vha->hw;
  580. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  581. pci_set_master(ha->pdev);
  582. pci_try_set_mwi(ha->pdev);
  583. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  584. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  585. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  586. w &= ~PCI_COMMAND_INTX_DISABLE;
  587. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  588. /*
  589. * If this is a 2300 card and not 2312, reset the
  590. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  591. * the 2310 also reports itself as a 2300 so we need to get the
  592. * fb revision level -- a 6 indicates it really is a 2300 and
  593. * not a 2310.
  594. */
  595. if (IS_QLA2300(ha)) {
  596. spin_lock_irqsave(&ha->hardware_lock, flags);
  597. /* Pause RISC. */
  598. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  599. for (cnt = 0; cnt < 30000; cnt++) {
  600. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  601. break;
  602. udelay(10);
  603. }
  604. /* Select FPM registers. */
  605. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  606. RD_REG_WORD(&reg->ctrl_status);
  607. /* Get the fb rev level */
  608. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  609. if (ha->fb_rev == FPM_2300)
  610. pci_clear_mwi(ha->pdev);
  611. /* Deselect FPM registers. */
  612. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  613. RD_REG_WORD(&reg->ctrl_status);
  614. /* Release RISC module. */
  615. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  616. for (cnt = 0; cnt < 30000; cnt++) {
  617. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  618. break;
  619. udelay(10);
  620. }
  621. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  622. }
  623. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  624. pci_disable_rom(ha->pdev);
  625. /* Get PCI bus information. */
  626. spin_lock_irqsave(&ha->hardware_lock, flags);
  627. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  628. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  629. return QLA_SUCCESS;
  630. }
  631. /**
  632. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  633. * @ha: HA context
  634. *
  635. * Returns 0 on success.
  636. */
  637. int
  638. qla24xx_pci_config(scsi_qla_host_t *vha)
  639. {
  640. uint16_t w;
  641. unsigned long flags = 0;
  642. struct qla_hw_data *ha = vha->hw;
  643. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  644. pci_set_master(ha->pdev);
  645. pci_try_set_mwi(ha->pdev);
  646. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  647. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  648. w &= ~PCI_COMMAND_INTX_DISABLE;
  649. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  650. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  651. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  652. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  653. pcix_set_mmrbc(ha->pdev, 2048);
  654. /* PCIe -- adjust Maximum Read Request Size (2048). */
  655. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  656. pcie_set_readrq(ha->pdev, 2048);
  657. pci_disable_rom(ha->pdev);
  658. ha->chip_revision = ha->pdev->revision;
  659. /* Get PCI bus information. */
  660. spin_lock_irqsave(&ha->hardware_lock, flags);
  661. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  662. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  663. return QLA_SUCCESS;
  664. }
  665. /**
  666. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  667. * @ha: HA context
  668. *
  669. * Returns 0 on success.
  670. */
  671. int
  672. qla25xx_pci_config(scsi_qla_host_t *vha)
  673. {
  674. uint16_t w;
  675. struct qla_hw_data *ha = vha->hw;
  676. pci_set_master(ha->pdev);
  677. pci_try_set_mwi(ha->pdev);
  678. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  679. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  680. w &= ~PCI_COMMAND_INTX_DISABLE;
  681. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  682. /* PCIe -- adjust Maximum Read Request Size (2048). */
  683. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  684. pcie_set_readrq(ha->pdev, 2048);
  685. pci_disable_rom(ha->pdev);
  686. ha->chip_revision = ha->pdev->revision;
  687. return QLA_SUCCESS;
  688. }
  689. /**
  690. * qla2x00_isp_firmware() - Choose firmware image.
  691. * @ha: HA context
  692. *
  693. * Returns 0 on success.
  694. */
  695. static int
  696. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  697. {
  698. int rval;
  699. uint16_t loop_id, topo, sw_cap;
  700. uint8_t domain, area, al_pa;
  701. struct qla_hw_data *ha = vha->hw;
  702. /* Assume loading risc code */
  703. rval = QLA_FUNCTION_FAILED;
  704. if (ha->flags.disable_risc_code_load) {
  705. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  706. vha->host_no));
  707. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  708. /* Verify checksum of loaded RISC code. */
  709. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  710. if (rval == QLA_SUCCESS) {
  711. /* And, verify we are not in ROM code. */
  712. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  713. &area, &domain, &topo, &sw_cap);
  714. }
  715. }
  716. if (rval) {
  717. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  718. vha->host_no));
  719. }
  720. return (rval);
  721. }
  722. /**
  723. * qla2x00_reset_chip() - Reset ISP chip.
  724. * @ha: HA context
  725. *
  726. * Returns 0 on success.
  727. */
  728. void
  729. qla2x00_reset_chip(scsi_qla_host_t *vha)
  730. {
  731. unsigned long flags = 0;
  732. struct qla_hw_data *ha = vha->hw;
  733. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  734. uint32_t cnt;
  735. uint16_t cmd;
  736. if (unlikely(pci_channel_offline(ha->pdev)))
  737. return;
  738. ha->isp_ops->disable_intrs(ha);
  739. spin_lock_irqsave(&ha->hardware_lock, flags);
  740. /* Turn off master enable */
  741. cmd = 0;
  742. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  743. cmd &= ~PCI_COMMAND_MASTER;
  744. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  745. if (!IS_QLA2100(ha)) {
  746. /* Pause RISC. */
  747. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  748. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  749. for (cnt = 0; cnt < 30000; cnt++) {
  750. if ((RD_REG_WORD(&reg->hccr) &
  751. HCCR_RISC_PAUSE) != 0)
  752. break;
  753. udelay(100);
  754. }
  755. } else {
  756. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  757. udelay(10);
  758. }
  759. /* Select FPM registers. */
  760. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  761. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  762. /* FPM Soft Reset. */
  763. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  764. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  765. /* Toggle Fpm Reset. */
  766. if (!IS_QLA2200(ha)) {
  767. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  768. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  769. }
  770. /* Select frame buffer registers. */
  771. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  772. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  773. /* Reset frame buffer FIFOs. */
  774. if (IS_QLA2200(ha)) {
  775. WRT_FB_CMD_REG(ha, reg, 0xa000);
  776. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  777. } else {
  778. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  779. /* Read back fb_cmd until zero or 3 seconds max */
  780. for (cnt = 0; cnt < 3000; cnt++) {
  781. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  782. break;
  783. udelay(100);
  784. }
  785. }
  786. /* Select RISC module registers. */
  787. WRT_REG_WORD(&reg->ctrl_status, 0);
  788. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  789. /* Reset RISC processor. */
  790. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  791. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  792. /* Release RISC processor. */
  793. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  794. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  795. }
  796. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  797. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  798. /* Reset ISP chip. */
  799. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  800. /* Wait for RISC to recover from reset. */
  801. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  802. /*
  803. * It is necessary to for a delay here since the card doesn't
  804. * respond to PCI reads during a reset. On some architectures
  805. * this will result in an MCA.
  806. */
  807. udelay(20);
  808. for (cnt = 30000; cnt; cnt--) {
  809. if ((RD_REG_WORD(&reg->ctrl_status) &
  810. CSR_ISP_SOFT_RESET) == 0)
  811. break;
  812. udelay(100);
  813. }
  814. } else
  815. udelay(10);
  816. /* Reset RISC processor. */
  817. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  818. WRT_REG_WORD(&reg->semaphore, 0);
  819. /* Release RISC processor. */
  820. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  821. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  822. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  823. for (cnt = 0; cnt < 30000; cnt++) {
  824. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  825. break;
  826. udelay(100);
  827. }
  828. } else
  829. udelay(100);
  830. /* Turn on master enable */
  831. cmd |= PCI_COMMAND_MASTER;
  832. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  833. /* Disable RISC pause on FPM parity error. */
  834. if (!IS_QLA2100(ha)) {
  835. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  836. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  837. }
  838. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  839. }
  840. /**
  841. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  842. * @ha: HA context
  843. *
  844. * Returns 0 on success.
  845. */
  846. static inline void
  847. qla24xx_reset_risc(scsi_qla_host_t *vha)
  848. {
  849. unsigned long flags = 0;
  850. struct qla_hw_data *ha = vha->hw;
  851. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  852. uint32_t cnt, d2;
  853. uint16_t wd;
  854. spin_lock_irqsave(&ha->hardware_lock, flags);
  855. /* Reset RISC. */
  856. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  857. for (cnt = 0; cnt < 30000; cnt++) {
  858. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  859. break;
  860. udelay(10);
  861. }
  862. WRT_REG_DWORD(&reg->ctrl_status,
  863. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  864. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  865. udelay(100);
  866. /* Wait for firmware to complete NVRAM accesses. */
  867. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  868. for (cnt = 10000 ; cnt && d2; cnt--) {
  869. udelay(5);
  870. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  871. barrier();
  872. }
  873. /* Wait for soft-reset to complete. */
  874. d2 = RD_REG_DWORD(&reg->ctrl_status);
  875. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  876. udelay(5);
  877. d2 = RD_REG_DWORD(&reg->ctrl_status);
  878. barrier();
  879. }
  880. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  881. RD_REG_DWORD(&reg->hccr);
  882. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  883. RD_REG_DWORD(&reg->hccr);
  884. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  885. RD_REG_DWORD(&reg->hccr);
  886. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  887. for (cnt = 6000000 ; cnt && d2; cnt--) {
  888. udelay(5);
  889. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  890. barrier();
  891. }
  892. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  893. if (IS_NOPOLLING_TYPE(ha))
  894. ha->isp_ops->enable_intrs(ha);
  895. }
  896. /**
  897. * qla24xx_reset_chip() - Reset ISP24xx chip.
  898. * @ha: HA context
  899. *
  900. * Returns 0 on success.
  901. */
  902. void
  903. qla24xx_reset_chip(scsi_qla_host_t *vha)
  904. {
  905. struct qla_hw_data *ha = vha->hw;
  906. if (pci_channel_offline(ha->pdev) &&
  907. ha->flags.pci_channel_io_perm_failure) {
  908. return;
  909. }
  910. ha->isp_ops->disable_intrs(ha);
  911. /* Perform RISC reset. */
  912. qla24xx_reset_risc(vha);
  913. }
  914. /**
  915. * qla2x00_chip_diag() - Test chip for proper operation.
  916. * @ha: HA context
  917. *
  918. * Returns 0 on success.
  919. */
  920. int
  921. qla2x00_chip_diag(scsi_qla_host_t *vha)
  922. {
  923. int rval;
  924. struct qla_hw_data *ha = vha->hw;
  925. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  926. unsigned long flags = 0;
  927. uint16_t data;
  928. uint32_t cnt;
  929. uint16_t mb[5];
  930. struct req_que *req = ha->req_q_map[0];
  931. /* Assume a failed state */
  932. rval = QLA_FUNCTION_FAILED;
  933. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  934. vha->host_no, (u_long)&reg->flash_address));
  935. spin_lock_irqsave(&ha->hardware_lock, flags);
  936. /* Reset ISP chip. */
  937. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  938. /*
  939. * We need to have a delay here since the card will not respond while
  940. * in reset causing an MCA on some architectures.
  941. */
  942. udelay(20);
  943. data = qla2x00_debounce_register(&reg->ctrl_status);
  944. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  945. udelay(5);
  946. data = RD_REG_WORD(&reg->ctrl_status);
  947. barrier();
  948. }
  949. if (!cnt)
  950. goto chip_diag_failed;
  951. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  952. vha->host_no));
  953. /* Reset RISC processor. */
  954. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  955. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  956. /* Workaround for QLA2312 PCI parity error */
  957. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  958. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  959. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  960. udelay(5);
  961. data = RD_MAILBOX_REG(ha, reg, 0);
  962. barrier();
  963. }
  964. } else
  965. udelay(10);
  966. if (!cnt)
  967. goto chip_diag_failed;
  968. /* Check product ID of chip */
  969. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  970. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  971. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  972. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  973. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  974. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  975. mb[3] != PROD_ID_3) {
  976. qla_printk(KERN_WARNING, ha,
  977. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  978. goto chip_diag_failed;
  979. }
  980. ha->product_id[0] = mb[1];
  981. ha->product_id[1] = mb[2];
  982. ha->product_id[2] = mb[3];
  983. ha->product_id[3] = mb[4];
  984. /* Adjust fw RISC transfer size */
  985. if (req->length > 1024)
  986. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  987. else
  988. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  989. req->length;
  990. if (IS_QLA2200(ha) &&
  991. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  992. /* Limit firmware transfer size with a 2200A */
  993. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  994. vha->host_no));
  995. ha->device_type |= DT_ISP2200A;
  996. ha->fw_transfer_size = 128;
  997. }
  998. /* Wrap Incoming Mailboxes Test. */
  999. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1000. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  1001. rval = qla2x00_mbx_reg_test(vha);
  1002. if (rval) {
  1003. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1004. vha->host_no));
  1005. qla_printk(KERN_WARNING, ha,
  1006. "Failed mailbox send register test\n");
  1007. }
  1008. else {
  1009. /* Flag a successful rval */
  1010. rval = QLA_SUCCESS;
  1011. }
  1012. spin_lock_irqsave(&ha->hardware_lock, flags);
  1013. chip_diag_failed:
  1014. if (rval)
  1015. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1016. "****\n", vha->host_no));
  1017. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1018. return (rval);
  1019. }
  1020. /**
  1021. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1022. * @ha: HA context
  1023. *
  1024. * Returns 0 on success.
  1025. */
  1026. int
  1027. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1028. {
  1029. int rval;
  1030. struct qla_hw_data *ha = vha->hw;
  1031. struct req_que *req = ha->req_q_map[0];
  1032. if (IS_QLA82XX(ha))
  1033. return QLA_SUCCESS;
  1034. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1035. rval = qla2x00_mbx_reg_test(vha);
  1036. if (rval) {
  1037. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1038. vha->host_no));
  1039. qla_printk(KERN_WARNING, ha,
  1040. "Failed mailbox send register test\n");
  1041. } else {
  1042. /* Flag a successful rval */
  1043. rval = QLA_SUCCESS;
  1044. }
  1045. return rval;
  1046. }
  1047. void
  1048. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1049. {
  1050. int rval;
  1051. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1052. eft_size, fce_size, mq_size;
  1053. dma_addr_t tc_dma;
  1054. void *tc;
  1055. struct qla_hw_data *ha = vha->hw;
  1056. struct req_que *req = ha->req_q_map[0];
  1057. struct rsp_que *rsp = ha->rsp_q_map[0];
  1058. if (ha->fw_dump) {
  1059. qla_printk(KERN_WARNING, ha,
  1060. "Firmware dump previously allocated.\n");
  1061. return;
  1062. }
  1063. ha->fw_dumped = 0;
  1064. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1065. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1066. fixed_size = sizeof(struct qla2100_fw_dump);
  1067. } else if (IS_QLA23XX(ha)) {
  1068. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1069. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1070. sizeof(uint16_t);
  1071. } else if (IS_FWI2_CAPABLE(ha)) {
  1072. if (IS_QLA81XX(ha))
  1073. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1074. else if (IS_QLA25XX(ha))
  1075. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1076. else
  1077. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1078. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1079. sizeof(uint32_t);
  1080. if (ha->mqenable)
  1081. mq_size = sizeof(struct qla2xxx_mq_chain);
  1082. /* Allocate memory for Fibre Channel Event Buffer. */
  1083. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1084. goto try_eft;
  1085. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1086. GFP_KERNEL);
  1087. if (!tc) {
  1088. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1089. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1090. goto try_eft;
  1091. }
  1092. memset(tc, 0, FCE_SIZE);
  1093. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1094. ha->fce_mb, &ha->fce_bufs);
  1095. if (rval) {
  1096. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1097. "FCE (%d).\n", rval);
  1098. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1099. tc_dma);
  1100. ha->flags.fce_enabled = 0;
  1101. goto try_eft;
  1102. }
  1103. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1104. FCE_SIZE / 1024);
  1105. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1106. ha->flags.fce_enabled = 1;
  1107. ha->fce_dma = tc_dma;
  1108. ha->fce = tc;
  1109. try_eft:
  1110. /* Allocate memory for Extended Trace Buffer. */
  1111. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1112. GFP_KERNEL);
  1113. if (!tc) {
  1114. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1115. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1116. goto cont_alloc;
  1117. }
  1118. memset(tc, 0, EFT_SIZE);
  1119. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1120. if (rval) {
  1121. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1122. "EFT (%d).\n", rval);
  1123. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1124. tc_dma);
  1125. goto cont_alloc;
  1126. }
  1127. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1128. EFT_SIZE / 1024);
  1129. eft_size = EFT_SIZE;
  1130. ha->eft_dma = tc_dma;
  1131. ha->eft = tc;
  1132. }
  1133. cont_alloc:
  1134. req_q_size = req->length * sizeof(request_t);
  1135. rsp_q_size = rsp->length * sizeof(response_t);
  1136. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1137. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1138. ha->chain_offset = dump_size;
  1139. dump_size += mq_size + fce_size;
  1140. ha->fw_dump = vmalloc(dump_size);
  1141. if (!ha->fw_dump) {
  1142. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1143. "firmware dump!!!\n", dump_size / 1024);
  1144. if (ha->eft) {
  1145. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1146. ha->eft_dma);
  1147. ha->eft = NULL;
  1148. ha->eft_dma = 0;
  1149. }
  1150. return;
  1151. }
  1152. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1153. dump_size / 1024);
  1154. ha->fw_dump_len = dump_size;
  1155. ha->fw_dump->signature[0] = 'Q';
  1156. ha->fw_dump->signature[1] = 'L';
  1157. ha->fw_dump->signature[2] = 'G';
  1158. ha->fw_dump->signature[3] = 'C';
  1159. ha->fw_dump->version = __constant_htonl(1);
  1160. ha->fw_dump->fixed_size = htonl(fixed_size);
  1161. ha->fw_dump->mem_size = htonl(mem_size);
  1162. ha->fw_dump->req_q_size = htonl(req_q_size);
  1163. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1164. ha->fw_dump->eft_size = htonl(eft_size);
  1165. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1166. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1167. ha->fw_dump->header_size =
  1168. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1169. }
  1170. static int
  1171. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1172. {
  1173. #define MPS_MASK 0xe0
  1174. int rval;
  1175. uint16_t dc;
  1176. uint32_t dw;
  1177. struct qla_hw_data *ha = vha->hw;
  1178. if (!IS_QLA81XX(vha->hw))
  1179. return QLA_SUCCESS;
  1180. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1181. if (rval != QLA_SUCCESS) {
  1182. DEBUG2(qla_printk(KERN_WARNING, ha,
  1183. "Sync-MPI: Unable to acquire semaphore.\n"));
  1184. goto done;
  1185. }
  1186. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1187. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1188. if (rval != QLA_SUCCESS) {
  1189. DEBUG2(qla_printk(KERN_WARNING, ha,
  1190. "Sync-MPI: Unable to read sync.\n"));
  1191. goto done_release;
  1192. }
  1193. dc &= MPS_MASK;
  1194. if (dc == (dw & MPS_MASK))
  1195. goto done_release;
  1196. dw &= ~MPS_MASK;
  1197. dw |= dc;
  1198. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1199. if (rval != QLA_SUCCESS) {
  1200. DEBUG2(qla_printk(KERN_WARNING, ha,
  1201. "Sync-MPI: Unable to gain sync.\n"));
  1202. }
  1203. done_release:
  1204. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1205. if (rval != QLA_SUCCESS) {
  1206. DEBUG2(qla_printk(KERN_WARNING, ha,
  1207. "Sync-MPI: Unable to release semaphore.\n"));
  1208. }
  1209. done:
  1210. return rval;
  1211. }
  1212. /**
  1213. * qla2x00_setup_chip() - Load and start RISC firmware.
  1214. * @ha: HA context
  1215. *
  1216. * Returns 0 on success.
  1217. */
  1218. static int
  1219. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1220. {
  1221. int rval;
  1222. uint32_t srisc_address = 0;
  1223. struct qla_hw_data *ha = vha->hw;
  1224. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1225. unsigned long flags;
  1226. uint16_t fw_major_version;
  1227. if (IS_QLA82XX(ha)) {
  1228. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1229. if (rval == QLA_SUCCESS)
  1230. goto enable_82xx_npiv;
  1231. else
  1232. goto failed;
  1233. }
  1234. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1235. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1236. spin_lock_irqsave(&ha->hardware_lock, flags);
  1237. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1238. RD_REG_WORD(&reg->hccr);
  1239. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1240. }
  1241. qla81xx_mpi_sync(vha);
  1242. /* Load firmware sequences */
  1243. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1244. if (rval == QLA_SUCCESS) {
  1245. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1246. "code.\n", vha->host_no));
  1247. rval = qla2x00_verify_checksum(vha, srisc_address);
  1248. if (rval == QLA_SUCCESS) {
  1249. /* Start firmware execution. */
  1250. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1251. "firmware.\n", vha->host_no));
  1252. rval = qla2x00_execute_fw(vha, srisc_address);
  1253. /* Retrieve firmware information. */
  1254. if (rval == QLA_SUCCESS) {
  1255. enable_82xx_npiv:
  1256. fw_major_version = ha->fw_major_version;
  1257. rval = qla2x00_get_fw_version(vha,
  1258. &ha->fw_major_version,
  1259. &ha->fw_minor_version,
  1260. &ha->fw_subminor_version,
  1261. &ha->fw_attributes, &ha->fw_memory_size,
  1262. ha->mpi_version, &ha->mpi_capabilities,
  1263. ha->phy_version);
  1264. if (rval != QLA_SUCCESS)
  1265. goto failed;
  1266. ha->flags.npiv_supported = 0;
  1267. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1268. (ha->fw_attributes & BIT_2)) {
  1269. ha->flags.npiv_supported = 1;
  1270. if ((!ha->max_npiv_vports) ||
  1271. ((ha->max_npiv_vports + 1) %
  1272. MIN_MULTI_ID_FABRIC))
  1273. ha->max_npiv_vports =
  1274. MIN_MULTI_ID_FABRIC - 1;
  1275. }
  1276. qla2x00_get_resource_cnts(vha, NULL,
  1277. &ha->fw_xcb_count, NULL, NULL,
  1278. &ha->max_npiv_vports, NULL);
  1279. if (!fw_major_version && ql2xallocfwdump) {
  1280. if (!IS_QLA82XX(ha))
  1281. qla2x00_alloc_fw_dump(vha);
  1282. }
  1283. }
  1284. } else {
  1285. DEBUG2(printk(KERN_INFO
  1286. "scsi(%ld): ISP Firmware failed checksum.\n",
  1287. vha->host_no));
  1288. }
  1289. }
  1290. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1291. /* Enable proper parity. */
  1292. spin_lock_irqsave(&ha->hardware_lock, flags);
  1293. if (IS_QLA2300(ha))
  1294. /* SRAM parity */
  1295. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1296. else
  1297. /* SRAM, Instruction RAM and GP RAM parity */
  1298. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1299. RD_REG_WORD(&reg->hccr);
  1300. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1301. }
  1302. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1303. uint32_t size;
  1304. rval = qla81xx_fac_get_sector_size(vha, &size);
  1305. if (rval == QLA_SUCCESS) {
  1306. ha->flags.fac_supported = 1;
  1307. ha->fdt_block_size = size << 2;
  1308. } else {
  1309. qla_printk(KERN_ERR, ha,
  1310. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1311. ha->fw_major_version, ha->fw_minor_version,
  1312. ha->fw_subminor_version);
  1313. }
  1314. }
  1315. failed:
  1316. if (rval) {
  1317. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1318. vha->host_no));
  1319. }
  1320. return (rval);
  1321. }
  1322. /**
  1323. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1324. * @ha: HA context
  1325. *
  1326. * Beginning of request ring has initialization control block already built
  1327. * by nvram config routine.
  1328. *
  1329. * Returns 0 on success.
  1330. */
  1331. void
  1332. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1333. {
  1334. uint16_t cnt;
  1335. response_t *pkt;
  1336. rsp->ring_ptr = rsp->ring;
  1337. rsp->ring_index = 0;
  1338. rsp->status_srb = NULL;
  1339. pkt = rsp->ring_ptr;
  1340. for (cnt = 0; cnt < rsp->length; cnt++) {
  1341. pkt->signature = RESPONSE_PROCESSED;
  1342. pkt++;
  1343. }
  1344. }
  1345. /**
  1346. * qla2x00_update_fw_options() - Read and process firmware options.
  1347. * @ha: HA context
  1348. *
  1349. * Returns 0 on success.
  1350. */
  1351. void
  1352. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1353. {
  1354. uint16_t swing, emphasis, tx_sens, rx_sens;
  1355. struct qla_hw_data *ha = vha->hw;
  1356. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1357. qla2x00_get_fw_options(vha, ha->fw_options);
  1358. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1359. return;
  1360. /* Serial Link options. */
  1361. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1362. vha->host_no));
  1363. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1364. sizeof(ha->fw_seriallink_options)));
  1365. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1366. if (ha->fw_seriallink_options[3] & BIT_2) {
  1367. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1368. /* 1G settings */
  1369. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1370. emphasis = (ha->fw_seriallink_options[2] &
  1371. (BIT_4 | BIT_3)) >> 3;
  1372. tx_sens = ha->fw_seriallink_options[0] &
  1373. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1374. rx_sens = (ha->fw_seriallink_options[0] &
  1375. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1376. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1377. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1378. if (rx_sens == 0x0)
  1379. rx_sens = 0x3;
  1380. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1381. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1382. ha->fw_options[10] |= BIT_5 |
  1383. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1384. (tx_sens & (BIT_1 | BIT_0));
  1385. /* 2G settings */
  1386. swing = (ha->fw_seriallink_options[2] &
  1387. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1388. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1389. tx_sens = ha->fw_seriallink_options[1] &
  1390. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1391. rx_sens = (ha->fw_seriallink_options[1] &
  1392. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1393. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1394. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1395. if (rx_sens == 0x0)
  1396. rx_sens = 0x3;
  1397. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1398. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1399. ha->fw_options[11] |= BIT_5 |
  1400. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1401. (tx_sens & (BIT_1 | BIT_0));
  1402. }
  1403. /* FCP2 options. */
  1404. /* Return command IOCBs without waiting for an ABTS to complete. */
  1405. ha->fw_options[3] |= BIT_13;
  1406. /* LED scheme. */
  1407. if (ha->flags.enable_led_scheme)
  1408. ha->fw_options[2] |= BIT_12;
  1409. /* Detect ISP6312. */
  1410. if (IS_QLA6312(ha))
  1411. ha->fw_options[2] |= BIT_13;
  1412. /* Update firmware options. */
  1413. qla2x00_set_fw_options(vha, ha->fw_options);
  1414. }
  1415. void
  1416. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1417. {
  1418. int rval;
  1419. struct qla_hw_data *ha = vha->hw;
  1420. if (IS_QLA82XX(ha))
  1421. return;
  1422. /* Update Serial Link options. */
  1423. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1424. return;
  1425. rval = qla2x00_set_serdes_params(vha,
  1426. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1427. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1428. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1429. if (rval != QLA_SUCCESS) {
  1430. qla_printk(KERN_WARNING, ha,
  1431. "Unable to update Serial Link options (%x).\n", rval);
  1432. }
  1433. }
  1434. void
  1435. qla2x00_config_rings(struct scsi_qla_host *vha)
  1436. {
  1437. struct qla_hw_data *ha = vha->hw;
  1438. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1439. struct req_que *req = ha->req_q_map[0];
  1440. struct rsp_que *rsp = ha->rsp_q_map[0];
  1441. /* Setup ring parameters in initialization control block. */
  1442. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1443. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1444. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1445. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1446. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1447. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1448. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1449. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1450. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1451. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1452. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1453. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1454. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1455. }
  1456. void
  1457. qla24xx_config_rings(struct scsi_qla_host *vha)
  1458. {
  1459. struct qla_hw_data *ha = vha->hw;
  1460. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1461. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1462. struct qla_msix_entry *msix;
  1463. struct init_cb_24xx *icb;
  1464. uint16_t rid = 0;
  1465. struct req_que *req = ha->req_q_map[0];
  1466. struct rsp_que *rsp = ha->rsp_q_map[0];
  1467. /* Setup ring parameters in initialization control block. */
  1468. icb = (struct init_cb_24xx *)ha->init_cb;
  1469. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1470. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1471. icb->request_q_length = cpu_to_le16(req->length);
  1472. icb->response_q_length = cpu_to_le16(rsp->length);
  1473. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1474. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1475. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1476. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1477. if (ha->mqenable) {
  1478. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1479. icb->rid = __constant_cpu_to_le16(rid);
  1480. if (ha->flags.msix_enabled) {
  1481. msix = &ha->msix_entries[1];
  1482. DEBUG2_17(printk(KERN_INFO
  1483. "Registering vector 0x%x for base que\n", msix->entry));
  1484. icb->msix = cpu_to_le16(msix->entry);
  1485. }
  1486. /* Use alternate PCI bus number */
  1487. if (MSB(rid))
  1488. icb->firmware_options_2 |=
  1489. __constant_cpu_to_le32(BIT_19);
  1490. /* Use alternate PCI devfn */
  1491. if (LSB(rid))
  1492. icb->firmware_options_2 |=
  1493. __constant_cpu_to_le32(BIT_18);
  1494. /* Use Disable MSIX Handshake mode for capable adapters */
  1495. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1496. icb->firmware_options_2 &=
  1497. __constant_cpu_to_le32(~BIT_22);
  1498. ha->flags.disable_msix_handshake = 1;
  1499. qla_printk(KERN_INFO, ha,
  1500. "MSIX Handshake Disable Mode turned on\n");
  1501. } else {
  1502. icb->firmware_options_2 |=
  1503. __constant_cpu_to_le32(BIT_22);
  1504. }
  1505. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1506. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1507. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1508. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1509. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1510. } else {
  1511. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1512. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1513. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1514. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1515. }
  1516. /* PCI posting */
  1517. RD_REG_DWORD(&ioreg->hccr);
  1518. }
  1519. /**
  1520. * qla2x00_init_rings() - Initializes firmware.
  1521. * @ha: HA context
  1522. *
  1523. * Beginning of request ring has initialization control block already built
  1524. * by nvram config routine.
  1525. *
  1526. * Returns 0 on success.
  1527. */
  1528. static int
  1529. qla2x00_init_rings(scsi_qla_host_t *vha)
  1530. {
  1531. int rval;
  1532. unsigned long flags = 0;
  1533. int cnt, que;
  1534. struct qla_hw_data *ha = vha->hw;
  1535. struct req_que *req;
  1536. struct rsp_que *rsp;
  1537. struct scsi_qla_host *vp;
  1538. struct mid_init_cb_24xx *mid_init_cb =
  1539. (struct mid_init_cb_24xx *) ha->init_cb;
  1540. spin_lock_irqsave(&ha->hardware_lock, flags);
  1541. /* Clear outstanding commands array. */
  1542. for (que = 0; que < ha->max_req_queues; que++) {
  1543. req = ha->req_q_map[que];
  1544. if (!req)
  1545. continue;
  1546. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1547. req->outstanding_cmds[cnt] = NULL;
  1548. req->current_outstanding_cmd = 1;
  1549. /* Initialize firmware. */
  1550. req->ring_ptr = req->ring;
  1551. req->ring_index = 0;
  1552. req->cnt = req->length;
  1553. }
  1554. for (que = 0; que < ha->max_rsp_queues; que++) {
  1555. rsp = ha->rsp_q_map[que];
  1556. if (!rsp)
  1557. continue;
  1558. /* Initialize response queue entries */
  1559. qla2x00_init_response_q_entries(rsp);
  1560. }
  1561. /* Clear RSCN queue. */
  1562. list_for_each_entry(vp, &ha->vp_list, list) {
  1563. vp->rscn_in_ptr = 0;
  1564. vp->rscn_out_ptr = 0;
  1565. }
  1566. ha->isp_ops->config_rings(vha);
  1567. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1568. /* Update any ISP specific firmware options before initialization. */
  1569. ha->isp_ops->update_fw_options(vha);
  1570. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1571. if (ha->flags.npiv_supported) {
  1572. if (ha->operating_mode == LOOP)
  1573. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1574. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1575. }
  1576. if (IS_FWI2_CAPABLE(ha)) {
  1577. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1578. mid_init_cb->init_cb.execution_throttle =
  1579. cpu_to_le16(ha->fw_xcb_count);
  1580. }
  1581. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1582. if (rval) {
  1583. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1584. vha->host_no));
  1585. } else {
  1586. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1587. vha->host_no));
  1588. }
  1589. return (rval);
  1590. }
  1591. /**
  1592. * qla2x00_fw_ready() - Waits for firmware ready.
  1593. * @ha: HA context
  1594. *
  1595. * Returns 0 on success.
  1596. */
  1597. static int
  1598. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1599. {
  1600. int rval;
  1601. unsigned long wtime, mtime, cs84xx_time;
  1602. uint16_t min_wait; /* Minimum wait time if loop is down */
  1603. uint16_t wait_time; /* Wait time if loop is coming ready */
  1604. uint16_t state[5];
  1605. struct qla_hw_data *ha = vha->hw;
  1606. rval = QLA_SUCCESS;
  1607. /* 20 seconds for loop down. */
  1608. min_wait = 20;
  1609. /*
  1610. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1611. * our own processing.
  1612. */
  1613. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1614. wait_time = min_wait;
  1615. }
  1616. /* Min wait time if loop down */
  1617. mtime = jiffies + (min_wait * HZ);
  1618. /* wait time before firmware ready */
  1619. wtime = jiffies + (wait_time * HZ);
  1620. /* Wait for ISP to finish LIP */
  1621. if (!vha->flags.init_done)
  1622. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1623. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1624. vha->host_no));
  1625. do {
  1626. rval = qla2x00_get_firmware_state(vha, state);
  1627. if (rval == QLA_SUCCESS) {
  1628. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1629. vha->device_flags &= ~DFLG_NO_CABLE;
  1630. }
  1631. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1632. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1633. "84xx=%x.\n", vha->host_no, state[0],
  1634. state[2]));
  1635. if ((state[2] & FSTATE_LOGGED_IN) &&
  1636. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1637. DEBUG16(printk("scsi(%ld): Sending "
  1638. "verify iocb.\n", vha->host_no));
  1639. cs84xx_time = jiffies;
  1640. rval = qla84xx_init_chip(vha);
  1641. if (rval != QLA_SUCCESS)
  1642. break;
  1643. /* Add time taken to initialize. */
  1644. cs84xx_time = jiffies - cs84xx_time;
  1645. wtime += cs84xx_time;
  1646. mtime += cs84xx_time;
  1647. DEBUG16(printk("scsi(%ld): Increasing "
  1648. "wait time by %ld. New time %ld\n",
  1649. vha->host_no, cs84xx_time, wtime));
  1650. }
  1651. } else if (state[0] == FSTATE_READY) {
  1652. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1653. vha->host_no));
  1654. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1655. &ha->login_timeout, &ha->r_a_tov);
  1656. rval = QLA_SUCCESS;
  1657. break;
  1658. }
  1659. rval = QLA_FUNCTION_FAILED;
  1660. if (atomic_read(&vha->loop_down_timer) &&
  1661. state[0] != FSTATE_READY) {
  1662. /* Loop down. Timeout on min_wait for states
  1663. * other than Wait for Login.
  1664. */
  1665. if (time_after_eq(jiffies, mtime)) {
  1666. qla_printk(KERN_INFO, ha,
  1667. "Cable is unplugged...\n");
  1668. vha->device_flags |= DFLG_NO_CABLE;
  1669. break;
  1670. }
  1671. }
  1672. } else {
  1673. /* Mailbox cmd failed. Timeout on min_wait. */
  1674. if (time_after_eq(jiffies, mtime))
  1675. break;
  1676. }
  1677. if (time_after_eq(jiffies, wtime))
  1678. break;
  1679. /* Delay for a while */
  1680. msleep(500);
  1681. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1682. vha->host_no, state[0], jiffies));
  1683. } while (1);
  1684. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1685. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1686. jiffies));
  1687. if (rval) {
  1688. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1689. vha->host_no));
  1690. }
  1691. return (rval);
  1692. }
  1693. /*
  1694. * qla2x00_configure_hba
  1695. * Setup adapter context.
  1696. *
  1697. * Input:
  1698. * ha = adapter state pointer.
  1699. *
  1700. * Returns:
  1701. * 0 = success
  1702. *
  1703. * Context:
  1704. * Kernel context.
  1705. */
  1706. static int
  1707. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1708. {
  1709. int rval;
  1710. uint16_t loop_id;
  1711. uint16_t topo;
  1712. uint16_t sw_cap;
  1713. uint8_t al_pa;
  1714. uint8_t area;
  1715. uint8_t domain;
  1716. char connect_type[22];
  1717. struct qla_hw_data *ha = vha->hw;
  1718. /* Get host addresses. */
  1719. rval = qla2x00_get_adapter_id(vha,
  1720. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1721. if (rval != QLA_SUCCESS) {
  1722. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1723. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1724. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1725. __func__, vha->host_no));
  1726. } else {
  1727. qla_printk(KERN_WARNING, ha,
  1728. "ERROR -- Unable to get host loop ID.\n");
  1729. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1730. }
  1731. return (rval);
  1732. }
  1733. if (topo == 4) {
  1734. qla_printk(KERN_INFO, ha,
  1735. "Cannot get topology - retrying.\n");
  1736. return (QLA_FUNCTION_FAILED);
  1737. }
  1738. vha->loop_id = loop_id;
  1739. /* initialize */
  1740. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1741. ha->operating_mode = LOOP;
  1742. ha->switch_cap = 0;
  1743. switch (topo) {
  1744. case 0:
  1745. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1746. vha->host_no));
  1747. ha->current_topology = ISP_CFG_NL;
  1748. strcpy(connect_type, "(Loop)");
  1749. break;
  1750. case 1:
  1751. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1752. vha->host_no));
  1753. ha->switch_cap = sw_cap;
  1754. ha->current_topology = ISP_CFG_FL;
  1755. strcpy(connect_type, "(FL_Port)");
  1756. break;
  1757. case 2:
  1758. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1759. vha->host_no));
  1760. ha->operating_mode = P2P;
  1761. ha->current_topology = ISP_CFG_N;
  1762. strcpy(connect_type, "(N_Port-to-N_Port)");
  1763. break;
  1764. case 3:
  1765. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1766. vha->host_no));
  1767. ha->switch_cap = sw_cap;
  1768. ha->operating_mode = P2P;
  1769. ha->current_topology = ISP_CFG_F;
  1770. strcpy(connect_type, "(F_Port)");
  1771. break;
  1772. default:
  1773. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1774. "Using NL.\n",
  1775. vha->host_no, topo));
  1776. ha->current_topology = ISP_CFG_NL;
  1777. strcpy(connect_type, "(Loop)");
  1778. break;
  1779. }
  1780. /* Save Host port and loop ID. */
  1781. /* byte order - Big Endian */
  1782. vha->d_id.b.domain = domain;
  1783. vha->d_id.b.area = area;
  1784. vha->d_id.b.al_pa = al_pa;
  1785. if (!vha->flags.init_done)
  1786. qla_printk(KERN_INFO, ha,
  1787. "Topology - %s, Host Loop address 0x%x\n",
  1788. connect_type, vha->loop_id);
  1789. if (rval) {
  1790. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1791. } else {
  1792. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1793. }
  1794. return(rval);
  1795. }
  1796. inline void
  1797. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1798. char *def)
  1799. {
  1800. char *st, *en;
  1801. uint16_t index;
  1802. struct qla_hw_data *ha = vha->hw;
  1803. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1804. !IS_QLA8XXX_TYPE(ha);
  1805. if (memcmp(model, BINZERO, len) != 0) {
  1806. strncpy(ha->model_number, model, len);
  1807. st = en = ha->model_number;
  1808. en += len - 1;
  1809. while (en > st) {
  1810. if (*en != 0x20 && *en != 0x00)
  1811. break;
  1812. *en-- = '\0';
  1813. }
  1814. index = (ha->pdev->subsystem_device & 0xff);
  1815. if (use_tbl &&
  1816. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1817. index < QLA_MODEL_NAMES)
  1818. strncpy(ha->model_desc,
  1819. qla2x00_model_name[index * 2 + 1],
  1820. sizeof(ha->model_desc) - 1);
  1821. } else {
  1822. index = (ha->pdev->subsystem_device & 0xff);
  1823. if (use_tbl &&
  1824. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1825. index < QLA_MODEL_NAMES) {
  1826. strcpy(ha->model_number,
  1827. qla2x00_model_name[index * 2]);
  1828. strncpy(ha->model_desc,
  1829. qla2x00_model_name[index * 2 + 1],
  1830. sizeof(ha->model_desc) - 1);
  1831. } else {
  1832. strcpy(ha->model_number, def);
  1833. }
  1834. }
  1835. if (IS_FWI2_CAPABLE(ha))
  1836. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1837. sizeof(ha->model_desc));
  1838. }
  1839. /* On sparc systems, obtain port and node WWN from firmware
  1840. * properties.
  1841. */
  1842. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1843. {
  1844. #ifdef CONFIG_SPARC
  1845. struct qla_hw_data *ha = vha->hw;
  1846. struct pci_dev *pdev = ha->pdev;
  1847. struct device_node *dp = pci_device_to_OF_node(pdev);
  1848. const u8 *val;
  1849. int len;
  1850. val = of_get_property(dp, "port-wwn", &len);
  1851. if (val && len >= WWN_SIZE)
  1852. memcpy(nv->port_name, val, WWN_SIZE);
  1853. val = of_get_property(dp, "node-wwn", &len);
  1854. if (val && len >= WWN_SIZE)
  1855. memcpy(nv->node_name, val, WWN_SIZE);
  1856. #endif
  1857. }
  1858. /*
  1859. * NVRAM configuration for ISP 2xxx
  1860. *
  1861. * Input:
  1862. * ha = adapter block pointer.
  1863. *
  1864. * Output:
  1865. * initialization control block in response_ring
  1866. * host adapters parameters in host adapter block
  1867. *
  1868. * Returns:
  1869. * 0 = success.
  1870. */
  1871. int
  1872. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1873. {
  1874. int rval;
  1875. uint8_t chksum = 0;
  1876. uint16_t cnt;
  1877. uint8_t *dptr1, *dptr2;
  1878. struct qla_hw_data *ha = vha->hw;
  1879. init_cb_t *icb = ha->init_cb;
  1880. nvram_t *nv = ha->nvram;
  1881. uint8_t *ptr = ha->nvram;
  1882. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1883. rval = QLA_SUCCESS;
  1884. /* Determine NVRAM starting address. */
  1885. ha->nvram_size = sizeof(nvram_t);
  1886. ha->nvram_base = 0;
  1887. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1888. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1889. ha->nvram_base = 0x80;
  1890. /* Get NVRAM data and calculate checksum. */
  1891. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1892. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1893. chksum += *ptr++;
  1894. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1895. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1896. /* Bad NVRAM data, set defaults parameters. */
  1897. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1898. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1899. /* Reset NVRAM data. */
  1900. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1901. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1902. nv->nvram_version);
  1903. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1904. "invalid -- WWPN) defaults.\n");
  1905. /*
  1906. * Set default initialization control block.
  1907. */
  1908. memset(nv, 0, ha->nvram_size);
  1909. nv->parameter_block_version = ICB_VERSION;
  1910. if (IS_QLA23XX(ha)) {
  1911. nv->firmware_options[0] = BIT_2 | BIT_1;
  1912. nv->firmware_options[1] = BIT_7 | BIT_5;
  1913. nv->add_firmware_options[0] = BIT_5;
  1914. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1915. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1916. nv->special_options[1] = BIT_7;
  1917. } else if (IS_QLA2200(ha)) {
  1918. nv->firmware_options[0] = BIT_2 | BIT_1;
  1919. nv->firmware_options[1] = BIT_7 | BIT_5;
  1920. nv->add_firmware_options[0] = BIT_5;
  1921. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1922. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1923. } else if (IS_QLA2100(ha)) {
  1924. nv->firmware_options[0] = BIT_3 | BIT_1;
  1925. nv->firmware_options[1] = BIT_5;
  1926. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1927. }
  1928. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1929. nv->execution_throttle = __constant_cpu_to_le16(16);
  1930. nv->retry_count = 8;
  1931. nv->retry_delay = 1;
  1932. nv->port_name[0] = 33;
  1933. nv->port_name[3] = 224;
  1934. nv->port_name[4] = 139;
  1935. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1936. nv->login_timeout = 4;
  1937. /*
  1938. * Set default host adapter parameters
  1939. */
  1940. nv->host_p[1] = BIT_2;
  1941. nv->reset_delay = 5;
  1942. nv->port_down_retry_count = 8;
  1943. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1944. nv->link_down_timeout = 60;
  1945. rval = 1;
  1946. }
  1947. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1948. /*
  1949. * The SN2 does not provide BIOS emulation which means you can't change
  1950. * potentially bogus BIOS settings. Force the use of default settings
  1951. * for link rate and frame size. Hope that the rest of the settings
  1952. * are valid.
  1953. */
  1954. if (ia64_platform_is("sn2")) {
  1955. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1956. if (IS_QLA23XX(ha))
  1957. nv->special_options[1] = BIT_7;
  1958. }
  1959. #endif
  1960. /* Reset Initialization control block */
  1961. memset(icb, 0, ha->init_cb_size);
  1962. /*
  1963. * Setup driver NVRAM options.
  1964. */
  1965. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1966. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1967. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1968. nv->firmware_options[1] &= ~BIT_4;
  1969. if (IS_QLA23XX(ha)) {
  1970. nv->firmware_options[0] |= BIT_2;
  1971. nv->firmware_options[0] &= ~BIT_3;
  1972. nv->firmware_options[0] &= ~BIT_6;
  1973. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1974. if (IS_QLA2300(ha)) {
  1975. if (ha->fb_rev == FPM_2310) {
  1976. strcpy(ha->model_number, "QLA2310");
  1977. } else {
  1978. strcpy(ha->model_number, "QLA2300");
  1979. }
  1980. } else {
  1981. qla2x00_set_model_info(vha, nv->model_number,
  1982. sizeof(nv->model_number), "QLA23xx");
  1983. }
  1984. } else if (IS_QLA2200(ha)) {
  1985. nv->firmware_options[0] |= BIT_2;
  1986. /*
  1987. * 'Point-to-point preferred, else loop' is not a safe
  1988. * connection mode setting.
  1989. */
  1990. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1991. (BIT_5 | BIT_4)) {
  1992. /* Force 'loop preferred, else point-to-point'. */
  1993. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1994. nv->add_firmware_options[0] |= BIT_5;
  1995. }
  1996. strcpy(ha->model_number, "QLA22xx");
  1997. } else /*if (IS_QLA2100(ha))*/ {
  1998. strcpy(ha->model_number, "QLA2100");
  1999. }
  2000. /*
  2001. * Copy over NVRAM RISC parameter block to initialization control block.
  2002. */
  2003. dptr1 = (uint8_t *)icb;
  2004. dptr2 = (uint8_t *)&nv->parameter_block_version;
  2005. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  2006. while (cnt--)
  2007. *dptr1++ = *dptr2++;
  2008. /* Copy 2nd half. */
  2009. dptr1 = (uint8_t *)icb->add_firmware_options;
  2010. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2011. while (cnt--)
  2012. *dptr1++ = *dptr2++;
  2013. /* Use alternate WWN? */
  2014. if (nv->host_p[1] & BIT_7) {
  2015. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2016. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2017. }
  2018. /* Prepare nodename */
  2019. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2020. /*
  2021. * Firmware will apply the following mask if the nodename was
  2022. * not provided.
  2023. */
  2024. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2025. icb->node_name[0] &= 0xF0;
  2026. }
  2027. /*
  2028. * Set host adapter parameters.
  2029. */
  2030. if (nv->host_p[0] & BIT_7)
  2031. ql2xextended_error_logging = 1;
  2032. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2033. /* Always load RISC code on non ISP2[12]00 chips. */
  2034. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2035. ha->flags.disable_risc_code_load = 0;
  2036. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2037. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2038. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2039. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2040. ha->flags.disable_serdes = 0;
  2041. ha->operating_mode =
  2042. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2043. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2044. sizeof(ha->fw_seriallink_options));
  2045. /* save HBA serial number */
  2046. ha->serial0 = icb->port_name[5];
  2047. ha->serial1 = icb->port_name[6];
  2048. ha->serial2 = icb->port_name[7];
  2049. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2050. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2051. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2052. ha->retry_count = nv->retry_count;
  2053. /* Set minimum login_timeout to 4 seconds. */
  2054. if (nv->login_timeout < ql2xlogintimeout)
  2055. nv->login_timeout = ql2xlogintimeout;
  2056. if (nv->login_timeout < 4)
  2057. nv->login_timeout = 4;
  2058. ha->login_timeout = nv->login_timeout;
  2059. icb->login_timeout = nv->login_timeout;
  2060. /* Set minimum RATOV to 100 tenths of a second. */
  2061. ha->r_a_tov = 100;
  2062. ha->loop_reset_delay = nv->reset_delay;
  2063. /* Link Down Timeout = 0:
  2064. *
  2065. * When Port Down timer expires we will start returning
  2066. * I/O's to OS with "DID_NO_CONNECT".
  2067. *
  2068. * Link Down Timeout != 0:
  2069. *
  2070. * The driver waits for the link to come up after link down
  2071. * before returning I/Os to OS with "DID_NO_CONNECT".
  2072. */
  2073. if (nv->link_down_timeout == 0) {
  2074. ha->loop_down_abort_time =
  2075. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2076. } else {
  2077. ha->link_down_timeout = nv->link_down_timeout;
  2078. ha->loop_down_abort_time =
  2079. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2080. }
  2081. /*
  2082. * Need enough time to try and get the port back.
  2083. */
  2084. ha->port_down_retry_count = nv->port_down_retry_count;
  2085. if (qlport_down_retry)
  2086. ha->port_down_retry_count = qlport_down_retry;
  2087. /* Set login_retry_count */
  2088. ha->login_retry_count = nv->retry_count;
  2089. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2090. ha->port_down_retry_count > 3)
  2091. ha->login_retry_count = ha->port_down_retry_count;
  2092. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2093. ha->login_retry_count = ha->port_down_retry_count;
  2094. if (ql2xloginretrycount)
  2095. ha->login_retry_count = ql2xloginretrycount;
  2096. icb->lun_enables = __constant_cpu_to_le16(0);
  2097. icb->command_resource_count = 0;
  2098. icb->immediate_notify_resource_count = 0;
  2099. icb->timeout = __constant_cpu_to_le16(0);
  2100. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2101. /* Enable RIO */
  2102. icb->firmware_options[0] &= ~BIT_3;
  2103. icb->add_firmware_options[0] &=
  2104. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2105. icb->add_firmware_options[0] |= BIT_2;
  2106. icb->response_accumulation_timer = 3;
  2107. icb->interrupt_delay_timer = 5;
  2108. vha->flags.process_response_queue = 1;
  2109. } else {
  2110. /* Enable ZIO. */
  2111. if (!vha->flags.init_done) {
  2112. ha->zio_mode = icb->add_firmware_options[0] &
  2113. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2114. ha->zio_timer = icb->interrupt_delay_timer ?
  2115. icb->interrupt_delay_timer: 2;
  2116. }
  2117. icb->add_firmware_options[0] &=
  2118. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2119. vha->flags.process_response_queue = 0;
  2120. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2121. ha->zio_mode = QLA_ZIO_MODE_6;
  2122. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2123. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2124. ha->zio_timer * 100));
  2125. qla_printk(KERN_INFO, ha,
  2126. "ZIO mode %d enabled; timer delay (%d us).\n",
  2127. ha->zio_mode, ha->zio_timer * 100);
  2128. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2129. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2130. vha->flags.process_response_queue = 1;
  2131. }
  2132. }
  2133. if (rval) {
  2134. DEBUG2_3(printk(KERN_WARNING
  2135. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2136. }
  2137. return (rval);
  2138. }
  2139. static void
  2140. qla2x00_rport_del(void *data)
  2141. {
  2142. fc_port_t *fcport = data;
  2143. struct fc_rport *rport;
  2144. spin_lock_irq(fcport->vha->host->host_lock);
  2145. rport = fcport->drport ? fcport->drport: fcport->rport;
  2146. fcport->drport = NULL;
  2147. spin_unlock_irq(fcport->vha->host->host_lock);
  2148. if (rport)
  2149. fc_remote_port_delete(rport);
  2150. }
  2151. /**
  2152. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2153. * @ha: HA context
  2154. * @flags: allocation flags
  2155. *
  2156. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2157. */
  2158. fc_port_t *
  2159. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2160. {
  2161. fc_port_t *fcport;
  2162. fcport = kzalloc(sizeof(fc_port_t), flags);
  2163. if (!fcport)
  2164. return NULL;
  2165. /* Setup fcport template structure. */
  2166. fcport->vha = vha;
  2167. fcport->vp_idx = vha->vp_idx;
  2168. fcport->port_type = FCT_UNKNOWN;
  2169. fcport->loop_id = FC_NO_LOOP_ID;
  2170. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2171. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2172. return fcport;
  2173. }
  2174. /*
  2175. * qla2x00_configure_loop
  2176. * Updates Fibre Channel Device Database with what is actually on loop.
  2177. *
  2178. * Input:
  2179. * ha = adapter block pointer.
  2180. *
  2181. * Returns:
  2182. * 0 = success.
  2183. * 1 = error.
  2184. * 2 = database was full and device was not configured.
  2185. */
  2186. static int
  2187. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2188. {
  2189. int rval;
  2190. unsigned long flags, save_flags;
  2191. struct qla_hw_data *ha = vha->hw;
  2192. rval = QLA_SUCCESS;
  2193. /* Get Initiator ID */
  2194. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2195. rval = qla2x00_configure_hba(vha);
  2196. if (rval != QLA_SUCCESS) {
  2197. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2198. vha->host_no));
  2199. return (rval);
  2200. }
  2201. }
  2202. save_flags = flags = vha->dpc_flags;
  2203. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2204. vha->host_no, flags));
  2205. /*
  2206. * If we have both an RSCN and PORT UPDATE pending then handle them
  2207. * both at the same time.
  2208. */
  2209. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2210. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2211. qla2x00_get_data_rate(vha);
  2212. /* Determine what we need to do */
  2213. if (ha->current_topology == ISP_CFG_FL &&
  2214. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2215. vha->flags.rscn_queue_overflow = 1;
  2216. set_bit(RSCN_UPDATE, &flags);
  2217. } else if (ha->current_topology == ISP_CFG_F &&
  2218. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2219. vha->flags.rscn_queue_overflow = 1;
  2220. set_bit(RSCN_UPDATE, &flags);
  2221. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2222. } else if (ha->current_topology == ISP_CFG_N) {
  2223. clear_bit(RSCN_UPDATE, &flags);
  2224. } else if (!vha->flags.online ||
  2225. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2226. vha->flags.rscn_queue_overflow = 1;
  2227. set_bit(RSCN_UPDATE, &flags);
  2228. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2229. }
  2230. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2231. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2232. rval = QLA_FUNCTION_FAILED;
  2233. else
  2234. rval = qla2x00_configure_local_loop(vha);
  2235. }
  2236. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2237. if (LOOP_TRANSITION(vha))
  2238. rval = QLA_FUNCTION_FAILED;
  2239. else
  2240. rval = qla2x00_configure_fabric(vha);
  2241. }
  2242. if (rval == QLA_SUCCESS) {
  2243. if (atomic_read(&vha->loop_down_timer) ||
  2244. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2245. rval = QLA_FUNCTION_FAILED;
  2246. } else {
  2247. atomic_set(&vha->loop_state, LOOP_READY);
  2248. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2249. }
  2250. }
  2251. if (rval) {
  2252. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2253. __func__, vha->host_no));
  2254. } else {
  2255. DEBUG3(printk("%s: exiting normally\n", __func__));
  2256. }
  2257. /* Restore state if a resync event occurred during processing */
  2258. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2259. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2260. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2261. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2262. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2263. if (!IS_ALOGIO_CAPABLE(ha))
  2264. vha->flags.rscn_queue_overflow = 1;
  2265. }
  2266. }
  2267. return (rval);
  2268. }
  2269. /*
  2270. * qla2x00_configure_local_loop
  2271. * Updates Fibre Channel Device Database with local loop devices.
  2272. *
  2273. * Input:
  2274. * ha = adapter block pointer.
  2275. *
  2276. * Returns:
  2277. * 0 = success.
  2278. */
  2279. static int
  2280. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2281. {
  2282. int rval, rval2;
  2283. int found_devs;
  2284. int found;
  2285. fc_port_t *fcport, *new_fcport;
  2286. uint16_t index;
  2287. uint16_t entries;
  2288. char *id_iter;
  2289. uint16_t loop_id;
  2290. uint8_t domain, area, al_pa;
  2291. struct qla_hw_data *ha = vha->hw;
  2292. found_devs = 0;
  2293. new_fcport = NULL;
  2294. entries = MAX_FIBRE_DEVICES;
  2295. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2296. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2297. /* Get list of logged in devices. */
  2298. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2299. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2300. &entries);
  2301. if (rval != QLA_SUCCESS)
  2302. goto cleanup_allocation;
  2303. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2304. vha->host_no, entries));
  2305. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2306. entries * sizeof(struct gid_list_info)));
  2307. /* Allocate temporary fcport for any new fcports discovered. */
  2308. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2309. if (new_fcport == NULL) {
  2310. rval = QLA_MEMORY_ALLOC_FAILED;
  2311. goto cleanup_allocation;
  2312. }
  2313. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2314. /*
  2315. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2316. */
  2317. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2318. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2319. fcport->port_type != FCT_BROADCAST &&
  2320. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2321. DEBUG(printk("scsi(%ld): Marking port lost, "
  2322. "loop_id=0x%04x\n",
  2323. vha->host_no, fcport->loop_id));
  2324. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2325. }
  2326. }
  2327. /* Add devices to port list. */
  2328. id_iter = (char *)ha->gid_list;
  2329. for (index = 0; index < entries; index++) {
  2330. domain = ((struct gid_list_info *)id_iter)->domain;
  2331. area = ((struct gid_list_info *)id_iter)->area;
  2332. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2333. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2334. loop_id = (uint16_t)
  2335. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2336. else
  2337. loop_id = le16_to_cpu(
  2338. ((struct gid_list_info *)id_iter)->loop_id);
  2339. id_iter += ha->gid_list_info_size;
  2340. /* Bypass reserved domain fields. */
  2341. if ((domain & 0xf0) == 0xf0)
  2342. continue;
  2343. /* Bypass if not same domain and area of adapter. */
  2344. if (area && domain &&
  2345. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2346. continue;
  2347. /* Bypass invalid local loop ID. */
  2348. if (loop_id > LAST_LOCAL_LOOP_ID)
  2349. continue;
  2350. /* Fill in member data. */
  2351. new_fcport->d_id.b.domain = domain;
  2352. new_fcport->d_id.b.area = area;
  2353. new_fcport->d_id.b.al_pa = al_pa;
  2354. new_fcport->loop_id = loop_id;
  2355. new_fcport->vp_idx = vha->vp_idx;
  2356. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2357. if (rval2 != QLA_SUCCESS) {
  2358. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2359. "information -- get_port_database=%x, "
  2360. "loop_id=0x%04x\n",
  2361. vha->host_no, rval2, new_fcport->loop_id));
  2362. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2363. vha->host_no));
  2364. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2365. continue;
  2366. }
  2367. /* Check for matching device in port list. */
  2368. found = 0;
  2369. fcport = NULL;
  2370. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2371. if (memcmp(new_fcport->port_name, fcport->port_name,
  2372. WWN_SIZE))
  2373. continue;
  2374. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2375. fcport->loop_id = new_fcport->loop_id;
  2376. fcport->port_type = new_fcport->port_type;
  2377. fcport->d_id.b24 = new_fcport->d_id.b24;
  2378. memcpy(fcport->node_name, new_fcport->node_name,
  2379. WWN_SIZE);
  2380. found++;
  2381. break;
  2382. }
  2383. if (!found) {
  2384. /* New device, add to fcports list. */
  2385. if (vha->vp_idx) {
  2386. new_fcport->vha = vha;
  2387. new_fcport->vp_idx = vha->vp_idx;
  2388. }
  2389. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2390. /* Allocate a new replacement fcport. */
  2391. fcport = new_fcport;
  2392. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2393. if (new_fcport == NULL) {
  2394. rval = QLA_MEMORY_ALLOC_FAILED;
  2395. goto cleanup_allocation;
  2396. }
  2397. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2398. }
  2399. /* Base iIDMA settings on HBA port speed. */
  2400. fcport->fp_speed = ha->link_data_rate;
  2401. qla2x00_update_fcport(vha, fcport);
  2402. found_devs++;
  2403. }
  2404. cleanup_allocation:
  2405. kfree(new_fcport);
  2406. if (rval != QLA_SUCCESS) {
  2407. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2408. "rval=%x\n", vha->host_no, rval));
  2409. }
  2410. return (rval);
  2411. }
  2412. static void
  2413. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2414. {
  2415. #define LS_UNKNOWN 2
  2416. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2417. char *link_speed;
  2418. int rval;
  2419. uint16_t mb[4];
  2420. struct qla_hw_data *ha = vha->hw;
  2421. if (!IS_IIDMA_CAPABLE(ha))
  2422. return;
  2423. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2424. fcport->fp_speed > ha->link_data_rate)
  2425. return;
  2426. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2427. mb);
  2428. if (rval != QLA_SUCCESS) {
  2429. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2430. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2431. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2432. fcport->port_name[2], fcport->port_name[3],
  2433. fcport->port_name[4], fcport->port_name[5],
  2434. fcport->port_name[6], fcport->port_name[7], rval,
  2435. fcport->fp_speed, mb[0], mb[1]));
  2436. } else {
  2437. link_speed = link_speeds[LS_UNKNOWN];
  2438. if (fcport->fp_speed < 5)
  2439. link_speed = link_speeds[fcport->fp_speed];
  2440. else if (fcport->fp_speed == 0x13)
  2441. link_speed = link_speeds[5];
  2442. DEBUG2(qla_printk(KERN_INFO, ha,
  2443. "iIDMA adjusted to %s GB/s on "
  2444. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2445. link_speed, fcport->port_name[0],
  2446. fcport->port_name[1], fcport->port_name[2],
  2447. fcport->port_name[3], fcport->port_name[4],
  2448. fcport->port_name[5], fcport->port_name[6],
  2449. fcport->port_name[7]));
  2450. }
  2451. }
  2452. static void
  2453. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2454. {
  2455. struct fc_rport_identifiers rport_ids;
  2456. struct fc_rport *rport;
  2457. struct qla_hw_data *ha = vha->hw;
  2458. qla2x00_rport_del(fcport);
  2459. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2460. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2461. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2462. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2463. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2464. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2465. if (!rport) {
  2466. qla_printk(KERN_WARNING, ha,
  2467. "Unable to allocate fc remote port!\n");
  2468. return;
  2469. }
  2470. spin_lock_irq(fcport->vha->host->host_lock);
  2471. *((fc_port_t **)rport->dd_data) = fcport;
  2472. spin_unlock_irq(fcport->vha->host->host_lock);
  2473. rport->supported_classes = fcport->supported_classes;
  2474. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2475. if (fcport->port_type == FCT_INITIATOR)
  2476. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2477. if (fcport->port_type == FCT_TARGET)
  2478. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2479. fc_remote_port_rolechg(rport, rport_ids.roles);
  2480. }
  2481. /*
  2482. * qla2x00_update_fcport
  2483. * Updates device on list.
  2484. *
  2485. * Input:
  2486. * ha = adapter block pointer.
  2487. * fcport = port structure pointer.
  2488. *
  2489. * Return:
  2490. * 0 - Success
  2491. * BIT_0 - error
  2492. *
  2493. * Context:
  2494. * Kernel context.
  2495. */
  2496. void
  2497. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2498. {
  2499. struct qla_hw_data *ha = vha->hw;
  2500. fcport->vha = vha;
  2501. fcport->login_retry = 0;
  2502. fcport->port_login_retry_count = ha->port_down_retry_count *
  2503. PORT_RETRY_TIME;
  2504. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2505. PORT_RETRY_TIME);
  2506. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2507. qla2x00_iidma_fcport(vha, fcport);
  2508. atomic_set(&fcport->state, FCS_ONLINE);
  2509. qla2x00_reg_remote_port(vha, fcport);
  2510. }
  2511. /*
  2512. * qla2x00_configure_fabric
  2513. * Setup SNS devices with loop ID's.
  2514. *
  2515. * Input:
  2516. * ha = adapter block pointer.
  2517. *
  2518. * Returns:
  2519. * 0 = success.
  2520. * BIT_0 = error
  2521. */
  2522. static int
  2523. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2524. {
  2525. int rval, rval2;
  2526. fc_port_t *fcport, *fcptemp;
  2527. uint16_t next_loopid;
  2528. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2529. uint16_t loop_id;
  2530. LIST_HEAD(new_fcports);
  2531. struct qla_hw_data *ha = vha->hw;
  2532. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2533. /* If FL port exists, then SNS is present */
  2534. if (IS_FWI2_CAPABLE(ha))
  2535. loop_id = NPH_F_PORT;
  2536. else
  2537. loop_id = SNS_FL_PORT;
  2538. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2539. if (rval != QLA_SUCCESS) {
  2540. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2541. "Port\n", vha->host_no));
  2542. vha->device_flags &= ~SWITCH_FOUND;
  2543. return (QLA_SUCCESS);
  2544. }
  2545. vha->device_flags |= SWITCH_FOUND;
  2546. /* Mark devices that need re-synchronization. */
  2547. rval2 = qla2x00_device_resync(vha);
  2548. if (rval2 == QLA_RSCNS_HANDLED) {
  2549. /* No point doing the scan, just continue. */
  2550. return (QLA_SUCCESS);
  2551. }
  2552. do {
  2553. /* FDMI support. */
  2554. if (ql2xfdmienable &&
  2555. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2556. qla2x00_fdmi_register(vha);
  2557. /* Ensure we are logged into the SNS. */
  2558. if (IS_FWI2_CAPABLE(ha))
  2559. loop_id = NPH_SNS;
  2560. else
  2561. loop_id = SIMPLE_NAME_SERVER;
  2562. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2563. 0xfc, mb, BIT_1 | BIT_0);
  2564. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2565. DEBUG2(qla_printk(KERN_INFO, ha,
  2566. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2567. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2568. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2569. return (QLA_SUCCESS);
  2570. }
  2571. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2572. if (qla2x00_rft_id(vha)) {
  2573. /* EMPTY */
  2574. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2575. "TYPE failed.\n", vha->host_no));
  2576. }
  2577. if (qla2x00_rff_id(vha)) {
  2578. /* EMPTY */
  2579. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2580. "Features failed.\n", vha->host_no));
  2581. }
  2582. if (qla2x00_rnn_id(vha)) {
  2583. /* EMPTY */
  2584. DEBUG2(printk("scsi(%ld): Register Node Name "
  2585. "failed.\n", vha->host_no));
  2586. } else if (qla2x00_rsnn_nn(vha)) {
  2587. /* EMPTY */
  2588. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2589. "Node Name failed.\n", vha->host_no));
  2590. }
  2591. }
  2592. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2593. if (rval != QLA_SUCCESS)
  2594. break;
  2595. /*
  2596. * Logout all previous fabric devices marked lost, except
  2597. * FCP2 devices.
  2598. */
  2599. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2600. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2601. break;
  2602. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2603. continue;
  2604. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2605. qla2x00_mark_device_lost(vha, fcport,
  2606. ql2xplogiabsentdevice, 0);
  2607. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2608. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2609. fcport->port_type != FCT_INITIATOR &&
  2610. fcport->port_type != FCT_BROADCAST) {
  2611. ha->isp_ops->fabric_logout(vha,
  2612. fcport->loop_id,
  2613. fcport->d_id.b.domain,
  2614. fcport->d_id.b.area,
  2615. fcport->d_id.b.al_pa);
  2616. fcport->loop_id = FC_NO_LOOP_ID;
  2617. }
  2618. }
  2619. }
  2620. /* Starting free loop ID. */
  2621. next_loopid = ha->min_external_loopid;
  2622. /*
  2623. * Scan through our port list and login entries that need to be
  2624. * logged in.
  2625. */
  2626. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2627. if (atomic_read(&vha->loop_down_timer) ||
  2628. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2629. break;
  2630. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2631. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2632. continue;
  2633. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2634. fcport->loop_id = next_loopid;
  2635. rval = qla2x00_find_new_loop_id(
  2636. base_vha, fcport);
  2637. if (rval != QLA_SUCCESS) {
  2638. /* Ran out of IDs to use */
  2639. break;
  2640. }
  2641. }
  2642. /* Login and update database */
  2643. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2644. }
  2645. /* Exit if out of loop IDs. */
  2646. if (rval != QLA_SUCCESS) {
  2647. break;
  2648. }
  2649. /*
  2650. * Login and add the new devices to our port list.
  2651. */
  2652. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2653. if (atomic_read(&vha->loop_down_timer) ||
  2654. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2655. break;
  2656. /* Find a new loop ID to use. */
  2657. fcport->loop_id = next_loopid;
  2658. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2659. if (rval != QLA_SUCCESS) {
  2660. /* Ran out of IDs to use */
  2661. break;
  2662. }
  2663. /* Login and update database */
  2664. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2665. if (vha->vp_idx) {
  2666. fcport->vha = vha;
  2667. fcport->vp_idx = vha->vp_idx;
  2668. }
  2669. list_move_tail(&fcport->list, &vha->vp_fcports);
  2670. }
  2671. } while (0);
  2672. /* Free all new device structures not processed. */
  2673. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2674. list_del(&fcport->list);
  2675. kfree(fcport);
  2676. }
  2677. if (rval) {
  2678. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2679. "rval=%d\n", vha->host_no, rval));
  2680. }
  2681. return (rval);
  2682. }
  2683. /*
  2684. * qla2x00_find_all_fabric_devs
  2685. *
  2686. * Input:
  2687. * ha = adapter block pointer.
  2688. * dev = database device entry pointer.
  2689. *
  2690. * Returns:
  2691. * 0 = success.
  2692. *
  2693. * Context:
  2694. * Kernel context.
  2695. */
  2696. static int
  2697. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2698. struct list_head *new_fcports)
  2699. {
  2700. int rval;
  2701. uint16_t loop_id;
  2702. fc_port_t *fcport, *new_fcport, *fcptemp;
  2703. int found;
  2704. sw_info_t *swl;
  2705. int swl_idx;
  2706. int first_dev, last_dev;
  2707. port_id_t wrap = {}, nxt_d_id;
  2708. struct qla_hw_data *ha = vha->hw;
  2709. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2710. struct scsi_qla_host *tvp;
  2711. rval = QLA_SUCCESS;
  2712. /* Try GID_PT to get device list, else GAN. */
  2713. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2714. if (!swl) {
  2715. /*EMPTY*/
  2716. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2717. "on GA_NXT\n", vha->host_no));
  2718. } else {
  2719. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2720. kfree(swl);
  2721. swl = NULL;
  2722. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2723. kfree(swl);
  2724. swl = NULL;
  2725. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2726. kfree(swl);
  2727. swl = NULL;
  2728. } else if (ql2xiidmaenable &&
  2729. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2730. qla2x00_gpsc(vha, swl);
  2731. }
  2732. }
  2733. swl_idx = 0;
  2734. /* Allocate temporary fcport for any new fcports discovered. */
  2735. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2736. if (new_fcport == NULL) {
  2737. kfree(swl);
  2738. return (QLA_MEMORY_ALLOC_FAILED);
  2739. }
  2740. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2741. /* Set start port ID scan at adapter ID. */
  2742. first_dev = 1;
  2743. last_dev = 0;
  2744. /* Starting free loop ID. */
  2745. loop_id = ha->min_external_loopid;
  2746. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2747. if (qla2x00_is_reserved_id(vha, loop_id))
  2748. continue;
  2749. if (ha->current_topology == ISP_CFG_FL &&
  2750. (atomic_read(&vha->loop_down_timer) ||
  2751. LOOP_TRANSITION(vha))) {
  2752. atomic_set(&vha->loop_down_timer, 0);
  2753. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2754. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2755. break;
  2756. }
  2757. if (swl != NULL) {
  2758. if (last_dev) {
  2759. wrap.b24 = new_fcport->d_id.b24;
  2760. } else {
  2761. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2762. memcpy(new_fcport->node_name,
  2763. swl[swl_idx].node_name, WWN_SIZE);
  2764. memcpy(new_fcport->port_name,
  2765. swl[swl_idx].port_name, WWN_SIZE);
  2766. memcpy(new_fcport->fabric_port_name,
  2767. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2768. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2769. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2770. last_dev = 1;
  2771. }
  2772. swl_idx++;
  2773. }
  2774. } else {
  2775. /* Send GA_NXT to the switch */
  2776. rval = qla2x00_ga_nxt(vha, new_fcport);
  2777. if (rval != QLA_SUCCESS) {
  2778. qla_printk(KERN_WARNING, ha,
  2779. "SNS scan failed -- assuming zero-entry "
  2780. "result...\n");
  2781. list_for_each_entry_safe(fcport, fcptemp,
  2782. new_fcports, list) {
  2783. list_del(&fcport->list);
  2784. kfree(fcport);
  2785. }
  2786. rval = QLA_SUCCESS;
  2787. break;
  2788. }
  2789. }
  2790. /* If wrap on switch device list, exit. */
  2791. if (first_dev) {
  2792. wrap.b24 = new_fcport->d_id.b24;
  2793. first_dev = 0;
  2794. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2795. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2796. vha->host_no, new_fcport->d_id.b.domain,
  2797. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2798. break;
  2799. }
  2800. /* Bypass if same physical adapter. */
  2801. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2802. continue;
  2803. /* Bypass virtual ports of the same host. */
  2804. found = 0;
  2805. if (ha->num_vhosts) {
  2806. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2807. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2808. found = 1;
  2809. break;
  2810. }
  2811. }
  2812. if (found)
  2813. continue;
  2814. }
  2815. /* Bypass if same domain and area of adapter. */
  2816. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2817. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2818. ISP_CFG_FL)
  2819. continue;
  2820. /* Bypass reserved domain fields. */
  2821. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2822. continue;
  2823. /* Locate matching device in database. */
  2824. found = 0;
  2825. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2826. if (memcmp(new_fcport->port_name, fcport->port_name,
  2827. WWN_SIZE))
  2828. continue;
  2829. found++;
  2830. /* Update port state. */
  2831. memcpy(fcport->fabric_port_name,
  2832. new_fcport->fabric_port_name, WWN_SIZE);
  2833. fcport->fp_speed = new_fcport->fp_speed;
  2834. /*
  2835. * If address the same and state FCS_ONLINE, nothing
  2836. * changed.
  2837. */
  2838. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2839. atomic_read(&fcport->state) == FCS_ONLINE) {
  2840. break;
  2841. }
  2842. /*
  2843. * If device was not a fabric device before.
  2844. */
  2845. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2846. fcport->d_id.b24 = new_fcport->d_id.b24;
  2847. fcport->loop_id = FC_NO_LOOP_ID;
  2848. fcport->flags |= (FCF_FABRIC_DEVICE |
  2849. FCF_LOGIN_NEEDED);
  2850. break;
  2851. }
  2852. /*
  2853. * Port ID changed or device was marked to be updated;
  2854. * Log it out if still logged in and mark it for
  2855. * relogin later.
  2856. */
  2857. fcport->d_id.b24 = new_fcport->d_id.b24;
  2858. fcport->flags |= FCF_LOGIN_NEEDED;
  2859. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2860. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2861. fcport->port_type != FCT_INITIATOR &&
  2862. fcport->port_type != FCT_BROADCAST) {
  2863. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2864. fcport->d_id.b.domain, fcport->d_id.b.area,
  2865. fcport->d_id.b.al_pa);
  2866. fcport->loop_id = FC_NO_LOOP_ID;
  2867. }
  2868. break;
  2869. }
  2870. if (found)
  2871. continue;
  2872. /* If device was not in our fcports list, then add it. */
  2873. list_add_tail(&new_fcport->list, new_fcports);
  2874. /* Allocate a new replacement fcport. */
  2875. nxt_d_id.b24 = new_fcport->d_id.b24;
  2876. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2877. if (new_fcport == NULL) {
  2878. kfree(swl);
  2879. return (QLA_MEMORY_ALLOC_FAILED);
  2880. }
  2881. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2882. new_fcport->d_id.b24 = nxt_d_id.b24;
  2883. }
  2884. kfree(swl);
  2885. kfree(new_fcport);
  2886. return (rval);
  2887. }
  2888. /*
  2889. * qla2x00_find_new_loop_id
  2890. * Scan through our port list and find a new usable loop ID.
  2891. *
  2892. * Input:
  2893. * ha: adapter state pointer.
  2894. * dev: port structure pointer.
  2895. *
  2896. * Returns:
  2897. * qla2x00 local function return status code.
  2898. *
  2899. * Context:
  2900. * Kernel context.
  2901. */
  2902. static int
  2903. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2904. {
  2905. int rval;
  2906. int found;
  2907. fc_port_t *fcport;
  2908. uint16_t first_loop_id;
  2909. struct qla_hw_data *ha = vha->hw;
  2910. struct scsi_qla_host *vp;
  2911. struct scsi_qla_host *tvp;
  2912. rval = QLA_SUCCESS;
  2913. /* Save starting loop ID. */
  2914. first_loop_id = dev->loop_id;
  2915. for (;;) {
  2916. /* Skip loop ID if already used by adapter. */
  2917. if (dev->loop_id == vha->loop_id)
  2918. dev->loop_id++;
  2919. /* Skip reserved loop IDs. */
  2920. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2921. dev->loop_id++;
  2922. /* Reset loop ID if passed the end. */
  2923. if (dev->loop_id > ha->max_loop_id) {
  2924. /* first loop ID. */
  2925. dev->loop_id = ha->min_external_loopid;
  2926. }
  2927. /* Check for loop ID being already in use. */
  2928. found = 0;
  2929. fcport = NULL;
  2930. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2931. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2932. if (fcport->loop_id == dev->loop_id &&
  2933. fcport != dev) {
  2934. /* ID possibly in use */
  2935. found++;
  2936. break;
  2937. }
  2938. }
  2939. if (found)
  2940. break;
  2941. }
  2942. /* If not in use then it is free to use. */
  2943. if (!found) {
  2944. break;
  2945. }
  2946. /* ID in use. Try next value. */
  2947. dev->loop_id++;
  2948. /* If wrap around. No free ID to use. */
  2949. if (dev->loop_id == first_loop_id) {
  2950. dev->loop_id = FC_NO_LOOP_ID;
  2951. rval = QLA_FUNCTION_FAILED;
  2952. break;
  2953. }
  2954. }
  2955. return (rval);
  2956. }
  2957. /*
  2958. * qla2x00_device_resync
  2959. * Marks devices in the database that needs resynchronization.
  2960. *
  2961. * Input:
  2962. * ha = adapter block pointer.
  2963. *
  2964. * Context:
  2965. * Kernel context.
  2966. */
  2967. static int
  2968. qla2x00_device_resync(scsi_qla_host_t *vha)
  2969. {
  2970. int rval;
  2971. uint32_t mask;
  2972. fc_port_t *fcport;
  2973. uint32_t rscn_entry;
  2974. uint8_t rscn_out_iter;
  2975. uint8_t format;
  2976. port_id_t d_id = {};
  2977. rval = QLA_RSCNS_HANDLED;
  2978. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2979. vha->flags.rscn_queue_overflow) {
  2980. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2981. format = MSB(MSW(rscn_entry));
  2982. d_id.b.domain = LSB(MSW(rscn_entry));
  2983. d_id.b.area = MSB(LSW(rscn_entry));
  2984. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2985. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2986. "[%02x/%02x%02x%02x].\n",
  2987. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2988. d_id.b.area, d_id.b.al_pa));
  2989. vha->rscn_out_ptr++;
  2990. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2991. vha->rscn_out_ptr = 0;
  2992. /* Skip duplicate entries. */
  2993. for (rscn_out_iter = vha->rscn_out_ptr;
  2994. !vha->flags.rscn_queue_overflow &&
  2995. rscn_out_iter != vha->rscn_in_ptr;
  2996. rscn_out_iter = (rscn_out_iter ==
  2997. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2998. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2999. break;
  3000. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  3001. "entry found at [%d].\n", vha->host_no,
  3002. rscn_out_iter));
  3003. vha->rscn_out_ptr = rscn_out_iter;
  3004. }
  3005. /* Queue overflow, set switch default case. */
  3006. if (vha->flags.rscn_queue_overflow) {
  3007. DEBUG(printk("scsi(%ld): device_resync: rscn "
  3008. "overflow.\n", vha->host_no));
  3009. format = 3;
  3010. vha->flags.rscn_queue_overflow = 0;
  3011. }
  3012. switch (format) {
  3013. case 0:
  3014. mask = 0xffffff;
  3015. break;
  3016. case 1:
  3017. mask = 0xffff00;
  3018. break;
  3019. case 2:
  3020. mask = 0xff0000;
  3021. break;
  3022. default:
  3023. mask = 0x0;
  3024. d_id.b24 = 0;
  3025. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3026. break;
  3027. }
  3028. rval = QLA_SUCCESS;
  3029. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3030. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3031. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3032. fcport->port_type == FCT_BROADCAST)
  3033. continue;
  3034. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3035. if (format != 3 ||
  3036. fcport->port_type != FCT_INITIATOR) {
  3037. qla2x00_mark_device_lost(vha, fcport,
  3038. 0, 0);
  3039. }
  3040. }
  3041. }
  3042. }
  3043. return (rval);
  3044. }
  3045. /*
  3046. * qla2x00_fabric_dev_login
  3047. * Login fabric target device and update FC port database.
  3048. *
  3049. * Input:
  3050. * ha: adapter state pointer.
  3051. * fcport: port structure list pointer.
  3052. * next_loopid: contains value of a new loop ID that can be used
  3053. * by the next login attempt.
  3054. *
  3055. * Returns:
  3056. * qla2x00 local function return status code.
  3057. *
  3058. * Context:
  3059. * Kernel context.
  3060. */
  3061. static int
  3062. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3063. uint16_t *next_loopid)
  3064. {
  3065. int rval;
  3066. int retry;
  3067. uint8_t opts;
  3068. struct qla_hw_data *ha = vha->hw;
  3069. rval = QLA_SUCCESS;
  3070. retry = 0;
  3071. if (IS_ALOGIO_CAPABLE(ha)) {
  3072. if (fcport->flags & FCF_ASYNC_SENT)
  3073. return rval;
  3074. fcport->flags |= FCF_ASYNC_SENT;
  3075. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3076. if (!rval)
  3077. return rval;
  3078. }
  3079. fcport->flags &= ~FCF_ASYNC_SENT;
  3080. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3081. if (rval == QLA_SUCCESS) {
  3082. /* Send an ADISC to FCP2 devices.*/
  3083. opts = 0;
  3084. if (fcport->flags & FCF_FCP2_DEVICE)
  3085. opts |= BIT_1;
  3086. rval = qla2x00_get_port_database(vha, fcport, opts);
  3087. if (rval != QLA_SUCCESS) {
  3088. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3089. fcport->d_id.b.domain, fcport->d_id.b.area,
  3090. fcport->d_id.b.al_pa);
  3091. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3092. } else {
  3093. qla2x00_update_fcport(vha, fcport);
  3094. }
  3095. }
  3096. return (rval);
  3097. }
  3098. /*
  3099. * qla2x00_fabric_login
  3100. * Issue fabric login command.
  3101. *
  3102. * Input:
  3103. * ha = adapter block pointer.
  3104. * device = pointer to FC device type structure.
  3105. *
  3106. * Returns:
  3107. * 0 - Login successfully
  3108. * 1 - Login failed
  3109. * 2 - Initiator device
  3110. * 3 - Fatal error
  3111. */
  3112. int
  3113. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3114. uint16_t *next_loopid)
  3115. {
  3116. int rval;
  3117. int retry;
  3118. uint16_t tmp_loopid;
  3119. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3120. struct qla_hw_data *ha = vha->hw;
  3121. retry = 0;
  3122. tmp_loopid = 0;
  3123. for (;;) {
  3124. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3125. "for port %02x%02x%02x.\n",
  3126. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3127. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3128. /* Login fcport on switch. */
  3129. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3130. fcport->d_id.b.domain, fcport->d_id.b.area,
  3131. fcport->d_id.b.al_pa, mb, BIT_0);
  3132. if (mb[0] == MBS_PORT_ID_USED) {
  3133. /*
  3134. * Device has another loop ID. The firmware team
  3135. * recommends the driver perform an implicit login with
  3136. * the specified ID again. The ID we just used is save
  3137. * here so we return with an ID that can be tried by
  3138. * the next login.
  3139. */
  3140. retry++;
  3141. tmp_loopid = fcport->loop_id;
  3142. fcport->loop_id = mb[1];
  3143. DEBUG(printk("Fabric Login: port in use - next "
  3144. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3145. fcport->loop_id, fcport->d_id.b.domain,
  3146. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3147. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3148. /*
  3149. * Login succeeded.
  3150. */
  3151. if (retry) {
  3152. /* A retry occurred before. */
  3153. *next_loopid = tmp_loopid;
  3154. } else {
  3155. /*
  3156. * No retry occurred before. Just increment the
  3157. * ID value for next login.
  3158. */
  3159. *next_loopid = (fcport->loop_id + 1);
  3160. }
  3161. if (mb[1] & BIT_0) {
  3162. fcport->port_type = FCT_INITIATOR;
  3163. } else {
  3164. fcport->port_type = FCT_TARGET;
  3165. if (mb[1] & BIT_1) {
  3166. fcport->flags |= FCF_FCP2_DEVICE;
  3167. }
  3168. }
  3169. if (mb[10] & BIT_0)
  3170. fcport->supported_classes |= FC_COS_CLASS2;
  3171. if (mb[10] & BIT_1)
  3172. fcport->supported_classes |= FC_COS_CLASS3;
  3173. rval = QLA_SUCCESS;
  3174. break;
  3175. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3176. /*
  3177. * Loop ID already used, try next loop ID.
  3178. */
  3179. fcport->loop_id++;
  3180. rval = qla2x00_find_new_loop_id(vha, fcport);
  3181. if (rval != QLA_SUCCESS) {
  3182. /* Ran out of loop IDs to use */
  3183. break;
  3184. }
  3185. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3186. /*
  3187. * Firmware possibly timed out during login. If NO
  3188. * retries are left to do then the device is declared
  3189. * dead.
  3190. */
  3191. *next_loopid = fcport->loop_id;
  3192. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3193. fcport->d_id.b.domain, fcport->d_id.b.area,
  3194. fcport->d_id.b.al_pa);
  3195. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3196. rval = 1;
  3197. break;
  3198. } else {
  3199. /*
  3200. * unrecoverable / not handled error
  3201. */
  3202. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3203. "loop_id=%x jiffies=%lx.\n",
  3204. __func__, vha->host_no, mb[0],
  3205. fcport->d_id.b.domain, fcport->d_id.b.area,
  3206. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3207. *next_loopid = fcport->loop_id;
  3208. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3209. fcport->d_id.b.domain, fcport->d_id.b.area,
  3210. fcport->d_id.b.al_pa);
  3211. fcport->loop_id = FC_NO_LOOP_ID;
  3212. fcport->login_retry = 0;
  3213. rval = 3;
  3214. break;
  3215. }
  3216. }
  3217. return (rval);
  3218. }
  3219. /*
  3220. * qla2x00_local_device_login
  3221. * Issue local device login command.
  3222. *
  3223. * Input:
  3224. * ha = adapter block pointer.
  3225. * loop_id = loop id of device to login to.
  3226. *
  3227. * Returns (Where's the #define!!!!):
  3228. * 0 - Login successfully
  3229. * 1 - Login failed
  3230. * 3 - Fatal error
  3231. */
  3232. int
  3233. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3234. {
  3235. int rval;
  3236. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3237. memset(mb, 0, sizeof(mb));
  3238. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3239. if (rval == QLA_SUCCESS) {
  3240. /* Interrogate mailbox registers for any errors */
  3241. if (mb[0] == MBS_COMMAND_ERROR)
  3242. rval = 1;
  3243. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3244. /* device not in PCB table */
  3245. rval = 3;
  3246. }
  3247. return (rval);
  3248. }
  3249. /*
  3250. * qla2x00_loop_resync
  3251. * Resync with fibre channel devices.
  3252. *
  3253. * Input:
  3254. * ha = adapter block pointer.
  3255. *
  3256. * Returns:
  3257. * 0 = success
  3258. */
  3259. int
  3260. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3261. {
  3262. int rval = QLA_SUCCESS;
  3263. uint32_t wait_time;
  3264. struct req_que *req;
  3265. struct rsp_que *rsp;
  3266. if (vha->hw->flags.cpu_affinity_enabled)
  3267. req = vha->hw->req_q_map[0];
  3268. else
  3269. req = vha->req;
  3270. rsp = req->rsp;
  3271. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3272. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3273. if (vha->flags.online) {
  3274. if (!(rval = qla2x00_fw_ready(vha))) {
  3275. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3276. wait_time = 256;
  3277. do {
  3278. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3279. /* Issue a marker after FW becomes ready. */
  3280. qla2x00_marker(vha, req, rsp, 0, 0,
  3281. MK_SYNC_ALL);
  3282. vha->marker_needed = 0;
  3283. /* Remap devices on Loop. */
  3284. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3285. qla2x00_configure_loop(vha);
  3286. wait_time--;
  3287. } while (!atomic_read(&vha->loop_down_timer) &&
  3288. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3289. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3290. &vha->dpc_flags)));
  3291. }
  3292. }
  3293. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3294. return (QLA_FUNCTION_FAILED);
  3295. if (rval)
  3296. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3297. return (rval);
  3298. }
  3299. void
  3300. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3301. {
  3302. fc_port_t *fcport;
  3303. struct scsi_qla_host *tvp, *vha;
  3304. /* Go with deferred removal of rport references. */
  3305. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3306. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3307. if (fcport && fcport->drport &&
  3308. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3309. qla2x00_rport_del(fcport);
  3310. }
  3311. void
  3312. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3313. {
  3314. struct qla_hw_data *ha = vha->hw;
  3315. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3316. struct scsi_qla_host *tvp;
  3317. vha->flags.online = 0;
  3318. ha->flags.chip_reset_done = 0;
  3319. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3320. ha->qla_stats.total_isp_aborts++;
  3321. qla_printk(KERN_INFO, ha,
  3322. "Performing ISP error recovery - ha= %p.\n", ha);
  3323. /* Chip reset does not apply to 82XX */
  3324. if (!IS_QLA82XX(ha))
  3325. ha->isp_ops->reset_chip(vha);
  3326. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3327. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3328. atomic_set(&vha->loop_state, LOOP_DOWN);
  3329. qla2x00_mark_all_devices_lost(vha, 0);
  3330. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3331. qla2x00_mark_all_devices_lost(vp, 0);
  3332. } else {
  3333. if (!atomic_read(&vha->loop_down_timer))
  3334. atomic_set(&vha->loop_down_timer,
  3335. LOOP_DOWN_TIME);
  3336. }
  3337. /* Make sure for ISP 82XX IO DMA is complete */
  3338. if (IS_QLA82XX(ha))
  3339. qla82xx_wait_for_pending_commands(vha);
  3340. /* Requeue all commands in outstanding command list. */
  3341. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3342. }
  3343. /*
  3344. * qla2x00_abort_isp
  3345. * Resets ISP and aborts all outstanding commands.
  3346. *
  3347. * Input:
  3348. * ha = adapter block pointer.
  3349. *
  3350. * Returns:
  3351. * 0 = success
  3352. */
  3353. int
  3354. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3355. {
  3356. int rval;
  3357. uint8_t status = 0;
  3358. struct qla_hw_data *ha = vha->hw;
  3359. struct scsi_qla_host *vp;
  3360. struct scsi_qla_host *tvp;
  3361. struct req_que *req = ha->req_q_map[0];
  3362. if (vha->flags.online) {
  3363. qla2x00_abort_isp_cleanup(vha);
  3364. if (unlikely(pci_channel_offline(ha->pdev) &&
  3365. ha->flags.pci_channel_io_perm_failure)) {
  3366. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3367. status = 0;
  3368. return status;
  3369. }
  3370. ha->isp_ops->get_flash_version(vha, req->ring);
  3371. ha->isp_ops->nvram_config(vha);
  3372. if (!qla2x00_restart_isp(vha)) {
  3373. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3374. if (!atomic_read(&vha->loop_down_timer)) {
  3375. /*
  3376. * Issue marker command only when we are going
  3377. * to start the I/O .
  3378. */
  3379. vha->marker_needed = 1;
  3380. }
  3381. vha->flags.online = 1;
  3382. ha->isp_ops->enable_intrs(ha);
  3383. ha->isp_abort_cnt = 0;
  3384. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3385. if (IS_QLA81XX(ha))
  3386. qla2x00_get_fw_version(vha,
  3387. &ha->fw_major_version,
  3388. &ha->fw_minor_version,
  3389. &ha->fw_subminor_version,
  3390. &ha->fw_attributes, &ha->fw_memory_size,
  3391. ha->mpi_version, &ha->mpi_capabilities,
  3392. ha->phy_version);
  3393. if (ha->fce) {
  3394. ha->flags.fce_enabled = 1;
  3395. memset(ha->fce, 0,
  3396. fce_calc_size(ha->fce_bufs));
  3397. rval = qla2x00_enable_fce_trace(vha,
  3398. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3399. &ha->fce_bufs);
  3400. if (rval) {
  3401. qla_printk(KERN_WARNING, ha,
  3402. "Unable to reinitialize FCE "
  3403. "(%d).\n", rval);
  3404. ha->flags.fce_enabled = 0;
  3405. }
  3406. }
  3407. if (ha->eft) {
  3408. memset(ha->eft, 0, EFT_SIZE);
  3409. rval = qla2x00_enable_eft_trace(vha,
  3410. ha->eft_dma, EFT_NUM_BUFFERS);
  3411. if (rval) {
  3412. qla_printk(KERN_WARNING, ha,
  3413. "Unable to reinitialize EFT "
  3414. "(%d).\n", rval);
  3415. }
  3416. }
  3417. } else { /* failed the ISP abort */
  3418. vha->flags.online = 1;
  3419. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3420. if (ha->isp_abort_cnt == 0) {
  3421. qla_printk(KERN_WARNING, ha,
  3422. "ISP error recovery failed - "
  3423. "board disabled\n");
  3424. /*
  3425. * The next call disables the board
  3426. * completely.
  3427. */
  3428. ha->isp_ops->reset_adapter(vha);
  3429. vha->flags.online = 0;
  3430. clear_bit(ISP_ABORT_RETRY,
  3431. &vha->dpc_flags);
  3432. status = 0;
  3433. } else { /* schedule another ISP abort */
  3434. ha->isp_abort_cnt--;
  3435. DEBUG(printk("qla%ld: ISP abort - "
  3436. "retry remaining %d\n",
  3437. vha->host_no, ha->isp_abort_cnt));
  3438. status = 1;
  3439. }
  3440. } else {
  3441. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3442. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3443. "- retrying (%d) more times\n",
  3444. vha->host_no, ha->isp_abort_cnt));
  3445. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3446. status = 1;
  3447. }
  3448. }
  3449. }
  3450. if (!status) {
  3451. DEBUG(printk(KERN_INFO
  3452. "qla2x00_abort_isp(%ld): succeeded.\n",
  3453. vha->host_no));
  3454. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3455. if (vp->vp_idx)
  3456. qla2x00_vp_abort_isp(vp);
  3457. }
  3458. } else {
  3459. qla_printk(KERN_INFO, ha,
  3460. "qla2x00_abort_isp: **** FAILED ****\n");
  3461. }
  3462. return(status);
  3463. }
  3464. /*
  3465. * qla2x00_restart_isp
  3466. * restarts the ISP after a reset
  3467. *
  3468. * Input:
  3469. * ha = adapter block pointer.
  3470. *
  3471. * Returns:
  3472. * 0 = success
  3473. */
  3474. static int
  3475. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3476. {
  3477. int status = 0;
  3478. uint32_t wait_time;
  3479. struct qla_hw_data *ha = vha->hw;
  3480. struct req_que *req = ha->req_q_map[0];
  3481. struct rsp_que *rsp = ha->rsp_q_map[0];
  3482. /* If firmware needs to be loaded */
  3483. if (qla2x00_isp_firmware(vha)) {
  3484. vha->flags.online = 0;
  3485. status = ha->isp_ops->chip_diag(vha);
  3486. if (!status)
  3487. status = qla2x00_setup_chip(vha);
  3488. }
  3489. if (!status && !(status = qla2x00_init_rings(vha))) {
  3490. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3491. ha->flags.chip_reset_done = 1;
  3492. /* Initialize the queues in use */
  3493. qla25xx_init_queues(ha);
  3494. status = qla2x00_fw_ready(vha);
  3495. if (!status) {
  3496. DEBUG(printk("%s(): Start configure loop, "
  3497. "status = %d\n", __func__, status));
  3498. /* Issue a marker after FW becomes ready. */
  3499. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3500. vha->flags.online = 1;
  3501. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3502. wait_time = 256;
  3503. do {
  3504. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3505. qla2x00_configure_loop(vha);
  3506. wait_time--;
  3507. } while (!atomic_read(&vha->loop_down_timer) &&
  3508. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3509. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3510. &vha->dpc_flags)));
  3511. }
  3512. /* if no cable then assume it's good */
  3513. if ((vha->device_flags & DFLG_NO_CABLE))
  3514. status = 0;
  3515. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3516. __func__,
  3517. status));
  3518. }
  3519. return (status);
  3520. }
  3521. static int
  3522. qla25xx_init_queues(struct qla_hw_data *ha)
  3523. {
  3524. struct rsp_que *rsp = NULL;
  3525. struct req_que *req = NULL;
  3526. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3527. int ret = -1;
  3528. int i;
  3529. for (i = 1; i < ha->max_rsp_queues; i++) {
  3530. rsp = ha->rsp_q_map[i];
  3531. if (rsp) {
  3532. rsp->options &= ~BIT_0;
  3533. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3534. if (ret != QLA_SUCCESS)
  3535. DEBUG2_17(printk(KERN_WARNING
  3536. "%s Rsp que:%d init failed\n", __func__,
  3537. rsp->id));
  3538. else
  3539. DEBUG2_17(printk(KERN_INFO
  3540. "%s Rsp que:%d inited\n", __func__,
  3541. rsp->id));
  3542. }
  3543. }
  3544. for (i = 1; i < ha->max_req_queues; i++) {
  3545. req = ha->req_q_map[i];
  3546. if (req) {
  3547. /* Clear outstanding commands array. */
  3548. req->options &= ~BIT_0;
  3549. ret = qla25xx_init_req_que(base_vha, req);
  3550. if (ret != QLA_SUCCESS)
  3551. DEBUG2_17(printk(KERN_WARNING
  3552. "%s Req que:%d init failed\n", __func__,
  3553. req->id));
  3554. else
  3555. DEBUG2_17(printk(KERN_WARNING
  3556. "%s Req que:%d inited\n", __func__,
  3557. req->id));
  3558. }
  3559. }
  3560. return ret;
  3561. }
  3562. /*
  3563. * qla2x00_reset_adapter
  3564. * Reset adapter.
  3565. *
  3566. * Input:
  3567. * ha = adapter block pointer.
  3568. */
  3569. void
  3570. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3571. {
  3572. unsigned long flags = 0;
  3573. struct qla_hw_data *ha = vha->hw;
  3574. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3575. vha->flags.online = 0;
  3576. ha->isp_ops->disable_intrs(ha);
  3577. spin_lock_irqsave(&ha->hardware_lock, flags);
  3578. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3579. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3580. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3581. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3582. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3583. }
  3584. void
  3585. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3586. {
  3587. unsigned long flags = 0;
  3588. struct qla_hw_data *ha = vha->hw;
  3589. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3590. if (IS_QLA82XX(ha))
  3591. return;
  3592. vha->flags.online = 0;
  3593. ha->isp_ops->disable_intrs(ha);
  3594. spin_lock_irqsave(&ha->hardware_lock, flags);
  3595. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3596. RD_REG_DWORD(&reg->hccr);
  3597. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3598. RD_REG_DWORD(&reg->hccr);
  3599. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3600. if (IS_NOPOLLING_TYPE(ha))
  3601. ha->isp_ops->enable_intrs(ha);
  3602. }
  3603. /* On sparc systems, obtain port and node WWN from firmware
  3604. * properties.
  3605. */
  3606. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3607. struct nvram_24xx *nv)
  3608. {
  3609. #ifdef CONFIG_SPARC
  3610. struct qla_hw_data *ha = vha->hw;
  3611. struct pci_dev *pdev = ha->pdev;
  3612. struct device_node *dp = pci_device_to_OF_node(pdev);
  3613. const u8 *val;
  3614. int len;
  3615. val = of_get_property(dp, "port-wwn", &len);
  3616. if (val && len >= WWN_SIZE)
  3617. memcpy(nv->port_name, val, WWN_SIZE);
  3618. val = of_get_property(dp, "node-wwn", &len);
  3619. if (val && len >= WWN_SIZE)
  3620. memcpy(nv->node_name, val, WWN_SIZE);
  3621. #endif
  3622. }
  3623. int
  3624. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3625. {
  3626. int rval;
  3627. struct init_cb_24xx *icb;
  3628. struct nvram_24xx *nv;
  3629. uint32_t *dptr;
  3630. uint8_t *dptr1, *dptr2;
  3631. uint32_t chksum;
  3632. uint16_t cnt;
  3633. struct qla_hw_data *ha = vha->hw;
  3634. rval = QLA_SUCCESS;
  3635. icb = (struct init_cb_24xx *)ha->init_cb;
  3636. nv = ha->nvram;
  3637. /* Determine NVRAM starting address. */
  3638. if (ha->flags.port0) {
  3639. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3640. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3641. } else {
  3642. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3643. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3644. }
  3645. ha->nvram_size = sizeof(struct nvram_24xx);
  3646. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3647. if (IS_QLA82XX(ha))
  3648. ha->vpd_size = FA_VPD_SIZE_82XX;
  3649. /* Get VPD data into cache */
  3650. ha->vpd = ha->nvram + VPD_OFFSET;
  3651. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3652. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3653. /* Get NVRAM data into cache and calculate checksum. */
  3654. dptr = (uint32_t *)nv;
  3655. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3656. ha->nvram_size);
  3657. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3658. chksum += le32_to_cpu(*dptr++);
  3659. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3660. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3661. /* Bad NVRAM data, set defaults parameters. */
  3662. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3663. || nv->id[3] != ' ' ||
  3664. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3665. /* Reset NVRAM data. */
  3666. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3667. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3668. le16_to_cpu(nv->nvram_version));
  3669. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3670. "invalid -- WWPN) defaults.\n");
  3671. /*
  3672. * Set default initialization control block.
  3673. */
  3674. memset(nv, 0, ha->nvram_size);
  3675. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3676. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3677. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3678. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3679. nv->exchange_count = __constant_cpu_to_le16(0);
  3680. nv->hard_address = __constant_cpu_to_le16(124);
  3681. nv->port_name[0] = 0x21;
  3682. nv->port_name[1] = 0x00 + ha->port_no;
  3683. nv->port_name[2] = 0x00;
  3684. nv->port_name[3] = 0xe0;
  3685. nv->port_name[4] = 0x8b;
  3686. nv->port_name[5] = 0x1c;
  3687. nv->port_name[6] = 0x55;
  3688. nv->port_name[7] = 0x86;
  3689. nv->node_name[0] = 0x20;
  3690. nv->node_name[1] = 0x00;
  3691. nv->node_name[2] = 0x00;
  3692. nv->node_name[3] = 0xe0;
  3693. nv->node_name[4] = 0x8b;
  3694. nv->node_name[5] = 0x1c;
  3695. nv->node_name[6] = 0x55;
  3696. nv->node_name[7] = 0x86;
  3697. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3698. nv->login_retry_count = __constant_cpu_to_le16(8);
  3699. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3700. nv->login_timeout = __constant_cpu_to_le16(0);
  3701. nv->firmware_options_1 =
  3702. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3703. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3704. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3705. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3706. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3707. nv->efi_parameters = __constant_cpu_to_le32(0);
  3708. nv->reset_delay = 5;
  3709. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3710. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3711. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3712. rval = 1;
  3713. }
  3714. /* Reset Initialization control block */
  3715. memset(icb, 0, ha->init_cb_size);
  3716. /* Copy 1st segment. */
  3717. dptr1 = (uint8_t *)icb;
  3718. dptr2 = (uint8_t *)&nv->version;
  3719. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3720. while (cnt--)
  3721. *dptr1++ = *dptr2++;
  3722. icb->login_retry_count = nv->login_retry_count;
  3723. icb->link_down_on_nos = nv->link_down_on_nos;
  3724. /* Copy 2nd segment. */
  3725. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3726. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3727. cnt = (uint8_t *)&icb->reserved_3 -
  3728. (uint8_t *)&icb->interrupt_delay_timer;
  3729. while (cnt--)
  3730. *dptr1++ = *dptr2++;
  3731. /*
  3732. * Setup driver NVRAM options.
  3733. */
  3734. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3735. "QLA2462");
  3736. /* Use alternate WWN? */
  3737. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3738. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3739. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3740. }
  3741. /* Prepare nodename */
  3742. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3743. /*
  3744. * Firmware will apply the following mask if the nodename was
  3745. * not provided.
  3746. */
  3747. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3748. icb->node_name[0] &= 0xF0;
  3749. }
  3750. /* Set host adapter parameters. */
  3751. ha->flags.disable_risc_code_load = 0;
  3752. ha->flags.enable_lip_reset = 0;
  3753. ha->flags.enable_lip_full_login =
  3754. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3755. ha->flags.enable_target_reset =
  3756. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3757. ha->flags.enable_led_scheme = 0;
  3758. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3759. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3760. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3761. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3762. sizeof(ha->fw_seriallink_options24));
  3763. /* save HBA serial number */
  3764. ha->serial0 = icb->port_name[5];
  3765. ha->serial1 = icb->port_name[6];
  3766. ha->serial2 = icb->port_name[7];
  3767. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3768. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3769. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3770. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3771. /* Set minimum login_timeout to 4 seconds. */
  3772. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3773. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3774. if (le16_to_cpu(nv->login_timeout) < 4)
  3775. nv->login_timeout = __constant_cpu_to_le16(4);
  3776. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3777. icb->login_timeout = nv->login_timeout;
  3778. /* Set minimum RATOV to 100 tenths of a second. */
  3779. ha->r_a_tov = 100;
  3780. ha->loop_reset_delay = nv->reset_delay;
  3781. /* Link Down Timeout = 0:
  3782. *
  3783. * When Port Down timer expires we will start returning
  3784. * I/O's to OS with "DID_NO_CONNECT".
  3785. *
  3786. * Link Down Timeout != 0:
  3787. *
  3788. * The driver waits for the link to come up after link down
  3789. * before returning I/Os to OS with "DID_NO_CONNECT".
  3790. */
  3791. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3792. ha->loop_down_abort_time =
  3793. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3794. } else {
  3795. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3796. ha->loop_down_abort_time =
  3797. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3798. }
  3799. /* Need enough time to try and get the port back. */
  3800. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3801. if (qlport_down_retry)
  3802. ha->port_down_retry_count = qlport_down_retry;
  3803. /* Set login_retry_count */
  3804. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3805. if (ha->port_down_retry_count ==
  3806. le16_to_cpu(nv->port_down_retry_count) &&
  3807. ha->port_down_retry_count > 3)
  3808. ha->login_retry_count = ha->port_down_retry_count;
  3809. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3810. ha->login_retry_count = ha->port_down_retry_count;
  3811. if (ql2xloginretrycount)
  3812. ha->login_retry_count = ql2xloginretrycount;
  3813. /* Enable ZIO. */
  3814. if (!vha->flags.init_done) {
  3815. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3816. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3817. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3818. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3819. }
  3820. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3821. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3822. vha->flags.process_response_queue = 0;
  3823. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3824. ha->zio_mode = QLA_ZIO_MODE_6;
  3825. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3826. "(%d us).\n", vha->host_no, ha->zio_mode,
  3827. ha->zio_timer * 100));
  3828. qla_printk(KERN_INFO, ha,
  3829. "ZIO mode %d enabled; timer delay (%d us).\n",
  3830. ha->zio_mode, ha->zio_timer * 100);
  3831. icb->firmware_options_2 |= cpu_to_le32(
  3832. (uint32_t)ha->zio_mode);
  3833. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3834. vha->flags.process_response_queue = 1;
  3835. }
  3836. if (rval) {
  3837. DEBUG2_3(printk(KERN_WARNING
  3838. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3839. }
  3840. return (rval);
  3841. }
  3842. static int
  3843. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3844. uint32_t faddr)
  3845. {
  3846. int rval = QLA_SUCCESS;
  3847. int segments, fragment;
  3848. uint32_t *dcode, dlen;
  3849. uint32_t risc_addr;
  3850. uint32_t risc_size;
  3851. uint32_t i;
  3852. struct qla_hw_data *ha = vha->hw;
  3853. struct req_que *req = ha->req_q_map[0];
  3854. qla_printk(KERN_INFO, ha,
  3855. "FW: Loading from flash (%x)...\n", faddr);
  3856. rval = QLA_SUCCESS;
  3857. segments = FA_RISC_CODE_SEGMENTS;
  3858. dcode = (uint32_t *)req->ring;
  3859. *srisc_addr = 0;
  3860. /* Validate firmware image by checking version. */
  3861. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3862. for (i = 0; i < 4; i++)
  3863. dcode[i] = be32_to_cpu(dcode[i]);
  3864. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3865. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3866. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3867. dcode[3] == 0)) {
  3868. qla_printk(KERN_WARNING, ha,
  3869. "Unable to verify integrity of flash firmware image!\n");
  3870. qla_printk(KERN_WARNING, ha,
  3871. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3872. dcode[1], dcode[2], dcode[3]);
  3873. return QLA_FUNCTION_FAILED;
  3874. }
  3875. while (segments && rval == QLA_SUCCESS) {
  3876. /* Read segment's load information. */
  3877. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3878. risc_addr = be32_to_cpu(dcode[2]);
  3879. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3880. risc_size = be32_to_cpu(dcode[3]);
  3881. fragment = 0;
  3882. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3883. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3884. if (dlen > risc_size)
  3885. dlen = risc_size;
  3886. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3887. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3888. vha->host_no, risc_addr, dlen, faddr));
  3889. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3890. for (i = 0; i < dlen; i++)
  3891. dcode[i] = swab32(dcode[i]);
  3892. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3893. dlen);
  3894. if (rval) {
  3895. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3896. "segment %d of firmware\n", vha->host_no,
  3897. fragment));
  3898. qla_printk(KERN_WARNING, ha,
  3899. "[ERROR] Failed to load segment %d of "
  3900. "firmware\n", fragment);
  3901. break;
  3902. }
  3903. faddr += dlen;
  3904. risc_addr += dlen;
  3905. risc_size -= dlen;
  3906. fragment++;
  3907. }
  3908. /* Next segment. */
  3909. segments--;
  3910. }
  3911. return rval;
  3912. }
  3913. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3914. int
  3915. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3916. {
  3917. int rval;
  3918. int i, fragment;
  3919. uint16_t *wcode, *fwcode;
  3920. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3921. struct fw_blob *blob;
  3922. struct qla_hw_data *ha = vha->hw;
  3923. struct req_que *req = ha->req_q_map[0];
  3924. /* Load firmware blob. */
  3925. blob = qla2x00_request_firmware(vha);
  3926. if (!blob) {
  3927. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3928. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3929. "from: " QLA_FW_URL ".\n");
  3930. return QLA_FUNCTION_FAILED;
  3931. }
  3932. rval = QLA_SUCCESS;
  3933. wcode = (uint16_t *)req->ring;
  3934. *srisc_addr = 0;
  3935. fwcode = (uint16_t *)blob->fw->data;
  3936. fwclen = 0;
  3937. /* Validate firmware image by checking version. */
  3938. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3939. qla_printk(KERN_WARNING, ha,
  3940. "Unable to verify integrity of firmware image (%Zd)!\n",
  3941. blob->fw->size);
  3942. goto fail_fw_integrity;
  3943. }
  3944. for (i = 0; i < 4; i++)
  3945. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3946. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3947. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3948. wcode[2] == 0 && wcode[3] == 0)) {
  3949. qla_printk(KERN_WARNING, ha,
  3950. "Unable to verify integrity of firmware image!\n");
  3951. qla_printk(KERN_WARNING, ha,
  3952. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3953. wcode[1], wcode[2], wcode[3]);
  3954. goto fail_fw_integrity;
  3955. }
  3956. seg = blob->segs;
  3957. while (*seg && rval == QLA_SUCCESS) {
  3958. risc_addr = *seg;
  3959. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3960. risc_size = be16_to_cpu(fwcode[3]);
  3961. /* Validate firmware image size. */
  3962. fwclen += risc_size * sizeof(uint16_t);
  3963. if (blob->fw->size < fwclen) {
  3964. qla_printk(KERN_WARNING, ha,
  3965. "Unable to verify integrity of firmware image "
  3966. "(%Zd)!\n", blob->fw->size);
  3967. goto fail_fw_integrity;
  3968. }
  3969. fragment = 0;
  3970. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3971. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3972. if (wlen > risc_size)
  3973. wlen = risc_size;
  3974. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3975. "addr %x, number of words 0x%x.\n", vha->host_no,
  3976. risc_addr, wlen));
  3977. for (i = 0; i < wlen; i++)
  3978. wcode[i] = swab16(fwcode[i]);
  3979. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3980. wlen);
  3981. if (rval) {
  3982. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3983. "segment %d of firmware\n", vha->host_no,
  3984. fragment));
  3985. qla_printk(KERN_WARNING, ha,
  3986. "[ERROR] Failed to load segment %d of "
  3987. "firmware\n", fragment);
  3988. break;
  3989. }
  3990. fwcode += wlen;
  3991. risc_addr += wlen;
  3992. risc_size -= wlen;
  3993. fragment++;
  3994. }
  3995. /* Next segment. */
  3996. seg++;
  3997. }
  3998. return rval;
  3999. fail_fw_integrity:
  4000. return QLA_FUNCTION_FAILED;
  4001. }
  4002. static int
  4003. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4004. {
  4005. int rval;
  4006. int segments, fragment;
  4007. uint32_t *dcode, dlen;
  4008. uint32_t risc_addr;
  4009. uint32_t risc_size;
  4010. uint32_t i;
  4011. struct fw_blob *blob;
  4012. uint32_t *fwcode, fwclen;
  4013. struct qla_hw_data *ha = vha->hw;
  4014. struct req_que *req = ha->req_q_map[0];
  4015. /* Load firmware blob. */
  4016. blob = qla2x00_request_firmware(vha);
  4017. if (!blob) {
  4018. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4019. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4020. "from: " QLA_FW_URL ".\n");
  4021. return QLA_FUNCTION_FAILED;
  4022. }
  4023. qla_printk(KERN_INFO, ha,
  4024. "FW: Loading via request-firmware...\n");
  4025. rval = QLA_SUCCESS;
  4026. segments = FA_RISC_CODE_SEGMENTS;
  4027. dcode = (uint32_t *)req->ring;
  4028. *srisc_addr = 0;
  4029. fwcode = (uint32_t *)blob->fw->data;
  4030. fwclen = 0;
  4031. /* Validate firmware image by checking version. */
  4032. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4033. qla_printk(KERN_WARNING, ha,
  4034. "Unable to verify integrity of firmware image (%Zd)!\n",
  4035. blob->fw->size);
  4036. goto fail_fw_integrity;
  4037. }
  4038. for (i = 0; i < 4; i++)
  4039. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4040. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4041. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4042. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4043. dcode[3] == 0)) {
  4044. qla_printk(KERN_WARNING, ha,
  4045. "Unable to verify integrity of firmware image!\n");
  4046. qla_printk(KERN_WARNING, ha,
  4047. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4048. dcode[1], dcode[2], dcode[3]);
  4049. goto fail_fw_integrity;
  4050. }
  4051. while (segments && rval == QLA_SUCCESS) {
  4052. risc_addr = be32_to_cpu(fwcode[2]);
  4053. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4054. risc_size = be32_to_cpu(fwcode[3]);
  4055. /* Validate firmware image size. */
  4056. fwclen += risc_size * sizeof(uint32_t);
  4057. if (blob->fw->size < fwclen) {
  4058. qla_printk(KERN_WARNING, ha,
  4059. "Unable to verify integrity of firmware image "
  4060. "(%Zd)!\n", blob->fw->size);
  4061. goto fail_fw_integrity;
  4062. }
  4063. fragment = 0;
  4064. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4065. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4066. if (dlen > risc_size)
  4067. dlen = risc_size;
  4068. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4069. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4070. risc_addr, dlen));
  4071. for (i = 0; i < dlen; i++)
  4072. dcode[i] = swab32(fwcode[i]);
  4073. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4074. dlen);
  4075. if (rval) {
  4076. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4077. "segment %d of firmware\n", vha->host_no,
  4078. fragment));
  4079. qla_printk(KERN_WARNING, ha,
  4080. "[ERROR] Failed to load segment %d of "
  4081. "firmware\n", fragment);
  4082. break;
  4083. }
  4084. fwcode += dlen;
  4085. risc_addr += dlen;
  4086. risc_size -= dlen;
  4087. fragment++;
  4088. }
  4089. /* Next segment. */
  4090. segments--;
  4091. }
  4092. return rval;
  4093. fail_fw_integrity:
  4094. return QLA_FUNCTION_FAILED;
  4095. }
  4096. int
  4097. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4098. {
  4099. int rval;
  4100. if (ql2xfwloadbin == 1)
  4101. return qla81xx_load_risc(vha, srisc_addr);
  4102. /*
  4103. * FW Load priority:
  4104. * 1) Firmware via request-firmware interface (.bin file).
  4105. * 2) Firmware residing in flash.
  4106. */
  4107. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4108. if (rval == QLA_SUCCESS)
  4109. return rval;
  4110. return qla24xx_load_risc_flash(vha, srisc_addr,
  4111. vha->hw->flt_region_fw);
  4112. }
  4113. int
  4114. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4115. {
  4116. int rval;
  4117. struct qla_hw_data *ha = vha->hw;
  4118. if (ql2xfwloadbin == 2)
  4119. goto try_blob_fw;
  4120. /*
  4121. * FW Load priority:
  4122. * 1) Firmware residing in flash.
  4123. * 2) Firmware via request-firmware interface (.bin file).
  4124. * 3) Golden-Firmware residing in flash -- limited operation.
  4125. */
  4126. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4127. if (rval == QLA_SUCCESS)
  4128. return rval;
  4129. try_blob_fw:
  4130. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4131. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4132. return rval;
  4133. qla_printk(KERN_ERR, ha,
  4134. "FW: Attempting to fallback to golden firmware...\n");
  4135. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4136. if (rval != QLA_SUCCESS)
  4137. return rval;
  4138. qla_printk(KERN_ERR, ha,
  4139. "FW: Please update operational firmware...\n");
  4140. ha->flags.running_gold_fw = 1;
  4141. return rval;
  4142. }
  4143. void
  4144. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4145. {
  4146. int ret, retries;
  4147. struct qla_hw_data *ha = vha->hw;
  4148. if (ha->flags.pci_channel_io_perm_failure)
  4149. return;
  4150. if (!IS_FWI2_CAPABLE(ha))
  4151. return;
  4152. if (!ha->fw_major_version)
  4153. return;
  4154. ret = qla2x00_stop_firmware(vha);
  4155. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4156. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4157. ha->isp_ops->reset_chip(vha);
  4158. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4159. continue;
  4160. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4161. continue;
  4162. qla_printk(KERN_INFO, ha,
  4163. "Attempting retry of stop-firmware command...\n");
  4164. ret = qla2x00_stop_firmware(vha);
  4165. }
  4166. }
  4167. int
  4168. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4169. {
  4170. int rval = QLA_SUCCESS;
  4171. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4172. struct qla_hw_data *ha = vha->hw;
  4173. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4174. struct req_que *req;
  4175. struct rsp_que *rsp;
  4176. if (!vha->vp_idx)
  4177. return -EINVAL;
  4178. rval = qla2x00_fw_ready(base_vha);
  4179. if (ha->flags.cpu_affinity_enabled)
  4180. req = ha->req_q_map[0];
  4181. else
  4182. req = vha->req;
  4183. rsp = req->rsp;
  4184. if (rval == QLA_SUCCESS) {
  4185. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4186. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4187. }
  4188. vha->flags.management_server_logged_in = 0;
  4189. /* Login to SNS first */
  4190. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4191. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4192. DEBUG15(qla_printk(KERN_INFO, ha,
  4193. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4194. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4195. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4196. return (QLA_FUNCTION_FAILED);
  4197. }
  4198. atomic_set(&vha->loop_down_timer, 0);
  4199. atomic_set(&vha->loop_state, LOOP_UP);
  4200. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4201. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4202. rval = qla2x00_loop_resync(base_vha);
  4203. return rval;
  4204. }
  4205. /* 84XX Support **************************************************************/
  4206. static LIST_HEAD(qla_cs84xx_list);
  4207. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4208. static struct qla_chip_state_84xx *
  4209. qla84xx_get_chip(struct scsi_qla_host *vha)
  4210. {
  4211. struct qla_chip_state_84xx *cs84xx;
  4212. struct qla_hw_data *ha = vha->hw;
  4213. mutex_lock(&qla_cs84xx_mutex);
  4214. /* Find any shared 84xx chip. */
  4215. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4216. if (cs84xx->bus == ha->pdev->bus) {
  4217. kref_get(&cs84xx->kref);
  4218. goto done;
  4219. }
  4220. }
  4221. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4222. if (!cs84xx)
  4223. goto done;
  4224. kref_init(&cs84xx->kref);
  4225. spin_lock_init(&cs84xx->access_lock);
  4226. mutex_init(&cs84xx->fw_update_mutex);
  4227. cs84xx->bus = ha->pdev->bus;
  4228. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4229. done:
  4230. mutex_unlock(&qla_cs84xx_mutex);
  4231. return cs84xx;
  4232. }
  4233. static void
  4234. __qla84xx_chip_release(struct kref *kref)
  4235. {
  4236. struct qla_chip_state_84xx *cs84xx =
  4237. container_of(kref, struct qla_chip_state_84xx, kref);
  4238. mutex_lock(&qla_cs84xx_mutex);
  4239. list_del(&cs84xx->list);
  4240. mutex_unlock(&qla_cs84xx_mutex);
  4241. kfree(cs84xx);
  4242. }
  4243. void
  4244. qla84xx_put_chip(struct scsi_qla_host *vha)
  4245. {
  4246. struct qla_hw_data *ha = vha->hw;
  4247. if (ha->cs84xx)
  4248. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4249. }
  4250. static int
  4251. qla84xx_init_chip(scsi_qla_host_t *vha)
  4252. {
  4253. int rval;
  4254. uint16_t status[2];
  4255. struct qla_hw_data *ha = vha->hw;
  4256. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4257. rval = qla84xx_verify_chip(vha, status);
  4258. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4259. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4260. QLA_SUCCESS;
  4261. }
  4262. /* 81XX Support **************************************************************/
  4263. int
  4264. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4265. {
  4266. int rval;
  4267. struct init_cb_81xx *icb;
  4268. struct nvram_81xx *nv;
  4269. uint32_t *dptr;
  4270. uint8_t *dptr1, *dptr2;
  4271. uint32_t chksum;
  4272. uint16_t cnt;
  4273. struct qla_hw_data *ha = vha->hw;
  4274. rval = QLA_SUCCESS;
  4275. icb = (struct init_cb_81xx *)ha->init_cb;
  4276. nv = ha->nvram;
  4277. /* Determine NVRAM starting address. */
  4278. ha->nvram_size = sizeof(struct nvram_81xx);
  4279. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4280. /* Get VPD data into cache */
  4281. ha->vpd = ha->nvram + VPD_OFFSET;
  4282. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4283. ha->vpd_size);
  4284. /* Get NVRAM data into cache and calculate checksum. */
  4285. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4286. ha->nvram_size);
  4287. dptr = (uint32_t *)nv;
  4288. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4289. chksum += le32_to_cpu(*dptr++);
  4290. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4291. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4292. /* Bad NVRAM data, set defaults parameters. */
  4293. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4294. || nv->id[3] != ' ' ||
  4295. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4296. /* Reset NVRAM data. */
  4297. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4298. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4299. le16_to_cpu(nv->nvram_version));
  4300. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4301. "invalid -- WWPN) defaults.\n");
  4302. /*
  4303. * Set default initialization control block.
  4304. */
  4305. memset(nv, 0, ha->nvram_size);
  4306. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4307. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4308. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4309. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4310. nv->exchange_count = __constant_cpu_to_le16(0);
  4311. nv->port_name[0] = 0x21;
  4312. nv->port_name[1] = 0x00 + ha->port_no;
  4313. nv->port_name[2] = 0x00;
  4314. nv->port_name[3] = 0xe0;
  4315. nv->port_name[4] = 0x8b;
  4316. nv->port_name[5] = 0x1c;
  4317. nv->port_name[6] = 0x55;
  4318. nv->port_name[7] = 0x86;
  4319. nv->node_name[0] = 0x20;
  4320. nv->node_name[1] = 0x00;
  4321. nv->node_name[2] = 0x00;
  4322. nv->node_name[3] = 0xe0;
  4323. nv->node_name[4] = 0x8b;
  4324. nv->node_name[5] = 0x1c;
  4325. nv->node_name[6] = 0x55;
  4326. nv->node_name[7] = 0x86;
  4327. nv->login_retry_count = __constant_cpu_to_le16(8);
  4328. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4329. nv->login_timeout = __constant_cpu_to_le16(0);
  4330. nv->firmware_options_1 =
  4331. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4332. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4333. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4334. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4335. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4336. nv->efi_parameters = __constant_cpu_to_le32(0);
  4337. nv->reset_delay = 5;
  4338. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4339. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4340. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4341. nv->enode_mac[0] = 0x00;
  4342. nv->enode_mac[1] = 0x02;
  4343. nv->enode_mac[2] = 0x03;
  4344. nv->enode_mac[3] = 0x04;
  4345. nv->enode_mac[4] = 0x05;
  4346. nv->enode_mac[5] = 0x06 + ha->port_no;
  4347. rval = 1;
  4348. }
  4349. /* Reset Initialization control block */
  4350. memset(icb, 0, sizeof(struct init_cb_81xx));
  4351. /* Copy 1st segment. */
  4352. dptr1 = (uint8_t *)icb;
  4353. dptr2 = (uint8_t *)&nv->version;
  4354. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4355. while (cnt--)
  4356. *dptr1++ = *dptr2++;
  4357. icb->login_retry_count = nv->login_retry_count;
  4358. /* Copy 2nd segment. */
  4359. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4360. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4361. cnt = (uint8_t *)&icb->reserved_5 -
  4362. (uint8_t *)&icb->interrupt_delay_timer;
  4363. while (cnt--)
  4364. *dptr1++ = *dptr2++;
  4365. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4366. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4367. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4368. icb->enode_mac[0] = 0x01;
  4369. icb->enode_mac[1] = 0x02;
  4370. icb->enode_mac[2] = 0x03;
  4371. icb->enode_mac[3] = 0x04;
  4372. icb->enode_mac[4] = 0x05;
  4373. icb->enode_mac[5] = 0x06 + ha->port_no;
  4374. }
  4375. /* Use extended-initialization control block. */
  4376. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4377. /*
  4378. * Setup driver NVRAM options.
  4379. */
  4380. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4381. "QLE8XXX");
  4382. /* Use alternate WWN? */
  4383. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4384. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4385. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4386. }
  4387. /* Prepare nodename */
  4388. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4389. /*
  4390. * Firmware will apply the following mask if the nodename was
  4391. * not provided.
  4392. */
  4393. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4394. icb->node_name[0] &= 0xF0;
  4395. }
  4396. /* Set host adapter parameters. */
  4397. ha->flags.disable_risc_code_load = 0;
  4398. ha->flags.enable_lip_reset = 0;
  4399. ha->flags.enable_lip_full_login =
  4400. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4401. ha->flags.enable_target_reset =
  4402. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4403. ha->flags.enable_led_scheme = 0;
  4404. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4405. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4406. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4407. /* save HBA serial number */
  4408. ha->serial0 = icb->port_name[5];
  4409. ha->serial1 = icb->port_name[6];
  4410. ha->serial2 = icb->port_name[7];
  4411. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4412. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4413. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4414. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4415. /* Set minimum login_timeout to 4 seconds. */
  4416. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4417. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4418. if (le16_to_cpu(nv->login_timeout) < 4)
  4419. nv->login_timeout = __constant_cpu_to_le16(4);
  4420. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4421. icb->login_timeout = nv->login_timeout;
  4422. /* Set minimum RATOV to 100 tenths of a second. */
  4423. ha->r_a_tov = 100;
  4424. ha->loop_reset_delay = nv->reset_delay;
  4425. /* Link Down Timeout = 0:
  4426. *
  4427. * When Port Down timer expires we will start returning
  4428. * I/O's to OS with "DID_NO_CONNECT".
  4429. *
  4430. * Link Down Timeout != 0:
  4431. *
  4432. * The driver waits for the link to come up after link down
  4433. * before returning I/Os to OS with "DID_NO_CONNECT".
  4434. */
  4435. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4436. ha->loop_down_abort_time =
  4437. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4438. } else {
  4439. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4440. ha->loop_down_abort_time =
  4441. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4442. }
  4443. /* Need enough time to try and get the port back. */
  4444. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4445. if (qlport_down_retry)
  4446. ha->port_down_retry_count = qlport_down_retry;
  4447. /* Set login_retry_count */
  4448. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4449. if (ha->port_down_retry_count ==
  4450. le16_to_cpu(nv->port_down_retry_count) &&
  4451. ha->port_down_retry_count > 3)
  4452. ha->login_retry_count = ha->port_down_retry_count;
  4453. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4454. ha->login_retry_count = ha->port_down_retry_count;
  4455. if (ql2xloginretrycount)
  4456. ha->login_retry_count = ql2xloginretrycount;
  4457. /* Enable ZIO. */
  4458. if (!vha->flags.init_done) {
  4459. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4460. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4461. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4462. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4463. }
  4464. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4465. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4466. vha->flags.process_response_queue = 0;
  4467. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4468. ha->zio_mode = QLA_ZIO_MODE_6;
  4469. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4470. "(%d us).\n", vha->host_no, ha->zio_mode,
  4471. ha->zio_timer * 100));
  4472. qla_printk(KERN_INFO, ha,
  4473. "ZIO mode %d enabled; timer delay (%d us).\n",
  4474. ha->zio_mode, ha->zio_timer * 100);
  4475. icb->firmware_options_2 |= cpu_to_le32(
  4476. (uint32_t)ha->zio_mode);
  4477. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4478. vha->flags.process_response_queue = 1;
  4479. }
  4480. if (rval) {
  4481. DEBUG2_3(printk(KERN_WARNING
  4482. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4483. }
  4484. return (rval);
  4485. }
  4486. int
  4487. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4488. {
  4489. int status, rval;
  4490. uint32_t wait_time;
  4491. struct qla_hw_data *ha = vha->hw;
  4492. struct req_que *req = ha->req_q_map[0];
  4493. struct rsp_que *rsp = ha->rsp_q_map[0];
  4494. struct scsi_qla_host *vp;
  4495. struct scsi_qla_host *tvp;
  4496. status = qla2x00_init_rings(vha);
  4497. if (!status) {
  4498. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4499. ha->flags.chip_reset_done = 1;
  4500. status = qla2x00_fw_ready(vha);
  4501. if (!status) {
  4502. qla_printk(KERN_INFO, ha,
  4503. "%s(): Start configure loop, "
  4504. "status = %d\n", __func__, status);
  4505. /* Issue a marker after FW becomes ready. */
  4506. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4507. vha->flags.online = 1;
  4508. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4509. wait_time = 256;
  4510. do {
  4511. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4512. qla2x00_configure_loop(vha);
  4513. wait_time--;
  4514. } while (!atomic_read(&vha->loop_down_timer) &&
  4515. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4516. wait_time &&
  4517. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4518. }
  4519. /* if no cable then assume it's good */
  4520. if ((vha->device_flags & DFLG_NO_CABLE))
  4521. status = 0;
  4522. qla_printk(KERN_INFO, ha,
  4523. "%s(): Configure loop done, status = 0x%x\n",
  4524. __func__, status);
  4525. }
  4526. if (!status) {
  4527. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4528. if (!atomic_read(&vha->loop_down_timer)) {
  4529. /*
  4530. * Issue marker command only when we are going
  4531. * to start the I/O .
  4532. */
  4533. vha->marker_needed = 1;
  4534. }
  4535. vha->flags.online = 1;
  4536. ha->isp_ops->enable_intrs(ha);
  4537. ha->isp_abort_cnt = 0;
  4538. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4539. if (ha->fce) {
  4540. ha->flags.fce_enabled = 1;
  4541. memset(ha->fce, 0,
  4542. fce_calc_size(ha->fce_bufs));
  4543. rval = qla2x00_enable_fce_trace(vha,
  4544. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4545. &ha->fce_bufs);
  4546. if (rval) {
  4547. qla_printk(KERN_WARNING, ha,
  4548. "Unable to reinitialize FCE "
  4549. "(%d).\n", rval);
  4550. ha->flags.fce_enabled = 0;
  4551. }
  4552. }
  4553. if (ha->eft) {
  4554. memset(ha->eft, 0, EFT_SIZE);
  4555. rval = qla2x00_enable_eft_trace(vha,
  4556. ha->eft_dma, EFT_NUM_BUFFERS);
  4557. if (rval) {
  4558. qla_printk(KERN_WARNING, ha,
  4559. "Unable to reinitialize EFT "
  4560. "(%d).\n", rval);
  4561. }
  4562. }
  4563. }
  4564. if (!status) {
  4565. DEBUG(printk(KERN_INFO
  4566. "qla82xx_restart_isp(%ld): succeeded.\n",
  4567. vha->host_no));
  4568. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4569. if (vp->vp_idx)
  4570. qla2x00_vp_abort_isp(vp);
  4571. }
  4572. } else {
  4573. qla_printk(KERN_INFO, ha,
  4574. "qla82xx_restart_isp: **** FAILED ****\n");
  4575. }
  4576. return status;
  4577. }
  4578. void
  4579. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4580. {
  4581. struct qla_hw_data *ha = vha->hw;
  4582. if (!ql2xetsenable)
  4583. return;
  4584. /* Enable ETS Burst. */
  4585. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4586. ha->fw_options[2] |= BIT_9;
  4587. qla2x00_set_fw_options(vha, ha->fw_options);
  4588. }
  4589. /*
  4590. * qla24xx_get_fcp_prio
  4591. * Gets the fcp cmd priority value for the logged in port.
  4592. * Looks for a match of the port descriptors within
  4593. * each of the fcp prio config entries. If a match is found,
  4594. * the tag (priority) value is returned.
  4595. *
  4596. * Input:
  4597. * ha = adapter block po
  4598. * fcport = port structure pointer.
  4599. *
  4600. * Return:
  4601. * non-zero (if found)
  4602. * 0 (if not found)
  4603. *
  4604. * Context:
  4605. * Kernel context
  4606. */
  4607. uint8_t
  4608. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4609. {
  4610. int i, entries;
  4611. uint8_t pid_match, wwn_match;
  4612. uint8_t priority;
  4613. uint32_t pid1, pid2;
  4614. uint64_t wwn1, wwn2;
  4615. struct qla_fcp_prio_entry *pri_entry;
  4616. struct qla_hw_data *ha = vha->hw;
  4617. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4618. return 0;
  4619. priority = 0;
  4620. entries = ha->fcp_prio_cfg->num_entries;
  4621. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4622. for (i = 0; i < entries; i++) {
  4623. pid_match = wwn_match = 0;
  4624. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4625. pri_entry++;
  4626. continue;
  4627. }
  4628. /* check source pid for a match */
  4629. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4630. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4631. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4632. if (pid1 == INVALID_PORT_ID)
  4633. pid_match++;
  4634. else if (pid1 == pid2)
  4635. pid_match++;
  4636. }
  4637. /* check destination pid for a match */
  4638. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4639. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4640. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4641. if (pid1 == INVALID_PORT_ID)
  4642. pid_match++;
  4643. else if (pid1 == pid2)
  4644. pid_match++;
  4645. }
  4646. /* check source WWN for a match */
  4647. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4648. wwn1 = wwn_to_u64(vha->port_name);
  4649. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4650. if (wwn2 == (uint64_t)-1)
  4651. wwn_match++;
  4652. else if (wwn1 == wwn2)
  4653. wwn_match++;
  4654. }
  4655. /* check destination WWN for a match */
  4656. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4657. wwn1 = wwn_to_u64(fcport->port_name);
  4658. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4659. if (wwn2 == (uint64_t)-1)
  4660. wwn_match++;
  4661. else if (wwn1 == wwn2)
  4662. wwn_match++;
  4663. }
  4664. if (pid_match == 2 || wwn_match == 2) {
  4665. /* Found a matching entry */
  4666. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4667. priority = pri_entry->tag;
  4668. break;
  4669. }
  4670. pri_entry++;
  4671. }
  4672. return priority;
  4673. }
  4674. /*
  4675. * qla24xx_update_fcport_fcp_prio
  4676. * Activates fcp priority for the logged in fc port
  4677. *
  4678. * Input:
  4679. * ha = adapter block pointer.
  4680. * fcp = port structure pointer.
  4681. *
  4682. * Return:
  4683. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4684. *
  4685. * Context:
  4686. * Kernel context.
  4687. */
  4688. int
  4689. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4690. {
  4691. int ret;
  4692. uint8_t priority;
  4693. uint16_t mb[5];
  4694. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4695. fcport->port_type != FCT_TARGET ||
  4696. fcport->loop_id == FC_NO_LOOP_ID)
  4697. return QLA_FUNCTION_FAILED;
  4698. priority = qla24xx_get_fcp_prio(ha, fcport);
  4699. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4700. if (ret == QLA_SUCCESS)
  4701. fcport->fcp_prio = priority;
  4702. else
  4703. DEBUG2(printk(KERN_WARNING
  4704. "scsi(%ld): Unable to activate fcp priority, "
  4705. " ret=0x%x\n", ha->host_no, ret));
  4706. return ret;
  4707. }
  4708. /*
  4709. * qla24xx_update_all_fcp_prio
  4710. * Activates fcp priority for all the logged in ports
  4711. *
  4712. * Input:
  4713. * ha = adapter block pointer.
  4714. *
  4715. * Return:
  4716. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4717. *
  4718. * Context:
  4719. * Kernel context.
  4720. */
  4721. int
  4722. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4723. {
  4724. int ret;
  4725. fc_port_t *fcport;
  4726. ret = QLA_FUNCTION_FAILED;
  4727. /* We need to set priority for all logged in ports */
  4728. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4729. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4730. return ret;
  4731. }