panel-tpo-td043mtea1.c 12 KB

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  1. /*
  2. * LCD panel driver for TPO TD043MTEA1
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/delay.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/gpio.h>
  16. #include <linux/err.h>
  17. #include <plat/display.h>
  18. #define TPO_R02_MODE(x) ((x) & 7)
  19. #define TPO_R02_MODE_800x480 7
  20. #define TPO_R02_NCLK_RISING BIT(3)
  21. #define TPO_R02_HSYNC_HIGH BIT(4)
  22. #define TPO_R02_VSYNC_HIGH BIT(5)
  23. #define TPO_R03_NSTANDBY BIT(0)
  24. #define TPO_R03_EN_CP_CLK BIT(1)
  25. #define TPO_R03_EN_VGL_PUMP BIT(2)
  26. #define TPO_R03_EN_PWM BIT(3)
  27. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  28. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  29. #define TPO_R03_SOFTWARE_CTL BIT(7)
  30. #define TPO_R04_NFLIP_H BIT(0)
  31. #define TPO_R04_NFLIP_V BIT(1)
  32. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  33. #define TPO_R04_VGL_FREQ_1H BIT(4)
  34. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  35. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  36. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  37. TPO_R03_SOFTWARE_CTL)
  38. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  39. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  40. static const u16 tpo_td043_def_gamma[12] = {
  41. 106, 200, 289, 375, 460, 543, 625, 705, 785, 864, 942, 1020
  42. };
  43. struct tpo_td043_device {
  44. struct spi_device *spi;
  45. struct regulator *vcc_reg;
  46. u16 gamma[12];
  47. u32 mode;
  48. u32 hmirror:1;
  49. u32 vmirror:1;
  50. };
  51. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  52. {
  53. struct spi_message m;
  54. struct spi_transfer xfer;
  55. u16 w;
  56. int r;
  57. spi_message_init(&m);
  58. memset(&xfer, 0, sizeof(xfer));
  59. w = ((u16)addr << 10) | (1 << 8) | data;
  60. xfer.tx_buf = &w;
  61. xfer.bits_per_word = 16;
  62. xfer.len = 2;
  63. spi_message_add_tail(&xfer, &m);
  64. r = spi_sync(spi, &m);
  65. if (r < 0)
  66. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  67. return r;
  68. }
  69. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  70. {
  71. u8 i, val;
  72. /* gamma bits [9:8] */
  73. for (val = i = 0; i < 4; i++)
  74. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  75. tpo_td043_write(spi, 0x11, val);
  76. for (val = i = 0; i < 4; i++)
  77. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  78. tpo_td043_write(spi, 0x12, val);
  79. for (val = i = 0; i < 4; i++)
  80. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  81. tpo_td043_write(spi, 0x13, val);
  82. /* gamma bits [7:0] */
  83. for (val = i = 0; i < 12; i++)
  84. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  85. }
  86. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  87. {
  88. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
  89. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  90. if (h)
  91. reg4 &= ~TPO_R04_NFLIP_H;
  92. if (v)
  93. reg4 &= ~TPO_R04_NFLIP_V;
  94. return tpo_td043_write(spi, 4, reg4);
  95. }
  96. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  97. {
  98. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  99. tpo_td043->hmirror = enable;
  100. return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  101. tpo_td043->vmirror);
  102. }
  103. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  104. {
  105. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  106. return tpo_td043->hmirror;
  107. }
  108. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  109. struct device_attribute *attr, char *buf)
  110. {
  111. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  112. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
  113. }
  114. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  115. struct device_attribute *attr, const char *buf, size_t count)
  116. {
  117. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  118. long val;
  119. int ret;
  120. ret = strict_strtol(buf, 0, &val);
  121. if (ret < 0)
  122. return ret;
  123. ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
  124. if (ret < 0)
  125. return ret;
  126. tpo_td043->vmirror = val;
  127. return count;
  128. }
  129. static ssize_t tpo_td043_mode_show(struct device *dev,
  130. struct device_attribute *attr, char *buf)
  131. {
  132. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  133. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
  134. }
  135. static ssize_t tpo_td043_mode_store(struct device *dev,
  136. struct device_attribute *attr, const char *buf, size_t count)
  137. {
  138. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  139. long val;
  140. int ret;
  141. ret = strict_strtol(buf, 0, &val);
  142. if (ret != 0 || val & ~7)
  143. return -EINVAL;
  144. tpo_td043->mode = val;
  145. val |= TPO_R02_NCLK_RISING;
  146. tpo_td043_write(tpo_td043->spi, 2, val);
  147. return count;
  148. }
  149. static ssize_t tpo_td043_gamma_show(struct device *dev,
  150. struct device_attribute *attr, char *buf)
  151. {
  152. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  153. ssize_t len = 0;
  154. int ret;
  155. int i;
  156. for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
  157. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  158. tpo_td043->gamma[i]);
  159. if (ret < 0)
  160. return ret;
  161. len += ret;
  162. }
  163. buf[len - 1] = '\n';
  164. return len;
  165. }
  166. static ssize_t tpo_td043_gamma_store(struct device *dev,
  167. struct device_attribute *attr, const char *buf, size_t count)
  168. {
  169. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  170. unsigned int g[12];
  171. int ret;
  172. int i;
  173. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  174. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  175. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  176. if (ret != 12)
  177. return -EINVAL;
  178. for (i = 0; i < 12; i++)
  179. tpo_td043->gamma[i] = g[i];
  180. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  181. return count;
  182. }
  183. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  184. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  185. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  186. tpo_td043_mode_show, tpo_td043_mode_store);
  187. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  188. tpo_td043_gamma_show, tpo_td043_gamma_store);
  189. static struct attribute *tpo_td043_attrs[] = {
  190. &dev_attr_vmirror.attr,
  191. &dev_attr_mode.attr,
  192. &dev_attr_gamma.attr,
  193. NULL,
  194. };
  195. static struct attribute_group tpo_td043_attr_group = {
  196. .attrs = tpo_td043_attrs,
  197. };
  198. static const struct omap_video_timings tpo_td043_timings = {
  199. .x_res = 800,
  200. .y_res = 480,
  201. .pixel_clock = 36000,
  202. .hsw = 1,
  203. .hfp = 68,
  204. .hbp = 214,
  205. .vsw = 1,
  206. .vfp = 39,
  207. .vbp = 34,
  208. };
  209. static int tpo_td043_power_on(struct omap_dss_device *dssdev)
  210. {
  211. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  212. int nreset_gpio = dssdev->reset_gpio;
  213. int r;
  214. r = omapdss_dpi_display_enable(dssdev);
  215. if (r)
  216. goto err0;
  217. if (dssdev->platform_enable) {
  218. r = dssdev->platform_enable(dssdev);
  219. if (r)
  220. goto err1;
  221. }
  222. regulator_enable(tpo_td043->vcc_reg);
  223. /* wait for power up */
  224. msleep(160);
  225. if (gpio_is_valid(nreset_gpio))
  226. gpio_set_value(nreset_gpio, 1);
  227. tpo_td043_write(tpo_td043->spi, 2,
  228. TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
  229. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
  230. tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
  231. tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
  232. tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  233. tpo_td043->vmirror);
  234. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  235. return 0;
  236. err1:
  237. omapdss_dpi_display_disable(dssdev);
  238. err0:
  239. return r;
  240. }
  241. static void tpo_td043_power_off(struct omap_dss_device *dssdev)
  242. {
  243. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  244. int nreset_gpio = dssdev->reset_gpio;
  245. tpo_td043_write(tpo_td043->spi, 3,
  246. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  247. if (gpio_is_valid(nreset_gpio))
  248. gpio_set_value(nreset_gpio, 0);
  249. /* wait for at least 2 vsyncs before cutting off power */
  250. msleep(50);
  251. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
  252. regulator_disable(tpo_td043->vcc_reg);
  253. if (dssdev->platform_disable)
  254. dssdev->platform_disable(dssdev);
  255. omapdss_dpi_display_disable(dssdev);
  256. }
  257. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  258. {
  259. int ret;
  260. dev_dbg(&dssdev->dev, "enable\n");
  261. ret = tpo_td043_power_on(dssdev);
  262. if (ret)
  263. return ret;
  264. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  265. return 0;
  266. }
  267. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  268. {
  269. dev_dbg(&dssdev->dev, "disable\n");
  270. tpo_td043_power_off(dssdev);
  271. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  272. }
  273. static int tpo_td043_suspend(struct omap_dss_device *dssdev)
  274. {
  275. tpo_td043_power_off(dssdev);
  276. dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
  277. return 0;
  278. }
  279. static int tpo_td043_resume(struct omap_dss_device *dssdev)
  280. {
  281. int r = 0;
  282. r = tpo_td043_power_on(dssdev);
  283. if (r)
  284. return r;
  285. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  286. return 0;
  287. }
  288. static int tpo_td043_probe(struct omap_dss_device *dssdev)
  289. {
  290. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  291. int nreset_gpio = dssdev->reset_gpio;
  292. int ret = 0;
  293. dev_dbg(&dssdev->dev, "probe\n");
  294. if (tpo_td043 == NULL) {
  295. dev_err(&dssdev->dev, "missing tpo_td043_device\n");
  296. return -ENODEV;
  297. }
  298. dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IHS |
  299. OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IPC;
  300. dssdev->panel.timings = tpo_td043_timings;
  301. dssdev->ctrl.pixel_size = 24;
  302. tpo_td043->mode = TPO_R02_MODE_800x480;
  303. memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
  304. tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
  305. if (IS_ERR(tpo_td043->vcc_reg)) {
  306. dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
  307. ret = PTR_ERR(tpo_td043->vcc_reg);
  308. goto fail_regulator;
  309. }
  310. if (gpio_is_valid(nreset_gpio)) {
  311. ret = gpio_request(nreset_gpio, "lcd reset");
  312. if (ret < 0) {
  313. dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
  314. goto fail_gpio_req;
  315. }
  316. ret = gpio_direction_output(nreset_gpio, 0);
  317. if (ret < 0) {
  318. dev_err(&dssdev->dev, "couldn't set GPIO direction\n");
  319. goto fail_gpio_direction;
  320. }
  321. }
  322. ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  323. if (ret)
  324. dev_warn(&dssdev->dev, "failed to create sysfs files\n");
  325. return 0;
  326. fail_gpio_direction:
  327. gpio_free(nreset_gpio);
  328. fail_gpio_req:
  329. regulator_put(tpo_td043->vcc_reg);
  330. fail_regulator:
  331. kfree(tpo_td043);
  332. return ret;
  333. }
  334. static void tpo_td043_remove(struct omap_dss_device *dssdev)
  335. {
  336. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  337. int nreset_gpio = dssdev->reset_gpio;
  338. dev_dbg(&dssdev->dev, "remove\n");
  339. sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  340. regulator_put(tpo_td043->vcc_reg);
  341. if (gpio_is_valid(nreset_gpio))
  342. gpio_free(nreset_gpio);
  343. }
  344. static struct omap_dss_driver tpo_td043_driver = {
  345. .probe = tpo_td043_probe,
  346. .remove = tpo_td043_remove,
  347. .enable = tpo_td043_enable,
  348. .disable = tpo_td043_disable,
  349. .suspend = tpo_td043_suspend,
  350. .resume = tpo_td043_resume,
  351. .set_mirror = tpo_td043_set_hmirror,
  352. .get_mirror = tpo_td043_get_hmirror,
  353. .driver = {
  354. .name = "tpo_td043mtea1_panel",
  355. .owner = THIS_MODULE,
  356. },
  357. };
  358. static int tpo_td043_spi_probe(struct spi_device *spi)
  359. {
  360. struct omap_dss_device *dssdev = spi->dev.platform_data;
  361. struct tpo_td043_device *tpo_td043;
  362. int ret;
  363. if (dssdev == NULL) {
  364. dev_err(&spi->dev, "missing dssdev\n");
  365. return -ENODEV;
  366. }
  367. spi->bits_per_word = 16;
  368. spi->mode = SPI_MODE_0;
  369. ret = spi_setup(spi);
  370. if (ret < 0) {
  371. dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
  372. return ret;
  373. }
  374. tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
  375. if (tpo_td043 == NULL)
  376. return -ENOMEM;
  377. tpo_td043->spi = spi;
  378. dev_set_drvdata(&spi->dev, tpo_td043);
  379. dev_set_drvdata(&dssdev->dev, tpo_td043);
  380. omap_dss_register_driver(&tpo_td043_driver);
  381. return 0;
  382. }
  383. static int __devexit tpo_td043_spi_remove(struct spi_device *spi)
  384. {
  385. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
  386. omap_dss_unregister_driver(&tpo_td043_driver);
  387. kfree(tpo_td043);
  388. return 0;
  389. }
  390. static struct spi_driver tpo_td043_spi_driver = {
  391. .driver = {
  392. .name = "tpo_td043mtea1_panel_spi",
  393. .bus = &spi_bus_type,
  394. .owner = THIS_MODULE,
  395. },
  396. .probe = tpo_td043_spi_probe,
  397. .remove = __devexit_p(tpo_td043_spi_remove),
  398. };
  399. static int __init tpo_td043_init(void)
  400. {
  401. return spi_register_driver(&tpo_td043_spi_driver);
  402. }
  403. static void __exit tpo_td043_exit(void)
  404. {
  405. spi_unregister_driver(&tpo_td043_spi_driver);
  406. }
  407. module_init(tpo_td043_init);
  408. module_exit(tpo_td043_exit);
  409. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  410. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  411. MODULE_LICENSE("GPL");