88pm800.c 14 KB

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  1. /*
  2. * Base driver for Marvell 88PM800
  3. *
  4. * Copyright (C) 2012 Marvell International Ltd.
  5. * Haojian Zhuang <haojian.zhuang@marvell.com>
  6. * Joseph(Yossi) Hanin <yhanin@marvell.com>
  7. * Qiao Zhou <zhouqiao@marvell.com>
  8. *
  9. * This file is subject to the terms and conditions of the GNU General
  10. * Public License. See the file "COPYING" in the main directory of this
  11. * archive for more details.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <linux/i2c.h>
  26. #include <linux/mfd/core.h>
  27. #include <linux/mfd/88pm80x.h>
  28. #include <linux/slab.h>
  29. /* Interrupt Registers */
  30. #define PM800_INT_STATUS1 (0x05)
  31. #define PM800_ONKEY_INT_STS1 (1 << 0)
  32. #define PM800_EXTON_INT_STS1 (1 << 1)
  33. #define PM800_CHG_INT_STS1 (1 << 2)
  34. #define PM800_BAT_INT_STS1 (1 << 3)
  35. #define PM800_RTC_INT_STS1 (1 << 4)
  36. #define PM800_CLASSD_OC_INT_STS1 (1 << 5)
  37. #define PM800_INT_STATUS2 (0x06)
  38. #define PM800_VBAT_INT_STS2 (1 << 0)
  39. #define PM800_VSYS_INT_STS2 (1 << 1)
  40. #define PM800_VCHG_INT_STS2 (1 << 2)
  41. #define PM800_TINT_INT_STS2 (1 << 3)
  42. #define PM800_GPADC0_INT_STS2 (1 << 4)
  43. #define PM800_TBAT_INT_STS2 (1 << 5)
  44. #define PM800_GPADC2_INT_STS2 (1 << 6)
  45. #define PM800_GPADC3_INT_STS2 (1 << 7)
  46. #define PM800_INT_STATUS3 (0x07)
  47. #define PM800_INT_STATUS4 (0x08)
  48. #define PM800_GPIO0_INT_STS4 (1 << 0)
  49. #define PM800_GPIO1_INT_STS4 (1 << 1)
  50. #define PM800_GPIO2_INT_STS4 (1 << 2)
  51. #define PM800_GPIO3_INT_STS4 (1 << 3)
  52. #define PM800_GPIO4_INT_STS4 (1 << 4)
  53. #define PM800_INT_ENA_1 (0x09)
  54. #define PM800_ONKEY_INT_ENA1 (1 << 0)
  55. #define PM800_EXTON_INT_ENA1 (1 << 1)
  56. #define PM800_CHG_INT_ENA1 (1 << 2)
  57. #define PM800_BAT_INT_ENA1 (1 << 3)
  58. #define PM800_RTC_INT_ENA1 (1 << 4)
  59. #define PM800_CLASSD_OC_INT_ENA1 (1 << 5)
  60. #define PM800_INT_ENA_2 (0x0A)
  61. #define PM800_VBAT_INT_ENA2 (1 << 0)
  62. #define PM800_VSYS_INT_ENA2 (1 << 1)
  63. #define PM800_VCHG_INT_ENA2 (1 << 2)
  64. #define PM800_TINT_INT_ENA2 (1 << 3)
  65. #define PM800_INT_ENA_3 (0x0B)
  66. #define PM800_GPADC0_INT_ENA3 (1 << 0)
  67. #define PM800_GPADC1_INT_ENA3 (1 << 1)
  68. #define PM800_GPADC2_INT_ENA3 (1 << 2)
  69. #define PM800_GPADC3_INT_ENA3 (1 << 3)
  70. #define PM800_GPADC4_INT_ENA3 (1 << 4)
  71. #define PM800_INT_ENA_4 (0x0C)
  72. #define PM800_GPIO0_INT_ENA4 (1 << 0)
  73. #define PM800_GPIO1_INT_ENA4 (1 << 1)
  74. #define PM800_GPIO2_INT_ENA4 (1 << 2)
  75. #define PM800_GPIO3_INT_ENA4 (1 << 3)
  76. #define PM800_GPIO4_INT_ENA4 (1 << 4)
  77. /* number of INT_ENA & INT_STATUS regs */
  78. #define PM800_INT_REG_NUM (4)
  79. /* Interrupt Number in 88PM800 */
  80. enum {
  81. PM800_IRQ_ONKEY, /*EN1b0 *//*0 */
  82. PM800_IRQ_EXTON, /*EN1b1 */
  83. PM800_IRQ_CHG, /*EN1b2 */
  84. PM800_IRQ_BAT, /*EN1b3 */
  85. PM800_IRQ_RTC, /*EN1b4 */
  86. PM800_IRQ_CLASSD, /*EN1b5 *//*5 */
  87. PM800_IRQ_VBAT, /*EN2b0 */
  88. PM800_IRQ_VSYS, /*EN2b1 */
  89. PM800_IRQ_VCHG, /*EN2b2 */
  90. PM800_IRQ_TINT, /*EN2b3 */
  91. PM800_IRQ_GPADC0, /*EN3b0 *//*10 */
  92. PM800_IRQ_GPADC1, /*EN3b1 */
  93. PM800_IRQ_GPADC2, /*EN3b2 */
  94. PM800_IRQ_GPADC3, /*EN3b3 */
  95. PM800_IRQ_GPADC4, /*EN3b4 */
  96. PM800_IRQ_GPIO0, /*EN4b0 *//*15 */
  97. PM800_IRQ_GPIO1, /*EN4b1 */
  98. PM800_IRQ_GPIO2, /*EN4b2 */
  99. PM800_IRQ_GPIO3, /*EN4b3 */
  100. PM800_IRQ_GPIO4, /*EN4b4 *//*19 */
  101. PM800_MAX_IRQ,
  102. };
  103. /* PM800: generation identification number */
  104. #define PM800_CHIP_GEN_ID_NUM 0x3
  105. static const struct i2c_device_id pm80x_id_table[] = {
  106. {"88PM800", 0},
  107. {} /* NULL terminated */
  108. };
  109. MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
  110. static struct resource rtc_resources[] = {
  111. {
  112. .name = "88pm80x-rtc",
  113. .start = PM800_IRQ_RTC,
  114. .end = PM800_IRQ_RTC,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. static struct mfd_cell rtc_devs[] = {
  119. {
  120. .name = "88pm80x-rtc",
  121. .num_resources = ARRAY_SIZE(rtc_resources),
  122. .resources = &rtc_resources[0],
  123. .id = -1,
  124. },
  125. };
  126. static struct resource onkey_resources[] = {
  127. {
  128. .name = "88pm80x-onkey",
  129. .start = PM800_IRQ_ONKEY,
  130. .end = PM800_IRQ_ONKEY,
  131. .flags = IORESOURCE_IRQ,
  132. },
  133. };
  134. static struct mfd_cell onkey_devs[] = {
  135. {
  136. .name = "88pm80x-onkey",
  137. .num_resources = 1,
  138. .resources = &onkey_resources[0],
  139. .id = -1,
  140. },
  141. };
  142. static const struct regmap_irq pm800_irqs[] = {
  143. /* INT0 */
  144. [PM800_IRQ_ONKEY] = {
  145. .mask = PM800_ONKEY_INT_ENA1,
  146. },
  147. [PM800_IRQ_EXTON] = {
  148. .mask = PM800_EXTON_INT_ENA1,
  149. },
  150. [PM800_IRQ_CHG] = {
  151. .mask = PM800_CHG_INT_ENA1,
  152. },
  153. [PM800_IRQ_BAT] = {
  154. .mask = PM800_BAT_INT_ENA1,
  155. },
  156. [PM800_IRQ_RTC] = {
  157. .mask = PM800_RTC_INT_ENA1,
  158. },
  159. [PM800_IRQ_CLASSD] = {
  160. .mask = PM800_CLASSD_OC_INT_ENA1,
  161. },
  162. /* INT1 */
  163. [PM800_IRQ_VBAT] = {
  164. .reg_offset = 1,
  165. .mask = PM800_VBAT_INT_ENA2,
  166. },
  167. [PM800_IRQ_VSYS] = {
  168. .reg_offset = 1,
  169. .mask = PM800_VSYS_INT_ENA2,
  170. },
  171. [PM800_IRQ_VCHG] = {
  172. .reg_offset = 1,
  173. .mask = PM800_VCHG_INT_ENA2,
  174. },
  175. [PM800_IRQ_TINT] = {
  176. .reg_offset = 1,
  177. .mask = PM800_TINT_INT_ENA2,
  178. },
  179. /* INT2 */
  180. [PM800_IRQ_GPADC0] = {
  181. .reg_offset = 2,
  182. .mask = PM800_GPADC0_INT_ENA3,
  183. },
  184. [PM800_IRQ_GPADC1] = {
  185. .reg_offset = 2,
  186. .mask = PM800_GPADC1_INT_ENA3,
  187. },
  188. [PM800_IRQ_GPADC2] = {
  189. .reg_offset = 2,
  190. .mask = PM800_GPADC2_INT_ENA3,
  191. },
  192. [PM800_IRQ_GPADC3] = {
  193. .reg_offset = 2,
  194. .mask = PM800_GPADC3_INT_ENA3,
  195. },
  196. [PM800_IRQ_GPADC4] = {
  197. .reg_offset = 2,
  198. .mask = PM800_GPADC4_INT_ENA3,
  199. },
  200. /* INT3 */
  201. [PM800_IRQ_GPIO0] = {
  202. .reg_offset = 3,
  203. .mask = PM800_GPIO0_INT_ENA4,
  204. },
  205. [PM800_IRQ_GPIO1] = {
  206. .reg_offset = 3,
  207. .mask = PM800_GPIO1_INT_ENA4,
  208. },
  209. [PM800_IRQ_GPIO2] = {
  210. .reg_offset = 3,
  211. .mask = PM800_GPIO2_INT_ENA4,
  212. },
  213. [PM800_IRQ_GPIO3] = {
  214. .reg_offset = 3,
  215. .mask = PM800_GPIO3_INT_ENA4,
  216. },
  217. [PM800_IRQ_GPIO4] = {
  218. .reg_offset = 3,
  219. .mask = PM800_GPIO4_INT_ENA4,
  220. },
  221. };
  222. static int device_gpadc_init(struct pm80x_chip *chip,
  223. struct pm80x_platform_data *pdata)
  224. {
  225. struct pm80x_subchip *subchip = chip->subchip;
  226. struct regmap *map = subchip->regmap_gpadc;
  227. int data = 0, mask = 0, ret = 0;
  228. if (!map) {
  229. dev_warn(chip->dev,
  230. "Warning: gpadc regmap is not available!\n");
  231. return -EINVAL;
  232. }
  233. /*
  234. * initialize GPADC without activating it turn on GPADC
  235. * measurments
  236. */
  237. ret = regmap_update_bits(map,
  238. PM800_GPADC_MISC_CONFIG2,
  239. PM800_GPADC_MISC_GPFSM_EN,
  240. PM800_GPADC_MISC_GPFSM_EN);
  241. if (ret < 0)
  242. goto out;
  243. /*
  244. * This function configures the ADC as requires for
  245. * CP implementation.CP does not "own" the ADC configuration
  246. * registers and relies on AP.
  247. * Reason: enable automatic ADC measurements needed
  248. * for CP to get VBAT and RF temperature readings.
  249. */
  250. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
  251. PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
  252. if (ret < 0)
  253. goto out;
  254. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
  255. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
  256. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
  257. if (ret < 0)
  258. goto out;
  259. /*
  260. * the defult of PM800 is GPADC operates at 100Ks/s rate
  261. * and Number of GPADC slots with active current bias prior
  262. * to GPADC sampling = 1 slot for all GPADCs set for
  263. * Temprature mesurmants
  264. */
  265. mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  266. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  267. if (pdata && (pdata->batt_det == 0))
  268. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  269. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  270. else
  271. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
  272. PM800_GPADC_GP_BIAS_EN3);
  273. ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
  274. if (ret < 0)
  275. goto out;
  276. dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
  277. return 0;
  278. out:
  279. dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
  280. return ret;
  281. }
  282. static int device_onkey_init(struct pm80x_chip *chip,
  283. struct pm80x_platform_data *pdata)
  284. {
  285. int ret;
  286. ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
  287. ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
  288. NULL);
  289. if (ret) {
  290. dev_err(chip->dev, "Failed to add onkey subdev\n");
  291. return ret;
  292. }
  293. return 0;
  294. }
  295. static int device_rtc_init(struct pm80x_chip *chip,
  296. struct pm80x_platform_data *pdata)
  297. {
  298. int ret;
  299. rtc_devs[0].platform_data = pdata->rtc;
  300. rtc_devs[0].pdata_size =
  301. pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
  302. ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
  303. ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
  304. if (ret) {
  305. dev_err(chip->dev, "Failed to add rtc subdev\n");
  306. return ret;
  307. }
  308. return 0;
  309. }
  310. static int device_irq_init_800(struct pm80x_chip *chip)
  311. {
  312. struct regmap *map = chip->regmap;
  313. unsigned long flags = IRQF_ONESHOT;
  314. int data, mask, ret = -EINVAL;
  315. if (!map || !chip->irq) {
  316. dev_err(chip->dev, "incorrect parameters\n");
  317. return -EINVAL;
  318. }
  319. /*
  320. * irq_mode defines the way of clearing interrupt. it's read-clear by
  321. * default.
  322. */
  323. mask =
  324. PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
  325. PM800_WAKEUP2_INT_MASK;
  326. data = PM800_WAKEUP2_INT_CLEAR;
  327. ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
  328. if (ret < 0)
  329. goto out;
  330. ret =
  331. regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
  332. chip->regmap_irq_chip, &chip->irq_data);
  333. out:
  334. return ret;
  335. }
  336. static void device_irq_exit_800(struct pm80x_chip *chip)
  337. {
  338. regmap_del_irq_chip(chip->irq, chip->irq_data);
  339. }
  340. static struct regmap_irq_chip pm800_irq_chip = {
  341. .name = "88pm800",
  342. .irqs = pm800_irqs,
  343. .num_irqs = ARRAY_SIZE(pm800_irqs),
  344. .num_regs = 4,
  345. .status_base = PM800_INT_STATUS1,
  346. .mask_base = PM800_INT_ENA_1,
  347. .ack_base = PM800_INT_STATUS1,
  348. .mask_invert = 1,
  349. };
  350. static int pm800_pages_init(struct pm80x_chip *chip)
  351. {
  352. struct pm80x_subchip *subchip;
  353. struct i2c_client *client = chip->client;
  354. int ret = 0;
  355. subchip = chip->subchip;
  356. if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
  357. return -ENODEV;
  358. /* PM800 block power page */
  359. subchip->power_page = i2c_new_dummy(client->adapter,
  360. subchip->power_page_addr);
  361. if (subchip->power_page == NULL) {
  362. ret = -ENODEV;
  363. goto out;
  364. }
  365. subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
  366. &pm80x_regmap_config);
  367. if (IS_ERR(subchip->regmap_power)) {
  368. ret = PTR_ERR(subchip->regmap_power);
  369. dev_err(chip->dev,
  370. "Failed to allocate regmap_power: %d\n", ret);
  371. goto out;
  372. }
  373. i2c_set_clientdata(subchip->power_page, chip);
  374. /* PM800 block GPADC */
  375. subchip->gpadc_page = i2c_new_dummy(client->adapter,
  376. subchip->gpadc_page_addr);
  377. if (subchip->gpadc_page == NULL) {
  378. ret = -ENODEV;
  379. goto out;
  380. }
  381. subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
  382. &pm80x_regmap_config);
  383. if (IS_ERR(subchip->regmap_gpadc)) {
  384. ret = PTR_ERR(subchip->regmap_gpadc);
  385. dev_err(chip->dev,
  386. "Failed to allocate regmap_gpadc: %d\n", ret);
  387. goto out;
  388. }
  389. i2c_set_clientdata(subchip->gpadc_page, chip);
  390. out:
  391. return ret;
  392. }
  393. static void pm800_pages_exit(struct pm80x_chip *chip)
  394. {
  395. struct pm80x_subchip *subchip;
  396. subchip = chip->subchip;
  397. if (subchip && subchip->power_page)
  398. i2c_unregister_device(subchip->power_page);
  399. if (subchip && subchip->gpadc_page)
  400. i2c_unregister_device(subchip->gpadc_page);
  401. }
  402. static int device_800_init(struct pm80x_chip *chip,
  403. struct pm80x_platform_data *pdata)
  404. {
  405. int ret;
  406. unsigned int val;
  407. /*
  408. * alarm wake up bit will be clear in device_irq_init(),
  409. * read before that
  410. */
  411. ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
  412. if (ret < 0) {
  413. dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
  414. goto out;
  415. }
  416. if (val & PM800_ALARM_WAKEUP) {
  417. if (pdata && pdata->rtc)
  418. pdata->rtc->rtc_wakeup = 1;
  419. }
  420. ret = device_gpadc_init(chip, pdata);
  421. if (ret < 0) {
  422. dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
  423. goto out;
  424. }
  425. chip->regmap_irq_chip = &pm800_irq_chip;
  426. ret = device_irq_init_800(chip);
  427. if (ret < 0) {
  428. dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
  429. goto out;
  430. }
  431. ret = device_onkey_init(chip, pdata);
  432. if (ret) {
  433. dev_err(chip->dev, "Failed to add onkey subdev\n");
  434. goto out_dev;
  435. }
  436. ret = device_rtc_init(chip, pdata);
  437. if (ret) {
  438. dev_err(chip->dev, "Failed to add rtc subdev\n");
  439. goto out;
  440. }
  441. return 0;
  442. out_dev:
  443. mfd_remove_devices(chip->dev);
  444. device_irq_exit_800(chip);
  445. out:
  446. return ret;
  447. }
  448. static int pm800_probe(struct i2c_client *client,
  449. const struct i2c_device_id *id)
  450. {
  451. int ret = 0;
  452. struct pm80x_chip *chip;
  453. struct pm80x_platform_data *pdata = client->dev.platform_data;
  454. struct pm80x_subchip *subchip;
  455. ret = pm80x_init(client);
  456. if (ret) {
  457. dev_err(&client->dev, "pm800_init fail\n");
  458. goto out_init;
  459. }
  460. chip = i2c_get_clientdata(client);
  461. /* init subchip for PM800 */
  462. subchip =
  463. devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
  464. GFP_KERNEL);
  465. if (!subchip) {
  466. ret = -ENOMEM;
  467. goto err_subchip_alloc;
  468. }
  469. /* pm800 has 2 addtional pages to support power and gpadc. */
  470. subchip->power_page_addr = client->addr + 1;
  471. subchip->gpadc_page_addr = client->addr + 2;
  472. chip->subchip = subchip;
  473. ret = pm800_pages_init(chip);
  474. if (ret) {
  475. dev_err(&client->dev, "pm800_pages_init failed!\n");
  476. goto err_page_init;
  477. }
  478. ret = device_800_init(chip, pdata);
  479. if (ret) {
  480. dev_err(chip->dev, "Failed to initialize 88pm800 devices\n");
  481. goto err_device_init;
  482. }
  483. if (pdata->plat_config)
  484. pdata->plat_config(chip, pdata);
  485. return 0;
  486. err_device_init:
  487. pm800_pages_exit(chip);
  488. err_page_init:
  489. err_subchip_alloc:
  490. pm80x_deinit();
  491. out_init:
  492. return ret;
  493. }
  494. static int pm800_remove(struct i2c_client *client)
  495. {
  496. struct pm80x_chip *chip = i2c_get_clientdata(client);
  497. mfd_remove_devices(chip->dev);
  498. device_irq_exit_800(chip);
  499. pm800_pages_exit(chip);
  500. pm80x_deinit();
  501. return 0;
  502. }
  503. static struct i2c_driver pm800_driver = {
  504. .driver = {
  505. .name = "88PM800",
  506. .owner = THIS_MODULE,
  507. .pm = &pm80x_pm_ops,
  508. },
  509. .probe = pm800_probe,
  510. .remove = pm800_remove,
  511. .id_table = pm80x_id_table,
  512. };
  513. static int __init pm800_i2c_init(void)
  514. {
  515. return i2c_add_driver(&pm800_driver);
  516. }
  517. subsys_initcall(pm800_i2c_init);
  518. static void __exit pm800_i2c_exit(void)
  519. {
  520. i2c_del_driver(&pm800_driver);
  521. }
  522. module_exit(pm800_i2c_exit);
  523. MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
  524. MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
  525. MODULE_LICENSE("GPL");