ezkit.c 34 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/i2c.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/portmux.h>
  25. #include <asm/bfin_sdh.h>
  26. #include <mach/bf54x_keys.h>
  27. #include <linux/input.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "ADI BF548-EZKIT";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  37. #include <linux/usb/isp1760.h>
  38. static struct resource bfin_isp1760_resources[] = {
  39. [0] = {
  40. .start = 0x2C0C0000,
  41. .end = 0x2C0C0000 + 0xfffff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_PG7,
  46. .end = IRQ_PG7,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. static struct isp1760_platform_data isp1760_priv = {
  51. .is_isp1761 = 0,
  52. .bus_width_16 = 1,
  53. .port1_otg = 0,
  54. .analog_oc = 0,
  55. .dack_polarity_high = 0,
  56. .dreq_polarity_high = 0,
  57. };
  58. static struct platform_device bfin_isp1760_device = {
  59. .name = "isp1760",
  60. .id = 0,
  61. .dev = {
  62. .platform_data = &isp1760_priv,
  63. },
  64. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  65. .resource = bfin_isp1760_resources,
  66. };
  67. #endif
  68. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  69. #include <mach/bf54x-lq043.h>
  70. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  71. .width = 95,
  72. .height = 54,
  73. .xres = {480, 480, 480},
  74. .yres = {272, 272, 272},
  75. .bpp = {24, 24, 24},
  76. .disp = GPIO_PE3,
  77. };
  78. static struct resource bf54x_lq043_resources[] = {
  79. {
  80. .start = IRQ_EPPI0_ERR,
  81. .end = IRQ_EPPI0_ERR,
  82. .flags = IORESOURCE_IRQ,
  83. },
  84. };
  85. static struct platform_device bf54x_lq043_device = {
  86. .name = "bf54x-lq043",
  87. .id = -1,
  88. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  89. .resource = bf54x_lq043_resources,
  90. .dev = {
  91. .platform_data = &bf54x_lq043_data,
  92. },
  93. };
  94. #endif
  95. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  96. static const unsigned int bf548_keymap[] = {
  97. KEYVAL(0, 0, KEY_ENTER),
  98. KEYVAL(0, 1, KEY_HELP),
  99. KEYVAL(0, 2, KEY_0),
  100. KEYVAL(0, 3, KEY_BACKSPACE),
  101. KEYVAL(1, 0, KEY_TAB),
  102. KEYVAL(1, 1, KEY_9),
  103. KEYVAL(1, 2, KEY_8),
  104. KEYVAL(1, 3, KEY_7),
  105. KEYVAL(2, 0, KEY_DOWN),
  106. KEYVAL(2, 1, KEY_6),
  107. KEYVAL(2, 2, KEY_5),
  108. KEYVAL(2, 3, KEY_4),
  109. KEYVAL(3, 0, KEY_UP),
  110. KEYVAL(3, 1, KEY_3),
  111. KEYVAL(3, 2, KEY_2),
  112. KEYVAL(3, 3, KEY_1),
  113. };
  114. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  115. .rows = 4,
  116. .cols = 4,
  117. .keymap = bf548_keymap,
  118. .keymapsize = ARRAY_SIZE(bf548_keymap),
  119. .repeat = 0,
  120. .debounce_time = 5000, /* ns (5ms) */
  121. .coldrive_time = 1000, /* ns (1ms) */
  122. .keyup_test_interval = 50, /* ms (50ms) */
  123. };
  124. static struct resource bf54x_kpad_resources[] = {
  125. {
  126. .start = IRQ_KEY,
  127. .end = IRQ_KEY,
  128. .flags = IORESOURCE_IRQ,
  129. },
  130. };
  131. static struct platform_device bf54x_kpad_device = {
  132. .name = "bf54x-keys",
  133. .id = -1,
  134. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  135. .resource = bf54x_kpad_resources,
  136. .dev = {
  137. .platform_data = &bf54x_kpad_data,
  138. },
  139. };
  140. #endif
  141. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  142. #include <asm/bfin_rotary.h>
  143. static struct bfin_rotary_platform_data bfin_rotary_data = {
  144. /*.rotary_up_key = KEY_UP,*/
  145. /*.rotary_down_key = KEY_DOWN,*/
  146. .rotary_rel_code = REL_WHEEL,
  147. .rotary_button_key = KEY_ENTER,
  148. .debounce = 10, /* 0..17 */
  149. .mode = ROT_QUAD_ENC | ROT_DEBE,
  150. };
  151. static struct resource bfin_rotary_resources[] = {
  152. {
  153. .start = IRQ_CNT,
  154. .end = IRQ_CNT,
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. };
  158. static struct platform_device bfin_rotary_device = {
  159. .name = "bfin-rotary",
  160. .id = -1,
  161. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  162. .resource = bfin_rotary_resources,
  163. .dev = {
  164. .platform_data = &bfin_rotary_data,
  165. },
  166. };
  167. #endif
  168. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  169. #include <linux/input/adxl34x.h>
  170. static const struct adxl34x_platform_data adxl34x_info = {
  171. .x_axis_offset = 0,
  172. .y_axis_offset = 0,
  173. .z_axis_offset = 0,
  174. .tap_threshold = 0x31,
  175. .tap_duration = 0x10,
  176. .tap_latency = 0x60,
  177. .tap_window = 0xF0,
  178. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  179. .act_axis_control = 0xFF,
  180. .activity_threshold = 5,
  181. .inactivity_threshold = 3,
  182. .inactivity_time = 4,
  183. .free_fall_threshold = 0x7,
  184. .free_fall_time = 0x20,
  185. .data_rate = 0x8,
  186. .data_range = ADXL_FULL_RES,
  187. .ev_type = EV_ABS,
  188. .ev_code_x = ABS_X, /* EV_REL */
  189. .ev_code_y = ABS_Y, /* EV_REL */
  190. .ev_code_z = ABS_Z, /* EV_REL */
  191. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  192. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  193. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  194. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  195. .fifo_mode = ADXL_FIFO_STREAM,
  196. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  197. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  198. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  199. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  200. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  201. };
  202. #endif
  203. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  204. static struct platform_device rtc_device = {
  205. .name = "rtc-bfin",
  206. .id = -1,
  207. };
  208. #endif
  209. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  210. #ifdef CONFIG_SERIAL_BFIN_UART0
  211. static struct resource bfin_uart0_resources[] = {
  212. {
  213. .start = UART0_DLL,
  214. .end = UART0_RBR+2,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. {
  218. .start = IRQ_UART0_RX,
  219. .end = IRQ_UART0_RX+1,
  220. .flags = IORESOURCE_IRQ,
  221. },
  222. {
  223. .start = IRQ_UART0_ERROR,
  224. .end = IRQ_UART0_ERROR,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. {
  228. .start = CH_UART0_TX,
  229. .end = CH_UART0_TX,
  230. .flags = IORESOURCE_DMA,
  231. },
  232. {
  233. .start = CH_UART0_RX,
  234. .end = CH_UART0_RX,
  235. .flags = IORESOURCE_DMA,
  236. },
  237. };
  238. unsigned short bfin_uart0_peripherals[] = {
  239. P_UART0_TX, P_UART0_RX, 0
  240. };
  241. static struct platform_device bfin_uart0_device = {
  242. .name = "bfin-uart",
  243. .id = 0,
  244. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  245. .resource = bfin_uart0_resources,
  246. .dev = {
  247. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  248. },
  249. };
  250. #endif
  251. #ifdef CONFIG_SERIAL_BFIN_UART1
  252. static struct resource bfin_uart1_resources[] = {
  253. {
  254. .start = UART1_DLL,
  255. .end = UART1_RBR+2,
  256. .flags = IORESOURCE_MEM,
  257. },
  258. {
  259. .start = IRQ_UART1_RX,
  260. .end = IRQ_UART1_RX+1,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. {
  264. .start = IRQ_UART1_ERROR,
  265. .end = IRQ_UART1_ERROR,
  266. .flags = IORESOURCE_IRQ,
  267. },
  268. {
  269. .start = CH_UART1_TX,
  270. .end = CH_UART1_TX,
  271. .flags = IORESOURCE_DMA,
  272. },
  273. {
  274. .start = CH_UART1_RX,
  275. .end = CH_UART1_RX,
  276. .flags = IORESOURCE_DMA,
  277. },
  278. #ifdef CONFIG_BFIN_UART1_CTSRTS
  279. { /* CTS pin -- 0 means not supported */
  280. .start = GPIO_PE10,
  281. .end = GPIO_PE10,
  282. .flags = IORESOURCE_IO,
  283. },
  284. { /* RTS pin -- 0 means not supported */
  285. .start = GPIO_PE9,
  286. .end = GPIO_PE9,
  287. .flags = IORESOURCE_IO,
  288. },
  289. #endif
  290. };
  291. unsigned short bfin_uart1_peripherals[] = {
  292. P_UART1_TX, P_UART1_RX,
  293. #ifdef CONFIG_BFIN_UART1_CTSRTS
  294. P_UART1_RTS, P_UART1_CTS,
  295. #endif
  296. 0
  297. };
  298. static struct platform_device bfin_uart1_device = {
  299. .name = "bfin-uart",
  300. .id = 1,
  301. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  302. .resource = bfin_uart1_resources,
  303. .dev = {
  304. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  305. },
  306. };
  307. #endif
  308. #ifdef CONFIG_SERIAL_BFIN_UART2
  309. static struct resource bfin_uart2_resources[] = {
  310. {
  311. .start = UART2_DLL,
  312. .end = UART2_RBR+2,
  313. .flags = IORESOURCE_MEM,
  314. },
  315. {
  316. .start = IRQ_UART2_RX,
  317. .end = IRQ_UART2_RX+1,
  318. .flags = IORESOURCE_IRQ,
  319. },
  320. {
  321. .start = IRQ_UART2_ERROR,
  322. .end = IRQ_UART2_ERROR,
  323. .flags = IORESOURCE_IRQ,
  324. },
  325. {
  326. .start = CH_UART2_TX,
  327. .end = CH_UART2_TX,
  328. .flags = IORESOURCE_DMA,
  329. },
  330. {
  331. .start = CH_UART2_RX,
  332. .end = CH_UART2_RX,
  333. .flags = IORESOURCE_DMA,
  334. },
  335. };
  336. unsigned short bfin_uart2_peripherals[] = {
  337. P_UART2_TX, P_UART2_RX, 0
  338. };
  339. static struct platform_device bfin_uart2_device = {
  340. .name = "bfin-uart",
  341. .id = 2,
  342. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  343. .resource = bfin_uart2_resources,
  344. .dev = {
  345. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  346. },
  347. };
  348. #endif
  349. #ifdef CONFIG_SERIAL_BFIN_UART3
  350. static struct resource bfin_uart3_resources[] = {
  351. {
  352. .start = UART3_DLL,
  353. .end = UART3_RBR+2,
  354. .flags = IORESOURCE_MEM,
  355. },
  356. {
  357. .start = IRQ_UART3_RX,
  358. .end = IRQ_UART3_RX+1,
  359. .flags = IORESOURCE_IRQ,
  360. },
  361. {
  362. .start = IRQ_UART3_ERROR,
  363. .end = IRQ_UART3_ERROR,
  364. .flags = IORESOURCE_IRQ,
  365. },
  366. {
  367. .start = CH_UART3_TX,
  368. .end = CH_UART3_TX,
  369. .flags = IORESOURCE_DMA,
  370. },
  371. {
  372. .start = CH_UART3_RX,
  373. .end = CH_UART3_RX,
  374. .flags = IORESOURCE_DMA,
  375. },
  376. #ifdef CONFIG_BFIN_UART3_CTSRTS
  377. { /* CTS pin -- 0 means not supported */
  378. .start = GPIO_PB3,
  379. .end = GPIO_PB3,
  380. .flags = IORESOURCE_IO,
  381. },
  382. { /* RTS pin -- 0 means not supported */
  383. .start = GPIO_PB2,
  384. .end = GPIO_PB2,
  385. .flags = IORESOURCE_IO,
  386. },
  387. #endif
  388. };
  389. unsigned short bfin_uart3_peripherals[] = {
  390. P_UART3_TX, P_UART3_RX,
  391. #ifdef CONFIG_BFIN_UART3_CTSRTS
  392. P_UART3_RTS, P_UART3_CTS,
  393. #endif
  394. 0
  395. };
  396. static struct platform_device bfin_uart3_device = {
  397. .name = "bfin-uart",
  398. .id = 3,
  399. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  400. .resource = bfin_uart3_resources,
  401. .dev = {
  402. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  403. },
  404. };
  405. #endif
  406. #endif
  407. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  408. #ifdef CONFIG_BFIN_SIR0
  409. static struct resource bfin_sir0_resources[] = {
  410. {
  411. .start = 0xFFC00400,
  412. .end = 0xFFC004FF,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = IRQ_UART0_RX,
  417. .end = IRQ_UART0_RX+1,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. {
  421. .start = CH_UART0_RX,
  422. .end = CH_UART0_RX+1,
  423. .flags = IORESOURCE_DMA,
  424. },
  425. };
  426. static struct platform_device bfin_sir0_device = {
  427. .name = "bfin_sir",
  428. .id = 0,
  429. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  430. .resource = bfin_sir0_resources,
  431. };
  432. #endif
  433. #ifdef CONFIG_BFIN_SIR1
  434. static struct resource bfin_sir1_resources[] = {
  435. {
  436. .start = 0xFFC02000,
  437. .end = 0xFFC020FF,
  438. .flags = IORESOURCE_MEM,
  439. },
  440. {
  441. .start = IRQ_UART1_RX,
  442. .end = IRQ_UART1_RX+1,
  443. .flags = IORESOURCE_IRQ,
  444. },
  445. {
  446. .start = CH_UART1_RX,
  447. .end = CH_UART1_RX+1,
  448. .flags = IORESOURCE_DMA,
  449. },
  450. };
  451. static struct platform_device bfin_sir1_device = {
  452. .name = "bfin_sir",
  453. .id = 1,
  454. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  455. .resource = bfin_sir1_resources,
  456. };
  457. #endif
  458. #ifdef CONFIG_BFIN_SIR2
  459. static struct resource bfin_sir2_resources[] = {
  460. {
  461. .start = 0xFFC02100,
  462. .end = 0xFFC021FF,
  463. .flags = IORESOURCE_MEM,
  464. },
  465. {
  466. .start = IRQ_UART2_RX,
  467. .end = IRQ_UART2_RX+1,
  468. .flags = IORESOURCE_IRQ,
  469. },
  470. {
  471. .start = CH_UART2_RX,
  472. .end = CH_UART2_RX+1,
  473. .flags = IORESOURCE_DMA,
  474. },
  475. };
  476. static struct platform_device bfin_sir2_device = {
  477. .name = "bfin_sir",
  478. .id = 2,
  479. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  480. .resource = bfin_sir2_resources,
  481. };
  482. #endif
  483. #ifdef CONFIG_BFIN_SIR3
  484. static struct resource bfin_sir3_resources[] = {
  485. {
  486. .start = 0xFFC03100,
  487. .end = 0xFFC031FF,
  488. .flags = IORESOURCE_MEM,
  489. },
  490. {
  491. .start = IRQ_UART3_RX,
  492. .end = IRQ_UART3_RX+1,
  493. .flags = IORESOURCE_IRQ,
  494. },
  495. {
  496. .start = CH_UART3_RX,
  497. .end = CH_UART3_RX+1,
  498. .flags = IORESOURCE_DMA,
  499. },
  500. };
  501. static struct platform_device bfin_sir3_device = {
  502. .name = "bfin_sir",
  503. .id = 3,
  504. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  505. .resource = bfin_sir3_resources,
  506. };
  507. #endif
  508. #endif
  509. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  510. #include <linux/smsc911x.h>
  511. static struct resource smsc911x_resources[] = {
  512. {
  513. .name = "smsc911x-memory",
  514. .start = 0x24000000,
  515. .end = 0x24000000 + 0xFF,
  516. .flags = IORESOURCE_MEM,
  517. },
  518. {
  519. .start = IRQ_PE8,
  520. .end = IRQ_PE8,
  521. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  522. },
  523. };
  524. static struct smsc911x_platform_config smsc911x_config = {
  525. .flags = SMSC911X_USE_32BIT,
  526. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  527. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  528. .phy_interface = PHY_INTERFACE_MODE_MII,
  529. };
  530. static struct platform_device smsc911x_device = {
  531. .name = "smsc911x",
  532. .id = 0,
  533. .num_resources = ARRAY_SIZE(smsc911x_resources),
  534. .resource = smsc911x_resources,
  535. .dev = {
  536. .platform_data = &smsc911x_config,
  537. },
  538. };
  539. #endif
  540. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  541. static struct resource musb_resources[] = {
  542. [0] = {
  543. .start = 0xFFC03C00,
  544. .end = 0xFFC040FF,
  545. .flags = IORESOURCE_MEM,
  546. },
  547. [1] = { /* general IRQ */
  548. .start = IRQ_USB_INT0,
  549. .end = IRQ_USB_INT0,
  550. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  551. },
  552. [2] = { /* DMA IRQ */
  553. .start = IRQ_USB_DMA,
  554. .end = IRQ_USB_DMA,
  555. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  556. },
  557. };
  558. static struct musb_hdrc_config musb_config = {
  559. .multipoint = 0,
  560. .dyn_fifo = 0,
  561. .soft_con = 1,
  562. .dma = 1,
  563. .num_eps = 8,
  564. .dma_channels = 8,
  565. .gpio_vrsel = GPIO_PE7,
  566. /* Some custom boards need to be active low, just set it to "0"
  567. * if it is the case.
  568. */
  569. .gpio_vrsel_active = 1,
  570. };
  571. static struct musb_hdrc_platform_data musb_plat = {
  572. #if defined(CONFIG_USB_MUSB_OTG)
  573. .mode = MUSB_OTG,
  574. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  575. .mode = MUSB_HOST,
  576. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  577. .mode = MUSB_PERIPHERAL,
  578. #endif
  579. .config = &musb_config,
  580. };
  581. static u64 musb_dmamask = ~(u32)0;
  582. static struct platform_device musb_device = {
  583. .name = "musb_hdrc",
  584. .id = 0,
  585. .dev = {
  586. .dma_mask = &musb_dmamask,
  587. .coherent_dma_mask = 0xffffffff,
  588. .platform_data = &musb_plat,
  589. },
  590. .num_resources = ARRAY_SIZE(musb_resources),
  591. .resource = musb_resources,
  592. };
  593. #endif
  594. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  595. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  596. static struct resource bfin_sport0_uart_resources[] = {
  597. {
  598. .start = SPORT0_TCR1,
  599. .end = SPORT0_MRCS3+4,
  600. .flags = IORESOURCE_MEM,
  601. },
  602. {
  603. .start = IRQ_SPORT0_RX,
  604. .end = IRQ_SPORT0_RX+1,
  605. .flags = IORESOURCE_IRQ,
  606. },
  607. {
  608. .start = IRQ_SPORT0_ERROR,
  609. .end = IRQ_SPORT0_ERROR,
  610. .flags = IORESOURCE_IRQ,
  611. },
  612. };
  613. unsigned short bfin_sport0_peripherals[] = {
  614. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  615. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  616. };
  617. static struct platform_device bfin_sport0_uart_device = {
  618. .name = "bfin-sport-uart",
  619. .id = 0,
  620. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  621. .resource = bfin_sport0_uart_resources,
  622. .dev = {
  623. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  624. },
  625. };
  626. #endif
  627. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  628. static struct resource bfin_sport1_uart_resources[] = {
  629. {
  630. .start = SPORT1_TCR1,
  631. .end = SPORT1_MRCS3+4,
  632. .flags = IORESOURCE_MEM,
  633. },
  634. {
  635. .start = IRQ_SPORT1_RX,
  636. .end = IRQ_SPORT1_RX+1,
  637. .flags = IORESOURCE_IRQ,
  638. },
  639. {
  640. .start = IRQ_SPORT1_ERROR,
  641. .end = IRQ_SPORT1_ERROR,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. };
  645. unsigned short bfin_sport1_peripherals[] = {
  646. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  647. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  648. };
  649. static struct platform_device bfin_sport1_uart_device = {
  650. .name = "bfin-sport-uart",
  651. .id = 1,
  652. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  653. .resource = bfin_sport1_uart_resources,
  654. .dev = {
  655. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  656. },
  657. };
  658. #endif
  659. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  660. static struct resource bfin_sport2_uart_resources[] = {
  661. {
  662. .start = SPORT2_TCR1,
  663. .end = SPORT2_MRCS3+4,
  664. .flags = IORESOURCE_MEM,
  665. },
  666. {
  667. .start = IRQ_SPORT2_RX,
  668. .end = IRQ_SPORT2_RX+1,
  669. .flags = IORESOURCE_IRQ,
  670. },
  671. {
  672. .start = IRQ_SPORT2_ERROR,
  673. .end = IRQ_SPORT2_ERROR,
  674. .flags = IORESOURCE_IRQ,
  675. },
  676. };
  677. unsigned short bfin_sport2_peripherals[] = {
  678. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  679. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  680. };
  681. static struct platform_device bfin_sport2_uart_device = {
  682. .name = "bfin-sport-uart",
  683. .id = 2,
  684. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  685. .resource = bfin_sport2_uart_resources,
  686. .dev = {
  687. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  688. },
  689. };
  690. #endif
  691. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  692. static struct resource bfin_sport3_uart_resources[] = {
  693. {
  694. .start = SPORT3_TCR1,
  695. .end = SPORT3_MRCS3+4,
  696. .flags = IORESOURCE_MEM,
  697. },
  698. {
  699. .start = IRQ_SPORT3_RX,
  700. .end = IRQ_SPORT3_RX+1,
  701. .flags = IORESOURCE_IRQ,
  702. },
  703. {
  704. .start = IRQ_SPORT3_ERROR,
  705. .end = IRQ_SPORT3_ERROR,
  706. .flags = IORESOURCE_IRQ,
  707. },
  708. };
  709. unsigned short bfin_sport3_peripherals[] = {
  710. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  711. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  712. };
  713. static struct platform_device bfin_sport3_uart_device = {
  714. .name = "bfin-sport-uart",
  715. .id = 3,
  716. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  717. .resource = bfin_sport3_uart_resources,
  718. .dev = {
  719. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  720. },
  721. };
  722. #endif
  723. #endif
  724. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  725. unsigned short bfin_can_peripherals[] = {
  726. P_CAN0_RX, P_CAN0_TX, 0
  727. };
  728. static struct resource bfin_can_resources[] = {
  729. {
  730. .start = 0xFFC02A00,
  731. .end = 0xFFC02FFF,
  732. .flags = IORESOURCE_MEM,
  733. },
  734. {
  735. .start = IRQ_CAN0_RX,
  736. .end = IRQ_CAN0_RX,
  737. .flags = IORESOURCE_IRQ,
  738. },
  739. {
  740. .start = IRQ_CAN0_TX,
  741. .end = IRQ_CAN0_TX,
  742. .flags = IORESOURCE_IRQ,
  743. },
  744. {
  745. .start = IRQ_CAN0_ERROR,
  746. .end = IRQ_CAN0_ERROR,
  747. .flags = IORESOURCE_IRQ,
  748. },
  749. };
  750. static struct platform_device bfin_can_device = {
  751. .name = "bfin_can",
  752. .num_resources = ARRAY_SIZE(bfin_can_resources),
  753. .resource = bfin_can_resources,
  754. .dev = {
  755. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  756. },
  757. };
  758. #endif
  759. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  760. static struct resource bfin_atapi_resources[] = {
  761. {
  762. .start = 0xFFC03800,
  763. .end = 0xFFC0386F,
  764. .flags = IORESOURCE_MEM,
  765. },
  766. {
  767. .start = IRQ_ATAPI_ERR,
  768. .end = IRQ_ATAPI_ERR,
  769. .flags = IORESOURCE_IRQ,
  770. },
  771. };
  772. static struct platform_device bfin_atapi_device = {
  773. .name = "pata-bf54x",
  774. .id = -1,
  775. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  776. .resource = bfin_atapi_resources,
  777. };
  778. #endif
  779. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  780. static struct mtd_partition partition_info[] = {
  781. {
  782. .name = "linux kernel(nand)",
  783. .offset = 0,
  784. .size = 4 * 1024 * 1024,
  785. },
  786. {
  787. .name = "file system(nand)",
  788. .offset = MTDPART_OFS_APPEND,
  789. .size = MTDPART_SIZ_FULL,
  790. },
  791. };
  792. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  793. .data_width = NFC_NWIDTH_8,
  794. .partitions = partition_info,
  795. .nr_partitions = ARRAY_SIZE(partition_info),
  796. .rd_dly = 3,
  797. .wr_dly = 3,
  798. };
  799. static struct resource bf5xx_nand_resources[] = {
  800. {
  801. .start = 0xFFC03B00,
  802. .end = 0xFFC03B4F,
  803. .flags = IORESOURCE_MEM,
  804. },
  805. {
  806. .start = CH_NFC,
  807. .end = CH_NFC,
  808. .flags = IORESOURCE_IRQ,
  809. },
  810. };
  811. static struct platform_device bf5xx_nand_device = {
  812. .name = "bf5xx-nand",
  813. .id = 0,
  814. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  815. .resource = bf5xx_nand_resources,
  816. .dev = {
  817. .platform_data = &bf5xx_nand_platform,
  818. },
  819. };
  820. #endif
  821. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  822. static struct bfin_sd_host bfin_sdh_data = {
  823. .dma_chan = CH_SDH,
  824. .irq_int0 = IRQ_SDH_MASK0,
  825. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  826. };
  827. static struct platform_device bf54x_sdh_device = {
  828. .name = "bfin-sdh",
  829. .id = 0,
  830. .dev = {
  831. .platform_data = &bfin_sdh_data,
  832. },
  833. };
  834. #endif
  835. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  836. static struct mtd_partition ezkit_partitions[] = {
  837. {
  838. .name = "bootloader(nor)",
  839. .size = 0x40000,
  840. .offset = 0,
  841. }, {
  842. .name = "linux kernel(nor)",
  843. .size = 0x400000,
  844. .offset = MTDPART_OFS_APPEND,
  845. }, {
  846. .name = "file system(nor)",
  847. .size = MTDPART_SIZ_FULL,
  848. .offset = MTDPART_OFS_APPEND,
  849. }
  850. };
  851. static struct physmap_flash_data ezkit_flash_data = {
  852. .width = 2,
  853. .parts = ezkit_partitions,
  854. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  855. };
  856. static struct resource ezkit_flash_resource = {
  857. .start = 0x20000000,
  858. .end = 0x21ffffff,
  859. .flags = IORESOURCE_MEM,
  860. };
  861. static struct platform_device ezkit_flash_device = {
  862. .name = "physmap-flash",
  863. .id = 0,
  864. .dev = {
  865. .platform_data = &ezkit_flash_data,
  866. },
  867. .num_resources = 1,
  868. .resource = &ezkit_flash_resource,
  869. };
  870. #endif
  871. #if defined(CONFIG_MTD_M25P80) \
  872. || defined(CONFIG_MTD_M25P80_MODULE)
  873. /* SPI flash chip (m25p16) */
  874. static struct mtd_partition bfin_spi_flash_partitions[] = {
  875. {
  876. .name = "bootloader(spi)",
  877. .size = 0x00040000,
  878. .offset = 0,
  879. .mask_flags = MTD_CAP_ROM
  880. }, {
  881. .name = "linux kernel(spi)",
  882. .size = MTDPART_SIZ_FULL,
  883. .offset = MTDPART_OFS_APPEND,
  884. }
  885. };
  886. static struct flash_platform_data bfin_spi_flash_data = {
  887. .name = "m25p80",
  888. .parts = bfin_spi_flash_partitions,
  889. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  890. .type = "m25p16",
  891. };
  892. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  893. .enable_dma = 0, /* use dma transfer with this chip*/
  894. .bits_per_word = 8,
  895. };
  896. #endif
  897. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  898. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  899. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  900. .enable_dma = 0,
  901. .bits_per_word = 16,
  902. };
  903. #endif
  904. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  905. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  906. .enable_dma = 0,
  907. .bits_per_word = 16,
  908. };
  909. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  910. .model = 7877,
  911. .vref_delay_usecs = 50, /* internal, no capacitor */
  912. .x_plate_ohms = 419,
  913. .y_plate_ohms = 486,
  914. .pressure_max = 1000,
  915. .pressure_min = 0,
  916. .stopacq_polarity = 1,
  917. .first_conversion_delay = 3,
  918. .acquisition_time = 1,
  919. .averaging = 1,
  920. .pen_down_acc_interval = 1,
  921. };
  922. #endif
  923. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  924. static struct bfin5xx_spi_chip spidev_chip_info = {
  925. .enable_dma = 0,
  926. .bits_per_word = 8,
  927. };
  928. #endif
  929. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  930. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  931. .enable_dma = 0, /* use dma transfer with this chip*/
  932. .bits_per_word = 8,
  933. };
  934. #endif
  935. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  936. #if defined(CONFIG_MTD_M25P80) \
  937. || defined(CONFIG_MTD_M25P80_MODULE)
  938. {
  939. /* the modalias must be the same as spi device driver name */
  940. .modalias = "m25p80", /* Name of spi_driver for this device */
  941. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  942. .bus_num = 0, /* Framework bus number */
  943. .chip_select = 1, /* SPI_SSEL1*/
  944. .platform_data = &bfin_spi_flash_data,
  945. .controller_data = &spi_flash_chip_info,
  946. .mode = SPI_MODE_3,
  947. },
  948. #endif
  949. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  950. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  951. {
  952. .modalias = "ad183x",
  953. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  954. .bus_num = 1,
  955. .chip_select = 4,
  956. .controller_data = &ad1836_spi_chip_info,
  957. },
  958. #endif
  959. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  960. {
  961. .modalias = "ad7877",
  962. .platform_data = &bfin_ad7877_ts_info,
  963. .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
  964. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  965. .bus_num = 0,
  966. .chip_select = 2,
  967. .controller_data = &spi_ad7877_chip_info,
  968. },
  969. #endif
  970. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  971. {
  972. .modalias = "spidev",
  973. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  974. .bus_num = 0,
  975. .chip_select = 1,
  976. .controller_data = &spidev_chip_info,
  977. },
  978. #endif
  979. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  980. {
  981. .modalias = "adxl34x",
  982. .platform_data = &adxl34x_info,
  983. .irq = IRQ_PC5,
  984. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  985. .bus_num = 1,
  986. .chip_select = 2,
  987. .controller_data = &spi_adxl34x_chip_info,
  988. .mode = SPI_MODE_3,
  989. },
  990. #endif
  991. };
  992. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  993. /* SPI (0) */
  994. static struct resource bfin_spi0_resource[] = {
  995. [0] = {
  996. .start = SPI0_REGBASE,
  997. .end = SPI0_REGBASE + 0xFF,
  998. .flags = IORESOURCE_MEM,
  999. },
  1000. [1] = {
  1001. .start = CH_SPI0,
  1002. .end = CH_SPI0,
  1003. .flags = IORESOURCE_DMA,
  1004. },
  1005. [2] = {
  1006. .start = IRQ_SPI0,
  1007. .end = IRQ_SPI0,
  1008. .flags = IORESOURCE_IRQ,
  1009. }
  1010. };
  1011. /* SPI (1) */
  1012. static struct resource bfin_spi1_resource[] = {
  1013. [0] = {
  1014. .start = SPI1_REGBASE,
  1015. .end = SPI1_REGBASE + 0xFF,
  1016. .flags = IORESOURCE_MEM,
  1017. },
  1018. [1] = {
  1019. .start = CH_SPI1,
  1020. .end = CH_SPI1,
  1021. .flags = IORESOURCE_DMA,
  1022. },
  1023. [2] = {
  1024. .start = IRQ_SPI1,
  1025. .end = IRQ_SPI1,
  1026. .flags = IORESOURCE_IRQ,
  1027. }
  1028. };
  1029. /* SPI controller data */
  1030. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  1031. .num_chipselect = 4,
  1032. .enable_dma = 1, /* master has the ability to do dma transfer */
  1033. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1034. };
  1035. static struct platform_device bf54x_spi_master0 = {
  1036. .name = "bfin-spi",
  1037. .id = 0, /* Bus number */
  1038. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1039. .resource = bfin_spi0_resource,
  1040. .dev = {
  1041. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  1042. },
  1043. };
  1044. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  1045. .num_chipselect = 4,
  1046. .enable_dma = 1, /* master has the ability to do dma transfer */
  1047. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  1048. };
  1049. static struct platform_device bf54x_spi_master1 = {
  1050. .name = "bfin-spi",
  1051. .id = 1, /* Bus number */
  1052. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  1053. .resource = bfin_spi1_resource,
  1054. .dev = {
  1055. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  1056. },
  1057. };
  1058. #endif /* spi master and devices */
  1059. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1060. static struct resource bfin_twi0_resource[] = {
  1061. [0] = {
  1062. .start = TWI0_REGBASE,
  1063. .end = TWI0_REGBASE + 0xFF,
  1064. .flags = IORESOURCE_MEM,
  1065. },
  1066. [1] = {
  1067. .start = IRQ_TWI0,
  1068. .end = IRQ_TWI0,
  1069. .flags = IORESOURCE_IRQ,
  1070. },
  1071. };
  1072. static struct platform_device i2c_bfin_twi0_device = {
  1073. .name = "i2c-bfin-twi",
  1074. .id = 0,
  1075. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1076. .resource = bfin_twi0_resource,
  1077. };
  1078. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1079. static struct resource bfin_twi1_resource[] = {
  1080. [0] = {
  1081. .start = TWI1_REGBASE,
  1082. .end = TWI1_REGBASE + 0xFF,
  1083. .flags = IORESOURCE_MEM,
  1084. },
  1085. [1] = {
  1086. .start = IRQ_TWI1,
  1087. .end = IRQ_TWI1,
  1088. .flags = IORESOURCE_IRQ,
  1089. },
  1090. };
  1091. static struct platform_device i2c_bfin_twi1_device = {
  1092. .name = "i2c-bfin-twi",
  1093. .id = 1,
  1094. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  1095. .resource = bfin_twi1_resource,
  1096. };
  1097. #endif
  1098. #endif
  1099. static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
  1100. };
  1101. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1102. static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
  1103. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1104. {
  1105. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1106. },
  1107. #endif
  1108. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1109. {
  1110. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1111. .irq = 212,
  1112. },
  1113. #endif
  1114. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1115. {
  1116. I2C_BOARD_INFO("adxl34x", 0x53),
  1117. .irq = IRQ_PC5,
  1118. .platform_data = (void *)&adxl34x_info,
  1119. },
  1120. #endif
  1121. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1122. {
  1123. I2C_BOARD_INFO("ad5252", 0x2f),
  1124. },
  1125. #endif
  1126. };
  1127. #endif
  1128. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1129. #include <linux/gpio_keys.h>
  1130. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  1131. {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
  1132. {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
  1133. {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
  1134. {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
  1135. };
  1136. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  1137. .buttons = bfin_gpio_keys_table,
  1138. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  1139. };
  1140. static struct platform_device bfin_device_gpiokeys = {
  1141. .name = "gpio-keys",
  1142. .dev = {
  1143. .platform_data = &bfin_gpio_keys_data,
  1144. },
  1145. };
  1146. #endif
  1147. static const unsigned int cclk_vlev_datasheet[] =
  1148. {
  1149. /*
  1150. * Internal VLEV BF54XSBBC1533
  1151. ****temporarily using these values until data sheet is updated
  1152. */
  1153. VRPAIR(VLEV_085, 150000000),
  1154. VRPAIR(VLEV_090, 250000000),
  1155. VRPAIR(VLEV_110, 276000000),
  1156. VRPAIR(VLEV_115, 301000000),
  1157. VRPAIR(VLEV_120, 525000000),
  1158. VRPAIR(VLEV_125, 550000000),
  1159. VRPAIR(VLEV_130, 600000000),
  1160. };
  1161. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1162. .tuple_tab = cclk_vlev_datasheet,
  1163. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1164. .vr_settling_time = 25 /* us */,
  1165. };
  1166. static struct platform_device bfin_dpmc = {
  1167. .name = "bfin dpmc",
  1168. .dev = {
  1169. .platform_data = &bfin_dmpc_vreg_data,
  1170. },
  1171. };
  1172. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1173. static struct platform_device bfin_i2s = {
  1174. .name = "bfin-i2s",
  1175. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1176. /* TODO: add platform data here */
  1177. };
  1178. #endif
  1179. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1180. static struct platform_device bfin_tdm = {
  1181. .name = "bfin-tdm",
  1182. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1183. /* TODO: add platform data here */
  1184. };
  1185. #endif
  1186. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1187. static struct platform_device bfin_ac97 = {
  1188. .name = "bfin-ac97",
  1189. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1190. /* TODO: add platform data here */
  1191. };
  1192. #endif
  1193. static struct platform_device *ezkit_devices[] __initdata = {
  1194. &bfin_dpmc,
  1195. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1196. &rtc_device,
  1197. #endif
  1198. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1199. #ifdef CONFIG_SERIAL_BFIN_UART0
  1200. &bfin_uart0_device,
  1201. #endif
  1202. #ifdef CONFIG_SERIAL_BFIN_UART1
  1203. &bfin_uart1_device,
  1204. #endif
  1205. #ifdef CONFIG_SERIAL_BFIN_UART2
  1206. &bfin_uart2_device,
  1207. #endif
  1208. #ifdef CONFIG_SERIAL_BFIN_UART3
  1209. &bfin_uart3_device,
  1210. #endif
  1211. #endif
  1212. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1213. #ifdef CONFIG_BFIN_SIR0
  1214. &bfin_sir0_device,
  1215. #endif
  1216. #ifdef CONFIG_BFIN_SIR1
  1217. &bfin_sir1_device,
  1218. #endif
  1219. #ifdef CONFIG_BFIN_SIR2
  1220. &bfin_sir2_device,
  1221. #endif
  1222. #ifdef CONFIG_BFIN_SIR3
  1223. &bfin_sir3_device,
  1224. #endif
  1225. #endif
  1226. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  1227. &bf54x_lq043_device,
  1228. #endif
  1229. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  1230. &smsc911x_device,
  1231. #endif
  1232. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1233. &musb_device,
  1234. #endif
  1235. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1236. &bfin_isp1760_device,
  1237. #endif
  1238. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1239. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1240. &bfin_sport0_uart_device,
  1241. #endif
  1242. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1243. &bfin_sport1_uart_device,
  1244. #endif
  1245. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1246. &bfin_sport2_uart_device,
  1247. #endif
  1248. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1249. &bfin_sport3_uart_device,
  1250. #endif
  1251. #endif
  1252. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1253. &bfin_can_device,
  1254. #endif
  1255. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  1256. &bfin_atapi_device,
  1257. #endif
  1258. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1259. &bf5xx_nand_device,
  1260. #endif
  1261. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1262. &bf54x_sdh_device,
  1263. #endif
  1264. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1265. &bf54x_spi_master0,
  1266. &bf54x_spi_master1,
  1267. #endif
  1268. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  1269. &bf54x_kpad_device,
  1270. #endif
  1271. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1272. &bfin_rotary_device,
  1273. #endif
  1274. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1275. &i2c_bfin_twi0_device,
  1276. #if !defined(CONFIG_BF542)
  1277. &i2c_bfin_twi1_device,
  1278. #endif
  1279. #endif
  1280. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1281. &bfin_device_gpiokeys,
  1282. #endif
  1283. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1284. &ezkit_flash_device,
  1285. #endif
  1286. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1287. &bfin_i2s,
  1288. #endif
  1289. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1290. &bfin_tdm,
  1291. #endif
  1292. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1293. &bfin_ac97,
  1294. #endif
  1295. };
  1296. static int __init ezkit_init(void)
  1297. {
  1298. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1299. i2c_register_board_info(0, bfin_i2c_board_info0,
  1300. ARRAY_SIZE(bfin_i2c_board_info0));
  1301. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1302. i2c_register_board_info(1, bfin_i2c_board_info1,
  1303. ARRAY_SIZE(bfin_i2c_board_info1));
  1304. #endif
  1305. platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
  1306. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1307. return 0;
  1308. }
  1309. arch_initcall(ezkit_init);
  1310. static struct platform_device *ezkit_early_devices[] __initdata = {
  1311. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1312. #ifdef CONFIG_SERIAL_BFIN_UART0
  1313. &bfin_uart0_device,
  1314. #endif
  1315. #ifdef CONFIG_SERIAL_BFIN_UART1
  1316. &bfin_uart1_device,
  1317. #endif
  1318. #ifdef CONFIG_SERIAL_BFIN_UART2
  1319. &bfin_uart2_device,
  1320. #endif
  1321. #ifdef CONFIG_SERIAL_BFIN_UART3
  1322. &bfin_uart3_device,
  1323. #endif
  1324. #endif
  1325. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1326. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1327. &bfin_sport0_uart_device,
  1328. #endif
  1329. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1330. &bfin_sport1_uart_device,
  1331. #endif
  1332. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1333. &bfin_sport2_uart_device,
  1334. #endif
  1335. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1336. &bfin_sport3_uart_device,
  1337. #endif
  1338. #endif
  1339. };
  1340. void __init native_machine_early_platform_add_devices(void)
  1341. {
  1342. printk(KERN_INFO "register early platform devices\n");
  1343. early_platform_add_devices(ezkit_early_devices,
  1344. ARRAY_SIZE(ezkit_early_devices));
  1345. }