falcon_boards.c 20 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2007-2008 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/rtnetlink.h>
  10. #include "net_driver.h"
  11. #include "phy.h"
  12. #include "efx.h"
  13. #include "falcon.h"
  14. #include "regs.h"
  15. #include "io.h"
  16. #include "workarounds.h"
  17. /* Macros for unpacking the board revision */
  18. /* The revision info is in host byte order. */
  19. #define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
  20. #define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
  21. #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
  22. /* Board types */
  23. #define FALCON_BOARD_SFE4001 0x01
  24. #define FALCON_BOARD_SFE4002 0x02
  25. #define FALCON_BOARD_SFN4111T 0x51
  26. #define FALCON_BOARD_SFN4112F 0x52
  27. /*****************************************************************************
  28. * Support for LM87 sensor chip used on several boards
  29. */
  30. #define LM87_REG_ALARMS1 0x41
  31. #define LM87_REG_ALARMS2 0x42
  32. #define LM87_IN_LIMITS(nr, _min, _max) \
  33. 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
  34. #define LM87_AIN_LIMITS(nr, _min, _max) \
  35. 0x3B + (nr), _max, 0x1A + (nr), _min
  36. #define LM87_TEMP_INT_LIMITS(_min, _max) \
  37. 0x39, _max, 0x3A, _min
  38. #define LM87_TEMP_EXT1_LIMITS(_min, _max) \
  39. 0x37, _max, 0x38, _min
  40. #define LM87_ALARM_TEMP_INT 0x10
  41. #define LM87_ALARM_TEMP_EXT1 0x20
  42. #if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
  43. static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
  44. const u8 *reg_values)
  45. {
  46. struct i2c_client *client = i2c_new_device(&efx->i2c_adap, info);
  47. int rc;
  48. if (!client)
  49. return -EIO;
  50. while (*reg_values) {
  51. u8 reg = *reg_values++;
  52. u8 value = *reg_values++;
  53. rc = i2c_smbus_write_byte_data(client, reg, value);
  54. if (rc)
  55. goto err;
  56. }
  57. efx->board_info.hwmon_client = client;
  58. return 0;
  59. err:
  60. i2c_unregister_device(client);
  61. return rc;
  62. }
  63. static void efx_fini_lm87(struct efx_nic *efx)
  64. {
  65. i2c_unregister_device(efx->board_info.hwmon_client);
  66. }
  67. static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
  68. {
  69. struct i2c_client *client = efx->board_info.hwmon_client;
  70. s32 alarms1, alarms2;
  71. /* If link is up then do not monitor temperature */
  72. if (EFX_WORKAROUND_7884(efx) && efx->link_up)
  73. return 0;
  74. alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
  75. alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
  76. if (alarms1 < 0)
  77. return alarms1;
  78. if (alarms2 < 0)
  79. return alarms2;
  80. alarms1 &= mask;
  81. alarms2 &= mask >> 8;
  82. if (alarms1 || alarms2) {
  83. EFX_ERR(efx,
  84. "LM87 detected a hardware failure (status %02x:%02x)"
  85. "%s%s\n",
  86. alarms1, alarms2,
  87. (alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
  88. (alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
  89. return -ERANGE;
  90. }
  91. return 0;
  92. }
  93. #else /* !CONFIG_SENSORS_LM87 */
  94. static inline int
  95. efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
  96. const u8 *reg_values)
  97. {
  98. return 0;
  99. }
  100. static inline void efx_fini_lm87(struct efx_nic *efx)
  101. {
  102. }
  103. static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
  104. {
  105. return 0;
  106. }
  107. #endif /* CONFIG_SENSORS_LM87 */
  108. /*****************************************************************************
  109. * Support for the SFE4001 and SFN4111T NICs.
  110. *
  111. * The SFE4001 does not power-up fully at reset due to its high power
  112. * consumption. We control its power via a PCA9539 I/O expander.
  113. * Both boards have a MAX6647 temperature monitor which we expose to
  114. * the lm90 driver.
  115. *
  116. * This also provides minimal support for reflashing the PHY, which is
  117. * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
  118. * On SFE4001 rev A2 and later this is connected to the 3V3X output of
  119. * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
  120. * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
  121. * exclusive with the network device being open.
  122. */
  123. /**************************************************************************
  124. * Support for I2C IO Expander device on SFE40001
  125. */
  126. #define PCA9539 0x74
  127. #define P0_IN 0x00
  128. #define P0_OUT 0x02
  129. #define P0_INVERT 0x04
  130. #define P0_CONFIG 0x06
  131. #define P0_EN_1V0X_LBN 0
  132. #define P0_EN_1V0X_WIDTH 1
  133. #define P0_EN_1V2_LBN 1
  134. #define P0_EN_1V2_WIDTH 1
  135. #define P0_EN_2V5_LBN 2
  136. #define P0_EN_2V5_WIDTH 1
  137. #define P0_EN_3V3X_LBN 3
  138. #define P0_EN_3V3X_WIDTH 1
  139. #define P0_EN_5V_LBN 4
  140. #define P0_EN_5V_WIDTH 1
  141. #define P0_SHORTEN_JTAG_LBN 5
  142. #define P0_SHORTEN_JTAG_WIDTH 1
  143. #define P0_X_TRST_LBN 6
  144. #define P0_X_TRST_WIDTH 1
  145. #define P0_DSP_RESET_LBN 7
  146. #define P0_DSP_RESET_WIDTH 1
  147. #define P1_IN 0x01
  148. #define P1_OUT 0x03
  149. #define P1_INVERT 0x05
  150. #define P1_CONFIG 0x07
  151. #define P1_AFE_PWD_LBN 0
  152. #define P1_AFE_PWD_WIDTH 1
  153. #define P1_DSP_PWD25_LBN 1
  154. #define P1_DSP_PWD25_WIDTH 1
  155. #define P1_RESERVED_LBN 2
  156. #define P1_RESERVED_WIDTH 2
  157. #define P1_SPARE_LBN 4
  158. #define P1_SPARE_WIDTH 4
  159. /* Temperature Sensor */
  160. #define MAX664X_REG_RSL 0x02
  161. #define MAX664X_REG_WLHO 0x0B
  162. static void sfe4001_poweroff(struct efx_nic *efx)
  163. {
  164. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  165. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  166. /* Turn off all power rails and disable outputs */
  167. i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
  168. i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
  169. i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
  170. /* Clear any over-temperature alert */
  171. i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  172. }
  173. static int sfe4001_poweron(struct efx_nic *efx)
  174. {
  175. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  176. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  177. unsigned int i, j;
  178. int rc;
  179. u8 out;
  180. /* Clear any previous over-temperature alert */
  181. rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  182. if (rc < 0)
  183. return rc;
  184. /* Enable port 0 and port 1 outputs on IO expander */
  185. rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
  186. if (rc)
  187. return rc;
  188. rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
  189. 0xff & ~(1 << P1_SPARE_LBN));
  190. if (rc)
  191. goto fail_on;
  192. /* If PHY power is on, turn it all off and wait 1 second to
  193. * ensure a full reset.
  194. */
  195. rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
  196. if (rc < 0)
  197. goto fail_on;
  198. out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
  199. (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
  200. (0 << P0_EN_1V0X_LBN));
  201. if (rc != out) {
  202. EFX_INFO(efx, "power-cycling PHY\n");
  203. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  204. if (rc)
  205. goto fail_on;
  206. schedule_timeout_uninterruptible(HZ);
  207. }
  208. for (i = 0; i < 20; ++i) {
  209. /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
  210. out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
  211. (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
  212. (1 << P0_X_TRST_LBN));
  213. if (efx->phy_mode & PHY_MODE_SPECIAL)
  214. out |= 1 << P0_EN_3V3X_LBN;
  215. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  216. if (rc)
  217. goto fail_on;
  218. msleep(10);
  219. /* Turn on 1V power rail */
  220. out &= ~(1 << P0_EN_1V0X_LBN);
  221. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  222. if (rc)
  223. goto fail_on;
  224. EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
  225. /* In flash config mode, DSP does not turn on AFE, so
  226. * just wait 1 second.
  227. */
  228. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  229. schedule_timeout_uninterruptible(HZ);
  230. return 0;
  231. }
  232. for (j = 0; j < 10; ++j) {
  233. msleep(100);
  234. /* Check DSP has asserted AFE power line */
  235. rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
  236. if (rc < 0)
  237. goto fail_on;
  238. if (rc & (1 << P1_AFE_PWD_LBN))
  239. return 0;
  240. }
  241. }
  242. EFX_INFO(efx, "timed out waiting for DSP boot\n");
  243. rc = -ETIMEDOUT;
  244. fail_on:
  245. sfe4001_poweroff(efx);
  246. return rc;
  247. }
  248. static int sfn4111t_reset(struct efx_nic *efx)
  249. {
  250. efx_oword_t reg;
  251. /* GPIO 3 and the GPIO register are shared with I2C, so block that */
  252. i2c_lock_adapter(&efx->i2c_adap);
  253. /* Pull RST_N (GPIO 2) low then let it up again, setting the
  254. * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
  255. * output enables; the output levels should always be 0 (low)
  256. * and we rely on external pull-ups. */
  257. efx_reado(efx, &reg, FR_AB_GPIO_CTL);
  258. EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
  259. efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
  260. msleep(1000);
  261. EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
  262. EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
  263. !!(efx->phy_mode & PHY_MODE_SPECIAL));
  264. efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
  265. msleep(1);
  266. i2c_unlock_adapter(&efx->i2c_adap);
  267. ssleep(1);
  268. return 0;
  269. }
  270. static ssize_t show_phy_flash_cfg(struct device *dev,
  271. struct device_attribute *attr, char *buf)
  272. {
  273. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  274. return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
  275. }
  276. static ssize_t set_phy_flash_cfg(struct device *dev,
  277. struct device_attribute *attr,
  278. const char *buf, size_t count)
  279. {
  280. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  281. enum efx_phy_mode old_mode, new_mode;
  282. int err;
  283. rtnl_lock();
  284. old_mode = efx->phy_mode;
  285. if (count == 0 || *buf == '0')
  286. new_mode = old_mode & ~PHY_MODE_SPECIAL;
  287. else
  288. new_mode = PHY_MODE_SPECIAL;
  289. if (old_mode == new_mode) {
  290. err = 0;
  291. } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
  292. err = -EBUSY;
  293. } else {
  294. /* Reset the PHY, reconfigure the MAC and enable/disable
  295. * MAC stats accordingly. */
  296. efx->phy_mode = new_mode;
  297. if (new_mode & PHY_MODE_SPECIAL)
  298. efx_stats_disable(efx);
  299. if (efx->board_info.type == FALCON_BOARD_SFE4001)
  300. err = sfe4001_poweron(efx);
  301. else
  302. err = sfn4111t_reset(efx);
  303. efx_reconfigure_port(efx);
  304. if (!(new_mode & PHY_MODE_SPECIAL))
  305. efx_stats_enable(efx);
  306. }
  307. rtnl_unlock();
  308. return err ? err : count;
  309. }
  310. static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
  311. static void sfe4001_fini(struct efx_nic *efx)
  312. {
  313. EFX_INFO(efx, "%s\n", __func__);
  314. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  315. sfe4001_poweroff(efx);
  316. i2c_unregister_device(efx->board_info.ioexp_client);
  317. i2c_unregister_device(efx->board_info.hwmon_client);
  318. }
  319. static int sfe4001_check_hw(struct efx_nic *efx)
  320. {
  321. s32 status;
  322. /* If XAUI link is up then do not monitor */
  323. if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
  324. return 0;
  325. /* Check the powered status of the PHY. Lack of power implies that
  326. * the MAX6647 has shut down power to it, probably due to a temp.
  327. * alarm. Reading the power status rather than the MAX6647 status
  328. * directly because the later is read-to-clear and would thus
  329. * start to power up the PHY again when polled, causing us to blip
  330. * the power undesirably.
  331. * We know we can read from the IO expander because we did
  332. * it during power-on. Assume failure now is bad news. */
  333. status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
  334. if (status >= 0 &&
  335. (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
  336. return 0;
  337. /* Use board power control, not PHY power control */
  338. sfe4001_poweroff(efx);
  339. efx->phy_mode = PHY_MODE_OFF;
  340. return (status < 0) ? -EIO : -ERANGE;
  341. }
  342. static struct i2c_board_info sfe4001_hwmon_info = {
  343. I2C_BOARD_INFO("max6647", 0x4e),
  344. };
  345. /* This board uses an I2C expander to provider power to the PHY, which needs to
  346. * be turned on before the PHY can be used.
  347. * Context: Process context, rtnl lock held
  348. */
  349. static int sfe4001_init(struct efx_nic *efx)
  350. {
  351. int rc;
  352. #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
  353. efx->board_info.hwmon_client =
  354. i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
  355. #else
  356. efx->board_info.hwmon_client =
  357. i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
  358. #endif
  359. if (!efx->board_info.hwmon_client)
  360. return -EIO;
  361. /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
  362. rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
  363. MAX664X_REG_WLHO, 90);
  364. if (rc)
  365. goto fail_hwmon;
  366. efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
  367. if (!efx->board_info.ioexp_client) {
  368. rc = -EIO;
  369. goto fail_hwmon;
  370. }
  371. /* 10Xpress has fixed-function LED pins, so there is no board-specific
  372. * blink code. */
  373. efx->board_info.set_id_led = tenxpress_set_id_led;
  374. efx->board_info.monitor = sfe4001_check_hw;
  375. efx->board_info.fini = sfe4001_fini;
  376. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  377. /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
  378. * will fail. */
  379. efx_stats_disable(efx);
  380. }
  381. rc = sfe4001_poweron(efx);
  382. if (rc)
  383. goto fail_ioexp;
  384. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  385. if (rc)
  386. goto fail_on;
  387. EFX_INFO(efx, "PHY is powered on\n");
  388. return 0;
  389. fail_on:
  390. sfe4001_poweroff(efx);
  391. fail_ioexp:
  392. i2c_unregister_device(efx->board_info.ioexp_client);
  393. fail_hwmon:
  394. i2c_unregister_device(efx->board_info.hwmon_client);
  395. return rc;
  396. }
  397. static int sfn4111t_check_hw(struct efx_nic *efx)
  398. {
  399. s32 status;
  400. /* If XAUI link is up then do not monitor */
  401. if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
  402. return 0;
  403. /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
  404. status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
  405. MAX664X_REG_RSL);
  406. if (status < 0)
  407. return -EIO;
  408. if (status & 0x57)
  409. return -ERANGE;
  410. return 0;
  411. }
  412. static void sfn4111t_fini(struct efx_nic *efx)
  413. {
  414. EFX_INFO(efx, "%s\n", __func__);
  415. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  416. i2c_unregister_device(efx->board_info.hwmon_client);
  417. }
  418. static struct i2c_board_info sfn4111t_a0_hwmon_info = {
  419. I2C_BOARD_INFO("max6647", 0x4e),
  420. };
  421. static struct i2c_board_info sfn4111t_r5_hwmon_info = {
  422. I2C_BOARD_INFO("max6646", 0x4d),
  423. };
  424. static int sfn4111t_init(struct efx_nic *efx)
  425. {
  426. int i = 0;
  427. int rc;
  428. efx->board_info.hwmon_client =
  429. i2c_new_device(&efx->i2c_adap,
  430. (efx->board_info.minor < 5) ?
  431. &sfn4111t_a0_hwmon_info :
  432. &sfn4111t_r5_hwmon_info);
  433. if (!efx->board_info.hwmon_client)
  434. return -EIO;
  435. efx->board_info.set_id_led = tenxpress_set_id_led;
  436. efx->board_info.monitor = sfn4111t_check_hw;
  437. efx->board_info.fini = sfn4111t_fini;
  438. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  439. if (rc)
  440. goto fail_hwmon;
  441. do {
  442. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  443. /* PHY may not generate a 156.25 MHz clock and MAC
  444. * stats fetch will fail. */
  445. efx_stats_disable(efx);
  446. sfn4111t_reset(efx);
  447. }
  448. rc = sft9001_wait_boot(efx);
  449. if (rc == 0)
  450. return 0;
  451. efx->phy_mode = PHY_MODE_SPECIAL;
  452. } while (rc == -EINVAL && ++i < 2);
  453. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  454. fail_hwmon:
  455. i2c_unregister_device(efx->board_info.hwmon_client);
  456. return rc;
  457. }
  458. /*****************************************************************************
  459. * Support for the SFE4002
  460. *
  461. */
  462. static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
  463. static const u8 sfe4002_lm87_regs[] = {
  464. LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
  465. LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
  466. LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
  467. LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */
  468. LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
  469. LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
  470. LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */
  471. LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
  472. LM87_TEMP_INT_LIMITS(10, 60), /* board */
  473. LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
  474. 0
  475. };
  476. static struct i2c_board_info sfe4002_hwmon_info = {
  477. I2C_BOARD_INFO("lm87", 0x2e),
  478. .platform_data = &sfe4002_lm87_channel,
  479. };
  480. /****************************************************************************/
  481. /* LED allocations. Note that on rev A0 boards the schematic and the reality
  482. * differ: red and green are swapped. Below is the fixed (A1) layout (there
  483. * are only 3 A0 boards in existence, so no real reason to make this
  484. * conditional).
  485. */
  486. #define SFE4002_FAULT_LED (2) /* Red */
  487. #define SFE4002_RX_LED (0) /* Green */
  488. #define SFE4002_TX_LED (1) /* Amber */
  489. static void sfe4002_init_leds(struct efx_nic *efx)
  490. {
  491. /* Set the TX and RX LEDs to reflect status and activity, and the
  492. * fault LED off */
  493. falcon_qt202x_set_led(efx, SFE4002_TX_LED,
  494. QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
  495. falcon_qt202x_set_led(efx, SFE4002_RX_LED,
  496. QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
  497. falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
  498. }
  499. static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  500. {
  501. falcon_qt202x_set_led(
  502. efx, SFE4002_FAULT_LED,
  503. (mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
  504. }
  505. static int sfe4002_check_hw(struct efx_nic *efx)
  506. {
  507. /* A0 board rev. 4002s report a temperature fault the whole time
  508. * (bad sensor) so we mask it out. */
  509. unsigned alarm_mask =
  510. (efx->board_info.major == 0 && efx->board_info.minor == 0) ?
  511. ~LM87_ALARM_TEMP_EXT1 : ~0;
  512. return efx_check_lm87(efx, alarm_mask);
  513. }
  514. static int sfe4002_init(struct efx_nic *efx)
  515. {
  516. int rc = efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
  517. if (rc)
  518. return rc;
  519. efx->board_info.monitor = sfe4002_check_hw;
  520. efx->board_info.init_leds = sfe4002_init_leds;
  521. efx->board_info.set_id_led = sfe4002_set_id_led;
  522. efx->board_info.fini = efx_fini_lm87;
  523. return 0;
  524. }
  525. /*****************************************************************************
  526. * Support for the SFN4112F
  527. *
  528. */
  529. static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
  530. static const u8 sfn4112f_lm87_regs[] = {
  531. LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
  532. LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
  533. LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
  534. LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
  535. LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
  536. LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
  537. LM87_TEMP_INT_LIMITS(10, 60), /* board */
  538. LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
  539. 0
  540. };
  541. static struct i2c_board_info sfn4112f_hwmon_info = {
  542. I2C_BOARD_INFO("lm87", 0x2e),
  543. .platform_data = &sfn4112f_lm87_channel,
  544. };
  545. #define SFN4112F_ACT_LED 0
  546. #define SFN4112F_LINK_LED 1
  547. static void sfn4112f_init_leds(struct efx_nic *efx)
  548. {
  549. falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
  550. QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
  551. falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
  552. QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
  553. }
  554. static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  555. {
  556. int reg;
  557. switch (mode) {
  558. case EFX_LED_OFF:
  559. reg = QUAKE_LED_OFF;
  560. break;
  561. case EFX_LED_ON:
  562. reg = QUAKE_LED_ON;
  563. break;
  564. default:
  565. reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
  566. break;
  567. }
  568. falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
  569. }
  570. static int sfn4112f_check_hw(struct efx_nic *efx)
  571. {
  572. /* Mask out unused sensors */
  573. return efx_check_lm87(efx, ~0x48);
  574. }
  575. static int sfn4112f_init(struct efx_nic *efx)
  576. {
  577. int rc = efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
  578. if (rc)
  579. return rc;
  580. efx->board_info.monitor = sfn4112f_check_hw;
  581. efx->board_info.init_leds = sfn4112f_init_leds;
  582. efx->board_info.set_id_led = sfn4112f_set_id_led;
  583. efx->board_info.fini = efx_fini_lm87;
  584. return 0;
  585. }
  586. /* This will get expanded as board-specific details get moved out of the
  587. * PHY drivers. */
  588. struct falcon_board_data {
  589. u8 type;
  590. const char *ref_model;
  591. const char *gen_type;
  592. int (*init) (struct efx_nic *nic);
  593. };
  594. static struct falcon_board_data board_data[] = {
  595. { FALCON_BOARD_SFE4001, "SFE4001", "10GBASE-T adapter", sfe4001_init },
  596. { FALCON_BOARD_SFE4002, "SFE4002", "XFP adapter", sfe4002_init },
  597. { FALCON_BOARD_SFN4111T, "SFN4111T", "100/1000/10GBASE-T adapter",
  598. sfn4111t_init },
  599. { FALCON_BOARD_SFN4112F, "SFN4112F", "SFP+ adapter",
  600. sfn4112f_init },
  601. };
  602. void falcon_probe_board(struct efx_nic *efx, u16 revision_info)
  603. {
  604. struct falcon_board_data *data = NULL;
  605. int i;
  606. efx->board_info.type = FALCON_BOARD_TYPE(revision_info);
  607. efx->board_info.major = FALCON_BOARD_MAJOR(revision_info);
  608. efx->board_info.minor = FALCON_BOARD_MINOR(revision_info);
  609. for (i = 0; i < ARRAY_SIZE(board_data); i++)
  610. if (board_data[i].type == efx->board_info.type)
  611. data = &board_data[i];
  612. if (data) {
  613. EFX_INFO(efx, "board is %s rev %c%d\n",
  614. (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
  615. ? data->ref_model : data->gen_type,
  616. 'A' + efx->board_info.major, efx->board_info.minor);
  617. efx->board_info.init = data->init;
  618. } else {
  619. EFX_ERR(efx, "unknown board type %d\n", efx->board_info.type);
  620. }
  621. }