dst.c 43 KB

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  1. /*
  2. Frontend/Card driver for TwinHan DST Frontend
  3. Copyright (C) 2003 Jamie Honan
  4. Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/string.h>
  21. #include <linux/slab.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/delay.h>
  24. #include <asm/div64.h>
  25. #include "dvb_frontend.h"
  26. #include "dst_priv.h"
  27. #include "dst_common.h"
  28. static unsigned int verbose = 1;
  29. module_param(verbose, int, 0644);
  30. MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
  31. static unsigned int dst_addons;
  32. module_param(dst_addons, int, 0644);
  33. MODULE_PARM_DESC(dst_addons, "CA daughterboard, default is 0 (No addons)");
  34. static unsigned int dst_algo;
  35. module_param(dst_algo, int, 0644);
  36. MODULE_PARM_DESC(dst_algo, "tuning algo: default is 0=(SW), 1=(HW)");
  37. #define HAS_LOCK 1
  38. #define ATTEMPT_TUNE 2
  39. #define HAS_POWER 4
  40. #define DST_ERROR 0
  41. #define DST_NOTICE 1
  42. #define DST_INFO 2
  43. #define DST_DEBUG 3
  44. #define dprintk(x, y, z, format, arg...) do { \
  45. if (z) { \
  46. if ((x > DST_ERROR) && (x > y)) \
  47. printk(KERN_ERR "%s: " format "\n", __FUNCTION__ , ##arg); \
  48. else if ((x > DST_NOTICE) && (x > y)) \
  49. printk(KERN_NOTICE "%s: " format "\n", __FUNCTION__ , ##arg); \
  50. else if ((x > DST_INFO) && (x > y)) \
  51. printk(KERN_INFO "%s: " format "\n", __FUNCTION__ , ##arg); \
  52. else if ((x > DST_DEBUG) && (x > y)) \
  53. printk(KERN_DEBUG "%s: " format "\n", __FUNCTION__ , ##arg); \
  54. } else { \
  55. if (x > y) \
  56. printk(format, ##arg); \
  57. } \
  58. } while(0)
  59. static void dst_packsize(struct dst_state *state, int psize)
  60. {
  61. union dst_gpio_packet bits;
  62. bits.psize = psize;
  63. bt878_device_control(state->bt, DST_IG_TS, &bits);
  64. }
  65. int dst_gpio_outb(struct dst_state *state, u32 mask, u32 enbb, u32 outhigh, int delay)
  66. {
  67. union dst_gpio_packet enb;
  68. union dst_gpio_packet bits;
  69. int err;
  70. enb.enb.mask = mask;
  71. enb.enb.enable = enbb;
  72. dprintk(verbose, DST_INFO, 1, "mask=[%04x], enbb=[%04x], outhigh=[%04x]", mask, enbb, outhigh);
  73. if ((err = bt878_device_control(state->bt, DST_IG_ENABLE, &enb)) < 0) {
  74. dprintk(verbose, DST_INFO, 1, "dst_gpio_enb error (err == %i, mask == %02x, enb == %02x)", err, mask, enbb);
  75. return -EREMOTEIO;
  76. }
  77. udelay(1000);
  78. /* because complete disabling means no output, no need to do output packet */
  79. if (enbb == 0)
  80. return 0;
  81. if (delay)
  82. msleep(10);
  83. bits.outp.mask = enbb;
  84. bits.outp.highvals = outhigh;
  85. if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
  86. dprintk(verbose, DST_INFO, 1, "dst_gpio_outb error (err == %i, enbb == %02x, outhigh == %02x)", err, enbb, outhigh);
  87. return -EREMOTEIO;
  88. }
  89. return 0;
  90. }
  91. EXPORT_SYMBOL(dst_gpio_outb);
  92. int dst_gpio_inb(struct dst_state *state, u8 *result)
  93. {
  94. union dst_gpio_packet rd_packet;
  95. int err;
  96. *result = 0;
  97. if ((err = bt878_device_control(state->bt, DST_IG_READ, &rd_packet)) < 0) {
  98. dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb error (err == %i)\n", err);
  99. return -EREMOTEIO;
  100. }
  101. *result = (u8) rd_packet.rd.value;
  102. return 0;
  103. }
  104. EXPORT_SYMBOL(dst_gpio_inb);
  105. int rdc_reset_state(struct dst_state *state)
  106. {
  107. dprintk(verbose, DST_INFO, 1, "Resetting state machine");
  108. if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, 0, NO_DELAY) < 0) {
  109. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  110. return -1;
  111. }
  112. msleep(10);
  113. if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, RDC_8820_INT, NO_DELAY) < 0) {
  114. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  115. msleep(10);
  116. return -1;
  117. }
  118. return 0;
  119. }
  120. EXPORT_SYMBOL(rdc_reset_state);
  121. int rdc_8820_reset(struct dst_state *state)
  122. {
  123. dprintk(verbose, DST_DEBUG, 1, "Resetting DST");
  124. if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, 0, NO_DELAY) < 0) {
  125. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  126. return -1;
  127. }
  128. udelay(1000);
  129. if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, RDC_8820_RESET, DELAY) < 0) {
  130. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  131. return -1;
  132. }
  133. return 0;
  134. }
  135. EXPORT_SYMBOL(rdc_8820_reset);
  136. int dst_pio_enable(struct dst_state *state)
  137. {
  138. if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_ENABLE, 0, NO_DELAY) < 0) {
  139. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  140. return -1;
  141. }
  142. udelay(1000);
  143. return 0;
  144. }
  145. EXPORT_SYMBOL(dst_pio_enable);
  146. int dst_pio_disable(struct dst_state *state)
  147. {
  148. if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_DISABLE, RDC_8820_PIO_0_DISABLE, NO_DELAY) < 0) {
  149. dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
  150. return -1;
  151. }
  152. if (state->type_flags & DST_TYPE_HAS_FW_1)
  153. udelay(1000);
  154. return 0;
  155. }
  156. EXPORT_SYMBOL(dst_pio_disable);
  157. int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode)
  158. {
  159. u8 reply;
  160. int i;
  161. for (i = 0; i < 200; i++) {
  162. if (dst_gpio_inb(state, &reply) < 0) {
  163. dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb ERROR !");
  164. return -1;
  165. }
  166. if ((reply & RDC_8820_PIO_0_ENABLE) == 0) {
  167. dprintk(verbose, DST_INFO, 1, "dst wait ready after %d", i);
  168. return 1;
  169. }
  170. msleep(10);
  171. }
  172. dprintk(verbose, DST_NOTICE, 1, "dst wait NOT ready after %d", i);
  173. return 0;
  174. }
  175. EXPORT_SYMBOL(dst_wait_dst_ready);
  176. int dst_error_recovery(struct dst_state *state)
  177. {
  178. dprintk(verbose, DST_NOTICE, 1, "Trying to return from previous errors.");
  179. dst_pio_disable(state);
  180. msleep(10);
  181. dst_pio_enable(state);
  182. msleep(10);
  183. return 0;
  184. }
  185. EXPORT_SYMBOL(dst_error_recovery);
  186. int dst_error_bailout(struct dst_state *state)
  187. {
  188. dprintk(verbose, DST_INFO, 1, "Trying to bailout from previous error.");
  189. rdc_8820_reset(state);
  190. dst_pio_disable(state);
  191. msleep(10);
  192. return 0;
  193. }
  194. EXPORT_SYMBOL(dst_error_bailout);
  195. int dst_comm_init(struct dst_state *state)
  196. {
  197. dprintk(verbose, DST_INFO, 1, "Initializing DST.");
  198. if ((dst_pio_enable(state)) < 0) {
  199. dprintk(verbose, DST_ERROR, 1, "PIO Enable Failed");
  200. return -1;
  201. }
  202. if ((rdc_reset_state(state)) < 0) {
  203. dprintk(verbose, DST_ERROR, 1, "RDC 8820 State RESET Failed.");
  204. return -1;
  205. }
  206. if (state->type_flags & DST_TYPE_HAS_FW_1)
  207. msleep(100);
  208. else
  209. msleep(5);
  210. return 0;
  211. }
  212. EXPORT_SYMBOL(dst_comm_init);
  213. int write_dst(struct dst_state *state, u8 *data, u8 len)
  214. {
  215. struct i2c_msg msg = {
  216. .addr = state->config->demod_address,
  217. .flags = 0,
  218. .buf = data,
  219. .len = len
  220. };
  221. int err;
  222. u8 cnt, i;
  223. dprintk(verbose, DST_NOTICE, 0, "writing [ ");
  224. for (i = 0; i < len; i++)
  225. dprintk(verbose, DST_NOTICE, 0, "%02x ", data[i]);
  226. dprintk(verbose, DST_NOTICE, 0, "]\n");
  227. for (cnt = 0; cnt < 2; cnt++) {
  228. if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
  229. dprintk(verbose, DST_INFO, 1, "_write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, data[0]);
  230. dst_error_recovery(state);
  231. continue;
  232. } else
  233. break;
  234. }
  235. if (cnt >= 2) {
  236. dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
  237. dst_error_bailout(state);
  238. return -1;
  239. }
  240. return 0;
  241. }
  242. EXPORT_SYMBOL(write_dst);
  243. int read_dst(struct dst_state *state, u8 *ret, u8 len)
  244. {
  245. struct i2c_msg msg = {
  246. .addr = state->config->demod_address,
  247. .flags = I2C_M_RD,
  248. .buf = ret,
  249. .len = len
  250. };
  251. int err;
  252. int cnt;
  253. for (cnt = 0; cnt < 2; cnt++) {
  254. if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
  255. dprintk(verbose, DST_INFO, 1, "read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, ret[0]);
  256. dst_error_recovery(state);
  257. continue;
  258. } else
  259. break;
  260. }
  261. if (cnt >= 2) {
  262. dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
  263. dst_error_bailout(state);
  264. return -1;
  265. }
  266. dprintk(verbose, DST_DEBUG, 1, "reply is 0x%x", ret[0]);
  267. for (err = 1; err < len; err++)
  268. dprintk(verbose, DST_DEBUG, 0, " 0x%x", ret[err]);
  269. if (err > 1)
  270. dprintk(verbose, DST_DEBUG, 0, "\n");
  271. return 0;
  272. }
  273. EXPORT_SYMBOL(read_dst);
  274. static int dst_set_polarization(struct dst_state *state)
  275. {
  276. switch (state->voltage) {
  277. case SEC_VOLTAGE_13: /* Vertical */
  278. dprintk(verbose, DST_INFO, 1, "Polarization=[Vertical]");
  279. state->tx_tuna[8] &= ~0x40;
  280. break;
  281. case SEC_VOLTAGE_18: /* Horizontal */
  282. dprintk(verbose, DST_INFO, 1, "Polarization=[Horizontal]");
  283. state->tx_tuna[8] |= 0x40;
  284. break;
  285. case SEC_VOLTAGE_OFF:
  286. break;
  287. }
  288. return 0;
  289. }
  290. static int dst_set_freq(struct dst_state *state, u32 freq)
  291. {
  292. state->frequency = freq;
  293. dprintk(verbose, DST_INFO, 1, "set Frequency %u", freq);
  294. if (state->dst_type == DST_TYPE_IS_SAT) {
  295. freq = freq / 1000;
  296. if (freq < 950 || freq > 2150)
  297. return -EINVAL;
  298. state->tx_tuna[2] = (freq >> 8);
  299. state->tx_tuna[3] = (u8) freq;
  300. state->tx_tuna[4] = 0x01;
  301. state->tx_tuna[8] &= ~0x04;
  302. if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
  303. if (freq < 1531)
  304. state->tx_tuna[8] |= 0x04;
  305. }
  306. } else if (state->dst_type == DST_TYPE_IS_TERR) {
  307. freq = freq / 1000;
  308. if (freq < 137000 || freq > 858000)
  309. return -EINVAL;
  310. state->tx_tuna[2] = (freq >> 16) & 0xff;
  311. state->tx_tuna[3] = (freq >> 8) & 0xff;
  312. state->tx_tuna[4] = (u8) freq;
  313. } else if (state->dst_type == DST_TYPE_IS_CABLE) {
  314. freq = freq / 1000;
  315. state->tx_tuna[2] = (freq >> 16) & 0xff;
  316. state->tx_tuna[3] = (freq >> 8) & 0xff;
  317. state->tx_tuna[4] = (u8) freq;
  318. } else if (state->dst_type == DST_TYPE_IS_ATSC) {
  319. freq = freq / 1000;
  320. if (freq < 51000 || freq > 858000)
  321. return -EINVAL;
  322. state->tx_tuna[2] = (freq >> 16) & 0xff;
  323. state->tx_tuna[3] = (freq >> 8) & 0xff;
  324. state->tx_tuna[4] = (u8) freq;
  325. state->tx_tuna[5] = 0x00; /* ATSC */
  326. state->tx_tuna[6] = 0x00;
  327. if (state->dst_hw_cap & DST_TYPE_HAS_ANALOG)
  328. state->tx_tuna[7] = 0x00; /* Digital */
  329. } else
  330. return -EINVAL;
  331. return 0;
  332. }
  333. static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth)
  334. {
  335. state->bandwidth = bandwidth;
  336. if (state->dst_type != DST_TYPE_IS_TERR)
  337. return 0;
  338. switch (bandwidth) {
  339. case BANDWIDTH_6_MHZ:
  340. if (state->dst_hw_cap & DST_TYPE_HAS_CA)
  341. state->tx_tuna[7] = 0x06;
  342. else {
  343. state->tx_tuna[6] = 0x06;
  344. state->tx_tuna[7] = 0x00;
  345. }
  346. break;
  347. case BANDWIDTH_7_MHZ:
  348. if (state->dst_hw_cap & DST_TYPE_HAS_CA)
  349. state->tx_tuna[7] = 0x07;
  350. else {
  351. state->tx_tuna[6] = 0x07;
  352. state->tx_tuna[7] = 0x00;
  353. }
  354. break;
  355. case BANDWIDTH_8_MHZ:
  356. if (state->dst_hw_cap & DST_TYPE_HAS_CA)
  357. state->tx_tuna[7] = 0x08;
  358. else {
  359. state->tx_tuna[6] = 0x08;
  360. state->tx_tuna[7] = 0x00;
  361. }
  362. break;
  363. default:
  364. return -EINVAL;
  365. }
  366. return 0;
  367. }
  368. static int dst_set_inversion(struct dst_state *state, fe_spectral_inversion_t inversion)
  369. {
  370. state->inversion = inversion;
  371. switch (inversion) {
  372. case INVERSION_OFF: /* Inversion = Normal */
  373. state->tx_tuna[8] &= ~0x80;
  374. break;
  375. case INVERSION_ON:
  376. state->tx_tuna[8] |= 0x80;
  377. break;
  378. default:
  379. return -EINVAL;
  380. }
  381. return 0;
  382. }
  383. static int dst_set_fec(struct dst_state *state, fe_code_rate_t fec)
  384. {
  385. state->fec = fec;
  386. return 0;
  387. }
  388. static fe_code_rate_t dst_get_fec(struct dst_state *state)
  389. {
  390. return state->fec;
  391. }
  392. static int dst_set_symbolrate(struct dst_state *state, u32 srate)
  393. {
  394. u32 symcalc;
  395. u64 sval;
  396. state->symbol_rate = srate;
  397. if (state->dst_type == DST_TYPE_IS_TERR) {
  398. return 0;
  399. }
  400. dprintk(verbose, DST_INFO, 1, "set symrate %u", srate);
  401. srate /= 1000;
  402. if (state->type_flags & DST_TYPE_HAS_SYMDIV) {
  403. sval = srate;
  404. sval <<= 20;
  405. do_div(sval, 88000);
  406. symcalc = (u32) sval;
  407. dprintk(verbose, DST_INFO, 1, "set symcalc %u", symcalc);
  408. state->tx_tuna[5] = (u8) (symcalc >> 12);
  409. state->tx_tuna[6] = (u8) (symcalc >> 4);
  410. state->tx_tuna[7] = (u8) (symcalc << 4);
  411. } else {
  412. state->tx_tuna[5] = (u8) (srate >> 16) & 0x7f;
  413. state->tx_tuna[6] = (u8) (srate >> 8);
  414. state->tx_tuna[7] = (u8) srate;
  415. }
  416. state->tx_tuna[8] &= ~0x20;
  417. if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
  418. if (srate > 8000)
  419. state->tx_tuna[8] |= 0x20;
  420. }
  421. return 0;
  422. }
  423. static int dst_set_modulation(struct dst_state *state, fe_modulation_t modulation)
  424. {
  425. if (state->dst_type != DST_TYPE_IS_CABLE)
  426. return 0;
  427. state->modulation = modulation;
  428. switch (modulation) {
  429. case QAM_16:
  430. state->tx_tuna[8] = 0x10;
  431. break;
  432. case QAM_32:
  433. state->tx_tuna[8] = 0x20;
  434. break;
  435. case QAM_64:
  436. state->tx_tuna[8] = 0x40;
  437. break;
  438. case QAM_128:
  439. state->tx_tuna[8] = 0x80;
  440. break;
  441. case QAM_256:
  442. state->tx_tuna[8] = 0x00;
  443. break;
  444. case QPSK:
  445. case QAM_AUTO:
  446. case VSB_8:
  447. case VSB_16:
  448. default:
  449. return -EINVAL;
  450. }
  451. return 0;
  452. }
  453. static fe_modulation_t dst_get_modulation(struct dst_state *state)
  454. {
  455. return state->modulation;
  456. }
  457. u8 dst_check_sum(u8 *buf, u32 len)
  458. {
  459. u32 i;
  460. u8 val = 0;
  461. if (!len)
  462. return 0;
  463. for (i = 0; i < len; i++) {
  464. val += buf[i];
  465. }
  466. return ((~val) + 1);
  467. }
  468. EXPORT_SYMBOL(dst_check_sum);
  469. static void dst_type_flags_print(u32 type_flags)
  470. {
  471. dprintk(verbose, DST_ERROR, 0, "DST type flags :");
  472. if (type_flags & DST_TYPE_HAS_NEWTUNE)
  473. dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner", DST_TYPE_HAS_NEWTUNE);
  474. if (type_flags & DST_TYPE_HAS_TS204)
  475. dprintk(verbose, DST_ERROR, 0, " 0x%x ts204", DST_TYPE_HAS_TS204);
  476. if (type_flags & DST_TYPE_HAS_SYMDIV)
  477. dprintk(verbose, DST_ERROR, 0, " 0x%x symdiv", DST_TYPE_HAS_SYMDIV);
  478. if (type_flags & DST_TYPE_HAS_FW_1)
  479. dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 1", DST_TYPE_HAS_FW_1);
  480. if (type_flags & DST_TYPE_HAS_FW_2)
  481. dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 2", DST_TYPE_HAS_FW_2);
  482. if (type_flags & DST_TYPE_HAS_FW_3)
  483. dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 3", DST_TYPE_HAS_FW_3);
  484. dprintk(verbose, DST_ERROR, 0, "\n");
  485. }
  486. static int dst_type_print(u8 type)
  487. {
  488. char *otype;
  489. switch (type) {
  490. case DST_TYPE_IS_SAT:
  491. otype = "satellite";
  492. break;
  493. case DST_TYPE_IS_TERR:
  494. otype = "terrestrial";
  495. break;
  496. case DST_TYPE_IS_CABLE:
  497. otype = "cable";
  498. break;
  499. case DST_TYPE_IS_ATSC:
  500. otype = "atsc";
  501. break;
  502. default:
  503. dprintk(verbose, DST_INFO, 1, "invalid dst type %d", type);
  504. return -EINVAL;
  505. }
  506. dprintk(verbose, DST_INFO, 1, "DST type: %s", otype);
  507. return 0;
  508. }
  509. /*
  510. Known cards list
  511. Satellite
  512. -------------------
  513. 200103A
  514. VP-1020 DST-MOT LG(old), TS=188
  515. VP-1020 DST-03T LG(new), TS=204
  516. VP-1022 DST-03T LG(new), TS=204
  517. VP-1025 DST-03T LG(new), TS=204
  518. VP-1030 DSTMCI, LG(new), TS=188
  519. VP-1032 DSTMCI, LG(new), TS=188
  520. Cable
  521. -------------------
  522. VP-2030 DCT-CI, Samsung, TS=204
  523. VP-2021 DCT-CI, Unknown, TS=204
  524. VP-2031 DCT-CI, Philips, TS=188
  525. VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
  526. VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
  527. Terrestrial
  528. -------------------
  529. VP-3050 DTTNXT TS=188
  530. VP-3040 DTT-CI, Philips, TS=188
  531. VP-3040 DTT-CI, Philips, TS=204
  532. ATSC
  533. -------------------
  534. VP-3220 ATSCDI, TS=188
  535. VP-3250 ATSCAD, TS=188
  536. */
  537. static struct dst_types dst_tlist[] = {
  538. {
  539. .device_id = "200103A",
  540. .offset = 0,
  541. .dst_type = DST_TYPE_IS_SAT,
  542. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS,
  543. .dst_feature = 0,
  544. .tuner_type = 0
  545. }, /* obsolete */
  546. {
  547. .device_id = "DST-020",
  548. .offset = 0,
  549. .dst_type = DST_TYPE_IS_SAT,
  550. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
  551. .dst_feature = 0,
  552. .tuner_type = 0
  553. }, /* obsolete */
  554. {
  555. .device_id = "DST-030",
  556. .offset = 0,
  557. .dst_type = DST_TYPE_IS_SAT,
  558. .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_NEWTUNE | DST_TYPE_HAS_FW_1,
  559. .dst_feature = 0,
  560. .tuner_type = 0
  561. }, /* obsolete */
  562. {
  563. .device_id = "DST-03T",
  564. .offset = 0,
  565. .dst_type = DST_TYPE_IS_SAT,
  566. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_2,
  567. .dst_feature = DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | DST_TYPE_HAS_DISEQC5
  568. | DST_TYPE_HAS_MAC | DST_TYPE_HAS_MOTO,
  569. .tuner_type = TUNER_TYPE_STV0299
  570. },
  571. {
  572. .device_id = "DST-MOT",
  573. .offset = 0,
  574. .dst_type = DST_TYPE_IS_SAT,
  575. .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
  576. .dst_feature = 0,
  577. .tuner_type = 0
  578. }, /* obsolete */
  579. {
  580. .device_id = "DST-CI",
  581. .offset = 1,
  582. .dst_type = DST_TYPE_IS_SAT,
  583. .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_1,
  584. .dst_feature = DST_TYPE_HAS_CA,
  585. .tuner_type = 0
  586. }, /* An OEM board */
  587. {
  588. .device_id = "DSTMCI",
  589. .offset = 1,
  590. .dst_type = DST_TYPE_IS_SAT,
  591. .type_flags = DST_TYPE_HAS_NEWTUNE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT,
  592. .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4
  593. | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC,
  594. .tuner_type = TUNER_TYPE_MULTI
  595. },
  596. {
  597. .device_id = "DSTFCI",
  598. .offset = 1,
  599. .dst_type = DST_TYPE_IS_SAT,
  600. .type_flags = DST_TYPE_HAS_NEWTUNE | DST_TYPE_HAS_FW_1,
  601. .dst_feature = 0,
  602. .tuner_type = 0
  603. }, /* unknown to vendor */
  604. {
  605. .device_id = "DCT-CI",
  606. .offset = 1,
  607. .dst_type = DST_TYPE_IS_CABLE,
  608. .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_FW_2,
  609. .dst_feature = DST_TYPE_HAS_CA,
  610. .tuner_type = 0
  611. },
  612. {
  613. .device_id = "DCTNEW",
  614. .offset = 1,
  615. .dst_type = DST_TYPE_IS_CABLE,
  616. .type_flags = DST_TYPE_HAS_NEWTUNE | DST_TYPE_HAS_FW_3 | DST_TYPE_HAS_FW_BUILD,
  617. .dst_feature = 0,
  618. .tuner_type = 0
  619. },
  620. {
  621. .device_id = "DTT-CI",
  622. .offset = 1,
  623. .dst_type = DST_TYPE_IS_TERR,
  624. .type_flags = DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_MULTI_FE,
  625. .dst_feature = DST_TYPE_HAS_CA,
  626. .tuner_type = 0
  627. },
  628. {
  629. .device_id = "DTTDIG",
  630. .offset = 1,
  631. .dst_type = DST_TYPE_IS_TERR,
  632. .type_flags = DST_TYPE_HAS_FW_2,
  633. .dst_feature = 0,
  634. .tuner_type = 0
  635. },
  636. {
  637. .device_id = "DTTNXT",
  638. .offset = 1,
  639. .dst_type = DST_TYPE_IS_TERR,
  640. .type_flags = DST_TYPE_HAS_FW_2,
  641. .dst_feature = DST_TYPE_HAS_ANALOG,
  642. .tuner_type = 0
  643. },
  644. {
  645. .device_id = "ATSCDI",
  646. .offset = 1,
  647. .dst_type = DST_TYPE_IS_ATSC,
  648. .type_flags = DST_TYPE_HAS_FW_2,
  649. .dst_feature = 0,
  650. .tuner_type = 0
  651. },
  652. {
  653. .device_id = "ATSCAD",
  654. .offset = 1,
  655. .dst_type = DST_TYPE_IS_ATSC,
  656. .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD,
  657. .dst_feature = DST_TYPE_HAS_MAC | DST_TYPE_HAS_ANALOG,
  658. .tuner_type = 0
  659. },
  660. { }
  661. };
  662. static int dst_get_mac(struct dst_state *state)
  663. {
  664. u8 get_mac[] = { 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  665. get_mac[7] = dst_check_sum(get_mac, 7);
  666. if (dst_command(state, get_mac, 8) < 0) {
  667. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  668. return -1;
  669. }
  670. memset(&state->mac_address, '\0', 8);
  671. memcpy(&state->mac_address, &state->rxbuffer, 6);
  672. dprintk(verbose, DST_ERROR, 1, "MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]",
  673. state->mac_address[0], state->mac_address[1], state->mac_address[2],
  674. state->mac_address[4], state->mac_address[5], state->mac_address[6]);
  675. return 0;
  676. }
  677. static int dst_fw_ver(struct dst_state *state)
  678. {
  679. u8 get_ver[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  680. get_ver[7] = dst_check_sum(get_ver, 7);
  681. if (dst_command(state, get_ver, 8) < 0) {
  682. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  683. return -1;
  684. }
  685. memset(&state->fw_version, '\0', 8);
  686. memcpy(&state->fw_version, &state->rxbuffer, 8);
  687. dprintk(verbose, DST_ERROR, 1, "Firmware Ver = %x.%x Build = %02x, on %x:%x, %x-%x-20%02x",
  688. state->fw_version[0] >> 4, state->fw_version[0] & 0x0f,
  689. state->fw_version[1],
  690. state->fw_version[5], state->fw_version[6],
  691. state->fw_version[4], state->fw_version[3], state->fw_version[2]);
  692. return 0;
  693. }
  694. static int dst_card_type(struct dst_state *state)
  695. {
  696. u8 get_type[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  697. get_type[7] = dst_check_sum(get_type, 7);
  698. if (dst_command(state, get_type, 8) < 0) {
  699. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  700. return -1;
  701. }
  702. memset(&state->card_info, '\0', 8);
  703. memcpy(&state->card_info, &state->rxbuffer, 8);
  704. dprintk(verbose, DST_ERROR, 1, "Device Model=[%s]", &state->card_info[0]);
  705. return 0;
  706. }
  707. static int dst_get_vendor(struct dst_state *state)
  708. {
  709. u8 get_vendor[] = { 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  710. get_vendor[7] = dst_check_sum(get_vendor, 7);
  711. if (dst_command(state, get_vendor, 8) < 0) {
  712. dprintk(verbose, DST_INFO, 1, "Unsupported Command");
  713. return -1;
  714. }
  715. memset(&state->vendor, '\0', 8);
  716. memcpy(&state->vendor, &state->rxbuffer, 8);
  717. dprintk(verbose, DST_ERROR, 1, "Vendor=[%s]", &state->vendor[0]);
  718. return 0;
  719. }
  720. static int dst_get_tuner_info(struct dst_state *state)
  721. {
  722. u8 get_tuner_1[] = { 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  723. u8 get_tuner_2[] = { 0x00, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
  724. get_tuner_1[7] = dst_check_sum(get_tuner_1, 7);
  725. get_tuner_2[7] = dst_check_sum(get_tuner_2, 7);
  726. dprintk(verbose, DST_ERROR, 1, "DST TYpe = MULTI FE");
  727. if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
  728. // if (dst_command(state, get_tuner_2, 8) < 0) {
  729. if (dst_command(state, get_tuner_1, 8) < 0) {
  730. dprintk(verbose, DST_INFO, 1, "Cmd=[0x13], Unsupported");
  731. return -1;
  732. }
  733. } else {
  734. // if (dst_command(state, get_tuner_1, 8) < 0) {
  735. if (dst_command(state, get_tuner_2, 8) < 0) {
  736. dprintk(verbose, DST_INFO, 1, "Cmd=[0xb], Unsupported");
  737. return -1;
  738. }
  739. }
  740. memset(&state->board_info, '\0', 8);
  741. memcpy(&state->board_info, &state->rxbuffer, 8);
  742. if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
  743. dprintk(verbose, DST_ERROR, 1, "DST type has TS=188");
  744. /*
  745. if (state->board_info[1] == 0x0b) {
  746. if (state->type_flags & DST_TYPE_HAS_TS204)
  747. state->type_flags &= ~DST_TYPE_HAS_TS204;
  748. state->type_flags |= DST_TYPE_HAS_NEWTUNE;
  749. dprintk(verbose, DST_INFO, 1, "DST type has TS=188");
  750. } else {
  751. if (state->type_flags & DST_TYPE_HAS_NEWTUNE)
  752. state->type_flags &= ~DST_TYPE_HAS_NEWTUNE;
  753. state->type_flags |= DST_TYPE_HAS_TS204;
  754. dprintk(verbose, DST_INFO, 1, "DST type has TS=204");
  755. }
  756. } else {
  757. */
  758. }
  759. if (state->board_info[0] == 0xbc) {
  760. // if (state->type_flags & DST_TYPE_HAS_TS204)
  761. // state->type_flags &= ~DST_TYPE_HAS_TS204;
  762. state->type_flags |= DST_TYPE_HAS_NEWTUNE;
  763. dprintk(verbose, DST_INFO, 1, "DST type has TS=188, Daughterboard=[%d]", state->board_info[1]);
  764. } else if (state->board_info[0] == 0xcc) {
  765. // if (state->type_flags & DST_TYPE_HAS_NEWTUNE)
  766. // state->type_flags &= ~DST_TYPE_HAS_NEWTUNE;
  767. state->type_flags |= DST_TYPE_HAS_TS204;
  768. dprintk(verbose, DST_INFO, 1, "DST type has TS=204 Daughterboard=[%d]", state->board_info[1]);
  769. }
  770. // }
  771. return 0;
  772. }
  773. static int dst_get_device_id(struct dst_state *state)
  774. {
  775. u8 reply;
  776. int i;
  777. struct dst_types *p_dst_type;
  778. u8 use_dst_type = 0;
  779. u32 use_type_flags = 0;
  780. static u8 device_type[8] = {0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
  781. device_type[7] = dst_check_sum(device_type, 7);
  782. if (write_dst(state, device_type, FIXED_COMM))
  783. return -1; /* Write failed */
  784. if ((dst_pio_disable(state)) < 0)
  785. return -1;
  786. if (read_dst(state, &reply, GET_ACK))
  787. return -1; /* Read failure */
  788. if (reply != ACK) {
  789. dprintk(verbose, DST_INFO, 1, "Write not Acknowledged! [Reply=0x%02x]", reply);
  790. return -1; /* Unack'd write */
  791. }
  792. if (!dst_wait_dst_ready(state, DEVICE_INIT))
  793. return -1; /* DST not ready yet */
  794. if (read_dst(state, state->rxbuffer, FIXED_COMM))
  795. return -1;
  796. dst_pio_disable(state);
  797. if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
  798. dprintk(verbose, DST_INFO, 1, "Checksum failure!");
  799. return -1; /* Checksum failure */
  800. }
  801. state->rxbuffer[7] = '\0';
  802. for (i = 0, p_dst_type = dst_tlist; i < ARRAY_SIZE(dst_tlist); i++, p_dst_type++) {
  803. if (!strncmp (&state->rxbuffer[p_dst_type->offset], p_dst_type->device_id, strlen (p_dst_type->device_id))) {
  804. use_type_flags = p_dst_type->type_flags;
  805. use_dst_type = p_dst_type->dst_type;
  806. /* Card capabilities */
  807. state->dst_hw_cap = p_dst_type->dst_feature;
  808. dprintk(verbose, DST_ERROR, 1, "Recognise [%s]\n", p_dst_type->device_id);
  809. break;
  810. }
  811. }
  812. if (i >= sizeof (dst_tlist) / sizeof (dst_tlist [0])) {
  813. dprintk(verbose, DST_ERROR, 1, "Unable to recognize %s or %s", &state->rxbuffer[0], &state->rxbuffer[1]);
  814. dprintk(verbose, DST_ERROR, 1, "please email linux-dvb@linuxtv.org with this type in");
  815. use_dst_type = DST_TYPE_IS_SAT;
  816. use_type_flags = DST_TYPE_HAS_SYMDIV;
  817. }
  818. dst_type_print(use_dst_type);
  819. state->type_flags = use_type_flags;
  820. state->dst_type = use_dst_type;
  821. dst_type_flags_print(state->type_flags);
  822. return 0;
  823. }
  824. static int dst_probe(struct dst_state *state)
  825. {
  826. mutex_init(&state->dst_mutex);
  827. if (dst_addons & DST_TYPE_HAS_CA) {
  828. if ((rdc_8820_reset(state)) < 0) {
  829. dprintk(verbose, DST_ERROR, 1, "RDC 8820 RESET Failed.");
  830. return -1;
  831. }
  832. msleep(4000);
  833. } else {
  834. msleep(100);
  835. }
  836. if ((dst_comm_init(state)) < 0) {
  837. dprintk(verbose, DST_ERROR, 1, "DST Initialization Failed.");
  838. return -1;
  839. }
  840. msleep(100);
  841. if (dst_get_device_id(state) < 0) {
  842. dprintk(verbose, DST_ERROR, 1, "unknown device.");
  843. return -1;
  844. }
  845. if (dst_get_mac(state) < 0) {
  846. dprintk(verbose, DST_INFO, 1, "MAC: Unsupported command");
  847. return 0;
  848. }
  849. if ((state->type_flags & DST_TYPE_HAS_MULTI_FE) || (state->type_flags & DST_TYPE_HAS_FW_BUILD)) {
  850. if (dst_get_tuner_info(state) < 0)
  851. dprintk(verbose, DST_INFO, 1, "Tuner: Unsupported command");
  852. }
  853. if (state->type_flags & DST_TYPE_HAS_TS204) {
  854. dst_packsize(state, 204);
  855. }
  856. if (state->type_flags & DST_TYPE_HAS_FW_BUILD) {
  857. if (dst_fw_ver(state) < 0) {
  858. dprintk(verbose, DST_INFO, 1, "FW: Unsupported command");
  859. return 0;
  860. }
  861. if (dst_card_type(state) < 0) {
  862. dprintk(verbose, DST_INFO, 1, "Card: Unsupported command");
  863. return 0;
  864. }
  865. if (dst_get_vendor(state) < 0) {
  866. dprintk(verbose, DST_INFO, 1, "Vendor: Unsupported command");
  867. return 0;
  868. }
  869. }
  870. return 0;
  871. }
  872. int dst_command(struct dst_state *state, u8 *data, u8 len)
  873. {
  874. u8 reply;
  875. mutex_lock(&state->dst_mutex);
  876. if ((dst_comm_init(state)) < 0) {
  877. dprintk(verbose, DST_NOTICE, 1, "DST Communication Initialization Failed.");
  878. goto error;
  879. }
  880. if (write_dst(state, data, len)) {
  881. dprintk(verbose, DST_INFO, 1, "Tring to recover.. ");
  882. if ((dst_error_recovery(state)) < 0) {
  883. dprintk(verbose, DST_ERROR, 1, "Recovery Failed.");
  884. goto error;
  885. }
  886. goto error;
  887. }
  888. if ((dst_pio_disable(state)) < 0) {
  889. dprintk(verbose, DST_ERROR, 1, "PIO Disable Failed.");
  890. goto error;
  891. }
  892. if (state->type_flags & DST_TYPE_HAS_FW_1)
  893. udelay(3000);
  894. if (read_dst(state, &reply, GET_ACK)) {
  895. dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
  896. if ((dst_error_recovery(state)) < 0) {
  897. dprintk(verbose, DST_INFO, 1, "Recovery Failed.");
  898. goto error;
  899. }
  900. goto error;
  901. }
  902. if (reply != ACK) {
  903. dprintk(verbose, DST_INFO, 1, "write not acknowledged 0x%02x ", reply);
  904. goto error;
  905. }
  906. if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
  907. goto error;
  908. if (state->type_flags & DST_TYPE_HAS_FW_1)
  909. udelay(3000);
  910. else
  911. udelay(2000);
  912. if (!dst_wait_dst_ready(state, NO_DELAY))
  913. goto error;
  914. if (read_dst(state, state->rxbuffer, FIXED_COMM)) {
  915. dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
  916. if ((dst_error_recovery(state)) < 0) {
  917. dprintk(verbose, DST_INFO, 1, "Recovery failed.");
  918. goto error;
  919. }
  920. goto error;
  921. }
  922. if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
  923. dprintk(verbose, DST_INFO, 1, "checksum failure");
  924. goto error;
  925. }
  926. mutex_unlock(&state->dst_mutex);
  927. return 0;
  928. error:
  929. mutex_unlock(&state->dst_mutex);
  930. return -EIO;
  931. }
  932. EXPORT_SYMBOL(dst_command);
  933. static int dst_get_signal(struct dst_state *state)
  934. {
  935. int retval;
  936. u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb };
  937. //dprintk("%s: Getting Signal strength and other parameters\n", __FUNCTION__);
  938. if ((state->diseq_flags & ATTEMPT_TUNE) == 0) {
  939. state->decode_lock = state->decode_strength = state->decode_snr = 0;
  940. return 0;
  941. }
  942. if (0 == (state->diseq_flags & HAS_LOCK)) {
  943. state->decode_lock = state->decode_strength = state->decode_snr = 0;
  944. return 0;
  945. }
  946. if (time_after_eq(jiffies, state->cur_jiff + (HZ / 5))) {
  947. retval = dst_command(state, get_signal, 8);
  948. if (retval < 0)
  949. return retval;
  950. if (state->dst_type == DST_TYPE_IS_SAT) {
  951. state->decode_lock = ((state->rxbuffer[6] & 0x10) == 0) ? 1 : 0;
  952. state->decode_strength = state->rxbuffer[5] << 8;
  953. state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
  954. } else if ((state->dst_type == DST_TYPE_IS_TERR) || (state->dst_type == DST_TYPE_IS_CABLE)) {
  955. state->decode_lock = (state->rxbuffer[1]) ? 1 : 0;
  956. state->decode_strength = state->rxbuffer[4] << 8;
  957. state->decode_snr = state->rxbuffer[3] << 8;
  958. } else if (state->dst_type == DST_TYPE_IS_ATSC) {
  959. state->decode_lock = (state->rxbuffer[6] == 0x00) ? 1 : 0;
  960. state->decode_strength = state->rxbuffer[4] << 8;
  961. state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
  962. }
  963. state->cur_jiff = jiffies;
  964. }
  965. return 0;
  966. }
  967. static int dst_tone_power_cmd(struct dst_state *state)
  968. {
  969. u8 paket[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 };
  970. if (state->dst_type == DST_TYPE_IS_TERR)
  971. return 0;
  972. paket[4] = state->tx_tuna[4];
  973. paket[2] = state->tx_tuna[2];
  974. paket[3] = state->tx_tuna[3];
  975. paket[7] = dst_check_sum (paket, 7);
  976. dst_command(state, paket, 8);
  977. return 0;
  978. }
  979. static int dst_get_tuna(struct dst_state *state)
  980. {
  981. int retval;
  982. if ((state->diseq_flags & ATTEMPT_TUNE) == 0)
  983. return 0;
  984. state->diseq_flags &= ~(HAS_LOCK);
  985. if (!dst_wait_dst_ready(state, NO_DELAY))
  986. return -EIO;
  987. if (state->type_flags & DST_TYPE_HAS_NEWTUNE)
  988. /* how to get variable length reply ???? */
  989. retval = read_dst(state, state->rx_tuna, 10);
  990. else
  991. retval = read_dst(state, &state->rx_tuna[2], FIXED_COMM);
  992. if (retval < 0) {
  993. dprintk(verbose, DST_DEBUG, 1, "read not successful");
  994. return retval;
  995. }
  996. if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
  997. if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
  998. dprintk(verbose, DST_INFO, 1, "checksum failure ? ");
  999. return -EIO;
  1000. }
  1001. } else {
  1002. if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[2], 7)) {
  1003. dprintk(verbose, DST_INFO, 1, "checksum failure? ");
  1004. return -EIO;
  1005. }
  1006. }
  1007. if (state->rx_tuna[2] == 0 && state->rx_tuna[3] == 0)
  1008. return 0;
  1009. if (state->dst_type == DST_TYPE_IS_SAT) {
  1010. state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3];
  1011. } else {
  1012. state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 16) + (state->rx_tuna[3] << 8) + state->rx_tuna[4];
  1013. }
  1014. state->decode_freq = state->decode_freq * 1000;
  1015. state->decode_lock = 1;
  1016. state->diseq_flags |= HAS_LOCK;
  1017. return 1;
  1018. }
  1019. static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
  1020. static int dst_write_tuna(struct dvb_frontend *fe)
  1021. {
  1022. struct dst_state *state = fe->demodulator_priv;
  1023. int retval;
  1024. u8 reply;
  1025. dprintk(verbose, DST_INFO, 1, "type_flags 0x%x ", state->type_flags);
  1026. state->decode_freq = 0;
  1027. state->decode_lock = state->decode_strength = state->decode_snr = 0;
  1028. if (state->dst_type == DST_TYPE_IS_SAT) {
  1029. if (!(state->diseq_flags & HAS_POWER))
  1030. dst_set_voltage(fe, SEC_VOLTAGE_13);
  1031. }
  1032. state->diseq_flags &= ~(HAS_LOCK | ATTEMPT_TUNE);
  1033. mutex_lock(&state->dst_mutex);
  1034. if ((dst_comm_init(state)) < 0) {
  1035. dprintk(verbose, DST_DEBUG, 1, "DST Communication initialization failed.");
  1036. goto error;
  1037. }
  1038. if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
  1039. state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[0], 9);
  1040. retval = write_dst(state, &state->tx_tuna[0], 10);
  1041. } else {
  1042. state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[2], 7);
  1043. retval = write_dst(state, &state->tx_tuna[2], FIXED_COMM);
  1044. }
  1045. if (retval < 0) {
  1046. dst_pio_disable(state);
  1047. dprintk(verbose, DST_DEBUG, 1, "write not successful");
  1048. goto werr;
  1049. }
  1050. if ((dst_pio_disable(state)) < 0) {
  1051. dprintk(verbose, DST_DEBUG, 1, "DST PIO disable failed !");
  1052. goto error;
  1053. }
  1054. if ((read_dst(state, &reply, GET_ACK) < 0)) {
  1055. dprintk(verbose, DST_DEBUG, 1, "read verify not successful.");
  1056. goto error;
  1057. }
  1058. if (reply != ACK) {
  1059. dprintk(verbose, DST_DEBUG, 1, "write not acknowledged 0x%02x ", reply);
  1060. goto error;
  1061. }
  1062. state->diseq_flags |= ATTEMPT_TUNE;
  1063. retval = dst_get_tuna(state);
  1064. werr:
  1065. mutex_unlock(&state->dst_mutex);
  1066. return retval;
  1067. error:
  1068. mutex_unlock(&state->dst_mutex);
  1069. return -EIO;
  1070. }
  1071. /*
  1072. * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
  1073. * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
  1074. * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
  1075. * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
  1076. * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
  1077. * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
  1078. * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
  1079. * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
  1080. * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
  1081. * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
  1082. * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
  1083. */
  1084. static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
  1085. {
  1086. struct dst_state *state = fe->demodulator_priv;
  1087. u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
  1088. if (state->dst_type != DST_TYPE_IS_SAT)
  1089. return 0;
  1090. if (cmd->msg_len == 0 || cmd->msg_len > 4)
  1091. return -EINVAL;
  1092. memcpy(&paket[3], cmd->msg, cmd->msg_len);
  1093. paket[7] = dst_check_sum(&paket[0], 7);
  1094. dst_command(state, paket, 8);
  1095. return 0;
  1096. }
  1097. static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  1098. {
  1099. int need_cmd;
  1100. struct dst_state *state = fe->demodulator_priv;
  1101. state->voltage = voltage;
  1102. if (state->dst_type != DST_TYPE_IS_SAT)
  1103. return 0;
  1104. need_cmd = 0;
  1105. switch (voltage) {
  1106. case SEC_VOLTAGE_13:
  1107. case SEC_VOLTAGE_18:
  1108. if ((state->diseq_flags & HAS_POWER) == 0)
  1109. need_cmd = 1;
  1110. state->diseq_flags |= HAS_POWER;
  1111. state->tx_tuna[4] = 0x01;
  1112. break;
  1113. case SEC_VOLTAGE_OFF:
  1114. need_cmd = 1;
  1115. state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
  1116. state->tx_tuna[4] = 0x00;
  1117. break;
  1118. default:
  1119. return -EINVAL;
  1120. }
  1121. if (need_cmd)
  1122. dst_tone_power_cmd(state);
  1123. return 0;
  1124. }
  1125. static int dst_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
  1126. {
  1127. struct dst_state *state = fe->demodulator_priv;
  1128. state->tone = tone;
  1129. if (state->dst_type != DST_TYPE_IS_SAT)
  1130. return 0;
  1131. switch (tone) {
  1132. case SEC_TONE_OFF:
  1133. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1134. state->tx_tuna[2] = 0x00;
  1135. else
  1136. state->tx_tuna[2] = 0xff;
  1137. break;
  1138. case SEC_TONE_ON:
  1139. state->tx_tuna[2] = 0x02;
  1140. break;
  1141. default:
  1142. return -EINVAL;
  1143. }
  1144. dst_tone_power_cmd(state);
  1145. return 0;
  1146. }
  1147. static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd)
  1148. {
  1149. struct dst_state *state = fe->demodulator_priv;
  1150. if (state->dst_type != DST_TYPE_IS_SAT)
  1151. return 0;
  1152. state->minicmd = minicmd;
  1153. switch (minicmd) {
  1154. case SEC_MINI_A:
  1155. state->tx_tuna[3] = 0x02;
  1156. break;
  1157. case SEC_MINI_B:
  1158. state->tx_tuna[3] = 0xff;
  1159. break;
  1160. }
  1161. dst_tone_power_cmd(state);
  1162. return 0;
  1163. }
  1164. static int dst_init(struct dvb_frontend *fe)
  1165. {
  1166. struct dst_state *state = fe->demodulator_priv;
  1167. static u8 sat_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x00, 0x73, 0x21, 0x00, 0x00 };
  1168. static u8 sat_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x55, 0xbd, 0x50, 0x00, 0x00 };
  1169. static u8 ter_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1170. static u8 ter_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1171. static u8 cab_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1172. static u8 cab_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1173. static u8 atsc_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1174. static u8 atsc_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
  1175. state->inversion = INVERSION_OFF;
  1176. state->voltage = SEC_VOLTAGE_13;
  1177. state->tone = SEC_TONE_OFF;
  1178. state->diseq_flags = 0;
  1179. state->k22 = 0x02;
  1180. state->bandwidth = BANDWIDTH_7_MHZ;
  1181. state->cur_jiff = jiffies;
  1182. if (state->dst_type == DST_TYPE_IS_SAT)
  1183. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_NEWTUNE) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
  1184. else if (state->dst_type == DST_TYPE_IS_TERR)
  1185. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_NEWTUNE) ? ter_tuna_188 : ter_tuna_204), sizeof (ter_tuna_204));
  1186. else if (state->dst_type == DST_TYPE_IS_CABLE)
  1187. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_NEWTUNE) ? cab_tuna_188 : cab_tuna_204), sizeof (cab_tuna_204));
  1188. else if (state->dst_type == DST_TYPE_IS_ATSC)
  1189. memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_NEWTUNE) ? atsc_tuna_188 : atsc_tuna_204), sizeof (atsc_tuna_204));
  1190. return 0;
  1191. }
  1192. static int dst_read_status(struct dvb_frontend *fe, fe_status_t *status)
  1193. {
  1194. struct dst_state *state = fe->demodulator_priv;
  1195. *status = 0;
  1196. if (state->diseq_flags & HAS_LOCK) {
  1197. // dst_get_signal(state); // don't require(?) to ask MCU
  1198. if (state->decode_lock)
  1199. *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI;
  1200. }
  1201. return 0;
  1202. }
  1203. static int dst_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  1204. {
  1205. struct dst_state *state = fe->demodulator_priv;
  1206. dst_get_signal(state);
  1207. *strength = state->decode_strength;
  1208. return 0;
  1209. }
  1210. static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
  1211. {
  1212. struct dst_state *state = fe->demodulator_priv;
  1213. dst_get_signal(state);
  1214. *snr = state->decode_snr;
  1215. return 0;
  1216. }
  1217. static int dst_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
  1218. {
  1219. struct dst_state *state = fe->demodulator_priv;
  1220. if (p != NULL) {
  1221. dst_set_freq(state, p->frequency);
  1222. dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
  1223. if (state->dst_type == DST_TYPE_IS_SAT) {
  1224. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1225. dst_set_inversion(state, p->inversion);
  1226. dst_set_fec(state, p->u.qpsk.fec_inner);
  1227. dst_set_symbolrate(state, p->u.qpsk.symbol_rate);
  1228. dst_set_polarization(state);
  1229. dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate);
  1230. } else if (state->dst_type == DST_TYPE_IS_TERR)
  1231. dst_set_bandwidth(state, p->u.ofdm.bandwidth);
  1232. else if (state->dst_type == DST_TYPE_IS_CABLE) {
  1233. dst_set_fec(state, p->u.qam.fec_inner);
  1234. dst_set_symbolrate(state, p->u.qam.symbol_rate);
  1235. dst_set_modulation(state, p->u.qam.modulation);
  1236. }
  1237. dst_write_tuna(fe);
  1238. }
  1239. return 0;
  1240. }
  1241. static int dst_tune_frontend(struct dvb_frontend* fe,
  1242. struct dvb_frontend_parameters* p,
  1243. unsigned int mode_flags,
  1244. int *delay,
  1245. fe_status_t *status)
  1246. {
  1247. struct dst_state *state = fe->demodulator_priv;
  1248. if (p != NULL) {
  1249. dst_set_freq(state, p->frequency);
  1250. dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
  1251. if (state->dst_type == DST_TYPE_IS_SAT) {
  1252. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1253. dst_set_inversion(state, p->inversion);
  1254. dst_set_fec(state, p->u.qpsk.fec_inner);
  1255. dst_set_symbolrate(state, p->u.qpsk.symbol_rate);
  1256. dst_set_polarization(state);
  1257. dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate);
  1258. } else if (state->dst_type == DST_TYPE_IS_TERR)
  1259. dst_set_bandwidth(state, p->u.ofdm.bandwidth);
  1260. else if (state->dst_type == DST_TYPE_IS_CABLE) {
  1261. dst_set_fec(state, p->u.qam.fec_inner);
  1262. dst_set_symbolrate(state, p->u.qam.symbol_rate);
  1263. dst_set_modulation(state, p->u.qam.modulation);
  1264. }
  1265. dst_write_tuna(fe);
  1266. }
  1267. if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
  1268. dst_read_status(fe, status);
  1269. *delay = HZ/10;
  1270. return 0;
  1271. }
  1272. static int dst_get_tuning_algo(struct dvb_frontend *fe)
  1273. {
  1274. return dst_algo;
  1275. }
  1276. static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
  1277. {
  1278. struct dst_state *state = fe->demodulator_priv;
  1279. p->frequency = state->decode_freq;
  1280. if (state->dst_type == DST_TYPE_IS_SAT) {
  1281. if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
  1282. p->inversion = state->inversion;
  1283. p->u.qpsk.symbol_rate = state->symbol_rate;
  1284. p->u.qpsk.fec_inner = dst_get_fec(state);
  1285. } else if (state->dst_type == DST_TYPE_IS_TERR) {
  1286. p->u.ofdm.bandwidth = state->bandwidth;
  1287. } else if (state->dst_type == DST_TYPE_IS_CABLE) {
  1288. p->u.qam.symbol_rate = state->symbol_rate;
  1289. p->u.qam.fec_inner = dst_get_fec(state);
  1290. p->u.qam.modulation = dst_get_modulation(state);
  1291. }
  1292. return 0;
  1293. }
  1294. static void dst_release(struct dvb_frontend *fe)
  1295. {
  1296. struct dst_state *state = fe->demodulator_priv;
  1297. kfree(state);
  1298. }
  1299. static struct dvb_frontend_ops dst_dvbt_ops;
  1300. static struct dvb_frontend_ops dst_dvbs_ops;
  1301. static struct dvb_frontend_ops dst_dvbc_ops;
  1302. static struct dvb_frontend_ops dst_atsc_ops;
  1303. struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter)
  1304. {
  1305. /* check if the ASIC is there */
  1306. if (dst_probe(state) < 0) {
  1307. kfree(state);
  1308. return NULL;
  1309. }
  1310. /* determine settings based on type */
  1311. /* create dvb_frontend */
  1312. switch (state->dst_type) {
  1313. case DST_TYPE_IS_TERR:
  1314. memcpy(&state->frontend.ops, &dst_dvbt_ops, sizeof(struct dvb_frontend_ops));
  1315. break;
  1316. case DST_TYPE_IS_CABLE:
  1317. memcpy(&state->frontend.ops, &dst_dvbc_ops, sizeof(struct dvb_frontend_ops));
  1318. break;
  1319. case DST_TYPE_IS_SAT:
  1320. memcpy(&state->frontend.ops, &dst_dvbs_ops, sizeof(struct dvb_frontend_ops));
  1321. break;
  1322. case DST_TYPE_IS_ATSC:
  1323. memcpy(&state->frontend.ops, &dst_atsc_ops, sizeof(struct dvb_frontend_ops));
  1324. break;
  1325. default:
  1326. dprintk(verbose, DST_ERROR, 1, "unknown DST type. please report to the LinuxTV.org DVB mailinglist.");
  1327. kfree(state);
  1328. return NULL;
  1329. }
  1330. state->frontend.demodulator_priv = state;
  1331. return state; /* Manu (DST is a card not a frontend) */
  1332. }
  1333. EXPORT_SYMBOL(dst_attach);
  1334. static struct dvb_frontend_ops dst_dvbt_ops = {
  1335. .info = {
  1336. .name = "DST DVB-T",
  1337. .type = FE_OFDM,
  1338. .frequency_min = 137000000,
  1339. .frequency_max = 858000000,
  1340. .frequency_stepsize = 166667,
  1341. .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO
  1342. },
  1343. .release = dst_release,
  1344. .init = dst_init,
  1345. .tune = dst_tune_frontend,
  1346. .set_frontend = dst_set_frontend,
  1347. .get_frontend = dst_get_frontend,
  1348. .get_frontend_algo = dst_get_tuning_algo,
  1349. .read_status = dst_read_status,
  1350. .read_signal_strength = dst_read_signal_strength,
  1351. .read_snr = dst_read_snr,
  1352. };
  1353. static struct dvb_frontend_ops dst_dvbs_ops = {
  1354. .info = {
  1355. .name = "DST DVB-S",
  1356. .type = FE_QPSK,
  1357. .frequency_min = 950000,
  1358. .frequency_max = 2150000,
  1359. .frequency_stepsize = 1000, /* kHz for QPSK frontends */
  1360. .frequency_tolerance = 29500,
  1361. .symbol_rate_min = 1000000,
  1362. .symbol_rate_max = 45000000,
  1363. /* . symbol_rate_tolerance = ???,*/
  1364. .caps = FE_CAN_FEC_AUTO | FE_CAN_QPSK
  1365. },
  1366. .release = dst_release,
  1367. .init = dst_init,
  1368. .tune = dst_tune_frontend,
  1369. .set_frontend = dst_set_frontend,
  1370. .get_frontend = dst_get_frontend,
  1371. .get_frontend_algo = dst_get_tuning_algo,
  1372. .read_status = dst_read_status,
  1373. .read_signal_strength = dst_read_signal_strength,
  1374. .read_snr = dst_read_snr,
  1375. .diseqc_send_burst = dst_send_burst,
  1376. .diseqc_send_master_cmd = dst_set_diseqc,
  1377. .set_voltage = dst_set_voltage,
  1378. .set_tone = dst_set_tone,
  1379. };
  1380. static struct dvb_frontend_ops dst_dvbc_ops = {
  1381. .info = {
  1382. .name = "DST DVB-C",
  1383. .type = FE_QAM,
  1384. .frequency_stepsize = 62500,
  1385. .frequency_min = 51000000,
  1386. .frequency_max = 858000000,
  1387. .symbol_rate_min = 1000000,
  1388. .symbol_rate_max = 45000000,
  1389. /* . symbol_rate_tolerance = ???,*/
  1390. .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO
  1391. },
  1392. .release = dst_release,
  1393. .init = dst_init,
  1394. .tune = dst_tune_frontend,
  1395. .set_frontend = dst_set_frontend,
  1396. .get_frontend = dst_get_frontend,
  1397. .get_frontend_algo = dst_get_tuning_algo,
  1398. .read_status = dst_read_status,
  1399. .read_signal_strength = dst_read_signal_strength,
  1400. .read_snr = dst_read_snr,
  1401. };
  1402. static struct dvb_frontend_ops dst_atsc_ops = {
  1403. .info = {
  1404. .name = "DST ATSC",
  1405. .type = FE_ATSC,
  1406. .frequency_stepsize = 62500,
  1407. .frequency_min = 510000000,
  1408. .frequency_max = 858000000,
  1409. .symbol_rate_min = 1000000,
  1410. .symbol_rate_max = 45000000,
  1411. .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  1412. },
  1413. .release = dst_release,
  1414. .init = dst_init,
  1415. .tune = dst_tune_frontend,
  1416. .set_frontend = dst_set_frontend,
  1417. .get_frontend = dst_get_frontend,
  1418. .get_frontend_algo = dst_get_tuning_algo,
  1419. .read_status = dst_read_status,
  1420. .read_signal_strength = dst_read_signal_strength,
  1421. .read_snr = dst_read_snr,
  1422. };
  1423. MODULE_DESCRIPTION("DST DVB-S/T/C/ATSC Combo Frontend driver");
  1424. MODULE_AUTHOR("Jamie Honan, Manu Abraham");
  1425. MODULE_LICENSE("GPL");