time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/delay.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/div64.h>
  41. #include <asm/vdso.h>
  42. #include <asm/irq.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/timer.h>
  45. #include <asm/etr.h>
  46. #include <asm/cio.h>
  47. /* change this if you have some constant time drift */
  48. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  49. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  50. /*
  51. * Create a small time difference between the timer interrupts
  52. * on the different cpus to avoid lock contention.
  53. */
  54. #define CPU_DEVIATION (smp_processor_id() << 12)
  55. #define TICK_SIZE tick
  56. u64 sched_clock_base_cc = -1; /* Force to data section. */
  57. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  58. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  59. /*
  60. * Scheduler clock - returns current time in nanosec units.
  61. */
  62. unsigned long long notrace sched_clock(void)
  63. {
  64. return (get_clock_monotonic() * 125) >> 9;
  65. }
  66. /*
  67. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  68. */
  69. unsigned long long monotonic_clock(void)
  70. {
  71. return sched_clock();
  72. }
  73. EXPORT_SYMBOL(monotonic_clock);
  74. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  75. {
  76. unsigned long long sec;
  77. sec = todval >> 12;
  78. do_div(sec, 1000000);
  79. xtime->tv_sec = sec;
  80. todval -= (sec * 1000000) << 12;
  81. xtime->tv_nsec = ((todval * 1000) >> 12);
  82. }
  83. EXPORT_SYMBOL(tod_to_timeval);
  84. void clock_comparator_work(void)
  85. {
  86. struct clock_event_device *cd;
  87. S390_lowcore.clock_comparator = -1ULL;
  88. set_clock_comparator(S390_lowcore.clock_comparator);
  89. cd = &__get_cpu_var(comparators);
  90. cd->event_handler(cd);
  91. }
  92. /*
  93. * Fixup the clock comparator.
  94. */
  95. static void fixup_clock_comparator(unsigned long long delta)
  96. {
  97. /* If nobody is waiting there's nothing to fix. */
  98. if (S390_lowcore.clock_comparator == -1ULL)
  99. return;
  100. S390_lowcore.clock_comparator += delta;
  101. set_clock_comparator(S390_lowcore.clock_comparator);
  102. }
  103. static int s390_next_event(unsigned long delta,
  104. struct clock_event_device *evt)
  105. {
  106. S390_lowcore.clock_comparator = get_clock() + delta;
  107. set_clock_comparator(S390_lowcore.clock_comparator);
  108. return 0;
  109. }
  110. static void s390_set_mode(enum clock_event_mode mode,
  111. struct clock_event_device *evt)
  112. {
  113. }
  114. /*
  115. * Set up lowcore and control register of the current cpu to
  116. * enable TOD clock and clock comparator interrupts.
  117. */
  118. void init_cpu_timer(void)
  119. {
  120. struct clock_event_device *cd;
  121. int cpu;
  122. S390_lowcore.clock_comparator = -1ULL;
  123. set_clock_comparator(S390_lowcore.clock_comparator);
  124. cpu = smp_processor_id();
  125. cd = &per_cpu(comparators, cpu);
  126. cd->name = "comparator";
  127. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  128. cd->mult = 16777;
  129. cd->shift = 12;
  130. cd->min_delta_ns = 1;
  131. cd->max_delta_ns = LONG_MAX;
  132. cd->rating = 400;
  133. cd->cpumask = cpumask_of(cpu);
  134. cd->set_next_event = s390_next_event;
  135. cd->set_mode = s390_set_mode;
  136. clockevents_register_device(cd);
  137. /* Enable clock comparator timer interrupt. */
  138. __ctl_set_bit(0,11);
  139. /* Always allow the timing alert external interrupt. */
  140. __ctl_set_bit(0, 4);
  141. }
  142. static void clock_comparator_interrupt(__u16 code)
  143. {
  144. if (S390_lowcore.clock_comparator == -1ULL)
  145. set_clock_comparator(S390_lowcore.clock_comparator);
  146. }
  147. static void etr_timing_alert(struct etr_irq_parm *);
  148. static void stp_timing_alert(struct stp_irq_parm *);
  149. static void timing_alert_interrupt(__u16 code)
  150. {
  151. if (S390_lowcore.ext_params & 0x00c40000)
  152. etr_timing_alert((struct etr_irq_parm *)
  153. &S390_lowcore.ext_params);
  154. if (S390_lowcore.ext_params & 0x00038000)
  155. stp_timing_alert((struct stp_irq_parm *)
  156. &S390_lowcore.ext_params);
  157. }
  158. static void etr_reset(void);
  159. static void stp_reset(void);
  160. unsigned long read_persistent_clock(void)
  161. {
  162. struct timespec ts;
  163. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
  164. return ts.tv_sec;
  165. }
  166. static cycle_t read_tod_clock(struct clocksource *cs)
  167. {
  168. return get_clock();
  169. }
  170. static struct clocksource clocksource_tod = {
  171. .name = "tod",
  172. .rating = 400,
  173. .read = read_tod_clock,
  174. .mask = -1ULL,
  175. .mult = 1000,
  176. .shift = 12,
  177. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  178. };
  179. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  180. {
  181. if (clock != &clocksource_tod)
  182. return;
  183. /* Make userspace gettimeofday spin until we're done. */
  184. ++vdso_data->tb_update_count;
  185. smp_wmb();
  186. vdso_data->xtime_tod_stamp = clock->cycle_last;
  187. vdso_data->xtime_clock_sec = xtime.tv_sec;
  188. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  189. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  190. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  191. smp_wmb();
  192. ++vdso_data->tb_update_count;
  193. }
  194. extern struct timezone sys_tz;
  195. void update_vsyscall_tz(void)
  196. {
  197. /* Make userspace gettimeofday spin until we're done. */
  198. ++vdso_data->tb_update_count;
  199. smp_wmb();
  200. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  201. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  202. smp_wmb();
  203. ++vdso_data->tb_update_count;
  204. }
  205. /*
  206. * Initialize the TOD clock and the CPU timer of
  207. * the boot cpu.
  208. */
  209. void __init time_init(void)
  210. {
  211. struct timespec ts;
  212. unsigned long flags;
  213. cycle_t now;
  214. /* Reset time synchronization interfaces. */
  215. etr_reset();
  216. stp_reset();
  217. /* request the clock comparator external interrupt */
  218. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  219. panic("Couldn't request external interrupt 0x1004");
  220. /* request the timing alert external interrupt */
  221. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  222. panic("Couldn't request external interrupt 0x1406");
  223. if (clocksource_register(&clocksource_tod) != 0)
  224. panic("Could not register TOD clock source");
  225. /*
  226. * The TOD clock is an accurate clock. The xtime should be
  227. * initialized in a way that the difference between TOD and
  228. * xtime is reasonably small. Too bad that timekeeping_init
  229. * sets xtime.tv_nsec to zero. In addition the clock source
  230. * change from the jiffies clock source to the TOD clock
  231. * source add another error of up to 1/HZ second. The same
  232. * function sets wall_to_monotonic to a value that is too
  233. * small for /proc/uptime to be accurate.
  234. * Reset xtime and wall_to_monotonic to sane values.
  235. */
  236. write_seqlock_irqsave(&xtime_lock, flags);
  237. now = get_clock();
  238. tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
  239. clocksource_tod.cycle_last = now;
  240. clocksource_tod.raw_time = xtime;
  241. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
  242. set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
  243. write_sequnlock_irqrestore(&xtime_lock, flags);
  244. /* Enable TOD clock interrupts on the boot cpu. */
  245. init_cpu_timer();
  246. /* Enable cpu timer interrupts on the boot cpu. */
  247. vtime_init();
  248. }
  249. /*
  250. * The time is "clock". old is what we think the time is.
  251. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  252. * "delay" is an approximation how long the synchronization took. If
  253. * the time correction is positive, then "delay" is subtracted from
  254. * the time difference and only the remaining part is passed to ntp.
  255. */
  256. static unsigned long long adjust_time(unsigned long long old,
  257. unsigned long long clock,
  258. unsigned long long delay)
  259. {
  260. unsigned long long delta, ticks;
  261. struct timex adjust;
  262. if (clock > old) {
  263. /* It is later than we thought. */
  264. delta = ticks = clock - old;
  265. delta = ticks = (delta < delay) ? 0 : delta - delay;
  266. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  267. adjust.offset = ticks * (1000000 / HZ);
  268. } else {
  269. /* It is earlier than we thought. */
  270. delta = ticks = old - clock;
  271. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  272. delta = -delta;
  273. adjust.offset = -ticks * (1000000 / HZ);
  274. }
  275. sched_clock_base_cc += delta;
  276. if (adjust.offset != 0) {
  277. pr_notice("The ETR interface has adjusted the clock "
  278. "by %li microseconds\n", adjust.offset);
  279. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  280. do_adjtimex(&adjust);
  281. }
  282. return delta;
  283. }
  284. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  285. static DEFINE_MUTEX(clock_sync_mutex);
  286. static unsigned long clock_sync_flags;
  287. #define CLOCK_SYNC_HAS_ETR 0
  288. #define CLOCK_SYNC_HAS_STP 1
  289. #define CLOCK_SYNC_ETR 2
  290. #define CLOCK_SYNC_STP 3
  291. /*
  292. * The synchronous get_clock function. It will write the current clock
  293. * value to the clock pointer and return 0 if the clock is in sync with
  294. * the external time source. If the clock mode is local it will return
  295. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  296. * reference.
  297. */
  298. int get_sync_clock(unsigned long long *clock)
  299. {
  300. atomic_t *sw_ptr;
  301. unsigned int sw0, sw1;
  302. sw_ptr = &get_cpu_var(clock_sync_word);
  303. sw0 = atomic_read(sw_ptr);
  304. *clock = get_clock();
  305. sw1 = atomic_read(sw_ptr);
  306. put_cpu_var(clock_sync_sync);
  307. if (sw0 == sw1 && (sw0 & 0x80000000U))
  308. /* Success: time is in sync. */
  309. return 0;
  310. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  311. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  312. return -ENOSYS;
  313. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  314. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  315. return -EACCES;
  316. return -EAGAIN;
  317. }
  318. EXPORT_SYMBOL(get_sync_clock);
  319. /*
  320. * Make get_sync_clock return -EAGAIN.
  321. */
  322. static void disable_sync_clock(void *dummy)
  323. {
  324. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  325. /*
  326. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  327. * fail until the sync bit is turned back on. In addition
  328. * increase the "sequence" counter to avoid the race of an
  329. * etr event and the complete recovery against get_sync_clock.
  330. */
  331. atomic_clear_mask(0x80000000, sw_ptr);
  332. atomic_inc(sw_ptr);
  333. }
  334. /*
  335. * Make get_sync_clock return 0 again.
  336. * Needs to be called from a context disabled for preemption.
  337. */
  338. static void enable_sync_clock(void)
  339. {
  340. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  341. atomic_set_mask(0x80000000, sw_ptr);
  342. }
  343. /*
  344. * Function to check if the clock is in sync.
  345. */
  346. static inline int check_sync_clock(void)
  347. {
  348. atomic_t *sw_ptr;
  349. int rc;
  350. sw_ptr = &get_cpu_var(clock_sync_word);
  351. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  352. put_cpu_var(clock_sync_sync);
  353. return rc;
  354. }
  355. /* Single threaded workqueue used for etr and stp sync events */
  356. static struct workqueue_struct *time_sync_wq;
  357. static void __init time_init_wq(void)
  358. {
  359. if (time_sync_wq)
  360. return;
  361. time_sync_wq = create_singlethread_workqueue("timesync");
  362. stop_machine_create();
  363. }
  364. /*
  365. * External Time Reference (ETR) code.
  366. */
  367. static int etr_port0_online;
  368. static int etr_port1_online;
  369. static int etr_steai_available;
  370. static int __init early_parse_etr(char *p)
  371. {
  372. if (strncmp(p, "off", 3) == 0)
  373. etr_port0_online = etr_port1_online = 0;
  374. else if (strncmp(p, "port0", 5) == 0)
  375. etr_port0_online = 1;
  376. else if (strncmp(p, "port1", 5) == 0)
  377. etr_port1_online = 1;
  378. else if (strncmp(p, "on", 2) == 0)
  379. etr_port0_online = etr_port1_online = 1;
  380. return 0;
  381. }
  382. early_param("etr", early_parse_etr);
  383. enum etr_event {
  384. ETR_EVENT_PORT0_CHANGE,
  385. ETR_EVENT_PORT1_CHANGE,
  386. ETR_EVENT_PORT_ALERT,
  387. ETR_EVENT_SYNC_CHECK,
  388. ETR_EVENT_SWITCH_LOCAL,
  389. ETR_EVENT_UPDATE,
  390. };
  391. /*
  392. * Valid bit combinations of the eacr register are (x = don't care):
  393. * e0 e1 dp p0 p1 ea es sl
  394. * 0 0 x 0 0 0 0 0 initial, disabled state
  395. * 0 0 x 0 1 1 0 0 port 1 online
  396. * 0 0 x 1 0 1 0 0 port 0 online
  397. * 0 0 x 1 1 1 0 0 both ports online
  398. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  399. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  400. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  401. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  402. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  403. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  404. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  405. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  406. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  407. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  408. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  409. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  410. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  411. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  412. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  413. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  414. */
  415. static struct etr_eacr etr_eacr;
  416. static u64 etr_tolec; /* time of last eacr update */
  417. static struct etr_aib etr_port0;
  418. static int etr_port0_uptodate;
  419. static struct etr_aib etr_port1;
  420. static int etr_port1_uptodate;
  421. static unsigned long etr_events;
  422. static struct timer_list etr_timer;
  423. static void etr_timeout(unsigned long dummy);
  424. static void etr_work_fn(struct work_struct *work);
  425. static DEFINE_MUTEX(etr_work_mutex);
  426. static DECLARE_WORK(etr_work, etr_work_fn);
  427. /*
  428. * Reset ETR attachment.
  429. */
  430. static void etr_reset(void)
  431. {
  432. etr_eacr = (struct etr_eacr) {
  433. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  434. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  435. .es = 0, .sl = 0 };
  436. if (etr_setr(&etr_eacr) == 0) {
  437. etr_tolec = get_clock();
  438. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  439. if (etr_port0_online && etr_port1_online)
  440. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  441. } else if (etr_port0_online || etr_port1_online) {
  442. pr_warning("The real or virtual hardware system does "
  443. "not provide an ETR interface\n");
  444. etr_port0_online = etr_port1_online = 0;
  445. }
  446. }
  447. static int __init etr_init(void)
  448. {
  449. struct etr_aib aib;
  450. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  451. return 0;
  452. time_init_wq();
  453. /* Check if this machine has the steai instruction. */
  454. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  455. etr_steai_available = 1;
  456. setup_timer(&etr_timer, etr_timeout, 0UL);
  457. if (etr_port0_online) {
  458. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  459. queue_work(time_sync_wq, &etr_work);
  460. }
  461. if (etr_port1_online) {
  462. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  463. queue_work(time_sync_wq, &etr_work);
  464. }
  465. return 0;
  466. }
  467. arch_initcall(etr_init);
  468. /*
  469. * Two sorts of ETR machine checks. The architecture reads:
  470. * "When a machine-check niterruption occurs and if a switch-to-local or
  471. * ETR-sync-check interrupt request is pending but disabled, this pending
  472. * disabled interruption request is indicated and is cleared".
  473. * Which means that we can get etr_switch_to_local events from the machine
  474. * check handler although the interruption condition is disabled. Lovely..
  475. */
  476. /*
  477. * Switch to local machine check. This is called when the last usable
  478. * ETR port goes inactive. After switch to local the clock is not in sync.
  479. */
  480. void etr_switch_to_local(void)
  481. {
  482. if (!etr_eacr.sl)
  483. return;
  484. disable_sync_clock(NULL);
  485. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  486. queue_work(time_sync_wq, &etr_work);
  487. }
  488. /*
  489. * ETR sync check machine check. This is called when the ETR OTE and the
  490. * local clock OTE are farther apart than the ETR sync check tolerance.
  491. * After a ETR sync check the clock is not in sync. The machine check
  492. * is broadcasted to all cpus at the same time.
  493. */
  494. void etr_sync_check(void)
  495. {
  496. if (!etr_eacr.es)
  497. return;
  498. disable_sync_clock(NULL);
  499. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  500. queue_work(time_sync_wq, &etr_work);
  501. }
  502. /*
  503. * ETR timing alert. There are two causes:
  504. * 1) port state change, check the usability of the port
  505. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  506. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  507. * or ETR-data word 4 (edf4) has changed.
  508. */
  509. static void etr_timing_alert(struct etr_irq_parm *intparm)
  510. {
  511. if (intparm->pc0)
  512. /* ETR port 0 state change. */
  513. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  514. if (intparm->pc1)
  515. /* ETR port 1 state change. */
  516. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  517. if (intparm->eai)
  518. /*
  519. * ETR port alert on either port 0, 1 or both.
  520. * Both ports are not up-to-date now.
  521. */
  522. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  523. queue_work(time_sync_wq, &etr_work);
  524. }
  525. static void etr_timeout(unsigned long dummy)
  526. {
  527. set_bit(ETR_EVENT_UPDATE, &etr_events);
  528. queue_work(time_sync_wq, &etr_work);
  529. }
  530. /*
  531. * Check if the etr mode is pss.
  532. */
  533. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  534. {
  535. return eacr.es && !eacr.sl;
  536. }
  537. /*
  538. * Check if the etr mode is etr.
  539. */
  540. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  541. {
  542. return eacr.es && eacr.sl;
  543. }
  544. /*
  545. * Check if the port can be used for TOD synchronization.
  546. * For PPS mode the port has to receive OTEs. For ETR mode
  547. * the port has to receive OTEs, the ETR stepping bit has to
  548. * be zero and the validity bits for data frame 1, 2, and 3
  549. * have to be 1.
  550. */
  551. static int etr_port_valid(struct etr_aib *aib, int port)
  552. {
  553. unsigned int psc;
  554. /* Check that this port is receiving OTEs. */
  555. if (aib->tsp == 0)
  556. return 0;
  557. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  558. if (psc == etr_lpsc_pps_mode)
  559. return 1;
  560. if (psc == etr_lpsc_operational_step)
  561. return !aib->esw.y && aib->slsw.v1 &&
  562. aib->slsw.v2 && aib->slsw.v3;
  563. return 0;
  564. }
  565. /*
  566. * Check if two ports are on the same network.
  567. */
  568. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  569. {
  570. // FIXME: any other fields we have to compare?
  571. return aib1->edf1.net_id == aib2->edf1.net_id;
  572. }
  573. /*
  574. * Wrapper for etr_stei that converts physical port states
  575. * to logical port states to be consistent with the output
  576. * of stetr (see etr_psc vs. etr_lpsc).
  577. */
  578. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  579. {
  580. BUG_ON(etr_steai(aib, func) != 0);
  581. /* Convert port state to logical port state. */
  582. if (aib->esw.psc0 == 1)
  583. aib->esw.psc0 = 2;
  584. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  585. aib->esw.psc0 = 1;
  586. if (aib->esw.psc1 == 1)
  587. aib->esw.psc1 = 2;
  588. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  589. aib->esw.psc1 = 1;
  590. }
  591. /*
  592. * Check if the aib a2 is still connected to the same attachment as
  593. * aib a1, the etv values differ by one and a2 is valid.
  594. */
  595. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  596. {
  597. int state_a1, state_a2;
  598. /* Paranoia check: e0/e1 should better be the same. */
  599. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  600. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  601. return 0;
  602. /* Still connected to the same etr ? */
  603. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  604. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  605. if (state_a1 == etr_lpsc_operational_step) {
  606. if (state_a2 != etr_lpsc_operational_step ||
  607. a1->edf1.net_id != a2->edf1.net_id ||
  608. a1->edf1.etr_id != a2->edf1.etr_id ||
  609. a1->edf1.etr_pn != a2->edf1.etr_pn)
  610. return 0;
  611. } else if (state_a2 != etr_lpsc_pps_mode)
  612. return 0;
  613. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  614. if (a1->edf2.etv + 1 != a2->edf2.etv)
  615. return 0;
  616. if (!etr_port_valid(a2, p))
  617. return 0;
  618. return 1;
  619. }
  620. struct clock_sync_data {
  621. atomic_t cpus;
  622. int in_sync;
  623. unsigned long long fixup_cc;
  624. int etr_port;
  625. struct etr_aib *etr_aib;
  626. };
  627. static void clock_sync_cpu(struct clock_sync_data *sync)
  628. {
  629. atomic_dec(&sync->cpus);
  630. enable_sync_clock();
  631. /*
  632. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  633. * is called on all other cpus while the TOD clocks is stopped.
  634. * __udelay will stop the cpu on an enabled wait psw until the
  635. * TOD is running again.
  636. */
  637. while (sync->in_sync == 0) {
  638. __udelay(1);
  639. /*
  640. * A different cpu changes *in_sync. Therefore use
  641. * barrier() to force memory access.
  642. */
  643. barrier();
  644. }
  645. if (sync->in_sync != 1)
  646. /* Didn't work. Clear per-cpu in sync bit again. */
  647. disable_sync_clock(NULL);
  648. /*
  649. * This round of TOD syncing is done. Set the clock comparator
  650. * to the next tick and let the processor continue.
  651. */
  652. fixup_clock_comparator(sync->fixup_cc);
  653. }
  654. /*
  655. * Sync the TOD clock using the port refered to by aibp. This port
  656. * has to be enabled and the other port has to be disabled. The
  657. * last eacr update has to be more than 1.6 seconds in the past.
  658. */
  659. static int etr_sync_clock(void *data)
  660. {
  661. static int first;
  662. unsigned long long clock, old_clock, delay, delta;
  663. struct clock_sync_data *etr_sync;
  664. struct etr_aib *sync_port, *aib;
  665. int port;
  666. int rc;
  667. etr_sync = data;
  668. if (xchg(&first, 1) == 1) {
  669. /* Slave */
  670. clock_sync_cpu(etr_sync);
  671. return 0;
  672. }
  673. /* Wait until all other cpus entered the sync function. */
  674. while (atomic_read(&etr_sync->cpus) != 0)
  675. cpu_relax();
  676. port = etr_sync->etr_port;
  677. aib = etr_sync->etr_aib;
  678. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  679. enable_sync_clock();
  680. /* Set clock to next OTE. */
  681. __ctl_set_bit(14, 21);
  682. __ctl_set_bit(0, 29);
  683. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  684. old_clock = get_clock();
  685. if (set_clock(clock) == 0) {
  686. __udelay(1); /* Wait for the clock to start. */
  687. __ctl_clear_bit(0, 29);
  688. __ctl_clear_bit(14, 21);
  689. etr_stetr(aib);
  690. /* Adjust Linux timing variables. */
  691. delay = (unsigned long long)
  692. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  693. delta = adjust_time(old_clock, clock, delay);
  694. etr_sync->fixup_cc = delta;
  695. fixup_clock_comparator(delta);
  696. /* Verify that the clock is properly set. */
  697. if (!etr_aib_follows(sync_port, aib, port)) {
  698. /* Didn't work. */
  699. disable_sync_clock(NULL);
  700. etr_sync->in_sync = -EAGAIN;
  701. rc = -EAGAIN;
  702. } else {
  703. etr_sync->in_sync = 1;
  704. rc = 0;
  705. }
  706. } else {
  707. /* Could not set the clock ?!? */
  708. __ctl_clear_bit(0, 29);
  709. __ctl_clear_bit(14, 21);
  710. disable_sync_clock(NULL);
  711. etr_sync->in_sync = -EAGAIN;
  712. rc = -EAGAIN;
  713. }
  714. xchg(&first, 0);
  715. return rc;
  716. }
  717. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  718. {
  719. struct clock_sync_data etr_sync;
  720. struct etr_aib *sync_port;
  721. int follows;
  722. int rc;
  723. /* Check if the current aib is adjacent to the sync port aib. */
  724. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  725. follows = etr_aib_follows(sync_port, aib, port);
  726. memcpy(sync_port, aib, sizeof(*aib));
  727. if (!follows)
  728. return -EAGAIN;
  729. memset(&etr_sync, 0, sizeof(etr_sync));
  730. etr_sync.etr_aib = aib;
  731. etr_sync.etr_port = port;
  732. get_online_cpus();
  733. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  734. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  735. put_online_cpus();
  736. return rc;
  737. }
  738. /*
  739. * Handle the immediate effects of the different events.
  740. * The port change event is used for online/offline changes.
  741. */
  742. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  743. {
  744. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  745. eacr.es = 0;
  746. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  747. eacr.es = eacr.sl = 0;
  748. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  749. etr_port0_uptodate = etr_port1_uptodate = 0;
  750. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  751. if (eacr.e0)
  752. /*
  753. * Port change of an enabled port. We have to
  754. * assume that this can have caused an stepping
  755. * port switch.
  756. */
  757. etr_tolec = get_clock();
  758. eacr.p0 = etr_port0_online;
  759. if (!eacr.p0)
  760. eacr.e0 = 0;
  761. etr_port0_uptodate = 0;
  762. }
  763. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  764. if (eacr.e1)
  765. /*
  766. * Port change of an enabled port. We have to
  767. * assume that this can have caused an stepping
  768. * port switch.
  769. */
  770. etr_tolec = get_clock();
  771. eacr.p1 = etr_port1_online;
  772. if (!eacr.p1)
  773. eacr.e1 = 0;
  774. etr_port1_uptodate = 0;
  775. }
  776. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  777. return eacr;
  778. }
  779. /*
  780. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  781. * one of the ports needs an update.
  782. */
  783. static void etr_set_tolec_timeout(unsigned long long now)
  784. {
  785. unsigned long micros;
  786. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  787. (!etr_eacr.p1 || etr_port1_uptodate))
  788. return;
  789. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  790. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  791. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  792. }
  793. /*
  794. * Set up a time that expires after 1/2 second.
  795. */
  796. static void etr_set_sync_timeout(void)
  797. {
  798. mod_timer(&etr_timer, jiffies + HZ/2);
  799. }
  800. /*
  801. * Update the aib information for one or both ports.
  802. */
  803. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  804. struct etr_eacr eacr)
  805. {
  806. /* With both ports disabled the aib information is useless. */
  807. if (!eacr.e0 && !eacr.e1)
  808. return eacr;
  809. /* Update port0 or port1 with aib stored in etr_work_fn. */
  810. if (aib->esw.q == 0) {
  811. /* Information for port 0 stored. */
  812. if (eacr.p0 && !etr_port0_uptodate) {
  813. etr_port0 = *aib;
  814. if (etr_port0_online)
  815. etr_port0_uptodate = 1;
  816. }
  817. } else {
  818. /* Information for port 1 stored. */
  819. if (eacr.p1 && !etr_port1_uptodate) {
  820. etr_port1 = *aib;
  821. if (etr_port0_online)
  822. etr_port1_uptodate = 1;
  823. }
  824. }
  825. /*
  826. * Do not try to get the alternate port aib if the clock
  827. * is not in sync yet.
  828. */
  829. if (!check_sync_clock())
  830. return eacr;
  831. /*
  832. * If steai is available we can get the information about
  833. * the other port immediately. If only stetr is available the
  834. * data-port bit toggle has to be used.
  835. */
  836. if (etr_steai_available) {
  837. if (eacr.p0 && !etr_port0_uptodate) {
  838. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  839. etr_port0_uptodate = 1;
  840. }
  841. if (eacr.p1 && !etr_port1_uptodate) {
  842. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  843. etr_port1_uptodate = 1;
  844. }
  845. } else {
  846. /*
  847. * One port was updated above, if the other
  848. * port is not uptodate toggle dp bit.
  849. */
  850. if ((eacr.p0 && !etr_port0_uptodate) ||
  851. (eacr.p1 && !etr_port1_uptodate))
  852. eacr.dp ^= 1;
  853. else
  854. eacr.dp = 0;
  855. }
  856. return eacr;
  857. }
  858. /*
  859. * Write new etr control register if it differs from the current one.
  860. * Return 1 if etr_tolec has been updated as well.
  861. */
  862. static void etr_update_eacr(struct etr_eacr eacr)
  863. {
  864. int dp_changed;
  865. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  866. /* No change, return. */
  867. return;
  868. /*
  869. * The disable of an active port of the change of the data port
  870. * bit can/will cause a change in the data port.
  871. */
  872. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  873. (etr_eacr.dp ^ eacr.dp) != 0;
  874. etr_eacr = eacr;
  875. etr_setr(&etr_eacr);
  876. if (dp_changed)
  877. etr_tolec = get_clock();
  878. }
  879. /*
  880. * ETR work. In this function you'll find the main logic. In
  881. * particular this is the only function that calls etr_update_eacr(),
  882. * it "controls" the etr control register.
  883. */
  884. static void etr_work_fn(struct work_struct *work)
  885. {
  886. unsigned long long now;
  887. struct etr_eacr eacr;
  888. struct etr_aib aib;
  889. int sync_port;
  890. /* prevent multiple execution. */
  891. mutex_lock(&etr_work_mutex);
  892. /* Create working copy of etr_eacr. */
  893. eacr = etr_eacr;
  894. /* Check for the different events and their immediate effects. */
  895. eacr = etr_handle_events(eacr);
  896. /* Check if ETR is supposed to be active. */
  897. eacr.ea = eacr.p0 || eacr.p1;
  898. if (!eacr.ea) {
  899. /* Both ports offline. Reset everything. */
  900. eacr.dp = eacr.es = eacr.sl = 0;
  901. on_each_cpu(disable_sync_clock, NULL, 1);
  902. del_timer_sync(&etr_timer);
  903. etr_update_eacr(eacr);
  904. goto out_unlock;
  905. }
  906. /* Store aib to get the current ETR status word. */
  907. BUG_ON(etr_stetr(&aib) != 0);
  908. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  909. now = get_clock();
  910. /*
  911. * Update the port information if the last stepping port change
  912. * or data port change is older than 1.6 seconds.
  913. */
  914. if (now >= etr_tolec + (1600000 << 12))
  915. eacr = etr_handle_update(&aib, eacr);
  916. /*
  917. * Select ports to enable. The prefered synchronization mode is PPS.
  918. * If a port can be enabled depends on a number of things:
  919. * 1) The port needs to be online and uptodate. A port is not
  920. * disabled just because it is not uptodate, but it is only
  921. * enabled if it is uptodate.
  922. * 2) The port needs to have the same mode (pps / etr).
  923. * 3) The port needs to be usable -> etr_port_valid() == 1
  924. * 4) To enable the second port the clock needs to be in sync.
  925. * 5) If both ports are useable and are ETR ports, the network id
  926. * has to be the same.
  927. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  928. */
  929. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  930. eacr.sl = 0;
  931. eacr.e0 = 1;
  932. if (!etr_mode_is_pps(etr_eacr))
  933. eacr.es = 0;
  934. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  935. eacr.e1 = 0;
  936. // FIXME: uptodate checks ?
  937. else if (etr_port0_uptodate && etr_port1_uptodate)
  938. eacr.e1 = 1;
  939. sync_port = (etr_port0_uptodate &&
  940. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  941. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  942. eacr.sl = 0;
  943. eacr.e0 = 0;
  944. eacr.e1 = 1;
  945. if (!etr_mode_is_pps(etr_eacr))
  946. eacr.es = 0;
  947. sync_port = (etr_port1_uptodate &&
  948. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  949. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  950. eacr.sl = 1;
  951. eacr.e0 = 1;
  952. if (!etr_mode_is_etr(etr_eacr))
  953. eacr.es = 0;
  954. if (!eacr.es || !eacr.p1 ||
  955. aib.esw.psc1 != etr_lpsc_operational_alt)
  956. eacr.e1 = 0;
  957. else if (etr_port0_uptodate && etr_port1_uptodate &&
  958. etr_compare_network(&etr_port0, &etr_port1))
  959. eacr.e1 = 1;
  960. sync_port = (etr_port0_uptodate &&
  961. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  962. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  963. eacr.sl = 1;
  964. eacr.e0 = 0;
  965. eacr.e1 = 1;
  966. if (!etr_mode_is_etr(etr_eacr))
  967. eacr.es = 0;
  968. sync_port = (etr_port1_uptodate &&
  969. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  970. } else {
  971. /* Both ports not usable. */
  972. eacr.es = eacr.sl = 0;
  973. sync_port = -1;
  974. }
  975. /*
  976. * If the clock is in sync just update the eacr and return.
  977. * If there is no valid sync port wait for a port update.
  978. */
  979. if (check_sync_clock() || sync_port < 0) {
  980. etr_update_eacr(eacr);
  981. etr_set_tolec_timeout(now);
  982. goto out_unlock;
  983. }
  984. /*
  985. * Prepare control register for clock syncing
  986. * (reset data port bit, set sync check control.
  987. */
  988. eacr.dp = 0;
  989. eacr.es = 1;
  990. /*
  991. * Update eacr and try to synchronize the clock. If the update
  992. * of eacr caused a stepping port switch (or if we have to
  993. * assume that a stepping port switch has occured) or the
  994. * clock syncing failed, reset the sync check control bit
  995. * and set up a timer to try again after 0.5 seconds
  996. */
  997. etr_update_eacr(eacr);
  998. if (now < etr_tolec + (1600000 << 12) ||
  999. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1000. /* Sync failed. Try again in 1/2 second. */
  1001. eacr.es = 0;
  1002. etr_update_eacr(eacr);
  1003. etr_set_sync_timeout();
  1004. } else
  1005. etr_set_tolec_timeout(now);
  1006. out_unlock:
  1007. mutex_unlock(&etr_work_mutex);
  1008. }
  1009. /*
  1010. * Sysfs interface functions
  1011. */
  1012. static struct sysdev_class etr_sysclass = {
  1013. .name = "etr",
  1014. };
  1015. static struct sys_device etr_port0_dev = {
  1016. .id = 0,
  1017. .cls = &etr_sysclass,
  1018. };
  1019. static struct sys_device etr_port1_dev = {
  1020. .id = 1,
  1021. .cls = &etr_sysclass,
  1022. };
  1023. /*
  1024. * ETR class attributes
  1025. */
  1026. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1027. {
  1028. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1029. }
  1030. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1031. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1032. {
  1033. char *mode_str;
  1034. if (etr_mode_is_pps(etr_eacr))
  1035. mode_str = "pps";
  1036. else if (etr_mode_is_etr(etr_eacr))
  1037. mode_str = "etr";
  1038. else
  1039. mode_str = "local";
  1040. return sprintf(buf, "%s\n", mode_str);
  1041. }
  1042. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1043. /*
  1044. * ETR port attributes
  1045. */
  1046. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1047. {
  1048. if (dev == &etr_port0_dev)
  1049. return etr_port0_online ? &etr_port0 : NULL;
  1050. else
  1051. return etr_port1_online ? &etr_port1 : NULL;
  1052. }
  1053. static ssize_t etr_online_show(struct sys_device *dev,
  1054. struct sysdev_attribute *attr,
  1055. char *buf)
  1056. {
  1057. unsigned int online;
  1058. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1059. return sprintf(buf, "%i\n", online);
  1060. }
  1061. static ssize_t etr_online_store(struct sys_device *dev,
  1062. struct sysdev_attribute *attr,
  1063. const char *buf, size_t count)
  1064. {
  1065. unsigned int value;
  1066. value = simple_strtoul(buf, NULL, 0);
  1067. if (value != 0 && value != 1)
  1068. return -EINVAL;
  1069. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1070. return -EOPNOTSUPP;
  1071. mutex_lock(&clock_sync_mutex);
  1072. if (dev == &etr_port0_dev) {
  1073. if (etr_port0_online == value)
  1074. goto out; /* Nothing to do. */
  1075. etr_port0_online = value;
  1076. if (etr_port0_online && etr_port1_online)
  1077. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1078. else
  1079. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1080. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1081. queue_work(time_sync_wq, &etr_work);
  1082. } else {
  1083. if (etr_port1_online == value)
  1084. goto out; /* Nothing to do. */
  1085. etr_port1_online = value;
  1086. if (etr_port0_online && etr_port1_online)
  1087. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1088. else
  1089. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1090. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1091. queue_work(time_sync_wq, &etr_work);
  1092. }
  1093. out:
  1094. mutex_unlock(&clock_sync_mutex);
  1095. return count;
  1096. }
  1097. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1098. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1099. struct sysdev_attribute *attr,
  1100. char *buf)
  1101. {
  1102. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1103. etr_eacr.e0 : etr_eacr.e1);
  1104. }
  1105. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1106. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1107. struct sysdev_attribute *attr, char *buf)
  1108. {
  1109. if (!etr_port0_online && !etr_port1_online)
  1110. /* Status word is not uptodate if both ports are offline. */
  1111. return -ENODATA;
  1112. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1113. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1114. }
  1115. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1116. static ssize_t etr_untuned_show(struct sys_device *dev,
  1117. struct sysdev_attribute *attr, char *buf)
  1118. {
  1119. struct etr_aib *aib = etr_aib_from_dev(dev);
  1120. if (!aib || !aib->slsw.v1)
  1121. return -ENODATA;
  1122. return sprintf(buf, "%i\n", aib->edf1.u);
  1123. }
  1124. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1125. static ssize_t etr_network_id_show(struct sys_device *dev,
  1126. struct sysdev_attribute *attr, char *buf)
  1127. {
  1128. struct etr_aib *aib = etr_aib_from_dev(dev);
  1129. if (!aib || !aib->slsw.v1)
  1130. return -ENODATA;
  1131. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1132. }
  1133. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1134. static ssize_t etr_id_show(struct sys_device *dev,
  1135. struct sysdev_attribute *attr, char *buf)
  1136. {
  1137. struct etr_aib *aib = etr_aib_from_dev(dev);
  1138. if (!aib || !aib->slsw.v1)
  1139. return -ENODATA;
  1140. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1141. }
  1142. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1143. static ssize_t etr_port_number_show(struct sys_device *dev,
  1144. struct sysdev_attribute *attr, char *buf)
  1145. {
  1146. struct etr_aib *aib = etr_aib_from_dev(dev);
  1147. if (!aib || !aib->slsw.v1)
  1148. return -ENODATA;
  1149. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1150. }
  1151. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1152. static ssize_t etr_coupled_show(struct sys_device *dev,
  1153. struct sysdev_attribute *attr, char *buf)
  1154. {
  1155. struct etr_aib *aib = etr_aib_from_dev(dev);
  1156. if (!aib || !aib->slsw.v3)
  1157. return -ENODATA;
  1158. return sprintf(buf, "%i\n", aib->edf3.c);
  1159. }
  1160. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1161. static ssize_t etr_local_time_show(struct sys_device *dev,
  1162. struct sysdev_attribute *attr, char *buf)
  1163. {
  1164. struct etr_aib *aib = etr_aib_from_dev(dev);
  1165. if (!aib || !aib->slsw.v3)
  1166. return -ENODATA;
  1167. return sprintf(buf, "%i\n", aib->edf3.blto);
  1168. }
  1169. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1170. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1171. struct sysdev_attribute *attr, char *buf)
  1172. {
  1173. struct etr_aib *aib = etr_aib_from_dev(dev);
  1174. if (!aib || !aib->slsw.v3)
  1175. return -ENODATA;
  1176. return sprintf(buf, "%i\n", aib->edf3.buo);
  1177. }
  1178. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1179. static struct sysdev_attribute *etr_port_attributes[] = {
  1180. &attr_online,
  1181. &attr_stepping_control,
  1182. &attr_state_code,
  1183. &attr_untuned,
  1184. &attr_network,
  1185. &attr_id,
  1186. &attr_port,
  1187. &attr_coupled,
  1188. &attr_local_time,
  1189. &attr_utc_offset,
  1190. NULL
  1191. };
  1192. static int __init etr_register_port(struct sys_device *dev)
  1193. {
  1194. struct sysdev_attribute **attr;
  1195. int rc;
  1196. rc = sysdev_register(dev);
  1197. if (rc)
  1198. goto out;
  1199. for (attr = etr_port_attributes; *attr; attr++) {
  1200. rc = sysdev_create_file(dev, *attr);
  1201. if (rc)
  1202. goto out_unreg;
  1203. }
  1204. return 0;
  1205. out_unreg:
  1206. for (; attr >= etr_port_attributes; attr--)
  1207. sysdev_remove_file(dev, *attr);
  1208. sysdev_unregister(dev);
  1209. out:
  1210. return rc;
  1211. }
  1212. static void __init etr_unregister_port(struct sys_device *dev)
  1213. {
  1214. struct sysdev_attribute **attr;
  1215. for (attr = etr_port_attributes; *attr; attr++)
  1216. sysdev_remove_file(dev, *attr);
  1217. sysdev_unregister(dev);
  1218. }
  1219. static int __init etr_init_sysfs(void)
  1220. {
  1221. int rc;
  1222. rc = sysdev_class_register(&etr_sysclass);
  1223. if (rc)
  1224. goto out;
  1225. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1226. if (rc)
  1227. goto out_unreg_class;
  1228. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1229. if (rc)
  1230. goto out_remove_stepping_port;
  1231. rc = etr_register_port(&etr_port0_dev);
  1232. if (rc)
  1233. goto out_remove_stepping_mode;
  1234. rc = etr_register_port(&etr_port1_dev);
  1235. if (rc)
  1236. goto out_remove_port0;
  1237. return 0;
  1238. out_remove_port0:
  1239. etr_unregister_port(&etr_port0_dev);
  1240. out_remove_stepping_mode:
  1241. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1242. out_remove_stepping_port:
  1243. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1244. out_unreg_class:
  1245. sysdev_class_unregister(&etr_sysclass);
  1246. out:
  1247. return rc;
  1248. }
  1249. device_initcall(etr_init_sysfs);
  1250. /*
  1251. * Server Time Protocol (STP) code.
  1252. */
  1253. static int stp_online;
  1254. static struct stp_sstpi stp_info;
  1255. static void *stp_page;
  1256. static void stp_work_fn(struct work_struct *work);
  1257. static DEFINE_MUTEX(stp_work_mutex);
  1258. static DECLARE_WORK(stp_work, stp_work_fn);
  1259. static struct timer_list stp_timer;
  1260. static int __init early_parse_stp(char *p)
  1261. {
  1262. if (strncmp(p, "off", 3) == 0)
  1263. stp_online = 0;
  1264. else if (strncmp(p, "on", 2) == 0)
  1265. stp_online = 1;
  1266. return 0;
  1267. }
  1268. early_param("stp", early_parse_stp);
  1269. /*
  1270. * Reset STP attachment.
  1271. */
  1272. static void __init stp_reset(void)
  1273. {
  1274. int rc;
  1275. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1276. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1277. if (rc == 0)
  1278. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1279. else if (stp_online) {
  1280. pr_warning("The real or virtual hardware system does "
  1281. "not provide an STP interface\n");
  1282. free_page((unsigned long) stp_page);
  1283. stp_page = NULL;
  1284. stp_online = 0;
  1285. }
  1286. }
  1287. static void stp_timeout(unsigned long dummy)
  1288. {
  1289. queue_work(time_sync_wq, &stp_work);
  1290. }
  1291. static int __init stp_init(void)
  1292. {
  1293. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1294. return 0;
  1295. setup_timer(&stp_timer, stp_timeout, 0UL);
  1296. time_init_wq();
  1297. if (!stp_online)
  1298. return 0;
  1299. queue_work(time_sync_wq, &stp_work);
  1300. return 0;
  1301. }
  1302. arch_initcall(stp_init);
  1303. /*
  1304. * STP timing alert. There are three causes:
  1305. * 1) timing status change
  1306. * 2) link availability change
  1307. * 3) time control parameter change
  1308. * In all three cases we are only interested in the clock source state.
  1309. * If a STP clock source is now available use it.
  1310. */
  1311. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1312. {
  1313. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1314. queue_work(time_sync_wq, &stp_work);
  1315. }
  1316. /*
  1317. * STP sync check machine check. This is called when the timing state
  1318. * changes from the synchronized state to the unsynchronized state.
  1319. * After a STP sync check the clock is not in sync. The machine check
  1320. * is broadcasted to all cpus at the same time.
  1321. */
  1322. void stp_sync_check(void)
  1323. {
  1324. disable_sync_clock(NULL);
  1325. queue_work(time_sync_wq, &stp_work);
  1326. }
  1327. /*
  1328. * STP island condition machine check. This is called when an attached
  1329. * server attempts to communicate over an STP link and the servers
  1330. * have matching CTN ids and have a valid stratum-1 configuration
  1331. * but the configurations do not match.
  1332. */
  1333. void stp_island_check(void)
  1334. {
  1335. disable_sync_clock(NULL);
  1336. queue_work(time_sync_wq, &stp_work);
  1337. }
  1338. static int stp_sync_clock(void *data)
  1339. {
  1340. static int first;
  1341. unsigned long long old_clock, delta;
  1342. struct clock_sync_data *stp_sync;
  1343. int rc;
  1344. stp_sync = data;
  1345. if (xchg(&first, 1) == 1) {
  1346. /* Slave */
  1347. clock_sync_cpu(stp_sync);
  1348. return 0;
  1349. }
  1350. /* Wait until all other cpus entered the sync function. */
  1351. while (atomic_read(&stp_sync->cpus) != 0)
  1352. cpu_relax();
  1353. enable_sync_clock();
  1354. rc = 0;
  1355. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1356. stp_info.todoff[2] || stp_info.todoff[3] ||
  1357. stp_info.tmd != 2) {
  1358. old_clock = get_clock();
  1359. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1360. if (rc == 0) {
  1361. delta = adjust_time(old_clock, get_clock(), 0);
  1362. fixup_clock_comparator(delta);
  1363. rc = chsc_sstpi(stp_page, &stp_info,
  1364. sizeof(struct stp_sstpi));
  1365. if (rc == 0 && stp_info.tmd != 2)
  1366. rc = -EAGAIN;
  1367. }
  1368. }
  1369. if (rc) {
  1370. disable_sync_clock(NULL);
  1371. stp_sync->in_sync = -EAGAIN;
  1372. } else
  1373. stp_sync->in_sync = 1;
  1374. xchg(&first, 0);
  1375. return 0;
  1376. }
  1377. /*
  1378. * STP work. Check for the STP state and take over the clock
  1379. * synchronization if the STP clock source is usable.
  1380. */
  1381. static void stp_work_fn(struct work_struct *work)
  1382. {
  1383. struct clock_sync_data stp_sync;
  1384. int rc;
  1385. /* prevent multiple execution. */
  1386. mutex_lock(&stp_work_mutex);
  1387. if (!stp_online) {
  1388. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1389. del_timer_sync(&stp_timer);
  1390. goto out_unlock;
  1391. }
  1392. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1393. if (rc)
  1394. goto out_unlock;
  1395. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1396. if (rc || stp_info.c == 0)
  1397. goto out_unlock;
  1398. /* Skip synchronization if the clock is already in sync. */
  1399. if (check_sync_clock())
  1400. goto out_unlock;
  1401. memset(&stp_sync, 0, sizeof(stp_sync));
  1402. get_online_cpus();
  1403. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1404. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1405. put_online_cpus();
  1406. if (!check_sync_clock())
  1407. /*
  1408. * There is a usable clock but the synchonization failed.
  1409. * Retry after a second.
  1410. */
  1411. mod_timer(&stp_timer, jiffies + HZ);
  1412. out_unlock:
  1413. mutex_unlock(&stp_work_mutex);
  1414. }
  1415. /*
  1416. * STP class sysfs interface functions
  1417. */
  1418. static struct sysdev_class stp_sysclass = {
  1419. .name = "stp",
  1420. };
  1421. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1422. {
  1423. if (!stp_online)
  1424. return -ENODATA;
  1425. return sprintf(buf, "%016llx\n",
  1426. *(unsigned long long *) stp_info.ctnid);
  1427. }
  1428. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1429. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1430. {
  1431. if (!stp_online)
  1432. return -ENODATA;
  1433. return sprintf(buf, "%i\n", stp_info.ctn);
  1434. }
  1435. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1436. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1437. {
  1438. if (!stp_online || !(stp_info.vbits & 0x2000))
  1439. return -ENODATA;
  1440. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1441. }
  1442. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1443. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1444. {
  1445. if (!stp_online || !(stp_info.vbits & 0x8000))
  1446. return -ENODATA;
  1447. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1448. }
  1449. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1450. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1451. {
  1452. if (!stp_online)
  1453. return -ENODATA;
  1454. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1455. }
  1456. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1457. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1458. {
  1459. if (!stp_online || !(stp_info.vbits & 0x0800))
  1460. return -ENODATA;
  1461. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1462. }
  1463. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1464. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1465. {
  1466. if (!stp_online || !(stp_info.vbits & 0x4000))
  1467. return -ENODATA;
  1468. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1469. }
  1470. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1471. stp_time_zone_offset_show, NULL);
  1472. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1473. {
  1474. if (!stp_online)
  1475. return -ENODATA;
  1476. return sprintf(buf, "%i\n", stp_info.tmd);
  1477. }
  1478. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1479. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1480. {
  1481. if (!stp_online)
  1482. return -ENODATA;
  1483. return sprintf(buf, "%i\n", stp_info.tst);
  1484. }
  1485. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1486. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1487. {
  1488. return sprintf(buf, "%i\n", stp_online);
  1489. }
  1490. static ssize_t stp_online_store(struct sysdev_class *class,
  1491. const char *buf, size_t count)
  1492. {
  1493. unsigned int value;
  1494. value = simple_strtoul(buf, NULL, 0);
  1495. if (value != 0 && value != 1)
  1496. return -EINVAL;
  1497. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1498. return -EOPNOTSUPP;
  1499. mutex_lock(&clock_sync_mutex);
  1500. stp_online = value;
  1501. if (stp_online)
  1502. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1503. else
  1504. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1505. queue_work(time_sync_wq, &stp_work);
  1506. mutex_unlock(&clock_sync_mutex);
  1507. return count;
  1508. }
  1509. /*
  1510. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1511. * stp/online but attr_online already exists in this file ..
  1512. */
  1513. static struct sysdev_class_attribute attr_stp_online = {
  1514. .attr = { .name = "online", .mode = 0600 },
  1515. .show = stp_online_show,
  1516. .store = stp_online_store,
  1517. };
  1518. static struct sysdev_class_attribute *stp_attributes[] = {
  1519. &attr_ctn_id,
  1520. &attr_ctn_type,
  1521. &attr_dst_offset,
  1522. &attr_leap_seconds,
  1523. &attr_stp_online,
  1524. &attr_stratum,
  1525. &attr_time_offset,
  1526. &attr_time_zone_offset,
  1527. &attr_timing_mode,
  1528. &attr_timing_state,
  1529. NULL
  1530. };
  1531. static int __init stp_init_sysfs(void)
  1532. {
  1533. struct sysdev_class_attribute **attr;
  1534. int rc;
  1535. rc = sysdev_class_register(&stp_sysclass);
  1536. if (rc)
  1537. goto out;
  1538. for (attr = stp_attributes; *attr; attr++) {
  1539. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1540. if (rc)
  1541. goto out_unreg;
  1542. }
  1543. return 0;
  1544. out_unreg:
  1545. for (; attr >= stp_attributes; attr--)
  1546. sysdev_class_remove_file(&stp_sysclass, *attr);
  1547. sysdev_class_unregister(&stp_sysclass);
  1548. out:
  1549. return rc;
  1550. }
  1551. device_initcall(stp_init_sysfs);