fsl_qe_udc.c 63 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/slab.h>
  28. #include <linux/list.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/io.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/of_platform.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/usb/ch9.h>
  35. #include <linux/usb/gadget.h>
  36. #include <linux/usb/otg.h>
  37. #include <asm/qe.h>
  38. #include <asm/cpm.h>
  39. #include <asm/dma.h>
  40. #include <asm/reg.h>
  41. #include "fsl_qe_udc.h"
  42. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  43. #define DRIVER_AUTHOR "Xie XiaoBo"
  44. #define DRIVER_VERSION "1.0"
  45. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  46. static const char driver_name[] = "fsl_qe_udc";
  47. static const char driver_desc[] = DRIVER_DESC;
  48. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  49. static const char *const ep_name[] = {
  50. "ep0-control", /* everyone has ep0 */
  51. /* 3 configurable endpoints */
  52. "ep1",
  53. "ep2",
  54. "ep3",
  55. };
  56. static struct usb_endpoint_descriptor qe_ep0_desc = {
  57. .bLength = USB_DT_ENDPOINT_SIZE,
  58. .bDescriptorType = USB_DT_ENDPOINT,
  59. .bEndpointAddress = 0,
  60. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  61. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  62. };
  63. /* it is initialized in probe() */
  64. static struct qe_udc *udc_controller;
  65. /********************************************************************
  66. * Internal Used Function Start
  67. ********************************************************************/
  68. /*-----------------------------------------------------------------
  69. * done() - retire a request; caller blocked irqs
  70. *--------------------------------------------------------------*/
  71. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  72. {
  73. struct qe_udc *udc = ep->udc;
  74. unsigned char stopped = ep->stopped;
  75. /* the req->queue pointer is used by ep_queue() func, in which
  76. * the request will be added into a udc_ep->queue 'd tail
  77. * so here the req will be dropped from the ep->queue
  78. */
  79. list_del_init(&req->queue);
  80. /* req.status should be set as -EINPROGRESS in ep_queue() */
  81. if (req->req.status == -EINPROGRESS)
  82. req->req.status = status;
  83. else
  84. status = req->req.status;
  85. if (req->mapped) {
  86. dma_unmap_single(udc->gadget.dev.parent,
  87. req->req.dma, req->req.length,
  88. ep_is_in(ep)
  89. ? DMA_TO_DEVICE
  90. : DMA_FROM_DEVICE);
  91. req->req.dma = DMA_ADDR_INVALID;
  92. req->mapped = 0;
  93. } else
  94. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  95. req->req.dma, req->req.length,
  96. ep_is_in(ep)
  97. ? DMA_TO_DEVICE
  98. : DMA_FROM_DEVICE);
  99. if (status && (status != -ESHUTDOWN))
  100. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  101. ep->ep.name, &req->req, status,
  102. req->req.actual, req->req.length);
  103. /* don't modify queue heads during completion callback */
  104. ep->stopped = 1;
  105. spin_unlock(&udc->lock);
  106. /* this complete() should a func implemented by gadget layer,
  107. * eg fsg->bulk_in_complete() */
  108. if (req->req.complete)
  109. req->req.complete(&ep->ep, &req->req);
  110. spin_lock(&udc->lock);
  111. ep->stopped = stopped;
  112. }
  113. /*-----------------------------------------------------------------
  114. * nuke(): delete all requests related to this ep
  115. *--------------------------------------------------------------*/
  116. static void nuke(struct qe_ep *ep, int status)
  117. {
  118. /* Whether this eq has request linked */
  119. while (!list_empty(&ep->queue)) {
  120. struct qe_req *req = NULL;
  121. req = list_entry(ep->queue.next, struct qe_req, queue);
  122. done(ep, req, status);
  123. }
  124. }
  125. /*---------------------------------------------------------------------------*
  126. * USB and Endpoint manipulate process, include parameter and register *
  127. *---------------------------------------------------------------------------*/
  128. /* @value: 1--set stall 0--clean stall */
  129. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  130. {
  131. u16 tem_usep;
  132. u8 epnum = ep->epnum;
  133. struct qe_udc *udc = ep->udc;
  134. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  135. tem_usep = tem_usep & ~USB_RHS_MASK;
  136. if (value == 1)
  137. tem_usep |= USB_RHS_STALL;
  138. else if (ep->dir == USB_DIR_IN)
  139. tem_usep |= USB_RHS_IGNORE_OUT;
  140. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  141. return 0;
  142. }
  143. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  144. {
  145. u16 tem_usep;
  146. u8 epnum = ep->epnum;
  147. struct qe_udc *udc = ep->udc;
  148. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  149. tem_usep = tem_usep & ~USB_THS_MASK;
  150. if (value == 1)
  151. tem_usep |= USB_THS_STALL;
  152. else if (ep->dir == USB_DIR_OUT)
  153. tem_usep |= USB_THS_IGNORE_IN;
  154. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  155. return 0;
  156. }
  157. static int qe_ep0_stall(struct qe_udc *udc)
  158. {
  159. qe_eptx_stall_change(&udc->eps[0], 1);
  160. qe_eprx_stall_change(&udc->eps[0], 1);
  161. udc_controller->ep0_state = WAIT_FOR_SETUP;
  162. udc_controller->ep0_dir = 0;
  163. return 0;
  164. }
  165. static int qe_eprx_nack(struct qe_ep *ep)
  166. {
  167. u8 epnum = ep->epnum;
  168. struct qe_udc *udc = ep->udc;
  169. if (ep->state == EP_STATE_IDLE) {
  170. /* Set the ep's nack */
  171. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  172. USB_RHS_MASK, USB_RHS_NACK);
  173. /* Mask Rx and Busy interrupts */
  174. clrbits16(&udc->usb_regs->usb_usbmr,
  175. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  176. ep->state = EP_STATE_NACK;
  177. }
  178. return 0;
  179. }
  180. static int qe_eprx_normal(struct qe_ep *ep)
  181. {
  182. struct qe_udc *udc = ep->udc;
  183. if (ep->state == EP_STATE_NACK) {
  184. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  185. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  186. /* Unmask RX interrupts */
  187. out_be16(&udc->usb_regs->usb_usber,
  188. USB_E_BSY_MASK | USB_E_RXB_MASK);
  189. setbits16(&udc->usb_regs->usb_usbmr,
  190. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  191. ep->state = EP_STATE_IDLE;
  192. ep->has_data = 0;
  193. }
  194. return 0;
  195. }
  196. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  197. {
  198. if (ep->udc->soc_type == PORT_CPM)
  199. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  200. CPM_USB_STOP_TX_OPCODE);
  201. else
  202. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  203. ep->epnum, 0);
  204. return 0;
  205. }
  206. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  207. {
  208. if (ep->udc->soc_type == PORT_CPM)
  209. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  210. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  211. else
  212. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  213. ep->epnum, 0);
  214. return 0;
  215. }
  216. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  217. {
  218. struct qe_udc *udc = ep->udc;
  219. int i;
  220. i = (int)ep->epnum;
  221. qe_ep_cmd_stoptx(ep);
  222. out_8(&udc->usb_regs->usb_uscom,
  223. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  224. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  225. out_be32(&udc->ep_param[i]->tstate, 0);
  226. out_be16(&udc->ep_param[i]->tbcnt, 0);
  227. ep->c_txbd = ep->txbase;
  228. ep->n_txbd = ep->txbase;
  229. qe_ep_cmd_restarttx(ep);
  230. return 0;
  231. }
  232. static int qe_ep_filltxfifo(struct qe_ep *ep)
  233. {
  234. struct qe_udc *udc = ep->udc;
  235. out_8(&udc->usb_regs->usb_uscom,
  236. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  237. return 0;
  238. }
  239. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  240. {
  241. struct qe_ep *ep;
  242. u32 bdring_len;
  243. struct qe_bd __iomem *bd;
  244. int i;
  245. ep = &udc->eps[pipe_num];
  246. if (ep->dir == USB_DIR_OUT)
  247. bdring_len = USB_BDRING_LEN_RX;
  248. else
  249. bdring_len = USB_BDRING_LEN;
  250. bd = ep->rxbase;
  251. for (i = 0; i < (bdring_len - 1); i++) {
  252. out_be32((u32 __iomem *)bd, R_E | R_I);
  253. bd++;
  254. }
  255. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  256. bd = ep->txbase;
  257. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  258. out_be32(&bd->buf, 0);
  259. out_be32((u32 __iomem *)bd, 0);
  260. bd++;
  261. }
  262. out_be32((u32 __iomem *)bd, T_W);
  263. return 0;
  264. }
  265. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  266. {
  267. struct qe_ep *ep;
  268. u16 tmpusep;
  269. ep = &udc->eps[pipe_num];
  270. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  271. tmpusep &= ~USB_RTHS_MASK;
  272. switch (ep->dir) {
  273. case USB_DIR_BOTH:
  274. qe_ep_flushtxfifo(ep);
  275. break;
  276. case USB_DIR_OUT:
  277. tmpusep |= USB_THS_IGNORE_IN;
  278. break;
  279. case USB_DIR_IN:
  280. qe_ep_flushtxfifo(ep);
  281. tmpusep |= USB_RHS_IGNORE_OUT;
  282. break;
  283. default:
  284. break;
  285. }
  286. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  287. qe_epbds_reset(udc, pipe_num);
  288. return 0;
  289. }
  290. static int qe_ep_toggledata01(struct qe_ep *ep)
  291. {
  292. ep->data01 ^= 0x1;
  293. return 0;
  294. }
  295. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  296. {
  297. struct qe_ep *ep = &udc->eps[pipe_num];
  298. unsigned long tmp_addr = 0;
  299. struct usb_ep_para __iomem *epparam;
  300. int i;
  301. struct qe_bd __iomem *bd;
  302. int bdring_len;
  303. if (ep->dir == USB_DIR_OUT)
  304. bdring_len = USB_BDRING_LEN_RX;
  305. else
  306. bdring_len = USB_BDRING_LEN;
  307. epparam = udc->ep_param[pipe_num];
  308. /* alloc multi-ram for BD rings and set the ep parameters */
  309. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  310. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  311. out_be16(&epparam->rbase, (u16)tmp_addr);
  312. out_be16(&epparam->tbase, (u16)(tmp_addr +
  313. (sizeof(struct qe_bd) * bdring_len)));
  314. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  315. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  316. ep->rxbase = cpm_muram_addr(tmp_addr);
  317. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  318. * bdring_len));
  319. ep->n_rxbd = ep->rxbase;
  320. ep->e_rxbd = ep->rxbase;
  321. ep->n_txbd = ep->txbase;
  322. ep->c_txbd = ep->txbase;
  323. ep->data01 = 0; /* data0 */
  324. /* Init TX and RX bds */
  325. bd = ep->rxbase;
  326. for (i = 0; i < bdring_len - 1; i++) {
  327. out_be32(&bd->buf, 0);
  328. out_be32((u32 __iomem *)bd, 0);
  329. bd++;
  330. }
  331. out_be32(&bd->buf, 0);
  332. out_be32((u32 __iomem *)bd, R_W);
  333. bd = ep->txbase;
  334. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  335. out_be32(&bd->buf, 0);
  336. out_be32((u32 __iomem *)bd, 0);
  337. bd++;
  338. }
  339. out_be32(&bd->buf, 0);
  340. out_be32((u32 __iomem *)bd, T_W);
  341. return 0;
  342. }
  343. static int qe_ep_rxbd_update(struct qe_ep *ep)
  344. {
  345. unsigned int size;
  346. int i;
  347. unsigned int tmp;
  348. struct qe_bd __iomem *bd;
  349. unsigned int bdring_len;
  350. if (ep->rxbase == NULL)
  351. return -EINVAL;
  352. bd = ep->rxbase;
  353. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  354. if (ep->rxframe == NULL) {
  355. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  356. return -ENOMEM;
  357. }
  358. qe_frame_init(ep->rxframe);
  359. if (ep->dir == USB_DIR_OUT)
  360. bdring_len = USB_BDRING_LEN_RX;
  361. else
  362. bdring_len = USB_BDRING_LEN;
  363. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  364. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  365. if (ep->rxbuffer == NULL) {
  366. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  367. size);
  368. kfree(ep->rxframe);
  369. return -ENOMEM;
  370. }
  371. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  372. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  373. ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
  374. ep->rxbuffer,
  375. size,
  376. DMA_FROM_DEVICE);
  377. ep->rxbufmap = 1;
  378. } else {
  379. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  380. ep->rxbuf_d, size,
  381. DMA_FROM_DEVICE);
  382. ep->rxbufmap = 0;
  383. }
  384. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  385. tmp = ep->rxbuf_d;
  386. tmp = (u32)(((tmp >> 2) << 2) + 4);
  387. for (i = 0; i < bdring_len - 1; i++) {
  388. out_be32(&bd->buf, tmp);
  389. out_be32((u32 __iomem *)bd, (R_E | R_I));
  390. tmp = tmp + size;
  391. bd++;
  392. }
  393. out_be32(&bd->buf, tmp);
  394. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  395. return 0;
  396. }
  397. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  398. {
  399. struct qe_ep *ep = &udc->eps[pipe_num];
  400. struct usb_ep_para __iomem *epparam;
  401. u16 usep, logepnum;
  402. u16 tmp;
  403. u8 rtfcr = 0;
  404. epparam = udc->ep_param[pipe_num];
  405. usep = 0;
  406. logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  407. usep |= (logepnum << USB_EPNUM_SHIFT);
  408. switch (ep->desc->bmAttributes & 0x03) {
  409. case USB_ENDPOINT_XFER_BULK:
  410. usep |= USB_TRANS_BULK;
  411. break;
  412. case USB_ENDPOINT_XFER_ISOC:
  413. usep |= USB_TRANS_ISO;
  414. break;
  415. case USB_ENDPOINT_XFER_INT:
  416. usep |= USB_TRANS_INT;
  417. break;
  418. default:
  419. usep |= USB_TRANS_CTR;
  420. break;
  421. }
  422. switch (ep->dir) {
  423. case USB_DIR_OUT:
  424. usep |= USB_THS_IGNORE_IN;
  425. break;
  426. case USB_DIR_IN:
  427. usep |= USB_RHS_IGNORE_OUT;
  428. break;
  429. default:
  430. break;
  431. }
  432. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  433. rtfcr = 0x30;
  434. out_8(&epparam->rbmr, rtfcr);
  435. out_8(&epparam->tbmr, rtfcr);
  436. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  437. /* MRBLR must be divisble by 4 */
  438. tmp = (u16)(((tmp >> 2) << 2) + 4);
  439. out_be16(&epparam->mrblr, tmp);
  440. return 0;
  441. }
  442. static int qe_ep_init(struct qe_udc *udc,
  443. unsigned char pipe_num,
  444. const struct usb_endpoint_descriptor *desc)
  445. {
  446. struct qe_ep *ep = &udc->eps[pipe_num];
  447. unsigned long flags;
  448. int reval = 0;
  449. u16 max = 0;
  450. max = le16_to_cpu(desc->wMaxPacketSize);
  451. /* check the max package size validate for this endpoint */
  452. /* Refer to USB2.0 spec table 9-13,
  453. */
  454. if (pipe_num != 0) {
  455. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  456. case USB_ENDPOINT_XFER_BULK:
  457. if (strstr(ep->ep.name, "-iso")
  458. || strstr(ep->ep.name, "-int"))
  459. goto en_done;
  460. switch (udc->gadget.speed) {
  461. case USB_SPEED_HIGH:
  462. if ((max == 128) || (max == 256) || (max == 512))
  463. break;
  464. default:
  465. switch (max) {
  466. case 4:
  467. case 8:
  468. case 16:
  469. case 32:
  470. case 64:
  471. break;
  472. default:
  473. case USB_SPEED_LOW:
  474. goto en_done;
  475. }
  476. }
  477. break;
  478. case USB_ENDPOINT_XFER_INT:
  479. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  480. goto en_done;
  481. switch (udc->gadget.speed) {
  482. case USB_SPEED_HIGH:
  483. if (max <= 1024)
  484. break;
  485. case USB_SPEED_FULL:
  486. if (max <= 64)
  487. break;
  488. default:
  489. if (max <= 8)
  490. break;
  491. goto en_done;
  492. }
  493. break;
  494. case USB_ENDPOINT_XFER_ISOC:
  495. if (strstr(ep->ep.name, "-bulk")
  496. || strstr(ep->ep.name, "-int"))
  497. goto en_done;
  498. switch (udc->gadget.speed) {
  499. case USB_SPEED_HIGH:
  500. if (max <= 1024)
  501. break;
  502. case USB_SPEED_FULL:
  503. if (max <= 1023)
  504. break;
  505. default:
  506. goto en_done;
  507. }
  508. break;
  509. case USB_ENDPOINT_XFER_CONTROL:
  510. if (strstr(ep->ep.name, "-iso")
  511. || strstr(ep->ep.name, "-int"))
  512. goto en_done;
  513. switch (udc->gadget.speed) {
  514. case USB_SPEED_HIGH:
  515. case USB_SPEED_FULL:
  516. switch (max) {
  517. case 1:
  518. case 2:
  519. case 4:
  520. case 8:
  521. case 16:
  522. case 32:
  523. case 64:
  524. break;
  525. default:
  526. goto en_done;
  527. }
  528. case USB_SPEED_LOW:
  529. switch (max) {
  530. case 1:
  531. case 2:
  532. case 4:
  533. case 8:
  534. break;
  535. default:
  536. goto en_done;
  537. }
  538. default:
  539. goto en_done;
  540. }
  541. break;
  542. default:
  543. goto en_done;
  544. }
  545. } /* if ep0*/
  546. spin_lock_irqsave(&udc->lock, flags);
  547. /* initialize ep structure */
  548. ep->ep.maxpacket = max;
  549. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  550. ep->desc = desc;
  551. ep->stopped = 0;
  552. ep->init = 1;
  553. if (pipe_num == 0) {
  554. ep->dir = USB_DIR_BOTH;
  555. udc->ep0_dir = USB_DIR_OUT;
  556. udc->ep0_state = WAIT_FOR_SETUP;
  557. } else {
  558. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  559. case USB_DIR_OUT:
  560. ep->dir = USB_DIR_OUT;
  561. break;
  562. case USB_DIR_IN:
  563. ep->dir = USB_DIR_IN;
  564. default:
  565. break;
  566. }
  567. }
  568. /* hardware special operation */
  569. qe_ep_bd_init(udc, pipe_num);
  570. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  571. reval = qe_ep_rxbd_update(ep);
  572. if (reval)
  573. goto en_done1;
  574. }
  575. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  576. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  577. if (ep->txframe == NULL) {
  578. dev_err(udc->dev, "malloc txframe failed\n");
  579. goto en_done2;
  580. }
  581. qe_frame_init(ep->txframe);
  582. }
  583. qe_ep_register_init(udc, pipe_num);
  584. /* Now HW will be NAKing transfers to that EP,
  585. * until a buffer is queued to it. */
  586. spin_unlock_irqrestore(&udc->lock, flags);
  587. return 0;
  588. en_done2:
  589. kfree(ep->rxbuffer);
  590. kfree(ep->rxframe);
  591. en_done1:
  592. spin_unlock_irqrestore(&udc->lock, flags);
  593. en_done:
  594. dev_dbg(udc->dev, "failed to initialize %s\n", ep->ep.name);
  595. return -ENODEV;
  596. }
  597. static inline void qe_usb_enable(void)
  598. {
  599. setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  600. }
  601. static inline void qe_usb_disable(void)
  602. {
  603. clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  604. }
  605. /*----------------------------------------------------------------------------*
  606. * USB and EP basic manipulate function end *
  607. *----------------------------------------------------------------------------*/
  608. /******************************************************************************
  609. UDC transmit and receive process
  610. ******************************************************************************/
  611. static void recycle_one_rxbd(struct qe_ep *ep)
  612. {
  613. u32 bdstatus;
  614. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  615. bdstatus = R_I | R_E | (bdstatus & R_W);
  616. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  617. if (bdstatus & R_W)
  618. ep->e_rxbd = ep->rxbase;
  619. else
  620. ep->e_rxbd++;
  621. }
  622. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  623. {
  624. u32 bdstatus;
  625. struct qe_bd __iomem *bd, *nextbd;
  626. unsigned char stop = 0;
  627. nextbd = ep->n_rxbd;
  628. bd = ep->e_rxbd;
  629. bdstatus = in_be32((u32 __iomem *)bd);
  630. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  631. bdstatus = R_E | R_I | (bdstatus & R_W);
  632. out_be32((u32 __iomem *)bd, bdstatus);
  633. if (bdstatus & R_W)
  634. bd = ep->rxbase;
  635. else
  636. bd++;
  637. bdstatus = in_be32((u32 __iomem *)bd);
  638. if (stopatnext && (bd == nextbd))
  639. stop = 1;
  640. }
  641. ep->e_rxbd = bd;
  642. }
  643. static void ep_recycle_rxbds(struct qe_ep *ep)
  644. {
  645. struct qe_bd __iomem *bd = ep->n_rxbd;
  646. u32 bdstatus;
  647. u8 epnum = ep->epnum;
  648. struct qe_udc *udc = ep->udc;
  649. bdstatus = in_be32((u32 __iomem *)bd);
  650. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  651. bd = ep->rxbase +
  652. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  653. in_be16(&udc->ep_param[epnum]->rbase))
  654. >> 3);
  655. bdstatus = in_be32((u32 __iomem *)bd);
  656. if (bdstatus & R_W)
  657. bd = ep->rxbase;
  658. else
  659. bd++;
  660. ep->e_rxbd = bd;
  661. recycle_rxbds(ep, 0);
  662. ep->e_rxbd = ep->n_rxbd;
  663. } else
  664. recycle_rxbds(ep, 1);
  665. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  666. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  667. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  668. qe_eprx_normal(ep);
  669. ep->localnack = 0;
  670. }
  671. static void setup_received_handle(struct qe_udc *udc,
  672. struct usb_ctrlrequest *setup);
  673. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  674. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  675. /* when BD PID is setup, handle the packet */
  676. static int ep0_setup_handle(struct qe_udc *udc)
  677. {
  678. struct qe_ep *ep = &udc->eps[0];
  679. struct qe_frame *pframe;
  680. unsigned int fsize;
  681. u8 *cp;
  682. pframe = ep->rxframe;
  683. if ((frame_get_info(pframe) & PID_SETUP)
  684. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  685. fsize = frame_get_length(pframe);
  686. if (unlikely(fsize != 8))
  687. return -EINVAL;
  688. cp = (u8 *)&udc->local_setup_buff;
  689. memcpy(cp, pframe->data, fsize);
  690. ep->data01 = 1;
  691. /* handle the usb command base on the usb_ctrlrequest */
  692. setup_received_handle(udc, &udc->local_setup_buff);
  693. return 0;
  694. }
  695. return -EINVAL;
  696. }
  697. static int qe_ep0_rx(struct qe_udc *udc)
  698. {
  699. struct qe_ep *ep = &udc->eps[0];
  700. struct qe_frame *pframe;
  701. struct qe_bd __iomem *bd;
  702. u32 bdstatus, length;
  703. u32 vaddr;
  704. pframe = ep->rxframe;
  705. if (ep->dir == USB_DIR_IN) {
  706. dev_err(udc->dev, "ep0 not a control endpoint\n");
  707. return -EINVAL;
  708. }
  709. bd = ep->n_rxbd;
  710. bdstatus = in_be32((u32 __iomem *)bd);
  711. length = bdstatus & BD_LENGTH_MASK;
  712. while (!(bdstatus & R_E) && length) {
  713. if ((bdstatus & R_F) && (bdstatus & R_L)
  714. && !(bdstatus & R_ERROR)) {
  715. if (length == USB_CRC_SIZE) {
  716. udc->ep0_state = WAIT_FOR_SETUP;
  717. dev_vdbg(udc->dev,
  718. "receive a ZLP in status phase\n");
  719. } else {
  720. qe_frame_clean(pframe);
  721. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  722. frame_set_data(pframe, (u8 *)vaddr);
  723. frame_set_length(pframe,
  724. (length - USB_CRC_SIZE));
  725. frame_set_status(pframe, FRAME_OK);
  726. switch (bdstatus & R_PID) {
  727. case R_PID_SETUP:
  728. frame_set_info(pframe, PID_SETUP);
  729. break;
  730. case R_PID_DATA1:
  731. frame_set_info(pframe, PID_DATA1);
  732. break;
  733. default:
  734. frame_set_info(pframe, PID_DATA0);
  735. break;
  736. }
  737. if ((bdstatus & R_PID) == R_PID_SETUP)
  738. ep0_setup_handle(udc);
  739. else
  740. qe_ep_rxframe_handle(ep);
  741. }
  742. } else {
  743. dev_err(udc->dev, "The receive frame with error!\n");
  744. }
  745. /* note: don't clear the rxbd's buffer address */
  746. recycle_one_rxbd(ep);
  747. /* Get next BD */
  748. if (bdstatus & R_W)
  749. bd = ep->rxbase;
  750. else
  751. bd++;
  752. bdstatus = in_be32((u32 __iomem *)bd);
  753. length = bdstatus & BD_LENGTH_MASK;
  754. }
  755. ep->n_rxbd = bd;
  756. return 0;
  757. }
  758. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  759. {
  760. struct qe_frame *pframe;
  761. u8 framepid = 0;
  762. unsigned int fsize;
  763. u8 *cp;
  764. struct qe_req *req;
  765. pframe = ep->rxframe;
  766. if (frame_get_info(pframe) & PID_DATA1)
  767. framepid = 0x1;
  768. if (framepid != ep->data01) {
  769. dev_err(ep->udc->dev, "the data01 error!\n");
  770. return -EIO;
  771. }
  772. fsize = frame_get_length(pframe);
  773. if (list_empty(&ep->queue)) {
  774. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  775. } else {
  776. req = list_entry(ep->queue.next, struct qe_req, queue);
  777. cp = (u8 *)(req->req.buf) + req->req.actual;
  778. if (cp) {
  779. memcpy(cp, pframe->data, fsize);
  780. req->req.actual += fsize;
  781. if ((fsize < ep->ep.maxpacket) ||
  782. (req->req.actual >= req->req.length)) {
  783. if (ep->epnum == 0)
  784. ep0_req_complete(ep->udc, req);
  785. else
  786. done(ep, req, 0);
  787. if (list_empty(&ep->queue) && ep->epnum != 0)
  788. qe_eprx_nack(ep);
  789. }
  790. }
  791. }
  792. qe_ep_toggledata01(ep);
  793. return 0;
  794. }
  795. static void ep_rx_tasklet(unsigned long data)
  796. {
  797. struct qe_udc *udc = (struct qe_udc *)data;
  798. struct qe_ep *ep;
  799. struct qe_frame *pframe;
  800. struct qe_bd __iomem *bd;
  801. unsigned long flags;
  802. u32 bdstatus, length;
  803. u32 vaddr, i;
  804. spin_lock_irqsave(&udc->lock, flags);
  805. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  806. ep = &udc->eps[i];
  807. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  808. dev_dbg(udc->dev,
  809. "This is a transmit ep or disable tasklet!\n");
  810. continue;
  811. }
  812. pframe = ep->rxframe;
  813. bd = ep->n_rxbd;
  814. bdstatus = in_be32((u32 __iomem *)bd);
  815. length = bdstatus & BD_LENGTH_MASK;
  816. while (!(bdstatus & R_E) && length) {
  817. if (list_empty(&ep->queue)) {
  818. qe_eprx_nack(ep);
  819. dev_dbg(udc->dev,
  820. "The rxep have noreq %d\n",
  821. ep->has_data);
  822. break;
  823. }
  824. if ((bdstatus & R_F) && (bdstatus & R_L)
  825. && !(bdstatus & R_ERROR)) {
  826. qe_frame_clean(pframe);
  827. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  828. frame_set_data(pframe, (u8 *)vaddr);
  829. frame_set_length(pframe,
  830. (length - USB_CRC_SIZE));
  831. frame_set_status(pframe, FRAME_OK);
  832. switch (bdstatus & R_PID) {
  833. case R_PID_DATA1:
  834. frame_set_info(pframe, PID_DATA1);
  835. break;
  836. case R_PID_SETUP:
  837. frame_set_info(pframe, PID_SETUP);
  838. break;
  839. default:
  840. frame_set_info(pframe, PID_DATA0);
  841. break;
  842. }
  843. /* handle the rx frame */
  844. qe_ep_rxframe_handle(ep);
  845. } else {
  846. dev_err(udc->dev,
  847. "error in received frame\n");
  848. }
  849. /* note: don't clear the rxbd's buffer address */
  850. /*clear the length */
  851. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  852. ep->has_data--;
  853. if (!(ep->localnack))
  854. recycle_one_rxbd(ep);
  855. /* Get next BD */
  856. if (bdstatus & R_W)
  857. bd = ep->rxbase;
  858. else
  859. bd++;
  860. bdstatus = in_be32((u32 __iomem *)bd);
  861. length = bdstatus & BD_LENGTH_MASK;
  862. }
  863. ep->n_rxbd = bd;
  864. if (ep->localnack)
  865. ep_recycle_rxbds(ep);
  866. ep->enable_tasklet = 0;
  867. } /* for i=1 */
  868. spin_unlock_irqrestore(&udc->lock, flags);
  869. }
  870. static int qe_ep_rx(struct qe_ep *ep)
  871. {
  872. struct qe_udc *udc;
  873. struct qe_frame *pframe;
  874. struct qe_bd __iomem *bd;
  875. u16 swoffs, ucoffs, emptybds;
  876. udc = ep->udc;
  877. pframe = ep->rxframe;
  878. if (ep->dir == USB_DIR_IN) {
  879. dev_err(udc->dev, "transmit ep in rx function\n");
  880. return -EINVAL;
  881. }
  882. bd = ep->n_rxbd;
  883. swoffs = (u16)(bd - ep->rxbase);
  884. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  885. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  886. if (swoffs < ucoffs)
  887. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  888. else
  889. emptybds = swoffs - ucoffs;
  890. if (emptybds < MIN_EMPTY_BDS) {
  891. qe_eprx_nack(ep);
  892. ep->localnack = 1;
  893. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  894. }
  895. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  896. if (list_empty(&ep->queue)) {
  897. qe_eprx_nack(ep);
  898. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  899. ep->has_data);
  900. return 0;
  901. }
  902. tasklet_schedule(&udc->rx_tasklet);
  903. ep->enable_tasklet = 1;
  904. return 0;
  905. }
  906. /* send data from a frame, no matter what tx_req */
  907. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  908. {
  909. struct qe_udc *udc = ep->udc;
  910. struct qe_bd __iomem *bd;
  911. u16 saveusbmr;
  912. u32 bdstatus, pidmask;
  913. u32 paddr;
  914. if (ep->dir == USB_DIR_OUT) {
  915. dev_err(udc->dev, "receive ep passed to tx function\n");
  916. return -EINVAL;
  917. }
  918. /* Disable the Tx interrupt */
  919. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  920. out_be16(&udc->usb_regs->usb_usbmr,
  921. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  922. bd = ep->n_txbd;
  923. bdstatus = in_be32((u32 __iomem *)bd);
  924. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  925. if (frame_get_length(frame) == 0) {
  926. frame_set_data(frame, udc->nullbuf);
  927. frame_set_length(frame, 2);
  928. frame->info |= (ZLP | NO_CRC);
  929. dev_vdbg(udc->dev, "the frame size = 0\n");
  930. }
  931. paddr = virt_to_phys((void *)frame->data);
  932. out_be32(&bd->buf, paddr);
  933. bdstatus = (bdstatus&T_W);
  934. if (!(frame_get_info(frame) & NO_CRC))
  935. bdstatus |= T_R | T_I | T_L | T_TC
  936. | frame_get_length(frame);
  937. else
  938. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  939. /* if the packet is a ZLP in status phase */
  940. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  941. ep->data01 = 0x1;
  942. if (ep->data01) {
  943. pidmask = T_PID_DATA1;
  944. frame->info |= PID_DATA1;
  945. } else {
  946. pidmask = T_PID_DATA0;
  947. frame->info |= PID_DATA0;
  948. }
  949. bdstatus |= T_CNF;
  950. bdstatus |= pidmask;
  951. out_be32((u32 __iomem *)bd, bdstatus);
  952. qe_ep_filltxfifo(ep);
  953. /* enable the TX interrupt */
  954. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  955. qe_ep_toggledata01(ep);
  956. if (bdstatus & T_W)
  957. ep->n_txbd = ep->txbase;
  958. else
  959. ep->n_txbd++;
  960. return 0;
  961. } else {
  962. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  963. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  964. return -EBUSY;
  965. }
  966. }
  967. /* when an bd was transmitted, the function can *
  968. * handle the tx_req, not include ep0 */
  969. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  970. {
  971. if (ep->tx_req != NULL) {
  972. if (!restart) {
  973. int asent = ep->last;
  974. ep->sent += asent;
  975. ep->last -= asent;
  976. } else {
  977. ep->last = 0;
  978. }
  979. /* a request already were transmitted completely */
  980. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  981. ep->tx_req->req.actual = (unsigned int)ep->sent;
  982. done(ep, ep->tx_req, 0);
  983. ep->tx_req = NULL;
  984. ep->last = 0;
  985. ep->sent = 0;
  986. }
  987. }
  988. /* we should gain a new tx_req fot this endpoint */
  989. if (ep->tx_req == NULL) {
  990. if (!list_empty(&ep->queue)) {
  991. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  992. queue);
  993. ep->last = 0;
  994. ep->sent = 0;
  995. }
  996. }
  997. return 0;
  998. }
  999. /* give a frame and a tx_req,send some data */
  1000. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1001. {
  1002. unsigned int size;
  1003. u8 *buf;
  1004. qe_frame_clean(frame);
  1005. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1006. ep->ep.maxpacket);
  1007. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1008. if (buf && size) {
  1009. ep->last = size;
  1010. frame_set_data(frame, buf);
  1011. frame_set_length(frame, size);
  1012. frame_set_status(frame, FRAME_OK);
  1013. frame_set_info(frame, 0);
  1014. return qe_ep_tx(ep, frame);
  1015. }
  1016. return -EIO;
  1017. }
  1018. /* give a frame struct,send a ZLP */
  1019. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1020. {
  1021. struct qe_udc *udc = ep->udc;
  1022. if (frame == NULL)
  1023. return -ENODEV;
  1024. qe_frame_clean(frame);
  1025. frame_set_data(frame, (u8 *)udc->nullbuf);
  1026. frame_set_length(frame, 2);
  1027. frame_set_status(frame, FRAME_OK);
  1028. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1029. return qe_ep_tx(ep, frame);
  1030. }
  1031. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1032. {
  1033. struct qe_req *req = ep->tx_req;
  1034. int reval;
  1035. if (req == NULL)
  1036. return -ENODEV;
  1037. if ((req->req.length - ep->sent) > 0)
  1038. reval = qe_usb_senddata(ep, frame);
  1039. else
  1040. reval = sendnulldata(ep, frame, 0);
  1041. return reval;
  1042. }
  1043. /* if direction is DIR_IN, the status is Device->Host
  1044. * if direction is DIR_OUT, the status transaction is Device<-Host
  1045. * in status phase, udc create a request and gain status */
  1046. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1047. {
  1048. struct qe_ep *ep = &udc->eps[0];
  1049. if (direction == USB_DIR_IN) {
  1050. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1051. udc->ep0_dir = USB_DIR_IN;
  1052. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1053. } else {
  1054. udc->ep0_dir = USB_DIR_OUT;
  1055. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1056. }
  1057. return 0;
  1058. }
  1059. /* a request complete in ep0, whether gadget request or udc request */
  1060. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1061. {
  1062. struct qe_ep *ep = &udc->eps[0];
  1063. /* because usb and ep's status already been set in ch9setaddress() */
  1064. switch (udc->ep0_state) {
  1065. case DATA_STATE_XMIT:
  1066. done(ep, req, 0);
  1067. /* receive status phase */
  1068. if (ep0_prime_status(udc, USB_DIR_OUT))
  1069. qe_ep0_stall(udc);
  1070. break;
  1071. case DATA_STATE_NEED_ZLP:
  1072. done(ep, req, 0);
  1073. udc->ep0_state = WAIT_FOR_SETUP;
  1074. break;
  1075. case DATA_STATE_RECV:
  1076. done(ep, req, 0);
  1077. /* send status phase */
  1078. if (ep0_prime_status(udc, USB_DIR_IN))
  1079. qe_ep0_stall(udc);
  1080. break;
  1081. case WAIT_FOR_OUT_STATUS:
  1082. done(ep, req, 0);
  1083. udc->ep0_state = WAIT_FOR_SETUP;
  1084. break;
  1085. case WAIT_FOR_SETUP:
  1086. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1087. break;
  1088. default:
  1089. qe_ep0_stall(udc);
  1090. break;
  1091. }
  1092. }
  1093. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1094. {
  1095. struct qe_req *tx_req = NULL;
  1096. struct qe_frame *frame = ep->txframe;
  1097. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1098. if (!restart)
  1099. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1100. else
  1101. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1102. return 0;
  1103. }
  1104. tx_req = ep->tx_req;
  1105. if (tx_req != NULL) {
  1106. if (!restart) {
  1107. int asent = ep->last;
  1108. ep->sent += asent;
  1109. ep->last -= asent;
  1110. } else {
  1111. ep->last = 0;
  1112. }
  1113. /* a request already were transmitted completely */
  1114. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1115. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1116. ep0_req_complete(ep->udc, ep->tx_req);
  1117. ep->tx_req = NULL;
  1118. ep->last = 0;
  1119. ep->sent = 0;
  1120. }
  1121. } else {
  1122. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1123. }
  1124. return 0;
  1125. }
  1126. static int ep0_txframe_handle(struct qe_ep *ep)
  1127. {
  1128. /* if have error, transmit again */
  1129. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1130. qe_ep_flushtxfifo(ep);
  1131. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1132. if (frame_get_info(ep->txframe) & PID_DATA0)
  1133. ep->data01 = 0;
  1134. else
  1135. ep->data01 = 1;
  1136. ep0_txcomplete(ep, 1);
  1137. } else
  1138. ep0_txcomplete(ep, 0);
  1139. frame_create_tx(ep, ep->txframe);
  1140. return 0;
  1141. }
  1142. static int qe_ep0_txconf(struct qe_ep *ep)
  1143. {
  1144. struct qe_bd __iomem *bd;
  1145. struct qe_frame *pframe;
  1146. u32 bdstatus;
  1147. bd = ep->c_txbd;
  1148. bdstatus = in_be32((u32 __iomem *)bd);
  1149. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1150. pframe = ep->txframe;
  1151. /* clear and recycle the BD */
  1152. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1153. out_be32(&bd->buf, 0);
  1154. if (bdstatus & T_W)
  1155. ep->c_txbd = ep->txbase;
  1156. else
  1157. ep->c_txbd++;
  1158. if (ep->c_txbd == ep->n_txbd) {
  1159. if (bdstatus & DEVICE_T_ERROR) {
  1160. frame_set_status(pframe, FRAME_ERROR);
  1161. if (bdstatus & T_TO)
  1162. pframe->status |= TX_ER_TIMEOUT;
  1163. if (bdstatus & T_UN)
  1164. pframe->status |= TX_ER_UNDERUN;
  1165. }
  1166. ep0_txframe_handle(ep);
  1167. }
  1168. bd = ep->c_txbd;
  1169. bdstatus = in_be32((u32 __iomem *)bd);
  1170. }
  1171. return 0;
  1172. }
  1173. static int ep_txframe_handle(struct qe_ep *ep)
  1174. {
  1175. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1176. qe_ep_flushtxfifo(ep);
  1177. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1178. if (frame_get_info(ep->txframe) & PID_DATA0)
  1179. ep->data01 = 0;
  1180. else
  1181. ep->data01 = 1;
  1182. txcomplete(ep, 1);
  1183. } else
  1184. txcomplete(ep, 0);
  1185. frame_create_tx(ep, ep->txframe); /* send the data */
  1186. return 0;
  1187. }
  1188. /* confirm the already trainsmited bd */
  1189. static int qe_ep_txconf(struct qe_ep *ep)
  1190. {
  1191. struct qe_bd __iomem *bd;
  1192. struct qe_frame *pframe = NULL;
  1193. u32 bdstatus;
  1194. unsigned char breakonrxinterrupt = 0;
  1195. bd = ep->c_txbd;
  1196. bdstatus = in_be32((u32 __iomem *)bd);
  1197. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1198. pframe = ep->txframe;
  1199. if (bdstatus & DEVICE_T_ERROR) {
  1200. frame_set_status(pframe, FRAME_ERROR);
  1201. if (bdstatus & T_TO)
  1202. pframe->status |= TX_ER_TIMEOUT;
  1203. if (bdstatus & T_UN)
  1204. pframe->status |= TX_ER_UNDERUN;
  1205. }
  1206. /* clear and recycle the BD */
  1207. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1208. out_be32(&bd->buf, 0);
  1209. if (bdstatus & T_W)
  1210. ep->c_txbd = ep->txbase;
  1211. else
  1212. ep->c_txbd++;
  1213. /* handle the tx frame */
  1214. ep_txframe_handle(ep);
  1215. bd = ep->c_txbd;
  1216. bdstatus = in_be32((u32 __iomem *)bd);
  1217. }
  1218. if (breakonrxinterrupt)
  1219. return -EIO;
  1220. else
  1221. return 0;
  1222. }
  1223. /* Add a request in queue, and try to transmit a packet */
  1224. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1225. {
  1226. int reval = 0;
  1227. if (ep->tx_req == NULL) {
  1228. ep->sent = 0;
  1229. ep->last = 0;
  1230. txcomplete(ep, 0); /* can gain a new tx_req */
  1231. reval = frame_create_tx(ep, ep->txframe);
  1232. }
  1233. return reval;
  1234. }
  1235. /* Maybe this is a good ideal */
  1236. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1237. {
  1238. struct qe_udc *udc = ep->udc;
  1239. struct qe_frame *pframe = NULL;
  1240. struct qe_bd __iomem *bd;
  1241. u32 bdstatus, length;
  1242. u32 vaddr, fsize;
  1243. u8 *cp;
  1244. u8 finish_req = 0;
  1245. u8 framepid;
  1246. if (list_empty(&ep->queue)) {
  1247. dev_vdbg(udc->dev, "the req already finish!\n");
  1248. return 0;
  1249. }
  1250. pframe = ep->rxframe;
  1251. bd = ep->n_rxbd;
  1252. bdstatus = in_be32((u32 __iomem *)bd);
  1253. length = bdstatus & BD_LENGTH_MASK;
  1254. while (!(bdstatus & R_E) && length) {
  1255. if (finish_req)
  1256. break;
  1257. if ((bdstatus & R_F) && (bdstatus & R_L)
  1258. && !(bdstatus & R_ERROR)) {
  1259. qe_frame_clean(pframe);
  1260. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1261. frame_set_data(pframe, (u8 *)vaddr);
  1262. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1263. frame_set_status(pframe, FRAME_OK);
  1264. switch (bdstatus & R_PID) {
  1265. case R_PID_DATA1:
  1266. frame_set_info(pframe, PID_DATA1); break;
  1267. default:
  1268. frame_set_info(pframe, PID_DATA0); break;
  1269. }
  1270. /* handle the rx frame */
  1271. if (frame_get_info(pframe) & PID_DATA1)
  1272. framepid = 0x1;
  1273. else
  1274. framepid = 0;
  1275. if (framepid != ep->data01) {
  1276. dev_vdbg(udc->dev, "the data01 error!\n");
  1277. } else {
  1278. fsize = frame_get_length(pframe);
  1279. cp = (u8 *)(req->req.buf) + req->req.actual;
  1280. if (cp) {
  1281. memcpy(cp, pframe->data, fsize);
  1282. req->req.actual += fsize;
  1283. if ((fsize < ep->ep.maxpacket)
  1284. || (req->req.actual >=
  1285. req->req.length)) {
  1286. finish_req = 1;
  1287. done(ep, req, 0);
  1288. if (list_empty(&ep->queue))
  1289. qe_eprx_nack(ep);
  1290. }
  1291. }
  1292. qe_ep_toggledata01(ep);
  1293. }
  1294. } else {
  1295. dev_err(udc->dev, "The receive frame with error!\n");
  1296. }
  1297. /* note: don't clear the rxbd's buffer address *
  1298. * only Clear the length */
  1299. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1300. ep->has_data--;
  1301. /* Get next BD */
  1302. if (bdstatus & R_W)
  1303. bd = ep->rxbase;
  1304. else
  1305. bd++;
  1306. bdstatus = in_be32((u32 __iomem *)bd);
  1307. length = bdstatus & BD_LENGTH_MASK;
  1308. }
  1309. ep->n_rxbd = bd;
  1310. ep_recycle_rxbds(ep);
  1311. return 0;
  1312. }
  1313. /* only add the request in queue */
  1314. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1315. {
  1316. if (ep->state == EP_STATE_NACK) {
  1317. if (ep->has_data <= 0) {
  1318. /* Enable rx and unmask rx interrupt */
  1319. qe_eprx_normal(ep);
  1320. } else {
  1321. /* Copy the exist BD data */
  1322. ep_req_rx(ep, req);
  1323. }
  1324. }
  1325. return 0;
  1326. }
  1327. /********************************************************************
  1328. Internal Used Function End
  1329. ********************************************************************/
  1330. /*-----------------------------------------------------------------------
  1331. Endpoint Management Functions For Gadget
  1332. -----------------------------------------------------------------------*/
  1333. static int qe_ep_enable(struct usb_ep *_ep,
  1334. const struct usb_endpoint_descriptor *desc)
  1335. {
  1336. struct qe_udc *udc;
  1337. struct qe_ep *ep;
  1338. int retval = 0;
  1339. unsigned char epnum;
  1340. ep = container_of(_ep, struct qe_ep, ep);
  1341. /* catch various bogus parameters */
  1342. if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
  1343. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1344. return -EINVAL;
  1345. udc = ep->udc;
  1346. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1347. return -ESHUTDOWN;
  1348. epnum = (u8)desc->bEndpointAddress & 0xF;
  1349. retval = qe_ep_init(udc, epnum, desc);
  1350. if (retval != 0) {
  1351. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1352. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1353. return -EINVAL;
  1354. }
  1355. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1356. return 0;
  1357. }
  1358. static int qe_ep_disable(struct usb_ep *_ep)
  1359. {
  1360. struct qe_udc *udc;
  1361. struct qe_ep *ep;
  1362. unsigned long flags;
  1363. unsigned int size;
  1364. ep = container_of(_ep, struct qe_ep, ep);
  1365. udc = ep->udc;
  1366. if (!_ep || !ep->desc) {
  1367. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1368. return -EINVAL;
  1369. }
  1370. spin_lock_irqsave(&udc->lock, flags);
  1371. /* Nuke all pending requests (does flush) */
  1372. nuke(ep, -ESHUTDOWN);
  1373. ep->desc = NULL;
  1374. ep->stopped = 1;
  1375. spin_unlock_irqrestore(&udc->lock, flags);
  1376. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1377. if (ep->dir == USB_DIR_OUT)
  1378. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1379. (USB_BDRING_LEN_RX + 1);
  1380. else
  1381. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1382. (USB_BDRING_LEN + 1);
  1383. if (ep->dir != USB_DIR_IN) {
  1384. kfree(ep->rxframe);
  1385. if (ep->rxbufmap) {
  1386. dma_unmap_single(udc_controller->gadget.dev.parent,
  1387. ep->rxbuf_d, size,
  1388. DMA_FROM_DEVICE);
  1389. ep->rxbuf_d = DMA_ADDR_INVALID;
  1390. } else {
  1391. dma_sync_single_for_cpu(
  1392. udc_controller->gadget.dev.parent,
  1393. ep->rxbuf_d, size,
  1394. DMA_FROM_DEVICE);
  1395. }
  1396. kfree(ep->rxbuffer);
  1397. }
  1398. if (ep->dir != USB_DIR_OUT)
  1399. kfree(ep->txframe);
  1400. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1401. return 0;
  1402. }
  1403. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1404. {
  1405. struct qe_req *req;
  1406. req = kzalloc(sizeof(*req), gfp_flags);
  1407. if (!req)
  1408. return NULL;
  1409. req->req.dma = DMA_ADDR_INVALID;
  1410. INIT_LIST_HEAD(&req->queue);
  1411. return &req->req;
  1412. }
  1413. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1414. {
  1415. struct qe_req *req;
  1416. req = container_of(_req, struct qe_req, req);
  1417. if (_req)
  1418. kfree(req);
  1419. }
  1420. /* queues (submits) an I/O request to an endpoint */
  1421. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1422. gfp_t gfp_flags)
  1423. {
  1424. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1425. struct qe_req *req = container_of(_req, struct qe_req, req);
  1426. struct qe_udc *udc;
  1427. unsigned long flags;
  1428. int reval;
  1429. udc = ep->udc;
  1430. /* catch various bogus parameters */
  1431. if (!_req || !req->req.complete || !req->req.buf
  1432. || !list_empty(&req->queue)) {
  1433. dev_dbg(udc->dev, "bad params\n");
  1434. return -EINVAL;
  1435. }
  1436. if (!_ep || (!ep->desc && ep_index(ep))) {
  1437. dev_dbg(udc->dev, "bad ep\n");
  1438. return -EINVAL;
  1439. }
  1440. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1441. return -ESHUTDOWN;
  1442. req->ep = ep;
  1443. /* map virtual address to hardware */
  1444. if (req->req.dma == DMA_ADDR_INVALID) {
  1445. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1446. req->req.buf,
  1447. req->req.length,
  1448. ep_is_in(ep)
  1449. ? DMA_TO_DEVICE :
  1450. DMA_FROM_DEVICE);
  1451. req->mapped = 1;
  1452. } else {
  1453. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1454. req->req.dma, req->req.length,
  1455. ep_is_in(ep)
  1456. ? DMA_TO_DEVICE :
  1457. DMA_FROM_DEVICE);
  1458. req->mapped = 0;
  1459. }
  1460. req->req.status = -EINPROGRESS;
  1461. req->req.actual = 0;
  1462. list_add_tail(&req->queue, &ep->queue);
  1463. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1464. ep->name, req->req.length);
  1465. spin_lock_irqsave(&udc->lock, flags);
  1466. /* push the request to device */
  1467. if (ep_is_in(ep))
  1468. reval = ep_req_send(ep, req);
  1469. /* EP0 */
  1470. if (ep_index(ep) == 0 && req->req.length > 0) {
  1471. if (ep_is_in(ep))
  1472. udc->ep0_state = DATA_STATE_XMIT;
  1473. else
  1474. udc->ep0_state = DATA_STATE_RECV;
  1475. }
  1476. if (ep->dir == USB_DIR_OUT)
  1477. reval = ep_req_receive(ep, req);
  1478. spin_unlock_irqrestore(&udc->lock, flags);
  1479. return 0;
  1480. }
  1481. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1482. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1483. {
  1484. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1485. struct qe_req *req;
  1486. unsigned long flags;
  1487. if (!_ep || !_req)
  1488. return -EINVAL;
  1489. spin_lock_irqsave(&ep->udc->lock, flags);
  1490. /* make sure it's actually queued on this endpoint */
  1491. list_for_each_entry(req, &ep->queue, queue) {
  1492. if (&req->req == _req)
  1493. break;
  1494. }
  1495. if (&req->req != _req) {
  1496. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1497. return -EINVAL;
  1498. }
  1499. done(ep, req, -ECONNRESET);
  1500. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1501. return 0;
  1502. }
  1503. /*-----------------------------------------------------------------
  1504. * modify the endpoint halt feature
  1505. * @ep: the non-isochronous endpoint being stalled
  1506. * @value: 1--set halt 0--clear halt
  1507. * Returns zero, or a negative error code.
  1508. *----------------------------------------------------------------*/
  1509. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1510. {
  1511. struct qe_ep *ep;
  1512. unsigned long flags;
  1513. int status = -EOPNOTSUPP;
  1514. struct qe_udc *udc;
  1515. ep = container_of(_ep, struct qe_ep, ep);
  1516. if (!_ep || !ep->desc) {
  1517. status = -EINVAL;
  1518. goto out;
  1519. }
  1520. if (ep->epnum != 0) {
  1521. status = 0;
  1522. goto out;
  1523. }
  1524. udc = ep->udc;
  1525. /* Attempt to halt IN ep will fail if any transfer requests
  1526. * are still queue */
  1527. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1528. status = -EAGAIN;
  1529. goto out;
  1530. }
  1531. status = 0;
  1532. spin_lock_irqsave(&ep->udc->lock, flags);
  1533. qe_eptx_stall_change(ep, value);
  1534. qe_eprx_stall_change(ep, value);
  1535. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1536. if (ep->epnum == 0) {
  1537. udc->ep0_state = WAIT_FOR_SETUP;
  1538. udc->ep0_dir = 0;
  1539. }
  1540. out:
  1541. dev_vdbg(udc->dev, " %s %s halt stat %d\n", ep->ep.name,
  1542. value ? "set" : "clear", status);
  1543. return status;
  1544. }
  1545. static struct usb_ep_ops qe_ep_ops = {
  1546. .enable = qe_ep_enable,
  1547. .disable = qe_ep_disable,
  1548. .alloc_request = qe_alloc_request,
  1549. .free_request = qe_free_request,
  1550. .queue = qe_ep_queue,
  1551. .dequeue = qe_ep_dequeue,
  1552. .set_halt = qe_ep_set_halt,
  1553. };
  1554. /*------------------------------------------------------------------------
  1555. Gadget Driver Layer Operations
  1556. ------------------------------------------------------------------------*/
  1557. /* Get the current frame number */
  1558. static int qe_get_frame(struct usb_gadget *gadget)
  1559. {
  1560. u16 tmp;
  1561. tmp = in_be16(&udc_controller->usb_param->frame_n);
  1562. if (tmp & 0x8000)
  1563. tmp = tmp & 0x07ff;
  1564. else
  1565. tmp = -EINVAL;
  1566. return (int)tmp;
  1567. }
  1568. /* Tries to wake up the host connected to this gadget
  1569. *
  1570. * Return : 0-success
  1571. * Negative-this feature not enabled by host or not supported by device hw
  1572. */
  1573. static int qe_wakeup(struct usb_gadget *gadget)
  1574. {
  1575. return -ENOTSUPP;
  1576. }
  1577. /* Notify controller that VBUS is powered, Called by whatever
  1578. detects VBUS sessions */
  1579. static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
  1580. {
  1581. return -ENOTSUPP;
  1582. }
  1583. /* constrain controller's VBUS power usage
  1584. * This call is used by gadget drivers during SET_CONFIGURATION calls,
  1585. * reporting how much power the device may consume. For example, this
  1586. * could affect how quickly batteries are recharged.
  1587. *
  1588. * Returns zero on success, else negative errno.
  1589. */
  1590. static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
  1591. {
  1592. return -ENOTSUPP;
  1593. }
  1594. /* Change Data+ pullup status
  1595. * this func is used by usb_gadget_connect/disconnect
  1596. */
  1597. static int qe_pullup(struct usb_gadget *gadget, int is_on)
  1598. {
  1599. return -ENOTSUPP;
  1600. }
  1601. /* defined in usb_gadget.h */
  1602. static struct usb_gadget_ops qe_gadget_ops = {
  1603. .get_frame = qe_get_frame,
  1604. .wakeup = qe_wakeup,
  1605. /* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
  1606. .vbus_session = qe_vbus_session,
  1607. .vbus_draw = qe_vbus_draw,
  1608. .pullup = qe_pullup,
  1609. };
  1610. /*-------------------------------------------------------------------------
  1611. USB ep0 Setup process in BUS Enumeration
  1612. -------------------------------------------------------------------------*/
  1613. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1614. {
  1615. struct qe_ep *ep = &udc->eps[pipe];
  1616. nuke(ep, -ECONNRESET);
  1617. ep->tx_req = NULL;
  1618. return 0;
  1619. }
  1620. static int reset_queues(struct qe_udc *udc)
  1621. {
  1622. u8 pipe;
  1623. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1624. udc_reset_ep_queue(udc, pipe);
  1625. /* report disconnect; the driver is already quiesced */
  1626. spin_unlock(&udc->lock);
  1627. udc->driver->disconnect(&udc->gadget);
  1628. spin_lock(&udc->lock);
  1629. return 0;
  1630. }
  1631. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1632. u16 length)
  1633. {
  1634. /* Save the new address to device struct */
  1635. udc->device_address = (u8) value;
  1636. /* Update usb state */
  1637. udc->usb_state = USB_STATE_ADDRESS;
  1638. /* Status phase , send a ZLP */
  1639. if (ep0_prime_status(udc, USB_DIR_IN))
  1640. qe_ep0_stall(udc);
  1641. }
  1642. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1643. {
  1644. struct qe_req *req = container_of(_req, struct qe_req, req);
  1645. req->req.buf = NULL;
  1646. kfree(req);
  1647. }
  1648. static void ch9getstatus(struct qe_udc *udc, u16 value, u16 index,
  1649. u16 length)
  1650. {
  1651. u16 usb_status = 0; /* fix me to give correct status */
  1652. struct qe_req *req;
  1653. struct qe_ep *ep;
  1654. int status = 0;
  1655. ep = &udc->eps[0];
  1656. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1657. struct qe_req, req);
  1658. req->req.length = 2;
  1659. req->req.buf = udc->nullbuf;
  1660. memcpy(req->req.buf, (u8 *)&usb_status, 2);
  1661. req->req.status = -EINPROGRESS;
  1662. req->req.actual = 0;
  1663. req->req.complete = ownercomplete;
  1664. udc->ep0_dir = USB_DIR_IN;
  1665. /* data phase */
  1666. status = qe_ep_queue(&ep->ep, &req->req, GFP_ATOMIC);
  1667. if (status) {
  1668. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1669. qe_ep0_stall(udc);
  1670. }
  1671. }
  1672. /* only handle the setup request, suppose the device in normal status */
  1673. static void setup_received_handle(struct qe_udc *udc,
  1674. struct usb_ctrlrequest *setup)
  1675. {
  1676. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1677. u16 wValue = le16_to_cpu(setup->wValue);
  1678. u16 wIndex = le16_to_cpu(setup->wIndex);
  1679. u16 wLength = le16_to_cpu(setup->wLength);
  1680. /* clear the previous request in the ep0 */
  1681. udc_reset_ep_queue(udc, 0);
  1682. if (setup->bRequestType & USB_DIR_IN)
  1683. udc->ep0_dir = USB_DIR_IN;
  1684. else
  1685. udc->ep0_dir = USB_DIR_OUT;
  1686. switch (setup->bRequest) {
  1687. case USB_REQ_GET_STATUS:
  1688. /* Data+Status phase form udc */
  1689. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1690. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1691. break;
  1692. ch9getstatus(udc, wValue, wIndex, wLength);
  1693. return;
  1694. case USB_REQ_SET_ADDRESS:
  1695. /* Status phase from udc */
  1696. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1697. USB_RECIP_DEVICE))
  1698. break;
  1699. ch9setaddress(udc, wValue, wIndex, wLength);
  1700. return;
  1701. case USB_REQ_CLEAR_FEATURE:
  1702. case USB_REQ_SET_FEATURE:
  1703. /* Requests with no data phase, status phase from udc */
  1704. if ((setup->bRequestType & USB_TYPE_MASK)
  1705. != USB_TYPE_STANDARD)
  1706. break;
  1707. if ((setup->bRequestType & USB_RECIP_MASK)
  1708. == USB_RECIP_ENDPOINT) {
  1709. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1710. struct qe_ep *ep;
  1711. if (wValue != 0 || wLength != 0
  1712. || pipe > USB_MAX_ENDPOINTS)
  1713. break;
  1714. ep = &udc->eps[pipe];
  1715. spin_unlock(&udc->lock);
  1716. qe_ep_set_halt(&ep->ep,
  1717. (setup->bRequest == USB_REQ_SET_FEATURE)
  1718. ? 1 : 0);
  1719. spin_lock(&udc->lock);
  1720. }
  1721. ep0_prime_status(udc, USB_DIR_IN);
  1722. return;
  1723. default:
  1724. break;
  1725. }
  1726. if (wLength) {
  1727. /* Data phase from gadget, status phase from udc */
  1728. if (setup->bRequestType & USB_DIR_IN) {
  1729. udc->ep0_state = DATA_STATE_XMIT;
  1730. udc->ep0_dir = USB_DIR_IN;
  1731. } else{
  1732. udc->ep0_state = DATA_STATE_RECV;
  1733. udc->ep0_dir = USB_DIR_OUT;
  1734. }
  1735. spin_unlock(&udc->lock);
  1736. if (udc->driver->setup(&udc->gadget,
  1737. &udc->local_setup_buff) < 0)
  1738. qe_ep0_stall(udc);
  1739. spin_lock(&udc->lock);
  1740. } else {
  1741. /* No data phase, IN status from gadget */
  1742. udc->ep0_dir = USB_DIR_IN;
  1743. spin_unlock(&udc->lock);
  1744. if (udc->driver->setup(&udc->gadget,
  1745. &udc->local_setup_buff) < 0)
  1746. qe_ep0_stall(udc);
  1747. spin_lock(&udc->lock);
  1748. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1749. }
  1750. }
  1751. /*-------------------------------------------------------------------------
  1752. USB Interrupt handlers
  1753. -------------------------------------------------------------------------*/
  1754. static void suspend_irq(struct qe_udc *udc)
  1755. {
  1756. udc->resume_state = udc->usb_state;
  1757. udc->usb_state = USB_STATE_SUSPENDED;
  1758. /* report suspend to the driver ,serial.c not support this*/
  1759. if (udc->driver->suspend)
  1760. udc->driver->suspend(&udc->gadget);
  1761. }
  1762. static void resume_irq(struct qe_udc *udc)
  1763. {
  1764. udc->usb_state = udc->resume_state;
  1765. udc->resume_state = 0;
  1766. /* report resume to the driver , serial.c not support this*/
  1767. if (udc->driver->resume)
  1768. udc->driver->resume(&udc->gadget);
  1769. }
  1770. static void idle_irq(struct qe_udc *udc)
  1771. {
  1772. u8 usbs;
  1773. usbs = in_8(&udc->usb_regs->usb_usbs);
  1774. if (usbs & USB_IDLE_STATUS_MASK) {
  1775. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1776. suspend_irq(udc);
  1777. } else {
  1778. if (udc->usb_state == USB_STATE_SUSPENDED)
  1779. resume_irq(udc);
  1780. }
  1781. }
  1782. static int reset_irq(struct qe_udc *udc)
  1783. {
  1784. unsigned char i;
  1785. qe_usb_disable();
  1786. out_8(&udc->usb_regs->usb_usadr, 0);
  1787. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1788. if (udc->eps[i].init)
  1789. qe_ep_reset(udc, i);
  1790. }
  1791. reset_queues(udc);
  1792. udc->usb_state = USB_STATE_DEFAULT;
  1793. udc->ep0_state = WAIT_FOR_SETUP;
  1794. udc->ep0_dir = USB_DIR_OUT;
  1795. qe_usb_enable();
  1796. return 0;
  1797. }
  1798. static int bsy_irq(struct qe_udc *udc)
  1799. {
  1800. return 0;
  1801. }
  1802. static int txe_irq(struct qe_udc *udc)
  1803. {
  1804. return 0;
  1805. }
  1806. /* ep0 tx interrupt also in here */
  1807. static int tx_irq(struct qe_udc *udc)
  1808. {
  1809. struct qe_ep *ep;
  1810. struct qe_bd __iomem *bd;
  1811. int i, res = 0;
  1812. if ((udc->usb_state == USB_STATE_ADDRESS)
  1813. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1814. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1815. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1816. ep = &udc->eps[i];
  1817. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1818. bd = ep->c_txbd;
  1819. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1820. && (in_be32(&bd->buf))) {
  1821. /* Disable the TX Interrupt */
  1822. /*confirm the transmitted bd*/
  1823. if (ep->epnum == 0)
  1824. res = qe_ep0_txconf(ep);
  1825. else
  1826. res = qe_ep_txconf(ep);
  1827. /* Enable the TX Interrupt */
  1828. }
  1829. }
  1830. }
  1831. return res;
  1832. }
  1833. /* setup packect's rx is handle in the function too */
  1834. static void rx_irq(struct qe_udc *udc)
  1835. {
  1836. struct qe_ep *ep;
  1837. struct qe_bd __iomem *bd;
  1838. int i;
  1839. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1840. ep = &udc->eps[i];
  1841. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1842. bd = ep->n_rxbd;
  1843. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1844. && (in_be32(&bd->buf))) {
  1845. if (ep->epnum == 0) {
  1846. qe_ep0_rx(udc);
  1847. } else {
  1848. /*non-setup package receive*/
  1849. qe_ep_rx(ep);
  1850. }
  1851. }
  1852. }
  1853. }
  1854. }
  1855. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1856. {
  1857. struct qe_udc *udc = (struct qe_udc *)_udc;
  1858. u16 irq_src;
  1859. irqreturn_t status = IRQ_NONE;
  1860. unsigned long flags;
  1861. spin_lock_irqsave(&udc->lock, flags);
  1862. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1863. in_be16(&udc->usb_regs->usb_usbmr);
  1864. /* Clear notification bits */
  1865. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1866. /* USB Interrupt */
  1867. if (irq_src & USB_E_IDLE_MASK) {
  1868. idle_irq(udc);
  1869. irq_src &= ~USB_E_IDLE_MASK;
  1870. status = IRQ_HANDLED;
  1871. }
  1872. if (irq_src & USB_E_TXB_MASK) {
  1873. tx_irq(udc);
  1874. irq_src &= ~USB_E_TXB_MASK;
  1875. status = IRQ_HANDLED;
  1876. }
  1877. if (irq_src & USB_E_RXB_MASK) {
  1878. rx_irq(udc);
  1879. irq_src &= ~USB_E_RXB_MASK;
  1880. status = IRQ_HANDLED;
  1881. }
  1882. if (irq_src & USB_E_RESET_MASK) {
  1883. reset_irq(udc);
  1884. irq_src &= ~USB_E_RESET_MASK;
  1885. status = IRQ_HANDLED;
  1886. }
  1887. if (irq_src & USB_E_BSY_MASK) {
  1888. bsy_irq(udc);
  1889. irq_src &= ~USB_E_BSY_MASK;
  1890. status = IRQ_HANDLED;
  1891. }
  1892. if (irq_src & USB_E_TXE_MASK) {
  1893. txe_irq(udc);
  1894. irq_src &= ~USB_E_TXE_MASK;
  1895. status = IRQ_HANDLED;
  1896. }
  1897. spin_unlock_irqrestore(&udc->lock, flags);
  1898. return status;
  1899. }
  1900. /*-------------------------------------------------------------------------
  1901. Gadget driver register and unregister.
  1902. --------------------------------------------------------------------------*/
  1903. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  1904. {
  1905. int retval;
  1906. unsigned long flags = 0;
  1907. /* standard operations */
  1908. if (!udc_controller)
  1909. return -ENODEV;
  1910. if (!driver || (driver->speed != USB_SPEED_FULL
  1911. && driver->speed != USB_SPEED_HIGH)
  1912. || !driver->bind || !driver->disconnect
  1913. || !driver->setup)
  1914. return -EINVAL;
  1915. if (udc_controller->driver)
  1916. return -EBUSY;
  1917. /* lock is needed but whether should use this lock or another */
  1918. spin_lock_irqsave(&udc_controller->lock, flags);
  1919. driver->driver.bus = NULL;
  1920. /* hook up the driver */
  1921. udc_controller->driver = driver;
  1922. udc_controller->gadget.dev.driver = &driver->driver;
  1923. udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed);
  1924. spin_unlock_irqrestore(&udc_controller->lock, flags);
  1925. retval = driver->bind(&udc_controller->gadget);
  1926. if (retval) {
  1927. dev_err(udc_controller->dev, "bind to %s --> %d",
  1928. driver->driver.name, retval);
  1929. udc_controller->gadget.dev.driver = NULL;
  1930. udc_controller->driver = NULL;
  1931. return retval;
  1932. }
  1933. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1934. qe_usb_enable();
  1935. out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
  1936. out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1937. udc_controller->usb_state = USB_STATE_ATTACHED;
  1938. udc_controller->ep0_state = WAIT_FOR_SETUP;
  1939. udc_controller->ep0_dir = USB_DIR_OUT;
  1940. dev_info(udc_controller->dev, "%s bind to driver %s \n",
  1941. udc_controller->gadget.name, driver->driver.name);
  1942. return 0;
  1943. }
  1944. EXPORT_SYMBOL(usb_gadget_register_driver);
  1945. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  1946. {
  1947. struct qe_ep *loop_ep;
  1948. unsigned long flags;
  1949. if (!udc_controller)
  1950. return -ENODEV;
  1951. if (!driver || driver != udc_controller->driver)
  1952. return -EINVAL;
  1953. /* stop usb controller, disable intr */
  1954. qe_usb_disable();
  1955. /* in fact, no needed */
  1956. udc_controller->usb_state = USB_STATE_ATTACHED;
  1957. udc_controller->ep0_state = WAIT_FOR_SETUP;
  1958. udc_controller->ep0_dir = 0;
  1959. /* stand operation */
  1960. spin_lock_irqsave(&udc_controller->lock, flags);
  1961. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  1962. nuke(&udc_controller->eps[0], -ESHUTDOWN);
  1963. list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
  1964. ep.ep_list)
  1965. nuke(loop_ep, -ESHUTDOWN);
  1966. spin_unlock_irqrestore(&udc_controller->lock, flags);
  1967. /* unbind gadget and unhook driver. */
  1968. driver->unbind(&udc_controller->gadget);
  1969. udc_controller->gadget.dev.driver = NULL;
  1970. udc_controller->driver = NULL;
  1971. dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
  1972. driver->driver.name);
  1973. return 0;
  1974. }
  1975. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  1976. /* udc structure's alloc and setup, include ep-param alloc */
  1977. static struct qe_udc __devinit *qe_udc_config(struct of_device *ofdev)
  1978. {
  1979. struct qe_udc *udc;
  1980. struct device_node *np = ofdev->node;
  1981. unsigned int tmp_addr = 0;
  1982. struct usb_device_para __iomem *usbpram;
  1983. unsigned int i;
  1984. u64 size;
  1985. u32 offset;
  1986. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  1987. if (udc == NULL) {
  1988. dev_err(&ofdev->dev, "malloc udc failed\n");
  1989. goto cleanup;
  1990. }
  1991. udc->dev = &ofdev->dev;
  1992. /* get default address of usb parameter in MURAM from device tree */
  1993. offset = *of_get_address(np, 1, &size, NULL);
  1994. udc->usb_param = cpm_muram_addr(offset);
  1995. memset_io(udc->usb_param, 0, size);
  1996. usbpram = udc->usb_param;
  1997. out_be16(&usbpram->frame_n, 0);
  1998. out_be32(&usbpram->rstate, 0);
  1999. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  2000. sizeof(struct usb_ep_para)),
  2001. USB_EP_PARA_ALIGNMENT);
  2002. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  2003. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  2004. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  2005. tmp_addr += 32;
  2006. }
  2007. memset_io(udc->ep_param[0], 0,
  2008. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  2009. udc->resume_state = USB_STATE_NOTATTACHED;
  2010. udc->usb_state = USB_STATE_POWERED;
  2011. udc->ep0_dir = 0;
  2012. spin_lock_init(&udc->lock);
  2013. return udc;
  2014. cleanup:
  2015. kfree(udc);
  2016. return NULL;
  2017. }
  2018. /* USB Controller register init */
  2019. static int __devinit qe_udc_reg_init(struct qe_udc *udc)
  2020. {
  2021. struct usb_ctlr __iomem *qe_usbregs;
  2022. qe_usbregs = udc->usb_regs;
  2023. /* Init the usb register */
  2024. out_8(&qe_usbregs->usb_usmod, 0x01);
  2025. out_be16(&qe_usbregs->usb_usbmr, 0);
  2026. out_8(&qe_usbregs->usb_uscom, 0);
  2027. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2028. return 0;
  2029. }
  2030. static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2031. {
  2032. struct qe_ep *ep = &udc->eps[pipe_num];
  2033. ep->udc = udc;
  2034. strcpy(ep->name, ep_name[pipe_num]);
  2035. ep->ep.name = ep_name[pipe_num];
  2036. ep->ep.ops = &qe_ep_ops;
  2037. ep->stopped = 1;
  2038. ep->ep.maxpacket = (unsigned short) ~0;
  2039. ep->desc = NULL;
  2040. ep->dir = 0xff;
  2041. ep->epnum = (u8)pipe_num;
  2042. ep->sent = 0;
  2043. ep->last = 0;
  2044. ep->init = 0;
  2045. ep->rxframe = NULL;
  2046. ep->txframe = NULL;
  2047. ep->tx_req = NULL;
  2048. ep->state = EP_STATE_IDLE;
  2049. ep->has_data = 0;
  2050. /* the queue lists any req for this ep */
  2051. INIT_LIST_HEAD(&ep->queue);
  2052. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2053. if (pipe_num != 0)
  2054. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2055. ep->gadget = &udc->gadget;
  2056. return 0;
  2057. }
  2058. /*-----------------------------------------------------------------------
  2059. * UDC device Driver operation functions *
  2060. *----------------------------------------------------------------------*/
  2061. static void qe_udc_release(struct device *dev)
  2062. {
  2063. int i = 0;
  2064. complete(udc_controller->done);
  2065. cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
  2066. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2067. udc_controller->ep_param[i] = NULL;
  2068. kfree(udc_controller);
  2069. udc_controller = NULL;
  2070. }
  2071. /* Driver probe functions */
  2072. static int __devinit qe_udc_probe(struct of_device *ofdev,
  2073. const struct of_device_id *match)
  2074. {
  2075. struct device_node *np = ofdev->node;
  2076. struct qe_ep *ep;
  2077. unsigned int ret = 0;
  2078. unsigned int i;
  2079. const void *prop;
  2080. prop = of_get_property(np, "mode", NULL);
  2081. if (!prop || strcmp(prop, "peripheral"))
  2082. return -ENODEV;
  2083. /* Initialize the udc structure including QH member and other member */
  2084. udc_controller = qe_udc_config(ofdev);
  2085. if (!udc_controller) {
  2086. dev_dbg(&ofdev->dev, "udc_controll is NULL\n");
  2087. return -ENOMEM;
  2088. }
  2089. udc_controller->soc_type = (unsigned long)match->data;
  2090. udc_controller->usb_regs = of_iomap(np, 0);
  2091. if (!udc_controller->usb_regs) {
  2092. ret = -ENOMEM;
  2093. goto err1;
  2094. }
  2095. /* initialize usb hw reg except for regs for EP,
  2096. * leave usbintr reg untouched*/
  2097. qe_udc_reg_init(udc_controller);
  2098. /* here comes the stand operations for probe
  2099. * set the qe_udc->gadget.xxx */
  2100. udc_controller->gadget.ops = &qe_gadget_ops;
  2101. /* gadget.ep0 is a pointer */
  2102. udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
  2103. INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
  2104. /* modify in register gadget process */
  2105. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2106. /* name: Identifies the controller hardware type. */
  2107. udc_controller->gadget.name = driver_name;
  2108. device_initialize(&udc_controller->gadget.dev);
  2109. strcpy(udc_controller->gadget.dev.bus_id, "gadget");
  2110. udc_controller->gadget.dev.release = qe_udc_release;
  2111. udc_controller->gadget.dev.parent = &ofdev->dev;
  2112. /* EP:intialization qe_ep struct */
  2113. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2114. /*because the ep type isn't decide here so
  2115. * qe_ep_init() should be called in ep_enable() */
  2116. /* setup the qe_ep struct and link ep.ep.list
  2117. * into gadget.ep_list */
  2118. qe_ep_config(udc_controller, (unsigned char)i);
  2119. }
  2120. /* ep0 initialization in here */
  2121. ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
  2122. if (ret)
  2123. goto err2;
  2124. /* create a buf for ZLP send */
  2125. udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
  2126. if (udc_controller->nullbuf == NULL) {
  2127. dev_dbg(udc_controller->dev, "cannot alloc nullbuf\n");
  2128. ret = -ENOMEM;
  2129. goto err3;
  2130. }
  2131. udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
  2132. if (udc_controller->nullp == DMA_ADDR_INVALID) {
  2133. udc_controller->nullp = dma_map_single(
  2134. udc_controller->gadget.dev.parent,
  2135. udc_controller->nullbuf,
  2136. 256,
  2137. DMA_TO_DEVICE);
  2138. udc_controller->nullmap = 1;
  2139. } else {
  2140. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  2141. udc_controller->nullp, 256,
  2142. DMA_TO_DEVICE);
  2143. }
  2144. tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
  2145. (unsigned long)udc_controller);
  2146. /* request irq and disable DR */
  2147. udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
  2148. ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
  2149. driver_name, udc_controller);
  2150. if (ret) {
  2151. dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
  2152. udc_controller->usb_irq, ret);
  2153. goto err4;
  2154. }
  2155. ret = device_add(&udc_controller->gadget.dev);
  2156. if (ret)
  2157. goto err5;
  2158. dev_info(udc_controller->dev,
  2159. "QE/CPM USB controller initialized as device\n");
  2160. return 0;
  2161. err5:
  2162. free_irq(udc_controller->usb_irq, udc_controller);
  2163. err4:
  2164. if (udc_controller->nullmap) {
  2165. dma_unmap_single(udc_controller->gadget.dev.parent,
  2166. udc_controller->nullp, 256,
  2167. DMA_TO_DEVICE);
  2168. udc_controller->nullp = DMA_ADDR_INVALID;
  2169. } else {
  2170. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2171. udc_controller->nullp, 256,
  2172. DMA_TO_DEVICE);
  2173. }
  2174. kfree(udc_controller->nullbuf);
  2175. err3:
  2176. ep = &udc_controller->eps[0];
  2177. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2178. kfree(ep->rxframe);
  2179. kfree(ep->rxbuffer);
  2180. kfree(ep->txframe);
  2181. err2:
  2182. iounmap(udc_controller->usb_regs);
  2183. err1:
  2184. kfree(udc_controller);
  2185. return ret;
  2186. }
  2187. #ifdef CONFIG_PM
  2188. static int qe_udc_suspend(struct of_device *dev, pm_message_t state)
  2189. {
  2190. return -ENOTSUPP;
  2191. }
  2192. static int qe_udc_resume(struct of_device *dev)
  2193. {
  2194. return -ENOTSUPP;
  2195. }
  2196. #endif
  2197. static int __devexit qe_udc_remove(struct of_device *ofdev)
  2198. {
  2199. struct qe_ep *ep;
  2200. unsigned int size;
  2201. DECLARE_COMPLETION(done);
  2202. if (!udc_controller)
  2203. return -ENODEV;
  2204. udc_controller->done = &done;
  2205. tasklet_disable(&udc_controller->rx_tasklet);
  2206. if (udc_controller->nullmap) {
  2207. dma_unmap_single(udc_controller->gadget.dev.parent,
  2208. udc_controller->nullp, 256,
  2209. DMA_TO_DEVICE);
  2210. udc_controller->nullp = DMA_ADDR_INVALID;
  2211. } else {
  2212. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2213. udc_controller->nullp, 256,
  2214. DMA_TO_DEVICE);
  2215. }
  2216. kfree(udc_controller->nullbuf);
  2217. ep = &udc_controller->eps[0];
  2218. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2219. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2220. kfree(ep->rxframe);
  2221. if (ep->rxbufmap) {
  2222. dma_unmap_single(udc_controller->gadget.dev.parent,
  2223. ep->rxbuf_d, size,
  2224. DMA_FROM_DEVICE);
  2225. ep->rxbuf_d = DMA_ADDR_INVALID;
  2226. } else {
  2227. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2228. ep->rxbuf_d, size,
  2229. DMA_FROM_DEVICE);
  2230. }
  2231. kfree(ep->rxbuffer);
  2232. kfree(ep->txframe);
  2233. free_irq(udc_controller->usb_irq, udc_controller);
  2234. tasklet_kill(&udc_controller->rx_tasklet);
  2235. iounmap(udc_controller->usb_regs);
  2236. device_unregister(&udc_controller->gadget.dev);
  2237. /* wait for release() of gadget.dev to free udc */
  2238. wait_for_completion(&done);
  2239. return 0;
  2240. }
  2241. /*-------------------------------------------------------------------------*/
  2242. static struct of_device_id __devinitdata qe_udc_match[] = {
  2243. {
  2244. .compatible = "fsl,mpc8360-qe-usb",
  2245. .data = (void *)PORT_QE,
  2246. },
  2247. {
  2248. .compatible = "fsl,mpc8272-cpm-usb",
  2249. .data = (void *)PORT_CPM,
  2250. },
  2251. {},
  2252. };
  2253. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2254. static struct of_platform_driver udc_driver = {
  2255. .name = (char *)driver_name,
  2256. .match_table = qe_udc_match,
  2257. .probe = qe_udc_probe,
  2258. .remove = __devexit_p(qe_udc_remove),
  2259. #ifdef CONFIG_PM
  2260. .suspend = qe_udc_suspend,
  2261. .resume = qe_udc_resume,
  2262. #endif
  2263. };
  2264. static int __init qe_udc_init(void)
  2265. {
  2266. printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
  2267. DRIVER_VERSION);
  2268. return of_register_platform_driver(&udc_driver);
  2269. }
  2270. static void __exit qe_udc_exit(void)
  2271. {
  2272. of_unregister_platform_driver(&udc_driver);
  2273. }
  2274. module_init(qe_udc_init);
  2275. module_exit(qe_udc_exit);
  2276. MODULE_DESCRIPTION(DRIVER_DESC);
  2277. MODULE_AUTHOR(DRIVER_AUTHOR);
  2278. MODULE_LICENSE("GPL");