davinci-pcm.c 25 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <asm/dma.h>
  23. #include <mach/sram.h>
  24. #include "davinci-pcm.h"
  25. #ifdef DEBUG
  26. static void print_buf_info(int slot, char *name)
  27. {
  28. struct edmacc_param p;
  29. if (slot < 0)
  30. return;
  31. edma_read_slot(slot, &p);
  32. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  33. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  34. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  35. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  36. }
  37. #else
  38. static void print_buf_info(int slot, char *name)
  39. {
  40. }
  41. #endif
  42. #define DAVINCI_PCM_FMTBITS (\
  43. SNDRV_PCM_FMTBIT_S8 |\
  44. SNDRV_PCM_FMTBIT_U8 |\
  45. SNDRV_PCM_FMTBIT_S16_LE |\
  46. SNDRV_PCM_FMTBIT_S16_BE |\
  47. SNDRV_PCM_FMTBIT_U16_LE |\
  48. SNDRV_PCM_FMTBIT_U16_BE |\
  49. SNDRV_PCM_FMTBIT_S24_LE |\
  50. SNDRV_PCM_FMTBIT_S24_BE |\
  51. SNDRV_PCM_FMTBIT_U24_LE |\
  52. SNDRV_PCM_FMTBIT_U24_BE |\
  53. SNDRV_PCM_FMTBIT_S32_LE |\
  54. SNDRV_PCM_FMTBIT_S32_BE |\
  55. SNDRV_PCM_FMTBIT_U32_LE |\
  56. SNDRV_PCM_FMTBIT_U32_BE)
  57. static struct snd_pcm_hardware pcm_hardware_playback = {
  58. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  59. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  60. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
  61. SNDRV_PCM_INFO_BATCH),
  62. .formats = DAVINCI_PCM_FMTBITS,
  63. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  64. .rate_min = 8000,
  65. .rate_max = 192000,
  66. .channels_min = 2,
  67. .channels_max = 384,
  68. .buffer_bytes_max = 128 * 1024,
  69. .period_bytes_min = 32,
  70. .period_bytes_max = 8 * 1024,
  71. .periods_min = 16,
  72. .periods_max = 255,
  73. .fifo_size = 0,
  74. };
  75. static struct snd_pcm_hardware pcm_hardware_capture = {
  76. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  77. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  78. SNDRV_PCM_INFO_PAUSE |
  79. SNDRV_PCM_INFO_BATCH),
  80. .formats = DAVINCI_PCM_FMTBITS,
  81. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  82. .rate_min = 8000,
  83. .rate_max = 192000,
  84. .channels_min = 2,
  85. .channels_max = 384,
  86. .buffer_bytes_max = 128 * 1024,
  87. .period_bytes_min = 32,
  88. .period_bytes_max = 8 * 1024,
  89. .periods_min = 16,
  90. .periods_max = 255,
  91. .fifo_size = 0,
  92. };
  93. /*
  94. * How ping/pong works....
  95. *
  96. * Playback:
  97. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  98. * links to ram_link2
  99. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  100. * links to ram_link
  101. * ram_link - copys entire SDRAM to iram in ping_size uints,
  102. * links to self
  103. *
  104. * asp_params - same as asp_link[0]
  105. * asp_link[0] - copys from lower half of iram to asp port
  106. * links to asp_link[1], triggers iram copy event on completion
  107. * asp_link[1] - copys from upper half of iram to asp port
  108. * links to asp_link[0], triggers iram copy event on completion
  109. * triggers interrupt only needed to let upper SOC levels update position
  110. * in stream on completion
  111. *
  112. * When playback is started:
  113. * ram_params started
  114. * asp_params started
  115. *
  116. * Capture:
  117. * ram_params - same as ram_link,
  118. * links to ram_link
  119. * ram_link - same as playback
  120. * links to self
  121. *
  122. * asp_params - same as playback
  123. * asp_link[0] - same as playback
  124. * asp_link[1] - same as playback
  125. *
  126. * When capture is started:
  127. * asp_params started
  128. */
  129. struct davinci_runtime_data {
  130. spinlock_t lock;
  131. int period; /* current DMA period */
  132. int asp_channel; /* Master DMA channel */
  133. int asp_link[2]; /* asp parameter link channel, ping/pong */
  134. struct davinci_pcm_dma_params *params; /* DMA params */
  135. int ram_channel;
  136. int ram_link;
  137. int ram_link2;
  138. struct edmacc_param asp_params;
  139. struct edmacc_param ram_params;
  140. };
  141. static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
  142. {
  143. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  144. struct snd_pcm_runtime *runtime = substream->runtime;
  145. prtd->period++;
  146. if (unlikely(prtd->period >= runtime->periods))
  147. prtd->period = 0;
  148. }
  149. static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
  150. {
  151. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  152. prtd->period = 0;
  153. }
  154. /*
  155. * Not used with ping/pong
  156. */
  157. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  158. {
  159. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  160. struct snd_pcm_runtime *runtime = substream->runtime;
  161. unsigned int period_size;
  162. unsigned int dma_offset;
  163. dma_addr_t dma_pos;
  164. dma_addr_t src, dst;
  165. unsigned short src_bidx, dst_bidx;
  166. unsigned short src_cidx, dst_cidx;
  167. unsigned int data_type;
  168. unsigned short acnt;
  169. unsigned int count;
  170. unsigned int fifo_level;
  171. period_size = snd_pcm_lib_period_bytes(substream);
  172. dma_offset = prtd->period * period_size;
  173. dma_pos = runtime->dma_addr + dma_offset;
  174. fifo_level = prtd->params->fifo_level;
  175. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  176. "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
  177. period_size);
  178. data_type = prtd->params->data_type;
  179. count = period_size / data_type;
  180. if (fifo_level)
  181. count /= fifo_level;
  182. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  183. src = dma_pos;
  184. dst = prtd->params->dma_addr;
  185. src_bidx = data_type;
  186. dst_bidx = 0;
  187. src_cidx = data_type * fifo_level;
  188. dst_cidx = 0;
  189. } else {
  190. src = prtd->params->dma_addr;
  191. dst = dma_pos;
  192. src_bidx = 0;
  193. dst_bidx = data_type;
  194. src_cidx = 0;
  195. dst_cidx = data_type * fifo_level;
  196. }
  197. acnt = prtd->params->acnt;
  198. edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
  199. edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
  200. edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
  201. edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
  202. if (!fifo_level)
  203. edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
  204. ASYNC);
  205. else
  206. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  207. count, fifo_level,
  208. ABSYNC);
  209. }
  210. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  211. {
  212. struct snd_pcm_substream *substream = data;
  213. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  214. print_buf_info(prtd->ram_channel, "i ram_channel");
  215. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  216. if (unlikely(ch_status != DMA_COMPLETE))
  217. return;
  218. if (snd_pcm_running(substream)) {
  219. spin_lock(&prtd->lock);
  220. if (prtd->ram_channel < 0) {
  221. /* No ping/pong must fix up link dma data*/
  222. davinci_pcm_enqueue_dma(substream);
  223. }
  224. davinci_pcm_period_elapsed(substream);
  225. spin_unlock(&prtd->lock);
  226. snd_pcm_period_elapsed(substream);
  227. }
  228. }
  229. static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
  230. struct snd_pcm_hardware *ppcm)
  231. {
  232. struct snd_dma_buffer *buf = &substream->dma_buffer;
  233. struct snd_dma_buffer *iram_dma = NULL;
  234. dma_addr_t iram_phys = 0;
  235. void *iram_virt = NULL;
  236. if (buf->private_data || !size)
  237. return 0;
  238. ppcm->period_bytes_max = size;
  239. iram_virt = sram_alloc(size, &iram_phys);
  240. if (!iram_virt)
  241. goto exit1;
  242. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  243. if (!iram_dma)
  244. goto exit2;
  245. iram_dma->area = iram_virt;
  246. iram_dma->addr = iram_phys;
  247. memset(iram_dma->area, 0, size);
  248. iram_dma->bytes = size;
  249. buf->private_data = iram_dma;
  250. return 0;
  251. exit2:
  252. if (iram_virt)
  253. sram_free(iram_virt, size);
  254. exit1:
  255. return -ENOMEM;
  256. }
  257. /*
  258. * Only used with ping/pong.
  259. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  260. */
  261. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  262. {
  263. unsigned short ram_src_cidx, ram_dst_cidx;
  264. struct snd_pcm_runtime *runtime = substream->runtime;
  265. struct davinci_runtime_data *prtd = runtime->private_data;
  266. struct snd_dma_buffer *iram_dma =
  267. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  268. struct davinci_pcm_dma_params *params = prtd->params;
  269. unsigned int data_type = params->data_type;
  270. unsigned int acnt = params->acnt;
  271. /* divide by 2 for ping/pong */
  272. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  273. unsigned int fifo_level = prtd->params->fifo_level;
  274. unsigned int count;
  275. if ((data_type == 0) || (data_type > 4)) {
  276. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  277. return -EINVAL;
  278. }
  279. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  280. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  281. ram_src_cidx = ping_size;
  282. ram_dst_cidx = -ping_size;
  283. edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
  284. edma_set_src_index(prtd->asp_link[0], data_type,
  285. data_type * fifo_level);
  286. edma_set_src_index(prtd->asp_link[1], data_type,
  287. data_type * fifo_level);
  288. edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  289. } else {
  290. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  291. ram_src_cidx = -ping_size;
  292. ram_dst_cidx = ping_size;
  293. edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
  294. edma_set_dest_index(prtd->asp_link[0], data_type,
  295. data_type * fifo_level);
  296. edma_set_dest_index(prtd->asp_link[1], data_type,
  297. data_type * fifo_level);
  298. edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  299. }
  300. if (!fifo_level) {
  301. count = ping_size / data_type;
  302. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  303. 1, 0, ASYNC);
  304. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  305. 1, 0, ASYNC);
  306. } else {
  307. count = ping_size / (data_type * fifo_level);
  308. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  309. count, fifo_level, ABSYNC);
  310. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  311. count, fifo_level, ABSYNC);
  312. }
  313. edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
  314. edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
  315. edma_set_transfer_params(prtd->ram_link, ping_size, 2,
  316. runtime->periods, 2, ASYNC);
  317. /* init master params */
  318. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  319. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  320. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  321. struct edmacc_param p_ram;
  322. /* Copy entire iram buffer before playback started */
  323. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  324. /* 0 dst_bidx */
  325. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  326. /* 0 dst_cidx */
  327. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  328. prtd->ram_params.ccnt = 1;
  329. /* Skip 1st period */
  330. edma_read_slot(prtd->ram_link, &p_ram);
  331. p_ram.src += (ping_size << 1);
  332. p_ram.ccnt -= 1;
  333. edma_write_slot(prtd->ram_link2, &p_ram);
  334. /*
  335. * When 1st started, ram -> iram dma channel will fill the
  336. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  337. * 1/2 iram will be filled.
  338. */
  339. prtd->ram_params.link_bcntrld =
  340. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  341. }
  342. return 0;
  343. }
  344. /* 1 asp tx or rx channel using 2 parameter channels
  345. * 1 ram to/from iram channel using 1 parameter channel
  346. *
  347. * Playback
  348. * ram copy channel kicks off first,
  349. * 1st ram copy of entire iram buffer completion kicks off asp channel
  350. * asp tcc always kicks off ram copy of 1/2 iram buffer
  351. *
  352. * Record
  353. * asp channel starts, tcc kicks off ram copy
  354. */
  355. static int request_ping_pong(struct snd_pcm_substream *substream,
  356. struct davinci_runtime_data *prtd,
  357. struct snd_dma_buffer *iram_dma)
  358. {
  359. dma_addr_t asp_src_ping;
  360. dma_addr_t asp_dst_ping;
  361. int ret;
  362. struct davinci_pcm_dma_params *params = prtd->params;
  363. /* Request ram master channel */
  364. ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  365. davinci_pcm_dma_irq, substream,
  366. prtd->params->ram_chan_q);
  367. if (ret < 0)
  368. goto exit1;
  369. /* Request ram link channel */
  370. ret = prtd->ram_link = edma_alloc_slot(
  371. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  372. if (ret < 0)
  373. goto exit2;
  374. ret = prtd->asp_link[1] = edma_alloc_slot(
  375. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  376. if (ret < 0)
  377. goto exit3;
  378. prtd->ram_link2 = -1;
  379. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  380. ret = prtd->ram_link2 = edma_alloc_slot(
  381. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  382. if (ret < 0)
  383. goto exit4;
  384. }
  385. /* circle ping-pong buffers */
  386. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  387. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  388. /* circle ram buffers */
  389. edma_link(prtd->ram_link, prtd->ram_link);
  390. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  391. asp_src_ping = iram_dma->addr;
  392. asp_dst_ping = params->dma_addr; /* fifo */
  393. } else {
  394. asp_src_ping = params->dma_addr; /* fifo */
  395. asp_dst_ping = iram_dma->addr;
  396. }
  397. /* ping */
  398. edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
  399. edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
  400. edma_set_src_index(prtd->asp_link[0], 0, 0);
  401. edma_set_dest_index(prtd->asp_link[0], 0, 0);
  402. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  403. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  404. prtd->asp_params.opt |= TCCHEN |
  405. EDMA_TCC(prtd->ram_channel & 0x3f);
  406. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  407. /* pong */
  408. edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
  409. edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
  410. edma_set_src_index(prtd->asp_link[1], 0, 0);
  411. edma_set_dest_index(prtd->asp_link[1], 0, 0);
  412. edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
  413. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  414. /* interrupt after every pong completion */
  415. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  416. EDMA_TCC(prtd->ram_channel & 0x3f);
  417. edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
  418. /* ram */
  419. edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  420. edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  421. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  422. "for asp:%u %u %u\n", __func__,
  423. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  424. prtd->asp_channel, prtd->asp_link[0],
  425. prtd->asp_link[1]);
  426. return 0;
  427. exit4:
  428. edma_free_channel(prtd->asp_link[1]);
  429. prtd->asp_link[1] = -1;
  430. exit3:
  431. edma_free_channel(prtd->ram_link);
  432. prtd->ram_link = -1;
  433. exit2:
  434. edma_free_channel(prtd->ram_channel);
  435. prtd->ram_channel = -1;
  436. exit1:
  437. return ret;
  438. }
  439. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  440. {
  441. struct snd_dma_buffer *iram_dma;
  442. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  443. struct davinci_pcm_dma_params *params = prtd->params;
  444. int ret;
  445. if (!params)
  446. return -ENODEV;
  447. /* Request asp master DMA channel */
  448. ret = prtd->asp_channel = edma_alloc_channel(params->channel,
  449. davinci_pcm_dma_irq, substream,
  450. prtd->params->asp_chan_q);
  451. if (ret < 0)
  452. goto exit1;
  453. /* Request asp link channels */
  454. ret = prtd->asp_link[0] = edma_alloc_slot(
  455. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  456. if (ret < 0)
  457. goto exit2;
  458. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  459. if (iram_dma) {
  460. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  461. return 0;
  462. printk(KERN_WARNING "%s: dma channel allocation failed,"
  463. "not using sram\n", __func__);
  464. }
  465. /* Issue transfer completion IRQ when the channel completes a
  466. * transfer, then always reload from the same slot (by a kind
  467. * of loopback link). The completion IRQ handler will update
  468. * the reload slot with a new buffer.
  469. *
  470. * REVISIT save p_ram here after setting up everything except
  471. * the buffer and its length (ccnt) ... use it as a template
  472. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  473. */
  474. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  475. prtd->asp_params.opt |= TCINTEN |
  476. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  477. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
  478. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  479. return 0;
  480. exit2:
  481. edma_free_channel(prtd->asp_channel);
  482. prtd->asp_channel = -1;
  483. exit1:
  484. return ret;
  485. }
  486. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  487. {
  488. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  489. int ret = 0;
  490. spin_lock(&prtd->lock);
  491. switch (cmd) {
  492. case SNDRV_PCM_TRIGGER_START:
  493. edma_start(prtd->asp_channel);
  494. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  495. prtd->ram_channel >= 0) {
  496. /* copy 1st iram buffer */
  497. edma_start(prtd->ram_channel);
  498. }
  499. break;
  500. case SNDRV_PCM_TRIGGER_RESUME:
  501. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  502. edma_resume(prtd->asp_channel);
  503. break;
  504. case SNDRV_PCM_TRIGGER_STOP:
  505. case SNDRV_PCM_TRIGGER_SUSPEND:
  506. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  507. edma_pause(prtd->asp_channel);
  508. break;
  509. default:
  510. ret = -EINVAL;
  511. break;
  512. }
  513. spin_unlock(&prtd->lock);
  514. return ret;
  515. }
  516. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  517. {
  518. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  519. davinci_pcm_period_reset(substream);
  520. if (prtd->ram_channel >= 0) {
  521. int ret = ping_pong_dma_setup(substream);
  522. if (ret < 0)
  523. return ret;
  524. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  525. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  526. print_buf_info(prtd->ram_channel, "ram_channel");
  527. print_buf_info(prtd->ram_link, "ram_link");
  528. print_buf_info(prtd->ram_link2, "ram_link2");
  529. print_buf_info(prtd->asp_channel, "asp_channel");
  530. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  531. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  532. /*
  533. * There is a phase offset of 2 periods between the position
  534. * used by dma setup and the position reported in the pointer
  535. * function.
  536. *
  537. * The phase offset, when not using ping-pong buffers, is due to
  538. * the two consecutive calls to davinci_pcm_enqueue_dma() below.
  539. *
  540. * Whereas here, with ping-pong buffers, the phase is due to
  541. * there being an entire buffer transfer complete before the
  542. * first dma completion event triggers davinci_pcm_dma_irq().
  543. */
  544. davinci_pcm_period_elapsed(substream);
  545. davinci_pcm_period_elapsed(substream);
  546. return 0;
  547. }
  548. davinci_pcm_enqueue_dma(substream);
  549. davinci_pcm_period_elapsed(substream);
  550. /* Copy self-linked parameter RAM entry into master channel */
  551. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  552. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  553. davinci_pcm_enqueue_dma(substream);
  554. davinci_pcm_period_elapsed(substream);
  555. return 0;
  556. }
  557. static snd_pcm_uframes_t
  558. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  559. {
  560. struct snd_pcm_runtime *runtime = substream->runtime;
  561. struct davinci_runtime_data *prtd = runtime->private_data;
  562. unsigned int offset;
  563. int asp_count;
  564. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  565. /*
  566. * There is a phase offset of 2 periods between the position used by dma
  567. * setup and the position reported in the pointer function. Either +2 in
  568. * the dma setup or -2 here in the pointer function (with wrapping,
  569. * both) accounts for this offset -- choose the latter since it makes
  570. * the first-time setup clearer.
  571. */
  572. spin_lock(&prtd->lock);
  573. asp_count = prtd->period - 2;
  574. spin_unlock(&prtd->lock);
  575. if (asp_count < 0)
  576. asp_count += runtime->periods;
  577. asp_count *= period_size;
  578. offset = bytes_to_frames(runtime, asp_count);
  579. if (offset >= runtime->buffer_size)
  580. offset = 0;
  581. return offset;
  582. }
  583. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  584. {
  585. struct snd_pcm_runtime *runtime = substream->runtime;
  586. struct davinci_runtime_data *prtd;
  587. struct snd_pcm_hardware *ppcm;
  588. int ret = 0;
  589. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  590. struct davinci_pcm_dma_params *pa;
  591. struct davinci_pcm_dma_params *params;
  592. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  593. if (!pa)
  594. return -ENODEV;
  595. params = &pa[substream->stream];
  596. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  597. &pcm_hardware_playback : &pcm_hardware_capture;
  598. allocate_sram(substream, params->sram_size, ppcm);
  599. snd_soc_set_runtime_hwparams(substream, ppcm);
  600. /* ensure that buffer size is a multiple of period size */
  601. ret = snd_pcm_hw_constraint_integer(runtime,
  602. SNDRV_PCM_HW_PARAM_PERIODS);
  603. if (ret < 0)
  604. return ret;
  605. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  606. if (prtd == NULL)
  607. return -ENOMEM;
  608. spin_lock_init(&prtd->lock);
  609. prtd->params = params;
  610. prtd->asp_channel = -1;
  611. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  612. prtd->ram_channel = -1;
  613. prtd->ram_link = -1;
  614. prtd->ram_link2 = -1;
  615. runtime->private_data = prtd;
  616. ret = davinci_pcm_dma_request(substream);
  617. if (ret) {
  618. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  619. kfree(prtd);
  620. }
  621. return ret;
  622. }
  623. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  624. {
  625. struct snd_pcm_runtime *runtime = substream->runtime;
  626. struct davinci_runtime_data *prtd = runtime->private_data;
  627. if (prtd->ram_channel >= 0)
  628. edma_stop(prtd->ram_channel);
  629. if (prtd->asp_channel >= 0)
  630. edma_stop(prtd->asp_channel);
  631. if (prtd->asp_link[0] >= 0)
  632. edma_unlink(prtd->asp_link[0]);
  633. if (prtd->asp_link[1] >= 0)
  634. edma_unlink(prtd->asp_link[1]);
  635. if (prtd->ram_link >= 0)
  636. edma_unlink(prtd->ram_link);
  637. if (prtd->asp_link[0] >= 0)
  638. edma_free_slot(prtd->asp_link[0]);
  639. if (prtd->asp_link[1] >= 0)
  640. edma_free_slot(prtd->asp_link[1]);
  641. if (prtd->asp_channel >= 0)
  642. edma_free_channel(prtd->asp_channel);
  643. if (prtd->ram_link >= 0)
  644. edma_free_slot(prtd->ram_link);
  645. if (prtd->ram_link2 >= 0)
  646. edma_free_slot(prtd->ram_link2);
  647. if (prtd->ram_channel >= 0)
  648. edma_free_channel(prtd->ram_channel);
  649. kfree(prtd);
  650. return 0;
  651. }
  652. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  653. struct snd_pcm_hw_params *hw_params)
  654. {
  655. return snd_pcm_lib_malloc_pages(substream,
  656. params_buffer_bytes(hw_params));
  657. }
  658. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  659. {
  660. return snd_pcm_lib_free_pages(substream);
  661. }
  662. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  663. struct vm_area_struct *vma)
  664. {
  665. struct snd_pcm_runtime *runtime = substream->runtime;
  666. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  667. runtime->dma_area,
  668. runtime->dma_addr,
  669. runtime->dma_bytes);
  670. }
  671. static struct snd_pcm_ops davinci_pcm_ops = {
  672. .open = davinci_pcm_open,
  673. .close = davinci_pcm_close,
  674. .ioctl = snd_pcm_lib_ioctl,
  675. .hw_params = davinci_pcm_hw_params,
  676. .hw_free = davinci_pcm_hw_free,
  677. .prepare = davinci_pcm_prepare,
  678. .trigger = davinci_pcm_trigger,
  679. .pointer = davinci_pcm_pointer,
  680. .mmap = davinci_pcm_mmap,
  681. };
  682. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  683. size_t size)
  684. {
  685. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  686. struct snd_dma_buffer *buf = &substream->dma_buffer;
  687. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  688. buf->dev.dev = pcm->card->dev;
  689. buf->private_data = NULL;
  690. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  691. &buf->addr, GFP_KERNEL);
  692. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  693. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  694. if (!buf->area)
  695. return -ENOMEM;
  696. buf->bytes = size;
  697. return 0;
  698. }
  699. static void davinci_pcm_free(struct snd_pcm *pcm)
  700. {
  701. struct snd_pcm_substream *substream;
  702. struct snd_dma_buffer *buf;
  703. int stream;
  704. for (stream = 0; stream < 2; stream++) {
  705. struct snd_dma_buffer *iram_dma;
  706. substream = pcm->streams[stream].substream;
  707. if (!substream)
  708. continue;
  709. buf = &substream->dma_buffer;
  710. if (!buf->area)
  711. continue;
  712. dma_free_writecombine(pcm->card->dev, buf->bytes,
  713. buf->area, buf->addr);
  714. buf->area = NULL;
  715. iram_dma = buf->private_data;
  716. if (iram_dma) {
  717. sram_free(iram_dma->area, iram_dma->bytes);
  718. kfree(iram_dma);
  719. }
  720. }
  721. }
  722. static u64 davinci_pcm_dmamask = DMA_BIT_MASK(32);
  723. static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
  724. {
  725. struct snd_card *card = rtd->card->snd_card;
  726. struct snd_pcm *pcm = rtd->pcm;
  727. int ret;
  728. if (!card->dev->dma_mask)
  729. card->dev->dma_mask = &davinci_pcm_dmamask;
  730. if (!card->dev->coherent_dma_mask)
  731. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  732. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  733. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  734. SNDRV_PCM_STREAM_PLAYBACK,
  735. pcm_hardware_playback.buffer_bytes_max);
  736. if (ret)
  737. return ret;
  738. }
  739. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  740. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  741. SNDRV_PCM_STREAM_CAPTURE,
  742. pcm_hardware_capture.buffer_bytes_max);
  743. if (ret)
  744. return ret;
  745. }
  746. return 0;
  747. }
  748. static struct snd_soc_platform_driver davinci_soc_platform = {
  749. .ops = &davinci_pcm_ops,
  750. .pcm_new = davinci_pcm_new,
  751. .pcm_free = davinci_pcm_free,
  752. };
  753. int davinci_soc_platform_register(struct device *dev)
  754. {
  755. return snd_soc_register_platform(dev, &davinci_soc_platform);
  756. }
  757. EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
  758. void davinci_soc_platform_unregister(struct device *dev)
  759. {
  760. snd_soc_unregister_platform(dev);
  761. }
  762. EXPORT_SYMBOL_GPL(davinci_soc_platform_unregister);
  763. MODULE_AUTHOR("Vladimir Barinov");
  764. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  765. MODULE_LICENSE("GPL");