bcm43xx_phy.c 63 KB

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  1. /*
  2. Broadcom BCM43xx wireless driver
  3. Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  4. Stefano Brivio <st3@riseup.net>
  5. Michael Buesch <mbuesch@freenet.de>
  6. Danny van Dyk <kugelfang@gentoo.org>
  7. Andreas Jaggi <andreas.jaggi@waterwave.ch>
  8. Some parts of the code in this file are derived from the ipw2200
  9. driver Copyright(c) 2003 - 2004 Intel Corporation.
  10. This program is free software; you can redistribute it and/or modify
  11. it under the terms of the GNU General Public License as published by
  12. the Free Software Foundation; either version 2 of the License, or
  13. (at your option) any later version.
  14. This program is distributed in the hope that it will be useful,
  15. but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. GNU General Public License for more details.
  18. You should have received a copy of the GNU General Public License
  19. along with this program; see the file COPYING. If not, write to
  20. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  21. Boston, MA 02110-1301, USA.
  22. */
  23. #include <linux/delay.h>
  24. #include <linux/pci.h>
  25. #include <linux/types.h>
  26. #include "bcm43xx.h"
  27. #include "bcm43xx_phy.h"
  28. #include "bcm43xx_main.h"
  29. #include "bcm43xx_radio.h"
  30. #include "bcm43xx_ilt.h"
  31. #include "bcm43xx_power.h"
  32. static const s8 bcm43xx_tssi2dbm_b_table[] = {
  33. 0x4D, 0x4C, 0x4B, 0x4A,
  34. 0x4A, 0x49, 0x48, 0x47,
  35. 0x47, 0x46, 0x45, 0x45,
  36. 0x44, 0x43, 0x42, 0x42,
  37. 0x41, 0x40, 0x3F, 0x3E,
  38. 0x3D, 0x3C, 0x3B, 0x3A,
  39. 0x39, 0x38, 0x37, 0x36,
  40. 0x35, 0x34, 0x32, 0x31,
  41. 0x30, 0x2F, 0x2D, 0x2C,
  42. 0x2B, 0x29, 0x28, 0x26,
  43. 0x25, 0x23, 0x21, 0x1F,
  44. 0x1D, 0x1A, 0x17, 0x14,
  45. 0x10, 0x0C, 0x06, 0x00,
  46. -7, -7, -7, -7,
  47. -7, -7, -7, -7,
  48. -7, -7, -7, -7,
  49. };
  50. static const s8 bcm43xx_tssi2dbm_g_table[] = {
  51. 77, 77, 77, 76,
  52. 76, 76, 75, 75,
  53. 74, 74, 73, 73,
  54. 73, 72, 72, 71,
  55. 71, 70, 70, 69,
  56. 68, 68, 67, 67,
  57. 66, 65, 65, 64,
  58. 63, 63, 62, 61,
  59. 60, 59, 58, 57,
  60. 56, 55, 54, 53,
  61. 52, 50, 49, 47,
  62. 45, 43, 40, 37,
  63. 33, 28, 22, 14,
  64. 5, -7, -20, -20,
  65. -20, -20, -20, -20,
  66. -20, -20, -20, -20,
  67. };
  68. static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
  69. void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
  70. {
  71. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  72. assert(irqs_disabled());
  73. if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
  74. phy->is_locked = 0;
  75. return;
  76. }
  77. if (bcm->current_core->rev < 3) {
  78. bcm43xx_mac_suspend(bcm);
  79. spin_lock(&phy->lock);
  80. } else {
  81. if (bcm->ieee->iw_mode != IW_MODE_MASTER)
  82. bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
  83. }
  84. phy->is_locked = 1;
  85. }
  86. void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
  87. {
  88. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  89. assert(irqs_disabled());
  90. if (bcm->current_core->rev < 3) {
  91. if (phy->is_locked) {
  92. spin_unlock(&phy->lock);
  93. bcm43xx_mac_enable(bcm);
  94. }
  95. } else {
  96. if (bcm->ieee->iw_mode != IW_MODE_MASTER)
  97. bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
  98. }
  99. phy->is_locked = 0;
  100. }
  101. u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
  102. {
  103. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
  104. return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
  105. }
  106. void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
  107. {
  108. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
  109. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
  110. }
  111. void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
  112. {
  113. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  114. unsigned long flags;
  115. bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
  116. if (phy->calibrated)
  117. return;
  118. if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
  119. /* We do not want to be preempted while calibrating
  120. * the hardware.
  121. */
  122. local_irq_save(flags);
  123. bcm43xx_wireless_core_reset(bcm, 0);
  124. bcm43xx_phy_initg(bcm);
  125. bcm43xx_wireless_core_reset(bcm, 1);
  126. local_irq_restore(flags);
  127. }
  128. phy->calibrated = 1;
  129. }
  130. /* Connect the PHY
  131. * http://bcm-specs.sipsolutions.net/SetPHY
  132. */
  133. int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
  134. {
  135. u32 flags;
  136. if (bcm->current_core->rev < 5) {
  137. if (connect) {
  138. bcm->current_core->phy->connected = 1;
  139. dprintk(KERN_INFO PFX "PHY connected\n");
  140. } else {
  141. bcm->current_core->phy->connected = 0;
  142. dprintk(KERN_INFO PFX "PHY disconnected\n");
  143. }
  144. return 0;
  145. }
  146. flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
  147. if (connect) {
  148. if (!(flags & 0x00010000))
  149. return -ENODEV;
  150. bcm->current_core->phy->connected = 1;
  151. flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
  152. flags |= (0x800 << 18);
  153. bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
  154. dprintk(KERN_INFO PFX "PHY connected\n");
  155. } else {
  156. if (!(flags & 0x00020000))
  157. return -ENODEV;
  158. bcm->current_core->phy->connected = 0;
  159. flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
  160. flags &= ~(0x800 << 18);
  161. bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
  162. dprintk(KERN_INFO PFX "PHY disconnected\n");
  163. }
  164. return 0;
  165. }
  166. /* intialize B PHY power control
  167. * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
  168. */
  169. static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
  170. {
  171. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  172. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  173. u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
  174. int must_reset_txpower = 0;
  175. assert(phy->type != BCM43xx_PHYTYPE_A);
  176. if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
  177. (bcm->board_type == 0x0416))
  178. return;
  179. bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
  180. bcm43xx_phy_write(bcm, 0x0028, 0x8018);
  181. if (phy->type == BCM43xx_PHYTYPE_G) {
  182. if (!phy->connected)
  183. return;
  184. bcm43xx_phy_write(bcm, 0x047A, 0xC111);
  185. }
  186. if (phy->savedpctlreg != 0xFFFF)
  187. return;
  188. if (phy->type == BCM43xx_PHYTYPE_B &&
  189. phy->rev >= 2 &&
  190. radio->version == 0x2050) {
  191. bcm43xx_radio_write16(bcm, 0x0076,
  192. bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
  193. } else {
  194. saved_batt = radio->txpower[0];
  195. saved_ratt = radio->txpower[1];
  196. saved_txctl1 = radio->txpower[2];
  197. if ((radio->revision >= 6) && (radio->revision <= 8)
  198. && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
  199. bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
  200. else
  201. bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
  202. must_reset_txpower = 1;
  203. }
  204. bcm43xx_dummy_transmission(bcm);
  205. phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
  206. if (must_reset_txpower)
  207. bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
  208. else
  209. bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
  210. bcm43xx_radio_clear_tssi(bcm);
  211. }
  212. static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
  213. {
  214. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  215. u16 offset = 0x0000;
  216. if (phy->rev == 1)
  217. offset = 0x4C00;
  218. bcm43xx_ilt_write16(bcm, offset, 0x00FE);
  219. bcm43xx_ilt_write16(bcm, offset + 1, 0x000D);
  220. bcm43xx_ilt_write16(bcm, offset + 2, 0x0013);
  221. bcm43xx_ilt_write16(bcm, offset + 3, 0x0019);
  222. if (phy->rev == 1) {
  223. bcm43xx_ilt_write16(bcm, 0x1800, 0x2710);
  224. bcm43xx_ilt_write16(bcm, 0x1801, 0x9B83);
  225. bcm43xx_ilt_write16(bcm, 0x1802, 0x9B83);
  226. bcm43xx_ilt_write16(bcm, 0x1803, 0x0F8D);
  227. bcm43xx_phy_write(bcm, 0x0455, 0x0004);
  228. }
  229. bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
  230. bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
  231. bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
  232. bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
  233. bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
  234. bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
  235. bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
  236. bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
  237. bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
  238. if (phy->rev == 1)
  239. bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
  240. bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
  241. bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
  242. bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
  243. bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
  244. bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
  245. bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
  246. bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
  247. bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
  248. bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
  249. if (phy->rev == 1) {
  250. bcm43xx_phy_write(bcm, 0x0430, 0x092B);
  251. bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
  252. } else {
  253. bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
  254. bcm43xx_phy_write(bcm, 0x041F, 0x287A);
  255. bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
  256. }
  257. if (phy->rev > 2) {
  258. bcm43xx_phy_write(bcm, 0x0422, 0x287A);
  259. bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
  260. }
  261. bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
  262. bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
  263. if (phy->rev == 1) {
  264. bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
  265. bcm43xx_phy_write(bcm, 0x048B, 0x005E);
  266. bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
  267. bcm43xx_phy_write(bcm, 0x048D, 0x0002);
  268. }
  269. bcm43xx_ilt_write16(bcm, offset + 0x0800, 0);
  270. bcm43xx_ilt_write16(bcm, offset + 0x0801, 7);
  271. bcm43xx_ilt_write16(bcm, offset + 0x0802, 16);
  272. bcm43xx_ilt_write16(bcm, offset + 0x0803, 28);
  273. }
  274. static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
  275. {
  276. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  277. u16 i;
  278. assert(phy->type == BCM43xx_PHYTYPE_G);
  279. if (phy->rev == 1) {
  280. bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
  281. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  282. (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
  283. bcm43xx_phy_write(bcm, 0x042C, 0x005A);
  284. bcm43xx_phy_write(bcm, 0x0427, 0x001A);
  285. for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
  286. bcm43xx_ilt_write16(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
  287. for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
  288. bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
  289. for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
  290. bcm43xx_ilt_write16(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
  291. } else {
  292. /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
  293. bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
  294. if (phy->rev == 2) {
  295. bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
  296. bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
  297. } else if (phy->rev > 2) {
  298. bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
  299. bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
  300. bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
  301. }
  302. bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
  303. for (i = 0; i < 64; i++)
  304. bcm43xx_ilt_write16(bcm, 0x4000 + i, i);
  305. for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
  306. bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
  307. }
  308. if (phy->rev <= 2)
  309. for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
  310. bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
  311. else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
  312. for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
  313. bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
  314. else
  315. for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
  316. bcm43xx_ilt_write16(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
  317. if (phy->rev == 2)
  318. for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
  319. bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
  320. else if ((phy->rev > 2) && (phy->rev <= 7))
  321. for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
  322. bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
  323. if (phy->rev == 1) {
  324. for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
  325. bcm43xx_ilt_write16(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
  326. for (i = 0; i < 4; i++) {
  327. bcm43xx_ilt_write16(bcm, 0x5404 + i, 0x0020);
  328. bcm43xx_ilt_write16(bcm, 0x5408 + i, 0x0020);
  329. bcm43xx_ilt_write16(bcm, 0x540C + i, 0x0020);
  330. bcm43xx_ilt_write16(bcm, 0x5410 + i, 0x0020);
  331. }
  332. bcm43xx_phy_agcsetup(bcm);
  333. if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
  334. (bcm->board_type == 0x0416) &&
  335. (bcm->board_revision == 0x0017))
  336. return;
  337. bcm43xx_ilt_write16(bcm, 0x5001, 0x0002);
  338. bcm43xx_ilt_write16(bcm, 0x5002, 0x0001);
  339. } else {
  340. for (i = 0; i <= 0x2F; i++)
  341. bcm43xx_ilt_write16(bcm, 0x1000 + i, 0x0820);
  342. bcm43xx_phy_agcsetup(bcm);
  343. bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
  344. bcm43xx_phy_write(bcm, 0x0403, 0x1000);
  345. bcm43xx_ilt_write16(bcm, 0x3C02, 0x000F);
  346. bcm43xx_ilt_write16(bcm, 0x3C03, 0x0014);
  347. if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
  348. (bcm->board_type == 0x0416) &&
  349. (bcm->board_revision == 0x0017))
  350. return;
  351. bcm43xx_ilt_write16(bcm, 0x0401, 0x0002);
  352. bcm43xx_ilt_write16(bcm, 0x0402, 0x0001);
  353. }
  354. }
  355. /* Initialize the noisescaletable for APHY */
  356. static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
  357. {
  358. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  359. int i;
  360. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
  361. for (i = 0; i < 12; i++) {
  362. if (phy->rev == 2)
  363. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
  364. else
  365. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
  366. }
  367. if (phy->rev == 2)
  368. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
  369. else
  370. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
  371. for (i = 0; i < 11; i++) {
  372. if (phy->rev == 2)
  373. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
  374. else
  375. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
  376. }
  377. if (phy->rev == 2)
  378. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
  379. else
  380. bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
  381. }
  382. static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
  383. {
  384. u16 i;
  385. assert(bcm->current_core->phy->type == BCM43xx_PHYTYPE_A);
  386. switch (bcm->current_core->phy->rev) {
  387. case 2:
  388. bcm43xx_phy_write(bcm, 0x008E, 0x3800);
  389. bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
  390. bcm43xx_phy_write(bcm, 0x0036, 0x0400);
  391. bcm43xx_ilt_write16(bcm, 0x3807, 0x0051);
  392. bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
  393. bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
  394. bcm43xx_ilt_write16(bcm, 0x3C0C, 0x07BF);
  395. bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
  396. bcm43xx_phy_write(bcm, 0x0024, 0x4680);
  397. bcm43xx_phy_write(bcm, 0x0020, 0x0003);
  398. bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
  399. bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
  400. bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
  401. bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
  402. bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
  403. bcm43xx_ilt_write16(bcm, 0x0803, 0x000F);
  404. bcm43xx_ilt_write16(bcm, 0x0804, 0x001F);
  405. bcm43xx_ilt_write16(bcm, 0x0805, 0x002A);
  406. bcm43xx_ilt_write16(bcm, 0x0805, 0x0030);
  407. bcm43xx_ilt_write16(bcm, 0x0807, 0x003A);
  408. bcm43xx_ilt_write16(bcm, 0x0000, 0x0013);
  409. bcm43xx_ilt_write16(bcm, 0x0001, 0x0013);
  410. bcm43xx_ilt_write16(bcm, 0x0002, 0x0013);
  411. bcm43xx_ilt_write16(bcm, 0x0003, 0x0013);
  412. bcm43xx_ilt_write16(bcm, 0x0004, 0x0015);
  413. bcm43xx_ilt_write16(bcm, 0x0005, 0x0015);
  414. bcm43xx_ilt_write16(bcm, 0x0006, 0x0019);
  415. bcm43xx_ilt_write16(bcm, 0x0404, 0x0003);
  416. bcm43xx_ilt_write16(bcm, 0x0405, 0x0003);
  417. bcm43xx_ilt_write16(bcm, 0x0406, 0x0007);
  418. for (i = 0; i < 16; i++)
  419. bcm43xx_ilt_write16(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
  420. bcm43xx_ilt_write16(bcm, 0x3003, 0x1044);
  421. bcm43xx_ilt_write16(bcm, 0x3004, 0x7201);
  422. bcm43xx_ilt_write16(bcm, 0x3006, 0x0040);
  423. bcm43xx_ilt_write16(bcm, 0x3001, (bcm43xx_ilt_read16(bcm, 0x3001) & 0x0010) | 0x0008);
  424. for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
  425. bcm43xx_ilt_write16(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
  426. for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
  427. bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
  428. for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
  429. bcm43xx_ilt_write16(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
  430. bcm43xx_phy_init_noisescaletbl(bcm);
  431. for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
  432. bcm43xx_ilt_write16(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
  433. break;
  434. case 3:
  435. for (i = 0; i < 64; i++)
  436. bcm43xx_ilt_write16(bcm, 0x4000 + i, i);
  437. bcm43xx_ilt_write16(bcm, 0x3807, 0x0051);
  438. bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
  439. bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
  440. bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
  441. bcm43xx_phy_write(bcm, 0x0024, 0x4680);
  442. bcm43xx_phy_write(bcm, 0x0020, 0x0003);
  443. bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
  444. bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
  445. bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
  446. bcm43xx_ilt_write16(bcm, 0x3001, (bcm43xx_ilt_read16(bcm, 0x3001) & 0x0010) | 0x0008);
  447. for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
  448. bcm43xx_ilt_write16(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
  449. bcm43xx_phy_init_noisescaletbl(bcm);
  450. for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
  451. bcm43xx_ilt_write16(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
  452. bcm43xx_phy_write(bcm, 0x0003, 0x1808);
  453. bcm43xx_ilt_write16(bcm, 0x0803, 0x000F);
  454. bcm43xx_ilt_write16(bcm, 0x0804, 0x001F);
  455. bcm43xx_ilt_write16(bcm, 0x0805, 0x002A);
  456. bcm43xx_ilt_write16(bcm, 0x0805, 0x0030);
  457. bcm43xx_ilt_write16(bcm, 0x0807, 0x003A);
  458. bcm43xx_ilt_write16(bcm, 0x0000, 0x0013);
  459. bcm43xx_ilt_write16(bcm, 0x0001, 0x0013);
  460. bcm43xx_ilt_write16(bcm, 0x0002, 0x0013);
  461. bcm43xx_ilt_write16(bcm, 0x0003, 0x0013);
  462. bcm43xx_ilt_write16(bcm, 0x0004, 0x0015);
  463. bcm43xx_ilt_write16(bcm, 0x0005, 0x0015);
  464. bcm43xx_ilt_write16(bcm, 0x0006, 0x0019);
  465. bcm43xx_ilt_write16(bcm, 0x0404, 0x0003);
  466. bcm43xx_ilt_write16(bcm, 0x0405, 0x0003);
  467. bcm43xx_ilt_write16(bcm, 0x0406, 0x0007);
  468. bcm43xx_ilt_write16(bcm, 0x3C02, 0x000F);
  469. bcm43xx_ilt_write16(bcm, 0x3C03, 0x0014);
  470. break;
  471. default:
  472. assert(0);
  473. }
  474. }
  475. /* Initialize APHY. This is also called for the GPHY in some cases. */
  476. static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
  477. {
  478. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  479. u16 tval;
  480. if (phy->type == BCM43xx_PHYTYPE_A) {
  481. bcm43xx_phy_setupa(bcm);
  482. } else {
  483. bcm43xx_phy_setupg(bcm);
  484. if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
  485. bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
  486. return;
  487. }
  488. bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
  489. (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
  490. bcm43xx_phy_write(bcm, 0x0034, 0x0001);
  491. TODO();//TODO: RSSI AGC
  492. bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
  493. bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
  494. bcm43xx_radio_init2060(bcm);
  495. if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
  496. && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
  497. if (bcm->current_core->radio->lofcal == 0xFFFF) {
  498. TODO();//TODO: LOF Cal
  499. bcm43xx_radio_set_tx_iq(bcm);
  500. } else
  501. bcm43xx_radio_write16(bcm, 0x001E, bcm->current_core->radio->lofcal);
  502. }
  503. bcm43xx_phy_write(bcm, 0x007A, 0xF111);
  504. if (phy->savedpctlreg == 0xFFFF) {
  505. bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
  506. bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
  507. tval = bcm43xx_ilt_read16(bcm, 0x3001);
  508. if (phy->rev == 1) {
  509. bcm43xx_ilt_write16(bcm, 0x3001,
  510. (bcm43xx_ilt_read16(bcm, 0x3001) & 0xFF87)
  511. | 0x0058);
  512. } else {
  513. bcm43xx_ilt_write16(bcm, 0x3001,
  514. (bcm43xx_ilt_read16(bcm, 0x3001) & 0xFFC3)
  515. | 0x002C);
  516. }
  517. bcm43xx_dummy_transmission(bcm);
  518. phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
  519. bcm43xx_ilt_write16(bcm, 0x3001, tval);
  520. bcm43xx_radio_set_txpower_a(bcm, 0x0018);
  521. }
  522. bcm43xx_radio_clear_tssi(bcm);
  523. }
  524. static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
  525. {
  526. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  527. u16 offset, val;
  528. bcm43xx_write16(bcm, 0x03EC, 0x3F22);
  529. bcm43xx_phy_write(bcm, 0x0020, 0x301C);
  530. bcm43xx_phy_write(bcm, 0x0026, 0x0000);
  531. bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
  532. bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
  533. val = 0x3C3D;
  534. for (offset = 0x0089; offset < 0x00A7; offset++) {
  535. bcm43xx_phy_write(bcm, offset, val);
  536. val -= 0x0202;
  537. }
  538. bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
  539. if (radio->channel == 0xFF)
  540. bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
  541. else
  542. bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
  543. if (radio->version != 0x2050) {
  544. bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
  545. bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
  546. }
  547. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  548. bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
  549. if (radio->version == 0x2050) {
  550. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  551. bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
  552. bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
  553. bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
  554. bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
  555. bcm43xx_phy_write(bcm, 0x0038, 0x0677);
  556. bcm43xx_radio_init2050(bcm);
  557. }
  558. bcm43xx_phy_write(bcm, 0x0014, 0x0080);
  559. bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
  560. bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
  561. bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
  562. bcm43xx_phy_lo_b_measure(bcm);
  563. bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
  564. if (radio->version != 0x2050)
  565. bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
  566. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
  567. bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
  568. if (radio->version != 0x2050)
  569. bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
  570. bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
  571. bcm43xx_phy_init_pctl(bcm);
  572. }
  573. static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
  574. {
  575. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  576. u16 offset, val;
  577. bcm43xx_write16(bcm, 0x03EC, 0x3F22);
  578. bcm43xx_phy_write(bcm, 0x0020, 0x301C);
  579. bcm43xx_phy_write(bcm, 0x0026, 0x0000);
  580. bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
  581. bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
  582. val = 0x3C3D;
  583. for (offset = 0x0089; offset < 0x00A7; offset++) {
  584. bcm43xx_phy_write(bcm, offset, val);
  585. val -= 0x0202;
  586. }
  587. bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
  588. if (radio->channel == 0xFF)
  589. bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
  590. else
  591. bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
  592. if (radio->version != 0x2050) {
  593. bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
  594. bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
  595. }
  596. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  597. bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
  598. if (radio->version == 0x2050) {
  599. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  600. bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
  601. bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
  602. bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
  603. bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
  604. bcm43xx_phy_write(bcm, 0x0038, 0x0677);
  605. bcm43xx_radio_init2050(bcm);
  606. }
  607. bcm43xx_phy_write(bcm, 0x0014, 0x0080);
  608. bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
  609. if (radio->version == 0x2050)
  610. bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
  611. bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
  612. bcm43xx_phy_lo_b_measure(bcm);
  613. bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
  614. if (radio->version == 0x2050)
  615. bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
  616. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
  617. bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
  618. if (radio->version == 0x2050)
  619. bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
  620. bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
  621. if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
  622. bcm43xx_calc_nrssi_slope(bcm);
  623. bcm43xx_calc_nrssi_threshold(bcm);
  624. }
  625. bcm43xx_phy_init_pctl(bcm);
  626. }
  627. static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
  628. {
  629. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  630. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  631. u16 offset;
  632. if (phy->version == 1 &&
  633. radio->version == 0x2050) {
  634. bcm43xx_radio_write16(bcm, 0x007A,
  635. bcm43xx_radio_read16(bcm, 0x007A)
  636. | 0x0050);
  637. }
  638. if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
  639. (bcm->board_type != 0x0416)) {
  640. for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
  641. bcm43xx_phy_write(bcm, offset,
  642. (bcm43xx_phy_read(bcm, offset) + 0x2020)
  643. & 0x3F3F);
  644. }
  645. }
  646. bcm43xx_phy_write(bcm, 0x0035,
  647. (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
  648. | 0x0700);
  649. if (radio->version == 0x2050)
  650. bcm43xx_phy_write(bcm, 0x0038, 0x0667);
  651. if (phy->connected) {
  652. if (radio->version == 0x2050) {
  653. bcm43xx_radio_write16(bcm, 0x007A,
  654. bcm43xx_radio_read16(bcm, 0x007A)
  655. | 0x0020);
  656. bcm43xx_radio_write16(bcm, 0x0051,
  657. bcm43xx_radio_read16(bcm, 0x0051)
  658. | 0x0004);
  659. }
  660. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
  661. bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
  662. bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
  663. bcm43xx_phy_write(bcm, 0x001C, 0x186A);
  664. bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
  665. bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
  666. bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
  667. }
  668. if (bcm->bad_frames_preempt) {
  669. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  670. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
  671. }
  672. if (phy->version == 1 && radio->version == 0x2050) {
  673. bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
  674. bcm43xx_phy_write(bcm, 0x0021, 0x3763);
  675. bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
  676. bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
  677. bcm43xx_phy_write(bcm, 0x0024, 0x037E);
  678. } else
  679. bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
  680. bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
  681. bcm43xx_write16(bcm, 0x03EC, 0x3F22);
  682. if (phy->version == 1 && radio->version == 0x2050)
  683. bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
  684. else
  685. bcm43xx_phy_write(bcm, 0x0020, 0x301C);
  686. if (phy->version == 0)
  687. bcm43xx_write16(bcm, 0x03E4, 0x3000);
  688. /* Force to channel 7, even if not supported. */
  689. bcm43xx_radio_selectchannel(bcm, 7, 0);
  690. if (radio->version != 0x2050) {
  691. bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
  692. bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
  693. }
  694. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  695. bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
  696. if (radio->version == 0x2050) {
  697. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  698. bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
  699. }
  700. bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
  701. bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
  702. bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
  703. bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
  704. bcm43xx_phy_write(bcm, 0x0014, 0x0080);
  705. bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
  706. bcm43xx_phy_write(bcm, 0x88A3, 0x002A);
  707. bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
  708. if (radio->version == 0x2050)
  709. bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
  710. bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
  711. }
  712. static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
  713. {
  714. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  715. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  716. u16 offset, val;
  717. bcm43xx_phy_write(bcm, 0x003E, 0x817A);
  718. bcm43xx_radio_write16(bcm, 0x007A,
  719. (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
  720. if ((radio->manufact == 0x17F) &&
  721. (radio->version == 0x2050) &&
  722. (radio->revision == 3 ||
  723. radio->revision == 4 ||
  724. radio->revision == 5)) {
  725. bcm43xx_radio_write16(bcm, 0x0051, 0x001F);
  726. bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
  727. bcm43xx_radio_write16(bcm, 0x0053, 0x005B);
  728. bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
  729. bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
  730. bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
  731. bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
  732. bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
  733. bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
  734. }
  735. if ((radio->manufact == 0x17F) &&
  736. (radio->version == 0x2050) &&
  737. (radio->revision == 6)) {
  738. bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
  739. bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
  740. bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
  741. bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
  742. bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
  743. bcm43xx_radio_write16(bcm, 0x005B, 0x008B);
  744. bcm43xx_radio_write16(bcm, 0x005C, 0x00B5);
  745. bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
  746. bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
  747. bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
  748. bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
  749. bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
  750. }
  751. if ((radio->manufact == 0x17F) &&
  752. (radio->version == 0x2050) &&
  753. (radio->revision == 7)) {
  754. bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
  755. bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
  756. bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
  757. bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
  758. bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
  759. bcm43xx_radio_write16(bcm, 0x005B, 0x00A8);
  760. bcm43xx_radio_write16(bcm, 0x005C, 0x0075);
  761. bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
  762. bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
  763. bcm43xx_radio_write16(bcm, 0x007D, 0x00E8);
  764. bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
  765. bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
  766. bcm43xx_radio_write16(bcm, 0x007B, 0x0000);
  767. }
  768. if ((radio->manufact == 0x17F) &&
  769. (radio->version == 0x2050) &&
  770. (radio->revision == 8)) {
  771. bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
  772. bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
  773. bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
  774. bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
  775. bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
  776. bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
  777. bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
  778. if (bcm->sprom.boardflags & 0x8000) {
  779. bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
  780. bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
  781. } else {
  782. bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
  783. bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
  784. }
  785. bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
  786. bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
  787. bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
  788. bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
  789. }
  790. val = 0x1E1F;
  791. for (offset = 0x0088; offset < 0x0098; offset++) {
  792. bcm43xx_phy_write(bcm, offset, val);
  793. val -= 0x0202;
  794. }
  795. val = 0x3E3F;
  796. for (offset = 0x0098; offset < 0x00A8; offset++) {
  797. bcm43xx_phy_write(bcm, offset, val);
  798. val -= 0x0202;
  799. }
  800. val = 0x2120;
  801. for (offset = 0x00A8; offset < 0x00C8; offset++) {
  802. bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
  803. val += 0x0202;
  804. }
  805. if (phy->type == BCM43xx_PHYTYPE_G) {
  806. bcm43xx_radio_write16(bcm, 0x007A,
  807. bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
  808. bcm43xx_radio_write16(bcm, 0x0051,
  809. bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
  810. bcm43xx_phy_write(bcm, 0x0802,
  811. bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
  812. bcm43xx_phy_write(bcm, 0x042B,
  813. bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
  814. }
  815. /* Force to channel 7, even if not supported. */
  816. bcm43xx_radio_selectchannel(bcm, 7, 0);
  817. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  818. bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
  819. udelay(40);
  820. bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C) | 0x0002));
  821. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  822. if ((bcm->current_core->radio->manufact == 0x17F) &&
  823. (bcm->current_core->radio->version == 0x2050) &&
  824. (bcm->current_core->radio->revision <= 2)) {
  825. bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
  826. bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
  827. bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
  828. bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
  829. }
  830. bcm43xx_radio_write16(bcm, 0x007A,
  831. (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
  832. bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
  833. bcm43xx_phy_write(bcm, 0x0014, 0x0200);
  834. if (radio->version == 0x2050){
  835. if (radio->revision == 3 ||
  836. radio->revision == 4 ||
  837. radio->revision == 5)
  838. bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
  839. else
  840. bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
  841. }
  842. bcm43xx_phy_write(bcm, 0x0038, 0x0668);
  843. bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
  844. if (radio->version == 0x2050) {
  845. if (radio->revision == 3 ||
  846. radio->revision == 4 ||
  847. radio->revision == 5)
  848. bcm43xx_phy_write(bcm, 0x005D, bcm43xx_phy_read(bcm, 0x005D) | 0x0003);
  849. else if (radio->revision <= 2)
  850. bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
  851. }
  852. if (phy->rev == 4)
  853. bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
  854. else
  855. bcm43xx_write16(bcm, 0x03E4, 0x0009);
  856. if (phy->type == BCM43xx_PHYTYPE_B) {
  857. bcm43xx_write16(bcm, 0x03E6, 0x8140);
  858. bcm43xx_phy_write(bcm, 0x0016, 0x0410);
  859. bcm43xx_phy_write(bcm, 0x0017, 0x0820);
  860. bcm43xx_phy_write(bcm, 0x0062, 0x0007);
  861. (void) bcm43xx_radio_calibrationvalue(bcm);
  862. bcm43xx_phy_lo_b_measure(bcm);
  863. if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
  864. bcm43xx_calc_nrssi_slope(bcm);
  865. bcm43xx_calc_nrssi_threshold(bcm);
  866. }
  867. bcm43xx_phy_init_pctl(bcm);
  868. } else
  869. bcm43xx_write16(bcm, 0x03E6, 0x0);
  870. }
  871. static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
  872. {
  873. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  874. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  875. u16 tmp;
  876. if (phy->rev == 1)
  877. bcm43xx_phy_initb5(bcm);
  878. else if (phy->rev >= 2 && phy->rev <= 7)
  879. bcm43xx_phy_initb6(bcm);
  880. if (phy->rev >= 2 || phy->connected)
  881. bcm43xx_phy_inita(bcm);
  882. if (phy->rev >= 2) {
  883. bcm43xx_phy_write(bcm, 0x0814, 0x0000);
  884. bcm43xx_phy_write(bcm, 0x0815, 0x0000);
  885. if (phy->rev == 2)
  886. bcm43xx_phy_write(bcm, 0x0811, 0x0000);
  887. else if (phy->rev >= 3)
  888. bcm43xx_phy_write(bcm, 0x0811, 0x0400);
  889. bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
  890. tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
  891. if (tmp == 3) {
  892. bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
  893. bcm43xx_phy_write(bcm, 0x04C3, 0x8606);
  894. } else if (tmp == 4 || tmp == 5) {
  895. bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
  896. bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
  897. bcm43xx_phy_write(bcm, 0x04CC, (bcm43xx_phy_read(bcm, 0x04CC)
  898. & 0x00FF) | 0x1F00);
  899. }
  900. }
  901. if (radio->revision <= 3 && phy->connected)
  902. bcm43xx_phy_write(bcm, 0x047E, 0x0078);
  903. if (radio->revision >= 6 && radio->revision <= 8) {
  904. bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
  905. bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
  906. }
  907. if (radio->initval == 0xFFFF) {
  908. radio->initval = bcm43xx_radio_init2050(bcm);
  909. bcm43xx_phy_lo_g_measure(bcm);
  910. } else {
  911. bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
  912. bcm43xx_radio_write16(bcm, 0x0052,
  913. (bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0)
  914. | radio->txpower[3]);
  915. }
  916. if (phy->connected) {
  917. bcm43xx_phy_lo_adjust(bcm, 0);
  918. bcm43xx_phy_write(bcm, 0x080F, 0x8078);
  919. if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
  920. bcm43xx_phy_write(bcm, 0x002E, 0x807F);
  921. else
  922. bcm43xx_phy_write(bcm, 0x002E, 0x8075);
  923. if (phy->rev < 2)
  924. bcm43xx_phy_write(bcm, 0x002F, 0x0101);
  925. else
  926. bcm43xx_phy_write(bcm, 0x002F, 0x0202);
  927. }
  928. if ((bcm->sprom.boardflags & BCM43xx_BFL_RSSI) == 0) {
  929. FIXME();//FIXME: 0x7FFFFFFF should be 16-bit !
  930. bcm43xx_nrssi_hw_update(bcm, (u16)0x7FFFFFFF);
  931. bcm43xx_calc_nrssi_threshold(bcm);
  932. } else if (phy->connected) {
  933. if (radio->nrssi[0] == -1000) {
  934. assert(radio->nrssi[1] == -1000);
  935. bcm43xx_calc_nrssi_slope(bcm);
  936. } else
  937. bcm43xx_calc_nrssi_threshold(bcm);
  938. }
  939. bcm43xx_phy_init_pctl(bcm);
  940. }
  941. static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
  942. {
  943. int i;
  944. u16 ret = 0;
  945. for (i = 0; i < 10; i++){
  946. bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
  947. udelay(1);
  948. bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
  949. udelay(10);
  950. bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
  951. udelay(40);
  952. ret += bcm43xx_phy_read(bcm, 0x002C);
  953. }
  954. return ret;
  955. }
  956. void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
  957. {
  958. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  959. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  960. u16 regstack[12] = { 0 };
  961. u16 mls;
  962. u16 fval;
  963. int i, j;
  964. regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
  965. regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
  966. if (radio->version == 0x2053) {
  967. regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
  968. regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
  969. regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
  970. regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
  971. regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
  972. regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
  973. regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
  974. regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
  975. regstack[10] = bcm43xx_read16(bcm, 0x03EC);
  976. regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
  977. bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
  978. bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
  979. bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
  980. bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
  981. }
  982. bcm43xx_phy_write(bcm, 0x0015, 0xB000);
  983. bcm43xx_phy_write(bcm, 0x002B, 0x0004);
  984. if (radio->version == 0x2053) {
  985. bcm43xx_phy_write(bcm, 0x002B, 0x0203);
  986. bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
  987. }
  988. phy->minlowsig[0] = 0xFFFF;
  989. for (i = 0; i < 4; i++) {
  990. bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
  991. bcm43xx_phy_lo_b_r15_loop(bcm);
  992. }
  993. for (i = 0; i < 10; i++) {
  994. bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
  995. mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
  996. if (mls < phy->minlowsig[0]) {
  997. phy->minlowsig[0] = mls;
  998. phy->minlowsigpos[0] = i;
  999. }
  1000. }
  1001. bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
  1002. phy->minlowsig[1] = 0xFFFF;
  1003. for (i = -4; i < 5; i += 2) {
  1004. for (j = -4; j < 5; j += 2) {
  1005. if (j < 0)
  1006. fval = (0x0100 * i) + j + 0x0100;
  1007. else
  1008. fval = (0x0100 * i) + j;
  1009. bcm43xx_phy_write(bcm, 0x002F, fval);
  1010. mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
  1011. if (mls < phy->minlowsig[1]) {
  1012. phy->minlowsig[1] = mls;
  1013. phy->minlowsigpos[1] = fval;
  1014. }
  1015. }
  1016. }
  1017. phy->minlowsigpos[1] += 0x0101;
  1018. bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
  1019. if (radio->version == 0x2053) {
  1020. bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
  1021. bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
  1022. bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
  1023. bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
  1024. bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
  1025. bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
  1026. bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
  1027. bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
  1028. bcm43xx_radio_write16(bcm, 0x0052,
  1029. (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
  1030. | regstack[11]);
  1031. bcm43xx_write16(bcm, 0x03EC, regstack[10]);
  1032. }
  1033. bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
  1034. }
  1035. static inline
  1036. u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
  1037. {
  1038. if (bcm->current_core->phy->connected) {
  1039. bcm43xx_phy_write(bcm, 0x15, 0xE300);
  1040. control <<= 8;
  1041. bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
  1042. udelay(5);
  1043. bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
  1044. udelay(2);
  1045. bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
  1046. udelay(4);
  1047. bcm43xx_phy_write(bcm, 0x0015, 0xF300);
  1048. udelay(8);
  1049. } else {
  1050. bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
  1051. udelay(2);
  1052. bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
  1053. udelay(4);
  1054. bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
  1055. udelay(8);
  1056. }
  1057. return bcm43xx_phy_read(bcm, 0x002D);
  1058. }
  1059. static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
  1060. {
  1061. int i;
  1062. u32 ret = 0;
  1063. for (i = 0; i < 8; i++)
  1064. ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
  1065. return ret;
  1066. }
  1067. /* Write the LocalOscillator CONTROL */
  1068. static inline
  1069. void bcm43xx_lo_write(struct bcm43xx_private *bcm,
  1070. struct bcm43xx_lopair *pair)
  1071. {
  1072. u16 value;
  1073. value = (u8)(pair->low);
  1074. value |= ((u8)(pair->high)) << 8;
  1075. #ifdef CONFIG_BCM43XX_DEBUG
  1076. /* Sanity check. */
  1077. if (pair->low < -8 || pair->low > 8 ||
  1078. pair->high < -8 || pair->high > 8) {
  1079. printk(KERN_WARNING PFX
  1080. "WARNING: Writing invalid LOpair "
  1081. "(low: %d, high: %d, index: %lu)\n",
  1082. pair->low, pair->high,
  1083. (unsigned long)(pair - bcm->current_core->phy->_lo_pairs));
  1084. dump_stack();
  1085. }
  1086. #endif
  1087. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
  1088. }
  1089. static inline
  1090. struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
  1091. u16 baseband_attenuation,
  1092. u16 radio_attenuation,
  1093. u16 tx)
  1094. {
  1095. static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
  1096. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1097. if (baseband_attenuation > 6)
  1098. baseband_attenuation = 6;
  1099. assert(radio_attenuation < 10);
  1100. assert(tx == 0 || tx == 3);
  1101. if (tx == 3) {
  1102. return bcm43xx_get_lopair(phy,
  1103. radio_attenuation,
  1104. baseband_attenuation);
  1105. }
  1106. return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
  1107. }
  1108. static inline
  1109. struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
  1110. {
  1111. return bcm43xx_find_lopair(bcm,
  1112. bcm->current_core->radio->txpower[0],
  1113. bcm->current_core->radio->txpower[1],
  1114. bcm->current_core->radio->txpower[2]);
  1115. }
  1116. /* Adjust B/G LO */
  1117. void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
  1118. {
  1119. struct bcm43xx_lopair *pair;
  1120. if (fixed) {
  1121. /* Use fixed values. Only for initialization. */
  1122. pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
  1123. } else
  1124. pair = bcm43xx_current_lopair(bcm);
  1125. bcm43xx_lo_write(bcm, pair);
  1126. }
  1127. static inline
  1128. void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
  1129. {
  1130. u16 txctl2 = 0, i;
  1131. u32 smallest, tmp;
  1132. bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
  1133. udelay(10);
  1134. smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
  1135. for (i = 0; i < 16; i++) {
  1136. bcm43xx_radio_write16(bcm, 0x0052, i);
  1137. udelay(10);
  1138. tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
  1139. if (tmp < smallest) {
  1140. smallest = tmp;
  1141. txctl2 = i;
  1142. }
  1143. }
  1144. bcm->current_core->radio->txpower[3] = txctl2;
  1145. }
  1146. static
  1147. void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
  1148. const struct bcm43xx_lopair *in_pair,
  1149. struct bcm43xx_lopair *out_pair,
  1150. u16 r27)
  1151. {
  1152. static const struct bcm43xx_lopair transitions[8] = {
  1153. { .high = 1, .low = 1, },
  1154. { .high = 1, .low = 0, },
  1155. { .high = 1, .low = -1, },
  1156. { .high = 0, .low = -1, },
  1157. { .high = -1, .low = -1, },
  1158. { .high = -1, .low = 0, },
  1159. { .high = -1, .low = 1, },
  1160. { .high = 0, .low = 1, },
  1161. };
  1162. struct bcm43xx_lopair lowest_transition = {
  1163. .high = in_pair->high,
  1164. .low = in_pair->low,
  1165. };
  1166. struct bcm43xx_lopair tmp_pair;
  1167. struct bcm43xx_lopair transition;
  1168. int i = 12;
  1169. int state = 0;
  1170. int found_lower;
  1171. int j, begin, end;
  1172. u32 lowest_deviation;
  1173. u32 tmp;
  1174. /* Note that in_pair and out_pair can point to the same pair. Be careful. */
  1175. bcm43xx_lo_write(bcm, &lowest_transition);
  1176. lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
  1177. do {
  1178. found_lower = 0;
  1179. assert(state >= 0 && state <= 8);
  1180. if (state == 0) {
  1181. begin = 1;
  1182. end = 8;
  1183. } else if (state % 2 == 0) {
  1184. begin = state - 1;
  1185. end = state + 1;
  1186. } else {
  1187. begin = state - 2;
  1188. end = state + 2;
  1189. }
  1190. if (begin < 1)
  1191. begin += 8;
  1192. if (end > 8)
  1193. end -= 8;
  1194. j = begin;
  1195. tmp_pair.high = lowest_transition.high;
  1196. tmp_pair.low = lowest_transition.low;
  1197. while (1) {
  1198. assert(j >= 1 && j <= 8);
  1199. transition.high = tmp_pair.high + transitions[j - 1].high;
  1200. transition.low = tmp_pair.low + transitions[j - 1].low;
  1201. if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
  1202. bcm43xx_lo_write(bcm, &transition);
  1203. tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
  1204. if (tmp < lowest_deviation) {
  1205. lowest_deviation = tmp;
  1206. state = j;
  1207. found_lower = 1;
  1208. lowest_transition.high = transition.high;
  1209. lowest_transition.low = transition.low;
  1210. }
  1211. }
  1212. if (j == end)
  1213. break;
  1214. if (j == 8)
  1215. j = 1;
  1216. else
  1217. j++;
  1218. }
  1219. } while (i-- && found_lower);
  1220. out_pair->high = lowest_transition.high;
  1221. out_pair->low = lowest_transition.low;
  1222. }
  1223. /* Set the baseband attenuation value on chip. */
  1224. void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
  1225. u16 baseband_attenuation)
  1226. {
  1227. u16 value;
  1228. if (bcm->current_core->phy->version == 0) {
  1229. value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
  1230. value |= (baseband_attenuation & 0x000F);
  1231. bcm43xx_write16(bcm, 0x03E6, value);
  1232. return;
  1233. }
  1234. if (bcm->current_core->phy->version > 1) {
  1235. value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
  1236. value |= (baseband_attenuation << 2) & 0x003C;
  1237. } else {
  1238. value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
  1239. value |= (baseband_attenuation << 3) & 0x0078;
  1240. }
  1241. bcm43xx_phy_write(bcm, 0x0060, value);
  1242. }
  1243. /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
  1244. void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
  1245. {
  1246. static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
  1247. const int is_initializing = bcm43xx_is_initializing(bcm);
  1248. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1249. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  1250. u16 h, i, oldi = 0, j;
  1251. struct bcm43xx_lopair control;
  1252. struct bcm43xx_lopair *tmp_control;
  1253. u16 tmp;
  1254. u16 regstack[16] = { 0 };
  1255. u8 oldchannel;
  1256. //XXX: What are these?
  1257. u8 r27 = 0, r31;
  1258. oldchannel = radio->channel;
  1259. /* Setup */
  1260. if (phy->connected) {
  1261. regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
  1262. regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
  1263. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
  1264. bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
  1265. }
  1266. regstack[3] = bcm43xx_read16(bcm, 0x03E2);
  1267. bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
  1268. regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  1269. regstack[5] = bcm43xx_phy_read(bcm, 0x15);
  1270. regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
  1271. regstack[7] = bcm43xx_phy_read(bcm, 0x35);
  1272. regstack[8] = bcm43xx_phy_read(bcm, 0x60);
  1273. regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
  1274. regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
  1275. regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
  1276. if (phy->connected) {
  1277. regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
  1278. regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
  1279. regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
  1280. regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
  1281. }
  1282. bcm43xx_radio_selectchannel(bcm, 6, 0);
  1283. if (phy->connected) {
  1284. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
  1285. bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
  1286. bcm43xx_dummy_transmission(bcm);
  1287. }
  1288. bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
  1289. bcm43xx_phy_set_baseband_attenuation(bcm, 2);
  1290. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
  1291. bcm43xx_phy_write(bcm, 0x002E, 0x007F);
  1292. bcm43xx_phy_write(bcm, 0x080F, 0x0078);
  1293. bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
  1294. bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
  1295. bcm43xx_phy_write(bcm, 0x002B, 0x0203);
  1296. bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
  1297. if (phy->connected) {
  1298. bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
  1299. bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
  1300. bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
  1301. bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
  1302. }
  1303. if (is_initializing)
  1304. bcm43xx_phy_lo_g_measure_txctl2(bcm);
  1305. bcm43xx_phy_write(bcm, 0x080F, 0x8078);
  1306. /* Measure */
  1307. control.low = 0;
  1308. control.high = 0;
  1309. for (h = 0; h < 10; h++) {
  1310. /* Loop over each possible RadioAttenuation (0-9) */
  1311. i = pairorder[h];
  1312. if (is_initializing) {
  1313. if (i == 3) {
  1314. control.low = 0;
  1315. control.high = 0;
  1316. } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
  1317. ((i % 2 == 0) && (oldi % 2 == 0))) {
  1318. tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
  1319. memcpy(&control, tmp_control, sizeof(control));
  1320. } else {
  1321. tmp_control = bcm43xx_get_lopair(phy, 3, 0);
  1322. memcpy(&control, tmp_control, sizeof(control));
  1323. }
  1324. }
  1325. /* Loop over each possible BasebandAttenuation/2 */
  1326. for (j = 0; j < 4; j++) {
  1327. if (is_initializing) {
  1328. tmp = i * 2 + j;
  1329. r27 = 0;
  1330. r31 = 0;
  1331. if (tmp > 14) {
  1332. r31 = 1;
  1333. if (tmp > 17)
  1334. r27 = 1;
  1335. if (tmp > 19)
  1336. r27 = 2;
  1337. }
  1338. } else {
  1339. tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
  1340. if (!tmp_control->used)
  1341. continue;
  1342. memcpy(&control, tmp_control, sizeof(control));
  1343. r27 = 3;
  1344. r31 = 0;
  1345. }
  1346. bcm43xx_radio_write16(bcm, 0x43, i);
  1347. bcm43xx_radio_write16(bcm, 0x52,
  1348. radio->txpower[3]);
  1349. udelay(10);
  1350. bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
  1351. tmp = (regstack[10] & 0xFFF0);
  1352. if (r31)
  1353. tmp |= 0x0008;
  1354. bcm43xx_radio_write16(bcm, 0x007A, tmp);
  1355. tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
  1356. bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
  1357. }
  1358. oldi = i;
  1359. }
  1360. /* Loop over each possible RadioAttenuation (10-13) */
  1361. for (i = 10; i < 14; i++) {
  1362. /* Loop over each possible BasebandAttenuation/2 */
  1363. for (j = 0; j < 4; j++) {
  1364. if (is_initializing) {
  1365. tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
  1366. memcpy(&control, tmp_control, sizeof(control));
  1367. tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
  1368. r27 = 0;
  1369. r31 = 0;
  1370. if (tmp > 14) {
  1371. r31 = 1;
  1372. if (tmp > 17)
  1373. r27 = 1;
  1374. if (tmp > 19)
  1375. r27 = 2;
  1376. }
  1377. } else {
  1378. tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
  1379. if (!tmp_control->used)
  1380. continue;
  1381. memcpy(&control, tmp_control, sizeof(control));
  1382. r27 = 3;
  1383. r31 = 0;
  1384. }
  1385. bcm43xx_radio_write16(bcm, 0x43, i - 9);
  1386. bcm43xx_radio_write16(bcm, 0x52,
  1387. radio->txpower[3]
  1388. | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
  1389. udelay(10);
  1390. bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
  1391. tmp = (regstack[10] & 0xFFF0);
  1392. if (r31)
  1393. tmp |= 0x0008;
  1394. bcm43xx_radio_write16(bcm, 0x7A, tmp);
  1395. tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
  1396. bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
  1397. }
  1398. }
  1399. /* Restoration */
  1400. if (phy->connected) {
  1401. bcm43xx_phy_write(bcm, 0x0015, 0xE300);
  1402. bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
  1403. udelay(5);
  1404. bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
  1405. udelay(2);
  1406. bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
  1407. } else
  1408. bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
  1409. bcm43xx_phy_lo_adjust(bcm, is_initializing);
  1410. bcm43xx_phy_write(bcm, 0x002E, 0x807F);
  1411. if (phy->connected)
  1412. bcm43xx_phy_write(bcm, 0x002F, 0x0202);
  1413. else
  1414. bcm43xx_phy_write(bcm, 0x002F, 0x0101);
  1415. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
  1416. bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
  1417. bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
  1418. bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
  1419. bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
  1420. bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
  1421. bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
  1422. regstack[11] &= 0x00F0;
  1423. regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
  1424. bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
  1425. bcm43xx_write16(bcm, 0x03E2, regstack[3]);
  1426. if (phy->connected) {
  1427. bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
  1428. bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
  1429. bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
  1430. bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
  1431. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
  1432. bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
  1433. }
  1434. bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
  1435. #ifdef CONFIG_BCM43XX_DEBUG
  1436. {
  1437. /* Sanity check for all lopairs. */
  1438. for (i = 0; i < BCM43xx_LO_COUNT; i++) {
  1439. tmp_control = phy->_lo_pairs + i;
  1440. if (tmp_control->low < -8 || tmp_control->low > 8 ||
  1441. tmp_control->high < -8 || tmp_control->high > 8) {
  1442. printk(KERN_WARNING PFX
  1443. "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
  1444. tmp_control->low, tmp_control->high, i);
  1445. }
  1446. }
  1447. }
  1448. #endif /* CONFIG_BCM43XX_DEBUG */
  1449. }
  1450. static
  1451. void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
  1452. {
  1453. struct bcm43xx_lopair *pair;
  1454. pair = bcm43xx_current_lopair(bcm);
  1455. pair->used = 1;
  1456. }
  1457. void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
  1458. {
  1459. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1460. struct bcm43xx_lopair *pair;
  1461. int i;
  1462. for (i = 0; i < BCM43xx_LO_COUNT; i++) {
  1463. pair = phy->_lo_pairs + i;
  1464. pair->used = 0;
  1465. }
  1466. }
  1467. /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
  1468. * This function converts a TSSI value to dBm in Q5.2
  1469. */
  1470. static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
  1471. {
  1472. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1473. s8 dbm = 0;
  1474. s32 tmp;
  1475. tmp = phy->idle_tssi;
  1476. tmp += tssi;
  1477. tmp -= phy->savedpctlreg;
  1478. switch (phy->type) {
  1479. case BCM43xx_PHYTYPE_A:
  1480. tmp += 0x80;
  1481. tmp = limit_value(tmp, 0x00, 0xFF);
  1482. dbm = phy->tssi2dbm[tmp];
  1483. TODO(); //TODO: There's a FIXME on the specs
  1484. break;
  1485. case BCM43xx_PHYTYPE_B:
  1486. case BCM43xx_PHYTYPE_G:
  1487. tmp = limit_value(tmp, 0x00, 0x3F);
  1488. dbm = phy->tssi2dbm[tmp];
  1489. break;
  1490. default:
  1491. assert(0);
  1492. }
  1493. return dbm;
  1494. }
  1495. /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
  1496. void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
  1497. {
  1498. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  1499. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1500. if (phy->savedpctlreg == 0xFFFF)
  1501. return;
  1502. if ((bcm->board_type == 0x0416) &&
  1503. (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
  1504. return;
  1505. switch (phy->type) {
  1506. case BCM43xx_PHYTYPE_A: {
  1507. TODO(); //TODO: Nothing for A PHYs yet :-/
  1508. break;
  1509. }
  1510. case BCM43xx_PHYTYPE_B:
  1511. case BCM43xx_PHYTYPE_G: {
  1512. u16 tmp;
  1513. u16 txpower;
  1514. s8 v0, v1, v2, v3;
  1515. s8 average;
  1516. u8 max_pwr;
  1517. s16 desired_pwr, estimated_pwr, pwr_adjust;
  1518. s16 radio_att_delta, baseband_att_delta;
  1519. s16 radio_attenuation, baseband_attenuation;
  1520. unsigned long phylock_flags;
  1521. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
  1522. v0 = (s8)(tmp & 0x00FF);
  1523. v1 = (s8)((tmp & 0xFF00) >> 8);
  1524. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
  1525. v2 = (s8)(tmp & 0x00FF);
  1526. v3 = (s8)((tmp & 0xFF00) >> 8);
  1527. tmp = 0;
  1528. if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
  1529. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
  1530. v0 = (s8)(tmp & 0x00FF);
  1531. v1 = (s8)((tmp & 0xFF00) >> 8);
  1532. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
  1533. v2 = (s8)(tmp & 0x00FF);
  1534. v3 = (s8)((tmp & 0xFF00) >> 8);
  1535. if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
  1536. return;
  1537. v0 = (v0 + 0x20) & 0x3F;
  1538. v1 = (v1 + 0x20) & 0x3F;
  1539. v2 = (v2 + 0x20) & 0x3F;
  1540. v3 = (v3 + 0x20) & 0x3F;
  1541. tmp = 1;
  1542. }
  1543. bcm43xx_radio_clear_tssi(bcm);
  1544. average = (v0 + v1 + v2 + v3 + 2) / 4;
  1545. if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
  1546. average -= 13;
  1547. estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
  1548. max_pwr = bcm->sprom.maxpower_bgphy;
  1549. if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
  1550. (phy->type == BCM43xx_PHYTYPE_G))
  1551. max_pwr -= 0x3;
  1552. /*TODO:
  1553. max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
  1554. where REG is the max power as per the regulatory domain
  1555. */
  1556. desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
  1557. /* Check if we need to adjust the current power. */
  1558. pwr_adjust = desired_pwr - estimated_pwr;
  1559. radio_att_delta = -(pwr_adjust + 7) >> 3;
  1560. baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
  1561. if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
  1562. bcm43xx_phy_lo_mark_current_used(bcm);
  1563. return;
  1564. }
  1565. /* Calculate the new attenuation values. */
  1566. baseband_attenuation = radio->txpower[0];
  1567. baseband_attenuation += baseband_att_delta;
  1568. radio_attenuation = radio->txpower[1];
  1569. radio_attenuation += radio_att_delta;
  1570. /* Get baseband and radio attenuation values into their permitted ranges.
  1571. * baseband 0-11, radio 0-9.
  1572. * Radio attenuation affects power level 4 times as much as baseband.
  1573. */
  1574. if (radio_attenuation < 0) {
  1575. baseband_attenuation -= (4 * -radio_attenuation);
  1576. radio_attenuation = 0;
  1577. } else if (radio_attenuation > 9) {
  1578. baseband_attenuation += (4 * (radio_attenuation - 9));
  1579. radio_attenuation = 9;
  1580. } else {
  1581. while (baseband_attenuation < 0 && radio_attenuation > 0) {
  1582. baseband_attenuation += 4;
  1583. radio_attenuation--;
  1584. }
  1585. while (baseband_attenuation > 11 && radio_attenuation < 9) {
  1586. baseband_attenuation -= 4;
  1587. radio_attenuation++;
  1588. }
  1589. }
  1590. baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
  1591. txpower = radio->txpower[2];
  1592. if ((radio->version == 0x2050) && (radio->revision == 2)) {
  1593. if (radio_attenuation <= 1) {
  1594. if (txpower == 0) {
  1595. txpower = 3;
  1596. radio_attenuation += 2;
  1597. baseband_attenuation += 2;
  1598. } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
  1599. baseband_attenuation += 4 * (radio_attenuation - 2);
  1600. radio_attenuation = 2;
  1601. }
  1602. } else if (radio_attenuation > 4 && txpower != 0) {
  1603. txpower = 0;
  1604. if (baseband_attenuation < 3) {
  1605. radio_attenuation -= 3;
  1606. baseband_attenuation += 2;
  1607. } else {
  1608. radio_attenuation -= 2;
  1609. baseband_attenuation -= 2;
  1610. }
  1611. }
  1612. }
  1613. radio->txpower[2] = txpower;
  1614. baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
  1615. radio_attenuation = limit_value(radio_attenuation, 0, 9);
  1616. bcm43xx_phy_lock(bcm, phylock_flags);
  1617. bcm43xx_radio_lock(bcm);
  1618. bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
  1619. radio_attenuation, txpower);
  1620. bcm43xx_phy_lo_mark_current_used(bcm);
  1621. bcm43xx_radio_unlock(bcm);
  1622. bcm43xx_phy_unlock(bcm, phylock_flags);
  1623. break;
  1624. }
  1625. default:
  1626. assert(0);
  1627. }
  1628. }
  1629. static inline
  1630. s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
  1631. {
  1632. if (num < 0)
  1633. return num/den;
  1634. else
  1635. return (num+den/2)/den;
  1636. }
  1637. static inline
  1638. s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
  1639. {
  1640. s32 m1, m2, f = 256, q, delta;
  1641. s8 i = 0;
  1642. m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
  1643. m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
  1644. do {
  1645. if (i > 15)
  1646. return -EINVAL;
  1647. q = bcm43xx_tssi2dbm_ad(f * 4096 -
  1648. bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
  1649. delta = abs(q - f);
  1650. f = q;
  1651. i++;
  1652. } while (delta >= 2);
  1653. entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
  1654. return 0;
  1655. }
  1656. /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
  1657. int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
  1658. {
  1659. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1660. struct bcm43xx_radioinfo *radio = bcm->current_core->radio;
  1661. s16 pab0, pab1, pab2;
  1662. u8 idx;
  1663. s8 *dyn_tssi2dbm;
  1664. if (phy->type == BCM43xx_PHYTYPE_A) {
  1665. pab0 = (s16)(bcm->sprom.pa1b0);
  1666. pab1 = (s16)(bcm->sprom.pa1b1);
  1667. pab2 = (s16)(bcm->sprom.pa1b2);
  1668. } else {
  1669. pab0 = (s16)(bcm->sprom.pa0b0);
  1670. pab1 = (s16)(bcm->sprom.pa0b1);
  1671. pab2 = (s16)(bcm->sprom.pa0b2);
  1672. }
  1673. if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
  1674. phy->idle_tssi = 0x34;
  1675. phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
  1676. return 0;
  1677. }
  1678. if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
  1679. pab0 != -1 && pab1 != -1 && pab2 != -1) {
  1680. /* The pabX values are set in SPROM. Use them. */
  1681. if (phy->type == BCM43xx_PHYTYPE_A) {
  1682. if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
  1683. (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
  1684. phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
  1685. else
  1686. phy->idle_tssi = 62;
  1687. } else {
  1688. if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
  1689. (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
  1690. phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
  1691. else
  1692. phy->idle_tssi = 62;
  1693. }
  1694. dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
  1695. if (dyn_tssi2dbm == NULL) {
  1696. printk(KERN_ERR PFX "Could not allocate memory"
  1697. "for tssi2dbm table\n");
  1698. return -ENOMEM;
  1699. }
  1700. for (idx = 0; idx < 64; idx++)
  1701. if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
  1702. phy->tssi2dbm = NULL;
  1703. printk(KERN_ERR PFX "Could not generate "
  1704. "tssi2dBm table\n");
  1705. return -ENODEV;
  1706. }
  1707. phy->tssi2dbm = dyn_tssi2dbm;
  1708. phy->dyn_tssi_tbl = 1;
  1709. } else {
  1710. /* pabX values not set in SPROM. */
  1711. switch (phy->type) {
  1712. case BCM43xx_PHYTYPE_A:
  1713. /* APHY needs a generated table. */
  1714. phy->tssi2dbm = NULL;
  1715. printk(KERN_ERR PFX "Could not generate tssi2dBm "
  1716. "table (wrong SPROM info)!\n");
  1717. return -ENODEV;
  1718. case BCM43xx_PHYTYPE_B:
  1719. phy->idle_tssi = 0x34;
  1720. phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
  1721. break;
  1722. case BCM43xx_PHYTYPE_G:
  1723. phy->idle_tssi = 0x34;
  1724. phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
  1725. break;
  1726. }
  1727. }
  1728. return 0;
  1729. }
  1730. int bcm43xx_phy_init(struct bcm43xx_private *bcm)
  1731. {
  1732. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1733. int err = -ENODEV;
  1734. unsigned long flags;
  1735. /* We do not want to be preempted while calibrating
  1736. * the hardware.
  1737. */
  1738. local_irq_save(flags);
  1739. switch (phy->type) {
  1740. case BCM43xx_PHYTYPE_A:
  1741. if (phy->rev == 2 || phy->rev == 3) {
  1742. bcm43xx_phy_inita(bcm);
  1743. err = 0;
  1744. }
  1745. break;
  1746. case BCM43xx_PHYTYPE_B:
  1747. switch (phy->rev) {
  1748. case 2:
  1749. bcm43xx_phy_initb2(bcm);
  1750. err = 0;
  1751. break;
  1752. case 4:
  1753. bcm43xx_phy_initb4(bcm);
  1754. err = 0;
  1755. break;
  1756. case 5:
  1757. bcm43xx_phy_initb5(bcm);
  1758. err = 0;
  1759. break;
  1760. case 6:
  1761. bcm43xx_phy_initb6(bcm);
  1762. err = 0;
  1763. break;
  1764. }
  1765. break;
  1766. case BCM43xx_PHYTYPE_G:
  1767. bcm43xx_phy_initg(bcm);
  1768. err = 0;
  1769. break;
  1770. }
  1771. local_irq_restore(flags);
  1772. if (err)
  1773. printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
  1774. return err;
  1775. }
  1776. void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
  1777. {
  1778. struct bcm43xx_phyinfo *phy = bcm->current_core->phy;
  1779. u16 antennadiv;
  1780. u16 offset;
  1781. u16 value;
  1782. u32 ucodeflags;
  1783. antennadiv = phy->antenna_diversity;
  1784. if (antennadiv == 0xFFFF)
  1785. antennadiv = 3;
  1786. assert(antennadiv <= 3);
  1787. ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1788. BCM43xx_UCODEFLAGS_OFFSET);
  1789. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1790. BCM43xx_UCODEFLAGS_OFFSET,
  1791. ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
  1792. switch (phy->type) {
  1793. case BCM43xx_PHYTYPE_A:
  1794. case BCM43xx_PHYTYPE_G:
  1795. if (phy->type == BCM43xx_PHYTYPE_A)
  1796. offset = 0x0000;
  1797. else
  1798. offset = 0x0400;
  1799. if (antennadiv == 2)
  1800. value = (3/*automatic*/ << 7);
  1801. else
  1802. value = (antennadiv << 7);
  1803. bcm43xx_phy_write(bcm, offset + 1,
  1804. (bcm43xx_phy_read(bcm, offset + 1)
  1805. & 0x7E7F) | value);
  1806. if (antennadiv >= 2) {
  1807. if (antennadiv == 2)
  1808. value = (antennadiv << 7);
  1809. else
  1810. value = (0/*force0*/ << 7);
  1811. bcm43xx_phy_write(bcm, offset + 0x2B,
  1812. (bcm43xx_phy_read(bcm, offset + 0x2B)
  1813. & 0xFEFF) | value);
  1814. }
  1815. if (phy->type == BCM43xx_PHYTYPE_G) {
  1816. if (antennadiv >= 2)
  1817. bcm43xx_phy_write(bcm, 0x048C,
  1818. bcm43xx_phy_read(bcm, 0x048C)
  1819. | 0x2000);
  1820. else
  1821. bcm43xx_phy_write(bcm, 0x048C,
  1822. bcm43xx_phy_read(bcm, 0x048C)
  1823. & ~0x2000);
  1824. if (phy->rev >= 2) {
  1825. bcm43xx_phy_write(bcm, 0x0461,
  1826. bcm43xx_phy_read(bcm, 0x0461)
  1827. | 0x0010);
  1828. bcm43xx_phy_write(bcm, 0x04AD,
  1829. (bcm43xx_phy_read(bcm, 0x04AD)
  1830. & 0x00FF) | 0x0015);
  1831. if (phy->rev == 2)
  1832. bcm43xx_phy_write(bcm, 0x0427, 0x0008);
  1833. else
  1834. bcm43xx_phy_write(bcm, 0x0427,
  1835. (bcm43xx_phy_read(bcm, 0x0427)
  1836. & 0x00FF) | 0x0008);
  1837. }
  1838. else if (phy->rev >= 6)
  1839. bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
  1840. } else {
  1841. if (phy->rev < 3)
  1842. bcm43xx_phy_write(bcm, 0x002B,
  1843. (bcm43xx_phy_read(bcm, 0x002B)
  1844. & 0x00FF) | 0x0024);
  1845. else {
  1846. bcm43xx_phy_write(bcm, 0x0061,
  1847. bcm43xx_phy_read(bcm, 0x0061)
  1848. | 0x0010);
  1849. if (phy->rev == 3) {
  1850. bcm43xx_phy_write(bcm, 0x0093, 0x001D);
  1851. bcm43xx_phy_write(bcm, 0x0027, 0x0008);
  1852. } else {
  1853. bcm43xx_phy_write(bcm, 0x0093, 0x003A);
  1854. bcm43xx_phy_write(bcm, 0x0027,
  1855. (bcm43xx_phy_read(bcm, 0x0027)
  1856. & 0x00FF) | 0x0008);
  1857. }
  1858. }
  1859. }
  1860. break;
  1861. case BCM43xx_PHYTYPE_B:
  1862. if (bcm->current_core->rev == 2)
  1863. value = (3/*automatic*/ << 7);
  1864. else
  1865. value = (antennadiv << 7);
  1866. bcm43xx_phy_write(bcm, 0x03E2,
  1867. (bcm43xx_phy_read(bcm, 0x03E2)
  1868. & 0xFE7F) | value);
  1869. break;
  1870. default:
  1871. assert(0);
  1872. }
  1873. if (antennadiv >= 2) {
  1874. ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1875. BCM43xx_UCODEFLAGS_OFFSET);
  1876. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1877. BCM43xx_UCODEFLAGS_OFFSET,
  1878. ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
  1879. }
  1880. phy->antenna_diversity = antennadiv;
  1881. }