mthca_mr.c 21 KB

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  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_mr.c 1349 2004-12-16 21:09:43Z roland $
  34. */
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include "mthca_dev.h"
  38. #include "mthca_cmd.h"
  39. #include "mthca_memfree.h"
  40. struct mthca_mtt {
  41. struct mthca_buddy *buddy;
  42. int order;
  43. u32 first_seg;
  44. };
  45. /*
  46. * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
  47. */
  48. struct mthca_mpt_entry {
  49. __be32 flags;
  50. __be32 page_size;
  51. __be32 key;
  52. __be32 pd;
  53. __be64 start;
  54. __be64 length;
  55. __be32 lkey;
  56. __be32 window_count;
  57. __be32 window_count_limit;
  58. __be64 mtt_seg;
  59. __be32 mtt_sz; /* Arbel only */
  60. u32 reserved[2];
  61. } __attribute__((packed));
  62. #define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
  63. #define MTHCA_MPT_FLAG_MIO (1 << 17)
  64. #define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
  65. #define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
  66. #define MTHCA_MPT_FLAG_REGION (1 << 8)
  67. #define MTHCA_MTT_FLAG_PRESENT 1
  68. #define MTHCA_MPT_STATUS_SW 0xF0
  69. #define MTHCA_MPT_STATUS_HW 0x00
  70. #define SINAI_FMR_KEY_INC 0x1000000
  71. /*
  72. * Buddy allocator for MTT segments (currently not very efficient
  73. * since it doesn't keep a free list and just searches linearly
  74. * through the bitmaps)
  75. */
  76. static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
  77. {
  78. int o;
  79. int m;
  80. u32 seg;
  81. spin_lock(&buddy->lock);
  82. for (o = order; o <= buddy->max_order; ++o) {
  83. m = 1 << (buddy->max_order - o);
  84. seg = find_first_bit(buddy->bits[o], m);
  85. if (seg < m)
  86. goto found;
  87. }
  88. spin_unlock(&buddy->lock);
  89. return -1;
  90. found:
  91. clear_bit(seg, buddy->bits[o]);
  92. while (o > order) {
  93. --o;
  94. seg <<= 1;
  95. set_bit(seg ^ 1, buddy->bits[o]);
  96. }
  97. spin_unlock(&buddy->lock);
  98. seg <<= order;
  99. return seg;
  100. }
  101. static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
  102. {
  103. seg >>= order;
  104. spin_lock(&buddy->lock);
  105. while (test_bit(seg ^ 1, buddy->bits[order])) {
  106. clear_bit(seg ^ 1, buddy->bits[order]);
  107. seg >>= 1;
  108. ++order;
  109. }
  110. set_bit(seg, buddy->bits[order]);
  111. spin_unlock(&buddy->lock);
  112. }
  113. static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
  114. {
  115. int i, s;
  116. buddy->max_order = max_order;
  117. spin_lock_init(&buddy->lock);
  118. buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
  119. GFP_KERNEL);
  120. if (!buddy->bits)
  121. goto err_out;
  122. for (i = 0; i <= buddy->max_order; ++i) {
  123. s = BITS_TO_LONGS(1 << (buddy->max_order - i));
  124. buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
  125. if (!buddy->bits[i])
  126. goto err_out_free;
  127. bitmap_zero(buddy->bits[i],
  128. 1 << (buddy->max_order - i));
  129. }
  130. set_bit(0, buddy->bits[buddy->max_order]);
  131. return 0;
  132. err_out_free:
  133. for (i = 0; i <= buddy->max_order; ++i)
  134. kfree(buddy->bits[i]);
  135. kfree(buddy->bits);
  136. err_out:
  137. return -ENOMEM;
  138. }
  139. static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
  140. {
  141. int i;
  142. for (i = 0; i <= buddy->max_order; ++i)
  143. kfree(buddy->bits[i]);
  144. kfree(buddy->bits);
  145. }
  146. static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
  147. struct mthca_buddy *buddy)
  148. {
  149. u32 seg = mthca_buddy_alloc(buddy, order);
  150. if (seg == -1)
  151. return -1;
  152. if (mthca_is_memfree(dev))
  153. if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
  154. seg + (1 << order) - 1)) {
  155. mthca_buddy_free(buddy, seg, order);
  156. seg = -1;
  157. }
  158. return seg;
  159. }
  160. static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
  161. struct mthca_buddy *buddy)
  162. {
  163. struct mthca_mtt *mtt;
  164. int i;
  165. if (size <= 0)
  166. return ERR_PTR(-EINVAL);
  167. mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
  168. if (!mtt)
  169. return ERR_PTR(-ENOMEM);
  170. mtt->buddy = buddy;
  171. mtt->order = 0;
  172. for (i = MTHCA_MTT_SEG_SIZE / 8; i < size; i <<= 1)
  173. ++mtt->order;
  174. mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
  175. if (mtt->first_seg == -1) {
  176. kfree(mtt);
  177. return ERR_PTR(-ENOMEM);
  178. }
  179. return mtt;
  180. }
  181. struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
  182. {
  183. return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
  184. }
  185. void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
  186. {
  187. if (!mtt)
  188. return;
  189. mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
  190. mthca_table_put_range(dev, dev->mr_table.mtt_table,
  191. mtt->first_seg,
  192. mtt->first_seg + (1 << mtt->order) - 1);
  193. kfree(mtt);
  194. }
  195. int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  196. int start_index, u64 *buffer_list, int list_len)
  197. {
  198. struct mthca_mailbox *mailbox;
  199. __be64 *mtt_entry;
  200. int err = 0;
  201. u8 status;
  202. int i;
  203. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  204. if (IS_ERR(mailbox))
  205. return PTR_ERR(mailbox);
  206. mtt_entry = mailbox->buf;
  207. while (list_len > 0) {
  208. mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
  209. mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  210. start_index * 8);
  211. mtt_entry[1] = 0;
  212. for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
  213. mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
  214. MTHCA_MTT_FLAG_PRESENT);
  215. /*
  216. * If we have an odd number of entries to write, add
  217. * one more dummy entry for firmware efficiency.
  218. */
  219. if (i & 1)
  220. mtt_entry[i + 2] = 0;
  221. err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status);
  222. if (err) {
  223. mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
  224. goto out;
  225. }
  226. if (status) {
  227. mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n",
  228. status);
  229. err = -EINVAL;
  230. goto out;
  231. }
  232. list_len -= i;
  233. start_index += i;
  234. buffer_list += i;
  235. }
  236. out:
  237. mthca_free_mailbox(dev, mailbox);
  238. return err;
  239. }
  240. static inline u32 tavor_hw_index_to_key(u32 ind)
  241. {
  242. return ind;
  243. }
  244. static inline u32 tavor_key_to_hw_index(u32 key)
  245. {
  246. return key;
  247. }
  248. static inline u32 arbel_hw_index_to_key(u32 ind)
  249. {
  250. return (ind >> 24) | (ind << 8);
  251. }
  252. static inline u32 arbel_key_to_hw_index(u32 key)
  253. {
  254. return (key << 24) | (key >> 8);
  255. }
  256. static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
  257. {
  258. if (mthca_is_memfree(dev))
  259. return arbel_hw_index_to_key(ind);
  260. else
  261. return tavor_hw_index_to_key(ind);
  262. }
  263. static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
  264. {
  265. if (mthca_is_memfree(dev))
  266. return arbel_key_to_hw_index(key);
  267. else
  268. return tavor_key_to_hw_index(key);
  269. }
  270. static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
  271. {
  272. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  273. return ((key << 20) & 0x800000) | (key & 0x7fffff);
  274. else
  275. return key;
  276. }
  277. int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
  278. u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
  279. {
  280. struct mthca_mailbox *mailbox;
  281. struct mthca_mpt_entry *mpt_entry;
  282. u32 key;
  283. int i;
  284. int err;
  285. u8 status;
  286. WARN_ON(buffer_size_shift >= 32);
  287. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  288. if (key == -1)
  289. return -ENOMEM;
  290. key = adjust_key(dev, key);
  291. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  292. if (mthca_is_memfree(dev)) {
  293. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  294. if (err)
  295. goto err_out_mpt_free;
  296. }
  297. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  298. if (IS_ERR(mailbox)) {
  299. err = PTR_ERR(mailbox);
  300. goto err_out_table;
  301. }
  302. mpt_entry = mailbox->buf;
  303. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  304. MTHCA_MPT_FLAG_MIO |
  305. MTHCA_MPT_FLAG_REGION |
  306. access);
  307. if (!mr->mtt)
  308. mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
  309. mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
  310. mpt_entry->key = cpu_to_be32(key);
  311. mpt_entry->pd = cpu_to_be32(pd);
  312. mpt_entry->start = cpu_to_be64(iova);
  313. mpt_entry->length = cpu_to_be64(total_size);
  314. memset(&mpt_entry->lkey, 0,
  315. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
  316. if (mr->mtt)
  317. mpt_entry->mtt_seg =
  318. cpu_to_be64(dev->mr_table.mtt_base +
  319. mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE);
  320. if (0) {
  321. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  322. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  323. if (i % 4 == 0)
  324. printk("[%02x] ", i * 4);
  325. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  326. if ((i + 1) % 4 == 0)
  327. printk("\n");
  328. }
  329. }
  330. err = mthca_SW2HW_MPT(dev, mailbox,
  331. key & (dev->limits.num_mpts - 1),
  332. &status);
  333. if (err) {
  334. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  335. goto err_out_mailbox;
  336. } else if (status) {
  337. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  338. status);
  339. err = -EINVAL;
  340. goto err_out_mailbox;
  341. }
  342. mthca_free_mailbox(dev, mailbox);
  343. return err;
  344. err_out_mailbox:
  345. mthca_free_mailbox(dev, mailbox);
  346. err_out_table:
  347. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  348. err_out_mpt_free:
  349. mthca_free(&dev->mr_table.mpt_alloc, key);
  350. return err;
  351. }
  352. int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
  353. u32 access, struct mthca_mr *mr)
  354. {
  355. mr->mtt = NULL;
  356. return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
  357. }
  358. int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
  359. u64 *buffer_list, int buffer_size_shift,
  360. int list_len, u64 iova, u64 total_size,
  361. u32 access, struct mthca_mr *mr)
  362. {
  363. int err;
  364. mr->mtt = mthca_alloc_mtt(dev, list_len);
  365. if (IS_ERR(mr->mtt))
  366. return PTR_ERR(mr->mtt);
  367. err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
  368. if (err) {
  369. mthca_free_mtt(dev, mr->mtt);
  370. return err;
  371. }
  372. err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
  373. total_size, access, mr);
  374. if (err)
  375. mthca_free_mtt(dev, mr->mtt);
  376. return err;
  377. }
  378. /* Free mr or fmr */
  379. static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
  380. {
  381. mthca_table_put(dev, dev->mr_table.mpt_table,
  382. key_to_hw_index(dev, lkey));
  383. mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
  384. }
  385. void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
  386. {
  387. int err;
  388. u8 status;
  389. err = mthca_HW2SW_MPT(dev, NULL,
  390. key_to_hw_index(dev, mr->ibmr.lkey) &
  391. (dev->limits.num_mpts - 1),
  392. &status);
  393. if (err)
  394. mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
  395. else if (status)
  396. mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n",
  397. status);
  398. mthca_free_region(dev, mr->ibmr.lkey);
  399. mthca_free_mtt(dev, mr->mtt);
  400. }
  401. int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
  402. u32 access, struct mthca_fmr *mr)
  403. {
  404. struct mthca_mpt_entry *mpt_entry;
  405. struct mthca_mailbox *mailbox;
  406. u64 mtt_seg;
  407. u32 key, idx;
  408. u8 status;
  409. int list_len = mr->attr.max_pages;
  410. int err = -ENOMEM;
  411. int i;
  412. if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
  413. return -EINVAL;
  414. /* For Arbel, all MTTs must fit in the same page. */
  415. if (mthca_is_memfree(dev) &&
  416. mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
  417. return -EINVAL;
  418. mr->maps = 0;
  419. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  420. if (key == -1)
  421. return -ENOMEM;
  422. key = adjust_key(dev, key);
  423. idx = key & (dev->limits.num_mpts - 1);
  424. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  425. if (mthca_is_memfree(dev)) {
  426. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  427. if (err)
  428. goto err_out_mpt_free;
  429. mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
  430. BUG_ON(!mr->mem.arbel.mpt);
  431. } else
  432. mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
  433. sizeof *(mr->mem.tavor.mpt) * idx;
  434. mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
  435. if (IS_ERR(mr->mtt))
  436. goto err_out_table;
  437. mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
  438. if (mthca_is_memfree(dev)) {
  439. mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
  440. mr->mtt->first_seg,
  441. &mr->mem.arbel.dma_handle);
  442. BUG_ON(!mr->mem.arbel.mtts);
  443. } else
  444. mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
  445. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  446. if (IS_ERR(mailbox))
  447. goto err_out_free_mtt;
  448. mpt_entry = mailbox->buf;
  449. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  450. MTHCA_MPT_FLAG_MIO |
  451. MTHCA_MPT_FLAG_REGION |
  452. access);
  453. mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
  454. mpt_entry->key = cpu_to_be32(key);
  455. mpt_entry->pd = cpu_to_be32(pd);
  456. memset(&mpt_entry->start, 0,
  457. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
  458. mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
  459. if (0) {
  460. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  461. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  462. if (i % 4 == 0)
  463. printk("[%02x] ", i * 4);
  464. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  465. if ((i + 1) % 4 == 0)
  466. printk("\n");
  467. }
  468. }
  469. err = mthca_SW2HW_MPT(dev, mailbox,
  470. key & (dev->limits.num_mpts - 1),
  471. &status);
  472. if (err) {
  473. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  474. goto err_out_mailbox_free;
  475. }
  476. if (status) {
  477. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  478. status);
  479. err = -EINVAL;
  480. goto err_out_mailbox_free;
  481. }
  482. mthca_free_mailbox(dev, mailbox);
  483. return 0;
  484. err_out_mailbox_free:
  485. mthca_free_mailbox(dev, mailbox);
  486. err_out_free_mtt:
  487. mthca_free_mtt(dev, mr->mtt);
  488. err_out_table:
  489. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  490. err_out_mpt_free:
  491. mthca_free(&dev->mr_table.mpt_alloc, mr->ibmr.lkey);
  492. return err;
  493. }
  494. int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
  495. {
  496. if (fmr->maps)
  497. return -EBUSY;
  498. mthca_free_region(dev, fmr->ibmr.lkey);
  499. mthca_free_mtt(dev, fmr->mtt);
  500. return 0;
  501. }
  502. static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
  503. int list_len, u64 iova)
  504. {
  505. int i, page_mask;
  506. if (list_len > fmr->attr.max_pages)
  507. return -EINVAL;
  508. page_mask = (1 << fmr->attr.page_shift) - 1;
  509. /* We are getting page lists, so va must be page aligned. */
  510. if (iova & page_mask)
  511. return -EINVAL;
  512. /* Trust the user not to pass misaligned data in page_list */
  513. if (0)
  514. for (i = 0; i < list_len; ++i) {
  515. if (page_list[i] & ~page_mask)
  516. return -EINVAL;
  517. }
  518. if (fmr->maps >= fmr->attr.max_maps)
  519. return -EINVAL;
  520. return 0;
  521. }
  522. int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  523. int list_len, u64 iova)
  524. {
  525. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  526. struct mthca_dev *dev = to_mdev(ibfmr->device);
  527. struct mthca_mpt_entry mpt_entry;
  528. u32 key;
  529. int i, err;
  530. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  531. if (err)
  532. return err;
  533. ++fmr->maps;
  534. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  535. key += dev->limits.num_mpts;
  536. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  537. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  538. for (i = 0; i < list_len; ++i) {
  539. __be64 mtt_entry = cpu_to_be64(page_list[i] |
  540. MTHCA_MTT_FLAG_PRESENT);
  541. mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
  542. }
  543. mpt_entry.lkey = cpu_to_be32(key);
  544. mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  545. mpt_entry.start = cpu_to_be64(iova);
  546. __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
  547. memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
  548. offsetof(struct mthca_mpt_entry, window_count) -
  549. offsetof(struct mthca_mpt_entry, start));
  550. writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
  551. return 0;
  552. }
  553. int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  554. int list_len, u64 iova)
  555. {
  556. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  557. struct mthca_dev *dev = to_mdev(ibfmr->device);
  558. u32 key;
  559. int i, err;
  560. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  561. if (err)
  562. return err;
  563. ++fmr->maps;
  564. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  565. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  566. key += SINAI_FMR_KEY_INC;
  567. else
  568. key += dev->limits.num_mpts;
  569. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  570. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  571. wmb();
  572. for (i = 0; i < list_len; ++i)
  573. fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
  574. MTHCA_MTT_FLAG_PRESENT);
  575. dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
  576. list_len * sizeof(u64), DMA_TO_DEVICE);
  577. fmr->mem.arbel.mpt->key = cpu_to_be32(key);
  578. fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
  579. fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  580. fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
  581. wmb();
  582. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
  583. wmb();
  584. return 0;
  585. }
  586. void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  587. {
  588. u32 key;
  589. if (!fmr->maps)
  590. return;
  591. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  592. key &= dev->limits.num_mpts - 1;
  593. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  594. fmr->maps = 0;
  595. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  596. }
  597. void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  598. {
  599. u32 key;
  600. if (!fmr->maps)
  601. return;
  602. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  603. key &= dev->limits.num_mpts - 1;
  604. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  605. fmr->maps = 0;
  606. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  607. }
  608. int mthca_init_mr_table(struct mthca_dev *dev)
  609. {
  610. unsigned long addr;
  611. int err, i;
  612. err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
  613. dev->limits.num_mpts,
  614. ~0, dev->limits.reserved_mrws);
  615. if (err)
  616. return err;
  617. if (!mthca_is_memfree(dev) &&
  618. (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
  619. dev->limits.fmr_reserved_mtts = 0;
  620. else
  621. dev->mthca_flags |= MTHCA_FLAG_FMR;
  622. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  623. mthca_dbg(dev, "Memory key throughput optimization activated.\n");
  624. err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
  625. fls(dev->limits.num_mtt_segs - 1));
  626. if (err)
  627. goto err_mtt_buddy;
  628. dev->mr_table.tavor_fmr.mpt_base = NULL;
  629. dev->mr_table.tavor_fmr.mtt_base = NULL;
  630. if (dev->limits.fmr_reserved_mtts) {
  631. i = fls(dev->limits.fmr_reserved_mtts - 1);
  632. if (i >= 31) {
  633. mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
  634. err = -EINVAL;
  635. goto err_fmr_mpt;
  636. }
  637. addr = pci_resource_start(dev->pdev, 4) +
  638. ((pci_resource_len(dev->pdev, 4) - 1) &
  639. dev->mr_table.mpt_base);
  640. dev->mr_table.tavor_fmr.mpt_base =
  641. ioremap(addr, (1 << i) * sizeof(struct mthca_mpt_entry));
  642. if (!dev->mr_table.tavor_fmr.mpt_base) {
  643. mthca_warn(dev, "MPT ioremap for FMR failed.\n");
  644. err = -ENOMEM;
  645. goto err_fmr_mpt;
  646. }
  647. addr = pci_resource_start(dev->pdev, 4) +
  648. ((pci_resource_len(dev->pdev, 4) - 1) &
  649. dev->mr_table.mtt_base);
  650. dev->mr_table.tavor_fmr.mtt_base =
  651. ioremap(addr, (1 << i) * MTHCA_MTT_SEG_SIZE);
  652. if (!dev->mr_table.tavor_fmr.mtt_base) {
  653. mthca_warn(dev, "MTT ioremap for FMR failed.\n");
  654. err = -ENOMEM;
  655. goto err_fmr_mtt;
  656. }
  657. err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, i);
  658. if (err)
  659. goto err_fmr_mtt_buddy;
  660. /* Prevent regular MRs from using FMR keys */
  661. err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, i);
  662. if (err)
  663. goto err_reserve_fmr;
  664. dev->mr_table.fmr_mtt_buddy =
  665. &dev->mr_table.tavor_fmr.mtt_buddy;
  666. } else
  667. dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
  668. /* FMR table is always the first, take reserved MTTs out of there */
  669. if (dev->limits.reserved_mtts) {
  670. i = fls(dev->limits.reserved_mtts - 1);
  671. if (mthca_alloc_mtt_range(dev, i,
  672. dev->mr_table.fmr_mtt_buddy) == -1) {
  673. mthca_warn(dev, "MTT table of order %d is too small.\n",
  674. dev->mr_table.fmr_mtt_buddy->max_order);
  675. err = -ENOMEM;
  676. goto err_reserve_mtts;
  677. }
  678. }
  679. return 0;
  680. err_reserve_mtts:
  681. err_reserve_fmr:
  682. if (dev->limits.fmr_reserved_mtts)
  683. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  684. err_fmr_mtt_buddy:
  685. if (dev->mr_table.tavor_fmr.mtt_base)
  686. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  687. err_fmr_mtt:
  688. if (dev->mr_table.tavor_fmr.mpt_base)
  689. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  690. err_fmr_mpt:
  691. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  692. err_mtt_buddy:
  693. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  694. return err;
  695. }
  696. void mthca_cleanup_mr_table(struct mthca_dev *dev)
  697. {
  698. /* XXX check if any MRs are still allocated? */
  699. if (dev->limits.fmr_reserved_mtts)
  700. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  701. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  702. if (dev->mr_table.tavor_fmr.mtt_base)
  703. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  704. if (dev->mr_table.tavor_fmr.mpt_base)
  705. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  706. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  707. }