core.h 21 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef CORE_H
  18. #define CORE_H
  19. #include <linux/etherdevice.h>
  20. #include <linux/rtnetlink.h>
  21. #include <linux/firmware.h>
  22. #include <linux/sched.h>
  23. #include <linux/circ_buf.h>
  24. #include <net/cfg80211.h>
  25. #include "htc.h"
  26. #include "wmi.h"
  27. #include "bmi.h"
  28. #include "target.h"
  29. #define MAX_ATH6KL 1
  30. #define ATH6KL_MAX_RX_BUFFERS 16
  31. #define ATH6KL_BUFFER_SIZE 1664
  32. #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
  33. #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
  34. #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  35. #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
  36. #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
  37. #define USER_SAVEDKEYS_STAT_INIT 0
  38. #define USER_SAVEDKEYS_STAT_RUN 1
  39. #define ATH6KL_TX_TIMEOUT 10
  40. #define ATH6KL_MAX_ENDPOINTS 4
  41. #define MAX_NODE_NUM 15
  42. #define ATH6KL_APSD_ALL_FRAME 0xFFFF
  43. #define ATH6KL_APSD_NUM_OF_AC 0x4
  44. #define ATH6KL_APSD_FRAME_MASK 0xF
  45. /* Extra bytes for htc header alignment */
  46. #define ATH6KL_HTC_ALIGN_BYTES 3
  47. /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  48. #define MAX_DEF_COOKIE_NUM 180
  49. #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
  50. #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  51. #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  52. #define DISCON_TIMER_INTVAL 10000 /* in msec */
  53. #define A_DEFAULT_LISTEN_INTERVAL 1 /* beacon intervals */
  54. #define A_MAX_WOW_LISTEN_INTERVAL 1000
  55. /* Channel dwell time in fg scan */
  56. #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */
  57. /* includes also the null byte */
  58. #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
  59. enum ath6kl_fw_ie_type {
  60. ATH6KL_FW_IE_FW_VERSION = 0,
  61. ATH6KL_FW_IE_TIMESTAMP = 1,
  62. ATH6KL_FW_IE_OTP_IMAGE = 2,
  63. ATH6KL_FW_IE_FW_IMAGE = 3,
  64. ATH6KL_FW_IE_PATCH_IMAGE = 4,
  65. ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  66. ATH6KL_FW_IE_CAPABILITIES = 6,
  67. ATH6KL_FW_IE_PATCH_ADDR = 7,
  68. ATH6KL_FW_IE_BOARD_ADDR = 8,
  69. ATH6KL_FW_IE_VIF_MAX = 9,
  70. };
  71. enum ath6kl_fw_capability {
  72. ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  73. ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
  74. /*
  75. * Firmware is capable of supporting P2P mgmt operations on a
  76. * station interface. After group formation, the station
  77. * interface will become a P2P client/GO interface as the case may be
  78. */
  79. ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
  80. /* this needs to be last */
  81. ATH6KL_FW_CAPABILITY_MAX,
  82. };
  83. #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  84. struct ath6kl_fw_ie {
  85. __le32 id;
  86. __le32 len;
  87. u8 data[0];
  88. };
  89. #define ATH6KL_FW_API2_FILE "fw-2.bin"
  90. #define ATH6KL_FW_API3_FILE "fw-3.bin"
  91. /* AR6003 1.0 definitions */
  92. #define AR6003_HW_1_0_VERSION 0x300002ba
  93. /* AR6003 2.0 definitions */
  94. #define AR6003_HW_2_0_VERSION 0x30000384
  95. #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
  96. #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0"
  97. #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77"
  98. #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77"
  99. #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  100. #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin"
  101. #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
  102. #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
  103. "ath6k/AR6003/hw2.0/bdata.SD31.bin"
  104. /* AR6003 3.0 definitions */
  105. #define AR6003_HW_2_1_1_VERSION 0x30000582
  106. #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1"
  107. #define AR6003_HW_2_1_1_OTP_FILE "otp.bin"
  108. #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin"
  109. #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  110. #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin"
  111. #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
  112. #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin"
  113. #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
  114. #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
  115. "ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
  116. /* AR6004 1.0 definitions */
  117. #define AR6004_HW_1_0_VERSION 0x30000623
  118. #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0"
  119. #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin"
  120. #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin"
  121. #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
  122. "ath6k/AR6004/hw1.0/bdata.DB132.bin"
  123. /* AR6004 1.1 definitions */
  124. #define AR6004_HW_1_1_VERSION 0x30000001
  125. #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1"
  126. #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin"
  127. #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin"
  128. #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
  129. "ath6k/AR6004/hw1.1/bdata.DB132.bin"
  130. /* Per STA data, used in AP mode */
  131. #define STA_PS_AWAKE BIT(0)
  132. #define STA_PS_SLEEP BIT(1)
  133. #define STA_PS_POLLED BIT(2)
  134. #define STA_PS_APSD_TRIGGER BIT(3)
  135. #define STA_PS_APSD_EOSP BIT(4)
  136. /* HTC TX packet tagging definitions */
  137. #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
  138. #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
  139. #define AR6003_CUST_DATA_SIZE 16
  140. #define AGGR_WIN_IDX(x, y) ((x) % (y))
  141. #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
  142. #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
  143. #define ATH6KL_MAX_SEQ_NO 0xFFF
  144. #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
  145. #define NUM_OF_TIDS 8
  146. #define AGGR_SZ_DEFAULT 8
  147. #define AGGR_WIN_SZ_MIN 2
  148. #define AGGR_WIN_SZ_MAX 8
  149. #define TID_WINDOW_SZ(_x) ((_x) << 1)
  150. #define AGGR_NUM_OF_FREE_NETBUFS 16
  151. #define AGGR_RX_TIMEOUT 400 /* in ms */
  152. #define WMI_TIMEOUT (2 * HZ)
  153. #define MBOX_YIELD_LIMIT 99
  154. /* configuration lags */
  155. /*
  156. * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
  157. * ERP IE of beacon to determine the short premable support when
  158. * sending (Re)Assoc req.
  159. * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
  160. * module state transition failure events which happen during
  161. * scan, to the host.
  162. */
  163. #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
  164. #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
  165. #define ATH6KL_CONF_ENABLE_11N BIT(2)
  166. #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
  167. #define ATH6KL_CONF_UART_DEBUG BIT(4)
  168. enum wlan_low_pwr_state {
  169. WLAN_POWER_STATE_ON,
  170. WLAN_POWER_STATE_CUT_PWR,
  171. WLAN_POWER_STATE_DEEP_SLEEP,
  172. WLAN_POWER_STATE_WOW
  173. };
  174. enum sme_state {
  175. SME_DISCONNECTED,
  176. SME_CONNECTING,
  177. SME_CONNECTED
  178. };
  179. struct skb_hold_q {
  180. struct sk_buff *skb;
  181. bool is_amsdu;
  182. u16 seq_no;
  183. };
  184. struct rxtid {
  185. bool aggr;
  186. bool progress;
  187. bool timer_mon;
  188. u16 win_sz;
  189. u16 seq_next;
  190. u32 hold_q_sz;
  191. struct skb_hold_q *hold_q;
  192. struct sk_buff_head q;
  193. spinlock_t lock;
  194. };
  195. struct rxtid_stats {
  196. u32 num_into_aggr;
  197. u32 num_dups;
  198. u32 num_oow;
  199. u32 num_mpdu;
  200. u32 num_amsdu;
  201. u32 num_delivered;
  202. u32 num_timeouts;
  203. u32 num_hole;
  204. u32 num_bar;
  205. };
  206. struct aggr_info_conn {
  207. u8 aggr_sz;
  208. u8 timer_scheduled;
  209. struct timer_list timer;
  210. struct net_device *dev;
  211. struct rxtid rx_tid[NUM_OF_TIDS];
  212. struct rxtid_stats stat[NUM_OF_TIDS];
  213. struct aggr_info *aggr_info;
  214. };
  215. struct aggr_info {
  216. struct aggr_info_conn *aggr_conn;
  217. struct sk_buff_head rx_amsdu_freeq;
  218. };
  219. struct ath6kl_wep_key {
  220. u8 key_index;
  221. u8 key_len;
  222. u8 key[64];
  223. };
  224. #define ATH6KL_KEY_SEQ_LEN 8
  225. struct ath6kl_key {
  226. u8 key[WLAN_MAX_KEY_LEN];
  227. u8 key_len;
  228. u8 seq[ATH6KL_KEY_SEQ_LEN];
  229. u8 seq_len;
  230. u32 cipher;
  231. };
  232. struct ath6kl_node_mapping {
  233. u8 mac_addr[ETH_ALEN];
  234. u8 ep_id;
  235. u8 tx_pend;
  236. };
  237. struct ath6kl_cookie {
  238. struct sk_buff *skb;
  239. u32 map_no;
  240. struct htc_packet htc_pkt;
  241. struct ath6kl_cookie *arc_list_next;
  242. };
  243. struct ath6kl_mgmt_buff {
  244. struct list_head list;
  245. u32 freq;
  246. u32 wait;
  247. u32 id;
  248. bool no_cck;
  249. size_t len;
  250. u8 buf[0];
  251. };
  252. struct ath6kl_sta {
  253. u16 sta_flags;
  254. u8 mac[ETH_ALEN];
  255. u8 aid;
  256. u8 keymgmt;
  257. u8 ucipher;
  258. u8 auth;
  259. u8 wpa_ie[ATH6KL_MAX_IE];
  260. struct sk_buff_head psq;
  261. spinlock_t psq_lock;
  262. struct list_head mgmt_psq;
  263. size_t mgmt_psq_len;
  264. u8 apsd_info;
  265. struct sk_buff_head apsdq;
  266. struct aggr_info_conn *aggr_conn;
  267. };
  268. struct ath6kl_version {
  269. u32 target_ver;
  270. u32 wlan_ver;
  271. u32 abi_ver;
  272. };
  273. struct ath6kl_bmi {
  274. u32 cmd_credits;
  275. bool done_sent;
  276. u8 *cmd_buf;
  277. u32 max_data_size;
  278. u32 max_cmd_size;
  279. };
  280. struct target_stats {
  281. u64 tx_pkt;
  282. u64 tx_byte;
  283. u64 tx_ucast_pkt;
  284. u64 tx_ucast_byte;
  285. u64 tx_mcast_pkt;
  286. u64 tx_mcast_byte;
  287. u64 tx_bcast_pkt;
  288. u64 tx_bcast_byte;
  289. u64 tx_rts_success_cnt;
  290. u64 tx_pkt_per_ac[4];
  291. u64 tx_err;
  292. u64 tx_fail_cnt;
  293. u64 tx_retry_cnt;
  294. u64 tx_mult_retry_cnt;
  295. u64 tx_rts_fail_cnt;
  296. u64 rx_pkt;
  297. u64 rx_byte;
  298. u64 rx_ucast_pkt;
  299. u64 rx_ucast_byte;
  300. u64 rx_mcast_pkt;
  301. u64 rx_mcast_byte;
  302. u64 rx_bcast_pkt;
  303. u64 rx_bcast_byte;
  304. u64 rx_frgment_pkt;
  305. u64 rx_err;
  306. u64 rx_crc_err;
  307. u64 rx_key_cache_miss;
  308. u64 rx_decrypt_err;
  309. u64 rx_dupl_frame;
  310. u64 tkip_local_mic_fail;
  311. u64 tkip_cnter_measures_invoked;
  312. u64 tkip_replays;
  313. u64 tkip_fmt_err;
  314. u64 ccmp_fmt_err;
  315. u64 ccmp_replays;
  316. u64 pwr_save_fail_cnt;
  317. u64 cs_bmiss_cnt;
  318. u64 cs_low_rssi_cnt;
  319. u64 cs_connect_cnt;
  320. u64 cs_discon_cnt;
  321. s32 tx_ucast_rate;
  322. s32 rx_ucast_rate;
  323. u32 lq_val;
  324. u32 wow_pkt_dropped;
  325. u16 wow_evt_discarded;
  326. s16 noise_floor_calib;
  327. s16 cs_rssi;
  328. s16 cs_ave_beacon_rssi;
  329. u8 cs_ave_beacon_snr;
  330. u8 cs_last_roam_msec;
  331. u8 cs_snr;
  332. u8 wow_host_pkt_wakeups;
  333. u8 wow_host_evt_wakeups;
  334. u32 arp_received;
  335. u32 arp_matched;
  336. u32 arp_replied;
  337. };
  338. struct ath6kl_mbox_info {
  339. u32 htc_addr;
  340. u32 htc_ext_addr;
  341. u32 htc_ext_sz;
  342. u32 block_size;
  343. u32 gmbox_addr;
  344. u32 gmbox_sz;
  345. };
  346. /*
  347. * 802.11i defines an extended IV for use with non-WEP ciphers.
  348. * When the EXTIV bit is set in the key id byte an additional
  349. * 4 bytes immediately follow the IV for TKIP. For CCMP the
  350. * EXTIV bit is likewise set but the 8 bytes represent the
  351. * CCMP header rather than IV+extended-IV.
  352. */
  353. #define ATH6KL_KEYBUF_SIZE 16
  354. #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
  355. #define ATH6KL_KEY_XMIT 0x01
  356. #define ATH6KL_KEY_RECV 0x02
  357. #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
  358. /* Initial group key for AP mode */
  359. struct ath6kl_req_key {
  360. bool valid;
  361. u8 key_index;
  362. int key_type;
  363. u8 key[WLAN_MAX_KEY_LEN];
  364. u8 key_len;
  365. };
  366. enum ath6kl_hif_type {
  367. ATH6KL_HIF_TYPE_SDIO,
  368. ATH6KL_HIF_TYPE_USB,
  369. };
  370. /* Max number of filters that hw supports */
  371. #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
  372. struct ath6kl_mc_filter {
  373. struct list_head list;
  374. char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
  375. };
  376. /*
  377. * Driver's maximum limit, note that some firmwares support only one vif
  378. * and the runtime (current) limit must be checked from ar->vif_max.
  379. */
  380. #define ATH6KL_VIF_MAX 3
  381. /* vif flags info */
  382. enum ath6kl_vif_state {
  383. CONNECTED,
  384. CONNECT_PEND,
  385. WMM_ENABLED,
  386. NETQ_STOPPED,
  387. DTIM_EXPIRED,
  388. NETDEV_REGISTERED,
  389. CLEAR_BSSFILTER_ON_BEACON,
  390. DTIM_PERIOD_AVAIL,
  391. WLAN_ENABLED,
  392. STATS_UPDATE_PEND,
  393. HOST_SLEEP_MODE_CMD_PROCESSED,
  394. };
  395. struct ath6kl_vif {
  396. struct list_head list;
  397. struct wireless_dev wdev;
  398. struct net_device *ndev;
  399. struct ath6kl *ar;
  400. /* Lock to protect vif specific net_stats and flags */
  401. spinlock_t if_lock;
  402. u8 fw_vif_idx;
  403. unsigned long flags;
  404. int ssid_len;
  405. u8 ssid[IEEE80211_MAX_SSID_LEN];
  406. u8 dot11_auth_mode;
  407. u8 auth_mode;
  408. u8 prwise_crypto;
  409. u8 prwise_crypto_len;
  410. u8 grp_crypto;
  411. u8 grp_crypto_len;
  412. u8 def_txkey_index;
  413. u8 next_mode;
  414. u8 nw_type;
  415. u8 bssid[ETH_ALEN];
  416. u8 req_bssid[ETH_ALEN];
  417. u16 ch_hint;
  418. u16 bss_ch;
  419. struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
  420. struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
  421. struct aggr_info *aggr_cntxt;
  422. struct timer_list disconnect_timer;
  423. struct timer_list sched_scan_timer;
  424. struct cfg80211_scan_request *scan_req;
  425. enum sme_state sme_state;
  426. int reconnect_flag;
  427. u32 last_roc_id;
  428. u32 last_cancel_roc_id;
  429. u32 send_action_id;
  430. bool probe_req_report;
  431. u16 next_chan;
  432. u16 assoc_bss_beacon_int;
  433. u8 assoc_bss_dtim_period;
  434. struct net_device_stats net_stats;
  435. struct target_stats target_stats;
  436. struct list_head mc_filter;
  437. };
  438. #define WOW_LIST_ID 0
  439. #define WOW_HOST_REQ_DELAY 500 /* ms */
  440. #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
  441. /* Flag info */
  442. enum ath6kl_dev_state {
  443. WMI_ENABLED,
  444. WMI_READY,
  445. WMI_CTRL_EP_FULL,
  446. TESTMODE,
  447. DESTROY_IN_PROGRESS,
  448. SKIP_SCAN,
  449. ROAM_TBL_PEND,
  450. FIRST_BOOT,
  451. };
  452. enum ath6kl_state {
  453. ATH6KL_STATE_OFF,
  454. ATH6KL_STATE_ON,
  455. ATH6KL_STATE_SUSPENDING,
  456. ATH6KL_STATE_RESUMING,
  457. ATH6KL_STATE_DEEPSLEEP,
  458. ATH6KL_STATE_CUTPOWER,
  459. ATH6KL_STATE_WOW,
  460. ATH6KL_STATE_SCHED_SCAN,
  461. };
  462. struct ath6kl {
  463. struct device *dev;
  464. struct wiphy *wiphy;
  465. enum ath6kl_state state;
  466. unsigned int testmode;
  467. struct ath6kl_bmi bmi;
  468. const struct ath6kl_hif_ops *hif_ops;
  469. struct wmi *wmi;
  470. int tx_pending[ENDPOINT_MAX];
  471. int total_tx_data_pend;
  472. struct htc_target *htc_target;
  473. enum ath6kl_hif_type hif_type;
  474. void *hif_priv;
  475. struct list_head vif_list;
  476. /* Lock to avoid race in vif_list entries among add/del/traverse */
  477. spinlock_t list_lock;
  478. u8 num_vif;
  479. unsigned int vif_max;
  480. u8 max_norm_iface;
  481. u8 avail_idx_map;
  482. spinlock_t lock;
  483. struct semaphore sem;
  484. u16 listen_intvl_b;
  485. u8 lrssi_roam_threshold;
  486. struct ath6kl_version version;
  487. u32 target_type;
  488. u8 tx_pwr;
  489. struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
  490. u8 ibss_ps_enable;
  491. bool ibss_if_active;
  492. u8 node_num;
  493. u8 next_ep_id;
  494. struct ath6kl_cookie *cookie_list;
  495. u32 cookie_count;
  496. enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
  497. bool ac_stream_active[WMM_NUM_AC];
  498. u8 ac_stream_pri_map[WMM_NUM_AC];
  499. u8 hiac_stream_active_pri;
  500. u8 ep2ac_map[ENDPOINT_MAX];
  501. enum htc_endpoint_id ctrl_ep;
  502. struct ath6kl_htc_credit_info credit_state_info;
  503. u32 connect_ctrl_flags;
  504. u32 user_key_ctrl;
  505. u8 usr_bss_filter;
  506. struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
  507. u8 sta_list_index;
  508. struct ath6kl_req_key ap_mode_bkey;
  509. struct sk_buff_head mcastpsq;
  510. spinlock_t mcastpsq_lock;
  511. u8 intra_bss;
  512. struct wmi_ap_mode_stat ap_stats;
  513. u8 ap_country_code[3];
  514. struct list_head amsdu_rx_buffer_queue;
  515. u8 rx_meta_ver;
  516. enum wlan_low_pwr_state wlan_pwr_state;
  517. u8 mac_addr[ETH_ALEN];
  518. #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
  519. struct {
  520. void *rx_report;
  521. size_t rx_report_len;
  522. } tm;
  523. struct ath6kl_hw {
  524. u32 id;
  525. const char *name;
  526. u32 dataset_patch_addr;
  527. u32 app_load_addr;
  528. u32 app_start_override_addr;
  529. u32 board_ext_data_addr;
  530. u32 reserved_ram_size;
  531. u32 board_addr;
  532. u32 refclk_hz;
  533. u32 uarttx_pin;
  534. u32 testscript_addr;
  535. struct ath6kl_hw_fw {
  536. const char *dir;
  537. const char *otp;
  538. const char *fw;
  539. const char *tcmd;
  540. const char *patch;
  541. const char *utf;
  542. const char *testscript;
  543. } fw;
  544. const char *fw_board;
  545. const char *fw_default_board;
  546. } hw;
  547. u16 conf_flags;
  548. u16 suspend_mode;
  549. u16 wow_suspend_mode;
  550. wait_queue_head_t event_wq;
  551. struct ath6kl_mbox_info mbox_info;
  552. struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
  553. unsigned long flag;
  554. u8 *fw_board;
  555. size_t fw_board_len;
  556. u8 *fw_otp;
  557. size_t fw_otp_len;
  558. u8 *fw;
  559. size_t fw_len;
  560. u8 *fw_patch;
  561. size_t fw_patch_len;
  562. u8 *fw_testscript;
  563. size_t fw_testscript_len;
  564. unsigned int fw_api;
  565. unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
  566. struct workqueue_struct *ath6kl_wq;
  567. struct dentry *debugfs_phy;
  568. bool p2p;
  569. bool wiphy_registered;
  570. #ifdef CONFIG_ATH6KL_DEBUG
  571. struct {
  572. struct sk_buff_head fwlog_queue;
  573. struct completion fwlog_completion;
  574. bool fwlog_open;
  575. u32 fwlog_mask;
  576. unsigned int dbgfs_diag_reg;
  577. u32 diag_reg_addr_wr;
  578. u32 diag_reg_val_wr;
  579. struct {
  580. unsigned int invalid_rate;
  581. } war_stats;
  582. u8 *roam_tbl;
  583. unsigned int roam_tbl_len;
  584. u8 keepalive;
  585. u8 disc_timeout;
  586. } debug;
  587. #endif /* CONFIG_ATH6KL_DEBUG */
  588. };
  589. static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
  590. {
  591. return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
  592. }
  593. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  594. u32 item_offset)
  595. {
  596. u32 addr = 0;
  597. if (ar->target_type == TARGET_TYPE_AR6003)
  598. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  599. else if (ar->target_type == TARGET_TYPE_AR6004)
  600. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  601. return addr;
  602. }
  603. int ath6kl_configure_target(struct ath6kl *ar);
  604. void ath6kl_detect_error(unsigned long ptr);
  605. void disconnect_timer_handler(unsigned long ptr);
  606. void init_netdev(struct net_device *dev);
  607. void ath6kl_cookie_init(struct ath6kl *ar);
  608. void ath6kl_cookie_cleanup(struct ath6kl *ar);
  609. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
  610. void ath6kl_tx_complete(void *context, struct list_head *packet_queue);
  611. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  612. struct htc_packet *packet);
  613. void ath6kl_stop_txrx(struct ath6kl *ar);
  614. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
  615. int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
  616. int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
  617. int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
  618. int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
  619. int ath6kl_read_fwlogs(struct ath6kl *ar);
  620. void ath6kl_init_profile_info(struct ath6kl_vif *vif);
  621. void ath6kl_tx_data_cleanup(struct ath6kl *ar);
  622. struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
  623. void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
  624. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
  625. struct aggr_info *aggr_init(struct ath6kl_vif *vif);
  626. void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
  627. struct aggr_info_conn *aggr_conn);
  628. void ath6kl_rx_refill(struct htc_target *target,
  629. enum htc_endpoint_id endpoint);
  630. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
  631. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  632. enum htc_endpoint_id endpoint,
  633. int len);
  634. void aggr_module_destroy(struct aggr_info *aggr_info);
  635. void aggr_reset_state(struct aggr_info_conn *aggr_conn);
  636. struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr);
  637. struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
  638. void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver);
  639. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  640. enum htc_endpoint_id eid);
  641. void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
  642. u8 *bssid, u16 listen_int,
  643. u16 beacon_int, enum network_type net_type,
  644. u8 beacon_ie_len, u8 assoc_req_len,
  645. u8 assoc_resp_len, u8 *assoc_info);
  646. void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
  647. void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
  648. u8 keymgmt, u8 ucipher, u8 auth,
  649. u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
  650. void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
  651. u8 *bssid, u8 assoc_resp_len,
  652. u8 *assoc_info, u16 prot_reason_status);
  653. void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
  654. void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
  655. void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
  656. void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
  657. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
  658. enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
  659. void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
  660. void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
  661. void ath6kl_disconnect(struct ath6kl_vif *vif);
  662. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
  663. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  664. u8 win_sz);
  665. void ath6kl_wakeup_event(void *dev);
  666. void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
  667. bool wait_fot_compltn, bool cold_reset);
  668. void ath6kl_init_control_info(struct ath6kl_vif *vif);
  669. struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
  670. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
  671. int ath6kl_init_hw_start(struct ath6kl *ar);
  672. int ath6kl_init_hw_stop(struct ath6kl *ar);
  673. int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
  674. int ath6kl_init_hw_params(struct ath6kl *ar);
  675. void ath6kl_check_wow_status(struct ath6kl *ar);
  676. struct ath6kl *ath6kl_core_create(struct device *dev);
  677. int ath6kl_core_init(struct ath6kl *ar);
  678. void ath6kl_core_cleanup(struct ath6kl *ar);
  679. void ath6kl_core_destroy(struct ath6kl *ar);
  680. #endif /* CORE_H */