Kconfig 3.1 KB

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  1. config SIBYTE_SB1250
  2. bool
  3. select HW_HAS_PCI
  4. select SIBYTE_HAS_LDT
  5. select SIBYTE_SB1xxx_SOC
  6. config SIBYTE_BCM1120
  7. bool
  8. select SIBYTE_BCM112X
  9. select SIBYTE_SB1xxx_SOC
  10. config SIBYTE_BCM1125
  11. bool
  12. select HW_HAS_PCI
  13. select SIBYTE_BCM112X
  14. select SIBYTE_SB1xxx_SOC
  15. config SIBYTE_BCM1125H
  16. bool
  17. select HW_HAS_PCI
  18. select SIBYTE_BCM112X
  19. select SIBYTE_HAS_LDT
  20. select SIBYTE_SB1xxx_SOC
  21. config SIBYTE_BCM112X
  22. bool
  23. select SIBYTE_SB1xxx_SOC
  24. config SIBYTE_SB1xxx_SOC
  25. bool
  26. depends on EXPERIMENTAL
  27. select DMA_COHERENT
  28. select SIBYTE_CFE
  29. select SWAP_IO_SPACE
  30. select SYS_SUPPORTS_32BIT_KERNEL
  31. select SYS_SUPPORTS_64BIT_KERNEL
  32. choice
  33. prompt "SiByte SOC Stepping"
  34. depends on SIBYTE_SB1xxx_SOC
  35. config CPU_SB1_PASS_1
  36. bool "1250 Pass1"
  37. depends on SIBYTE_SB1250
  38. select CPU_HAS_PREFETCH
  39. config CPU_SB1_PASS_2_1250
  40. bool "1250 An"
  41. depends on SIBYTE_SB1250
  42. select CPU_SB1_PASS_2
  43. help
  44. Also called BCM1250 Pass 2
  45. config CPU_SB1_PASS_2_2
  46. bool "1250 Bn"
  47. depends on SIBYTE_SB1250
  48. select CPU_HAS_PREFETCH
  49. help
  50. Also called BCM1250 Pass 2.2
  51. config CPU_SB1_PASS_4
  52. bool "1250 Cn"
  53. depends on SIBYTE_SB1250
  54. select CPU_HAS_PREFETCH
  55. help
  56. Also called BCM1250 Pass 3
  57. config CPU_SB1_PASS_2_112x
  58. bool "112x Hybrid"
  59. depends on SIBYTE_BCM112X
  60. select CPU_SB1_PASS_2
  61. config CPU_SB1_PASS_3
  62. bool "112x An"
  63. depends on SIBYTE_BCM112X
  64. select CPU_HAS_PREFETCH
  65. endchoice
  66. config CPU_SB1_PASS_2
  67. bool
  68. config SIBYTE_HAS_LDT
  69. bool
  70. depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
  71. default y
  72. config SIMULATION
  73. bool "Running under simulation"
  74. depends on SIBYTE_SB1xxx_SOC
  75. help
  76. Build a kernel suitable for running under the GDB simulator.
  77. Primarily adjusts the kernel's notion of time.
  78. config SIBYTE_CFE
  79. bool "Booting from CFE"
  80. depends on SIBYTE_SB1xxx_SOC
  81. help
  82. Make use of the CFE API for enumerating available memory,
  83. controlling secondary CPUs, and possibly console output.
  84. config SIBYTE_CFE_CONSOLE
  85. bool "Use firmware console"
  86. depends on SIBYTE_CFE
  87. help
  88. Use the CFE API's console write routines during boot. Other console
  89. options (VT console, sb1250 duart console, etc.) should not be
  90. configured.
  91. config SIBYTE_STANDALONE
  92. bool
  93. depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
  94. default y
  95. config SIBYTE_STANDALONE_RAM_SIZE
  96. int "Memory size (in megabytes)"
  97. depends on SIBYTE_STANDALONE
  98. default "32"
  99. config SIBYTE_BUS_WATCHER
  100. bool "Support for Bus Watcher statistics"
  101. depends on SIBYTE_SB1xxx_SOC
  102. help
  103. Handle and keep statistics on the bus error interrupts (COR_ECC,
  104. BAD_ECC, IO_BUS).
  105. config SIBYTE_BW_TRACE
  106. bool "Capture bus trace before bus error"
  107. depends on SIBYTE_BUS_WATCHER
  108. help
  109. Run a continuous bus trace, dumping the raw data as soon as
  110. a ZBbus error is detected. Cannot work if ZBbus profiling
  111. is turned on, and also will interfere with JTAG-based trace
  112. buffer activity. Raw buffer data is dumped to console, and
  113. must be processed off-line.
  114. config SIBYTE_SB1250_PROF
  115. bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
  116. depends on SIBYTE_SB1xxx_SOC
  117. config SIBYTE_TBPROF
  118. bool "Support for ZBbus profiling"
  119. depends on SIBYTE_SB1xxx_SOC