ql4_mbx.c 35 KB

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  1. /*
  2. * QLogic iSCSI HBA Driver
  3. * Copyright (c) 2003-2006 QLogic Corporation
  4. *
  5. * See LICENSE.qla4xxx for copyright and licensing details.
  6. */
  7. #include "ql4_def.h"
  8. #include "ql4_glbl.h"
  9. #include "ql4_dbg.h"
  10. #include "ql4_inline.h"
  11. /**
  12. * qla4xxx_mailbox_command - issues mailbox commands
  13. * @ha: Pointer to host adapter structure.
  14. * @inCount: number of mailbox registers to load.
  15. * @outCount: number of mailbox registers to return.
  16. * @mbx_cmd: data pointer for mailbox in registers.
  17. * @mbx_sts: data pointer for mailbox out registers.
  18. *
  19. * This routine isssue mailbox commands and waits for completion.
  20. * If outCount is 0, this routine completes successfully WITHOUT waiting
  21. * for the mailbox command to complete.
  22. **/
  23. int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
  24. uint8_t outCount, uint32_t *mbx_cmd,
  25. uint32_t *mbx_sts)
  26. {
  27. int status = QLA_ERROR;
  28. uint8_t i;
  29. u_long wait_count;
  30. uint32_t intr_status;
  31. unsigned long flags = 0;
  32. /* Make sure that pointers are valid */
  33. if (!mbx_cmd || !mbx_sts) {
  34. DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
  35. "pointer\n", ha->host_no, __func__));
  36. return status;
  37. }
  38. if (is_qla8022(ha) &&
  39. test_bit(AF_FW_RECOVERY, &ha->flags)) {
  40. DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: prematurely "
  41. "completing mbx cmd as firmware recovery detected\n",
  42. ha->host_no, __func__));
  43. return status;
  44. }
  45. if ((is_aer_supported(ha)) &&
  46. (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
  47. DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
  48. "timeout MBX Exiting.\n", ha->host_no, __func__));
  49. return status;
  50. }
  51. /* Mailbox code active */
  52. wait_count = MBOX_TOV * 100;
  53. while (wait_count--) {
  54. mutex_lock(&ha->mbox_sem);
  55. if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
  56. set_bit(AF_MBOX_COMMAND, &ha->flags);
  57. mutex_unlock(&ha->mbox_sem);
  58. break;
  59. }
  60. mutex_unlock(&ha->mbox_sem);
  61. if (!wait_count) {
  62. DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
  63. ha->host_no, __func__));
  64. return status;
  65. }
  66. msleep(10);
  67. }
  68. /* To prevent overwriting mailbox registers for a command that has
  69. * not yet been serviced, check to see if an active command
  70. * (AEN, IOCB, etc.) is interrupting, then service it.
  71. * -----------------------------------------------------------------
  72. */
  73. spin_lock_irqsave(&ha->hardware_lock, flags);
  74. if (is_qla8022(ha)) {
  75. intr_status = readl(&ha->qla4_8xxx_reg->host_int);
  76. if (intr_status & ISRX_82XX_RISC_INT) {
  77. /* Service existing interrupt */
  78. DEBUG2(printk("scsi%ld: %s: "
  79. "servicing existing interrupt\n",
  80. ha->host_no, __func__));
  81. intr_status = readl(&ha->qla4_8xxx_reg->host_status);
  82. ha->isp_ops->interrupt_service_routine(ha, intr_status);
  83. clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
  84. if (test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
  85. test_bit(AF_INTx_ENABLED, &ha->flags))
  86. qla4_8xxx_wr_32(ha,
  87. ha->nx_legacy_intr.tgt_mask_reg,
  88. 0xfbff);
  89. }
  90. } else {
  91. intr_status = readl(&ha->reg->ctrl_status);
  92. if (intr_status & CSR_SCSI_PROCESSOR_INTR) {
  93. /* Service existing interrupt */
  94. ha->isp_ops->interrupt_service_routine(ha, intr_status);
  95. clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
  96. }
  97. }
  98. ha->mbox_status_count = outCount;
  99. for (i = 0; i < outCount; i++)
  100. ha->mbox_status[i] = 0;
  101. if (is_qla8022(ha)) {
  102. /* Load all mailbox registers, except mailbox 0. */
  103. DEBUG5(
  104. printk("scsi%ld: %s: Cmd ", ha->host_no, __func__);
  105. for (i = 0; i < inCount; i++)
  106. printk("mb%d=%04x ", i, mbx_cmd[i]);
  107. printk("\n"));
  108. for (i = 1; i < inCount; i++)
  109. writel(mbx_cmd[i], &ha->qla4_8xxx_reg->mailbox_in[i]);
  110. writel(mbx_cmd[0], &ha->qla4_8xxx_reg->mailbox_in[0]);
  111. readl(&ha->qla4_8xxx_reg->mailbox_in[0]);
  112. writel(HINT_MBX_INT_PENDING, &ha->qla4_8xxx_reg->hint);
  113. } else {
  114. /* Load all mailbox registers, except mailbox 0. */
  115. for (i = 1; i < inCount; i++)
  116. writel(mbx_cmd[i], &ha->reg->mailbox[i]);
  117. /* Wakeup firmware */
  118. writel(mbx_cmd[0], &ha->reg->mailbox[0]);
  119. readl(&ha->reg->mailbox[0]);
  120. writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
  121. readl(&ha->reg->ctrl_status);
  122. }
  123. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  124. /* Wait for completion */
  125. /*
  126. * If we don't want status, don't wait for the mailbox command to
  127. * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
  128. * you must poll the inbound Interrupt Mask for completion.
  129. */
  130. if (outCount == 0) {
  131. status = QLA_SUCCESS;
  132. goto mbox_exit;
  133. }
  134. /*
  135. * Wait for completion: Poll or completion queue
  136. */
  137. if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
  138. test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
  139. test_bit(AF_ONLINE, &ha->flags) &&
  140. !test_bit(AF_HBA_GOING_AWAY, &ha->flags)) {
  141. /* Do not poll for completion. Use completion queue */
  142. set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
  143. wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
  144. clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
  145. } else {
  146. /* Poll for command to complete */
  147. wait_count = jiffies + MBOX_TOV * HZ;
  148. while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
  149. if (time_after_eq(jiffies, wait_count))
  150. break;
  151. /*
  152. * Service the interrupt.
  153. * The ISR will save the mailbox status registers
  154. * to a temporary storage location in the adapter
  155. * structure.
  156. */
  157. spin_lock_irqsave(&ha->hardware_lock, flags);
  158. if (is_qla8022(ha)) {
  159. intr_status =
  160. readl(&ha->qla4_8xxx_reg->host_int);
  161. if (intr_status & ISRX_82XX_RISC_INT) {
  162. ha->mbox_status_count = outCount;
  163. intr_status =
  164. readl(&ha->qla4_8xxx_reg->host_status);
  165. ha->isp_ops->interrupt_service_routine(
  166. ha, intr_status);
  167. if (test_bit(AF_INTERRUPTS_ON,
  168. &ha->flags) &&
  169. test_bit(AF_INTx_ENABLED,
  170. &ha->flags))
  171. qla4_8xxx_wr_32(ha,
  172. ha->nx_legacy_intr.tgt_mask_reg,
  173. 0xfbff);
  174. }
  175. } else {
  176. intr_status = readl(&ha->reg->ctrl_status);
  177. if (intr_status & INTR_PENDING) {
  178. /*
  179. * Service the interrupt.
  180. * The ISR will save the mailbox status
  181. * registers to a temporary storage
  182. * location in the adapter structure.
  183. */
  184. ha->mbox_status_count = outCount;
  185. ha->isp_ops->interrupt_service_routine(
  186. ha, intr_status);
  187. }
  188. }
  189. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  190. msleep(10);
  191. }
  192. }
  193. /* Check for mailbox timeout. */
  194. if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
  195. if (is_qla8022(ha) &&
  196. test_bit(AF_FW_RECOVERY, &ha->flags)) {
  197. DEBUG2(ql4_printk(KERN_INFO, ha,
  198. "scsi%ld: %s: prematurely completing mbx cmd as "
  199. "firmware recovery detected\n",
  200. ha->host_no, __func__));
  201. goto mbox_exit;
  202. }
  203. DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
  204. " Scheduling Adapter Reset\n", ha->host_no,
  205. mbx_cmd[0]));
  206. ha->mailbox_timeout_count++;
  207. mbx_sts[0] = (-1);
  208. set_bit(DPC_RESET_HA, &ha->dpc_flags);
  209. goto mbox_exit;
  210. }
  211. /*
  212. * Copy the mailbox out registers to the caller's mailbox in/out
  213. * structure.
  214. */
  215. spin_lock_irqsave(&ha->hardware_lock, flags);
  216. for (i = 0; i < outCount; i++)
  217. mbx_sts[i] = ha->mbox_status[i];
  218. /* Set return status and error flags (if applicable). */
  219. switch (ha->mbox_status[0]) {
  220. case MBOX_STS_COMMAND_COMPLETE:
  221. status = QLA_SUCCESS;
  222. break;
  223. case MBOX_STS_INTERMEDIATE_COMPLETION:
  224. status = QLA_SUCCESS;
  225. break;
  226. case MBOX_STS_BUSY:
  227. DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
  228. ha->host_no, __func__, mbx_cmd[0]));
  229. ha->mailbox_timeout_count++;
  230. break;
  231. default:
  232. DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
  233. "sts = %08X ****\n", ha->host_no, __func__,
  234. mbx_cmd[0], mbx_sts[0]));
  235. break;
  236. }
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. mbox_exit:
  239. mutex_lock(&ha->mbox_sem);
  240. clear_bit(AF_MBOX_COMMAND, &ha->flags);
  241. mutex_unlock(&ha->mbox_sem);
  242. clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
  243. return status;
  244. }
  245. void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
  246. {
  247. set_bit(AF_FW_RECOVERY, &ha->flags);
  248. ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
  249. ha->host_no, __func__);
  250. if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
  251. if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
  252. complete(&ha->mbx_intr_comp);
  253. ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
  254. "recovery, doing premature completion of "
  255. "mbx cmd\n", ha->host_no, __func__);
  256. } else {
  257. set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
  258. ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
  259. "recovery, doing premature completion of "
  260. "polling mbx cmd\n", ha->host_no, __func__);
  261. }
  262. }
  263. }
  264. static uint8_t
  265. qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
  266. uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
  267. {
  268. memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
  269. memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
  270. mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
  271. mbox_cmd[1] = 0;
  272. mbox_cmd[2] = LSDW(init_fw_cb_dma);
  273. mbox_cmd[3] = MSDW(init_fw_cb_dma);
  274. mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
  275. mbox_cmd[5] = (IFCB_VER_MAX << 8) | IFCB_VER_MIN;
  276. if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
  277. QLA_SUCCESS) {
  278. DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
  279. "MBOX_CMD_INITIALIZE_FIRMWARE"
  280. " failed w/ status %04X\n",
  281. ha->host_no, __func__, mbox_sts[0]));
  282. return QLA_ERROR;
  283. }
  284. return QLA_SUCCESS;
  285. }
  286. static uint8_t
  287. qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
  288. uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
  289. {
  290. memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
  291. memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
  292. mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
  293. mbox_cmd[2] = LSDW(init_fw_cb_dma);
  294. mbox_cmd[3] = MSDW(init_fw_cb_dma);
  295. mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
  296. if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
  297. QLA_SUCCESS) {
  298. DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
  299. "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
  300. " failed w/ status %04X\n",
  301. ha->host_no, __func__, mbox_sts[0]));
  302. return QLA_ERROR;
  303. }
  304. return QLA_SUCCESS;
  305. }
  306. static void
  307. qla4xxx_update_local_ip(struct scsi_qla_host *ha,
  308. struct addr_ctrl_blk *init_fw_cb)
  309. {
  310. /* Save IPv4 Address Info */
  311. memcpy(ha->ip_address, init_fw_cb->ipv4_addr,
  312. min(sizeof(ha->ip_address), sizeof(init_fw_cb->ipv4_addr)));
  313. memcpy(ha->subnet_mask, init_fw_cb->ipv4_subnet,
  314. min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->ipv4_subnet)));
  315. memcpy(ha->gateway, init_fw_cb->ipv4_gw_addr,
  316. min(sizeof(ha->gateway), sizeof(init_fw_cb->ipv4_gw_addr)));
  317. if (is_ipv6_enabled(ha)) {
  318. /* Save IPv6 Address */
  319. ha->ipv6_link_local_state = init_fw_cb->ipv6_lnk_lcl_addr_state;
  320. ha->ipv6_addr0_state = init_fw_cb->ipv6_addr0_state;
  321. ha->ipv6_addr1_state = init_fw_cb->ipv6_addr1_state;
  322. ha->ipv6_default_router_state = init_fw_cb->ipv6_dflt_rtr_state;
  323. ha->ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
  324. ha->ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
  325. memcpy(&ha->ipv6_link_local_addr.in6_u.u6_addr8[8],
  326. init_fw_cb->ipv6_if_id,
  327. min(sizeof(ha->ipv6_link_local_addr)/2,
  328. sizeof(init_fw_cb->ipv6_if_id)));
  329. memcpy(&ha->ipv6_addr0, init_fw_cb->ipv6_addr0,
  330. min(sizeof(ha->ipv6_addr0),
  331. sizeof(init_fw_cb->ipv6_addr0)));
  332. memcpy(&ha->ipv6_addr1, init_fw_cb->ipv6_addr1,
  333. min(sizeof(ha->ipv6_addr1),
  334. sizeof(init_fw_cb->ipv6_addr1)));
  335. memcpy(&ha->ipv6_default_router_addr,
  336. init_fw_cb->ipv6_dflt_rtr_addr,
  337. min(sizeof(ha->ipv6_default_router_addr),
  338. sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
  339. }
  340. }
  341. static uint8_t
  342. qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
  343. uint32_t *mbox_cmd,
  344. uint32_t *mbox_sts,
  345. struct addr_ctrl_blk *init_fw_cb,
  346. dma_addr_t init_fw_cb_dma)
  347. {
  348. if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
  349. != QLA_SUCCESS) {
  350. DEBUG2(printk(KERN_WARNING
  351. "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
  352. ha->host_no, __func__));
  353. return QLA_ERROR;
  354. }
  355. DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
  356. /* Save some info in adapter structure. */
  357. ha->acb_version = init_fw_cb->acb_version;
  358. ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
  359. ha->tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
  360. ha->ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
  361. ha->ipv4_addr_state = le16_to_cpu(init_fw_cb->ipv4_addr_state);
  362. ha->heartbeat_interval = init_fw_cb->hb_interval;
  363. memcpy(ha->name_string, init_fw_cb->iscsi_name,
  364. min(sizeof(ha->name_string),
  365. sizeof(init_fw_cb->iscsi_name)));
  366. /*memcpy(ha->alias, init_fw_cb->Alias,
  367. min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
  368. /* Save Command Line Paramater info */
  369. ha->discovery_wait = ql4xdiscoverywait;
  370. if (ha->acb_version == ACB_SUPPORTED) {
  371. ha->ipv6_options = init_fw_cb->ipv6_opts;
  372. ha->ipv6_addl_options = init_fw_cb->ipv6_addtl_opts;
  373. }
  374. qla4xxx_update_local_ip(ha, init_fw_cb);
  375. return QLA_SUCCESS;
  376. }
  377. /**
  378. * qla4xxx_initialize_fw_cb - initializes firmware control block.
  379. * @ha: Pointer to host adapter structure.
  380. **/
  381. int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
  382. {
  383. struct addr_ctrl_blk *init_fw_cb;
  384. dma_addr_t init_fw_cb_dma;
  385. uint32_t mbox_cmd[MBOX_REG_COUNT];
  386. uint32_t mbox_sts[MBOX_REG_COUNT];
  387. int status = QLA_ERROR;
  388. init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
  389. sizeof(struct addr_ctrl_blk),
  390. &init_fw_cb_dma, GFP_KERNEL);
  391. if (init_fw_cb == NULL) {
  392. DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
  393. ha->host_no, __func__));
  394. goto exit_init_fw_cb_no_free;
  395. }
  396. memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
  397. /* Get Initialize Firmware Control Block. */
  398. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  399. memset(&mbox_sts, 0, sizeof(mbox_sts));
  400. if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
  401. QLA_SUCCESS) {
  402. dma_free_coherent(&ha->pdev->dev,
  403. sizeof(struct addr_ctrl_blk),
  404. init_fw_cb, init_fw_cb_dma);
  405. goto exit_init_fw_cb;
  406. }
  407. /* Initialize request and response queues. */
  408. qla4xxx_init_rings(ha);
  409. /* Fill in the request and response queue information. */
  410. init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
  411. init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
  412. init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
  413. init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
  414. init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
  415. init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
  416. init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
  417. init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
  418. init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
  419. init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
  420. /* Set up required options. */
  421. init_fw_cb->fw_options |=
  422. __constant_cpu_to_le16(FWOPT_SESSION_MODE |
  423. FWOPT_INITIATOR_MODE);
  424. init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
  425. if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
  426. != QLA_SUCCESS) {
  427. DEBUG2(printk(KERN_WARNING
  428. "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
  429. ha->host_no, __func__));
  430. goto exit_init_fw_cb;
  431. }
  432. if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
  433. init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
  434. DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
  435. ha->host_no, __func__));
  436. goto exit_init_fw_cb;
  437. }
  438. status = QLA_SUCCESS;
  439. exit_init_fw_cb:
  440. dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
  441. init_fw_cb, init_fw_cb_dma);
  442. exit_init_fw_cb_no_free:
  443. return status;
  444. }
  445. /**
  446. * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
  447. * @ha: Pointer to host adapter structure.
  448. **/
  449. int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
  450. {
  451. struct addr_ctrl_blk *init_fw_cb;
  452. dma_addr_t init_fw_cb_dma;
  453. uint32_t mbox_cmd[MBOX_REG_COUNT];
  454. uint32_t mbox_sts[MBOX_REG_COUNT];
  455. init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
  456. sizeof(struct addr_ctrl_blk),
  457. &init_fw_cb_dma, GFP_KERNEL);
  458. if (init_fw_cb == NULL) {
  459. printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
  460. __func__);
  461. return QLA_ERROR;
  462. }
  463. /* Get Initialize Firmware Control Block. */
  464. memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
  465. if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
  466. QLA_SUCCESS) {
  467. DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
  468. ha->host_no, __func__));
  469. dma_free_coherent(&ha->pdev->dev,
  470. sizeof(struct addr_ctrl_blk),
  471. init_fw_cb, init_fw_cb_dma);
  472. return QLA_ERROR;
  473. }
  474. /* Save IP Address. */
  475. qla4xxx_update_local_ip(ha, init_fw_cb);
  476. dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
  477. init_fw_cb, init_fw_cb_dma);
  478. return QLA_SUCCESS;
  479. }
  480. /**
  481. * qla4xxx_get_firmware_state - gets firmware state of HBA
  482. * @ha: Pointer to host adapter structure.
  483. **/
  484. int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
  485. {
  486. uint32_t mbox_cmd[MBOX_REG_COUNT];
  487. uint32_t mbox_sts[MBOX_REG_COUNT];
  488. /* Get firmware version */
  489. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  490. memset(&mbox_sts, 0, sizeof(mbox_sts));
  491. mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
  492. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
  493. QLA_SUCCESS) {
  494. DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
  495. "status %04X\n", ha->host_no, __func__,
  496. mbox_sts[0]));
  497. return QLA_ERROR;
  498. }
  499. ha->firmware_state = mbox_sts[1];
  500. ha->board_id = mbox_sts[2];
  501. ha->addl_fw_state = mbox_sts[3];
  502. DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
  503. ha->host_no, __func__, ha->firmware_state);)
  504. return QLA_SUCCESS;
  505. }
  506. /**
  507. * qla4xxx_get_firmware_status - retrieves firmware status
  508. * @ha: Pointer to host adapter structure.
  509. **/
  510. int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
  511. {
  512. uint32_t mbox_cmd[MBOX_REG_COUNT];
  513. uint32_t mbox_sts[MBOX_REG_COUNT];
  514. /* Get firmware version */
  515. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  516. memset(&mbox_sts, 0, sizeof(mbox_sts));
  517. mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
  518. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
  519. QLA_SUCCESS) {
  520. DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
  521. "status %04X\n", ha->host_no, __func__,
  522. mbox_sts[0]));
  523. return QLA_ERROR;
  524. }
  525. ql4_printk(KERN_INFO, ha, "%ld firmare IOCBs available (%d).\n",
  526. ha->host_no, mbox_cmd[2]);
  527. return QLA_SUCCESS;
  528. }
  529. /**
  530. * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
  531. * @ha: Pointer to host adapter structure.
  532. * @fw_ddb_index: Firmware's device database index
  533. * @fw_ddb_entry: Pointer to firmware's device database entry structure
  534. * @num_valid_ddb_entries: Pointer to number of valid ddb entries
  535. * @next_ddb_index: Pointer to next valid device database index
  536. * @fw_ddb_device_state: Pointer to device state
  537. **/
  538. int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
  539. uint16_t fw_ddb_index,
  540. struct dev_db_entry *fw_ddb_entry,
  541. dma_addr_t fw_ddb_entry_dma,
  542. uint32_t *num_valid_ddb_entries,
  543. uint32_t *next_ddb_index,
  544. uint32_t *fw_ddb_device_state,
  545. uint32_t *conn_err_detail,
  546. uint16_t *tcp_source_port_num,
  547. uint16_t *connection_id)
  548. {
  549. int status = QLA_ERROR;
  550. uint16_t options;
  551. uint32_t mbox_cmd[MBOX_REG_COUNT];
  552. uint32_t mbox_sts[MBOX_REG_COUNT];
  553. /* Make sure the device index is valid */
  554. if (fw_ddb_index >= MAX_DDB_ENTRIES) {
  555. DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
  556. ha->host_no, __func__, fw_ddb_index));
  557. goto exit_get_fwddb;
  558. }
  559. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  560. memset(&mbox_sts, 0, sizeof(mbox_sts));
  561. mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
  562. mbox_cmd[1] = (uint32_t) fw_ddb_index;
  563. mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
  564. mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
  565. mbox_cmd[4] = sizeof(struct dev_db_entry);
  566. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
  567. QLA_ERROR) {
  568. DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
  569. " with status 0x%04X\n", ha->host_no, __func__,
  570. mbox_sts[0]));
  571. goto exit_get_fwddb;
  572. }
  573. if (fw_ddb_index != mbox_sts[1]) {
  574. DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
  575. ha->host_no, __func__, fw_ddb_index,
  576. mbox_sts[1]));
  577. goto exit_get_fwddb;
  578. }
  579. if (fw_ddb_entry) {
  580. options = le16_to_cpu(fw_ddb_entry->options);
  581. if (options & DDB_OPT_IPV6_DEVICE) {
  582. ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
  583. "Next %d State %04x ConnErr %08x %pI6 "
  584. ":%04d \"%s\"\n", __func__, fw_ddb_index,
  585. mbox_sts[0], mbox_sts[2], mbox_sts[3],
  586. mbox_sts[4], mbox_sts[5],
  587. fw_ddb_entry->ip_addr,
  588. le16_to_cpu(fw_ddb_entry->port),
  589. fw_ddb_entry->iscsi_name);
  590. } else {
  591. ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
  592. "Next %d State %04x ConnErr %08x %pI4 "
  593. ":%04d \"%s\"\n", __func__, fw_ddb_index,
  594. mbox_sts[0], mbox_sts[2], mbox_sts[3],
  595. mbox_sts[4], mbox_sts[5],
  596. fw_ddb_entry->ip_addr,
  597. le16_to_cpu(fw_ddb_entry->port),
  598. fw_ddb_entry->iscsi_name);
  599. }
  600. }
  601. if (num_valid_ddb_entries)
  602. *num_valid_ddb_entries = mbox_sts[2];
  603. if (next_ddb_index)
  604. *next_ddb_index = mbox_sts[3];
  605. if (fw_ddb_device_state)
  606. *fw_ddb_device_state = mbox_sts[4];
  607. /*
  608. * RA: This mailbox has been changed to pass connection error and
  609. * details. Its true for ISP4010 as per Version E - Not sure when it
  610. * was changed. Get the time2wait from the fw_dd_entry field :
  611. * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
  612. * struct.
  613. */
  614. if (conn_err_detail)
  615. *conn_err_detail = mbox_sts[5];
  616. if (tcp_source_port_num)
  617. *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
  618. if (connection_id)
  619. *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
  620. status = QLA_SUCCESS;
  621. exit_get_fwddb:
  622. return status;
  623. }
  624. /**
  625. * qla4xxx_set_fwddb_entry - sets a ddb entry.
  626. * @ha: Pointer to host adapter structure.
  627. * @fw_ddb_index: Firmware's device database index
  628. * @fw_ddb_entry: Pointer to firmware's ddb entry structure, or NULL.
  629. *
  630. * This routine initializes or updates the adapter's device database
  631. * entry for the specified device. It also triggers a login for the
  632. * specified device. Therefore, it may also be used as a secondary
  633. * login routine when a NULL pointer is specified for the fw_ddb_entry.
  634. **/
  635. int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
  636. dma_addr_t fw_ddb_entry_dma)
  637. {
  638. uint32_t mbox_cmd[MBOX_REG_COUNT];
  639. uint32_t mbox_sts[MBOX_REG_COUNT];
  640. int status;
  641. /* Do not wait for completion. The firmware will send us an
  642. * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
  643. */
  644. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  645. memset(&mbox_sts, 0, sizeof(mbox_sts));
  646. mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
  647. mbox_cmd[1] = (uint32_t) fw_ddb_index;
  648. mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
  649. mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
  650. mbox_cmd[4] = sizeof(struct dev_db_entry);
  651. status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
  652. &mbox_sts[0]);
  653. DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
  654. ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
  655. return status;
  656. }
  657. /**
  658. * qla4xxx_get_crash_record - retrieves crash record.
  659. * @ha: Pointer to host adapter structure.
  660. *
  661. * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
  662. **/
  663. void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
  664. {
  665. uint32_t mbox_cmd[MBOX_REG_COUNT];
  666. uint32_t mbox_sts[MBOX_REG_COUNT];
  667. struct crash_record *crash_record = NULL;
  668. dma_addr_t crash_record_dma = 0;
  669. uint32_t crash_record_size = 0;
  670. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  671. memset(&mbox_sts, 0, sizeof(mbox_cmd));
  672. /* Get size of crash record. */
  673. mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
  674. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
  675. QLA_SUCCESS) {
  676. DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
  677. ha->host_no, __func__));
  678. goto exit_get_crash_record;
  679. }
  680. crash_record_size = mbox_sts[4];
  681. if (crash_record_size == 0) {
  682. DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
  683. ha->host_no, __func__));
  684. goto exit_get_crash_record;
  685. }
  686. /* Alloc Memory for Crash Record. */
  687. crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
  688. &crash_record_dma, GFP_KERNEL);
  689. if (crash_record == NULL)
  690. goto exit_get_crash_record;
  691. /* Get Crash Record. */
  692. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  693. memset(&mbox_sts, 0, sizeof(mbox_cmd));
  694. mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
  695. mbox_cmd[2] = LSDW(crash_record_dma);
  696. mbox_cmd[3] = MSDW(crash_record_dma);
  697. mbox_cmd[4] = crash_record_size;
  698. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
  699. QLA_SUCCESS)
  700. goto exit_get_crash_record;
  701. /* Dump Crash Record. */
  702. exit_get_crash_record:
  703. if (crash_record)
  704. dma_free_coherent(&ha->pdev->dev, crash_record_size,
  705. crash_record, crash_record_dma);
  706. }
  707. /**
  708. * qla4xxx_get_conn_event_log - retrieves connection event log
  709. * @ha: Pointer to host adapter structure.
  710. **/
  711. void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
  712. {
  713. uint32_t mbox_cmd[MBOX_REG_COUNT];
  714. uint32_t mbox_sts[MBOX_REG_COUNT];
  715. struct conn_event_log_entry *event_log = NULL;
  716. dma_addr_t event_log_dma = 0;
  717. uint32_t event_log_size = 0;
  718. uint32_t num_valid_entries;
  719. uint32_t oldest_entry = 0;
  720. uint32_t max_event_log_entries;
  721. uint8_t i;
  722. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  723. memset(&mbox_sts, 0, sizeof(mbox_cmd));
  724. /* Get size of crash record. */
  725. mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
  726. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
  727. QLA_SUCCESS)
  728. goto exit_get_event_log;
  729. event_log_size = mbox_sts[4];
  730. if (event_log_size == 0)
  731. goto exit_get_event_log;
  732. /* Alloc Memory for Crash Record. */
  733. event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
  734. &event_log_dma, GFP_KERNEL);
  735. if (event_log == NULL)
  736. goto exit_get_event_log;
  737. /* Get Crash Record. */
  738. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  739. memset(&mbox_sts, 0, sizeof(mbox_cmd));
  740. mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
  741. mbox_cmd[2] = LSDW(event_log_dma);
  742. mbox_cmd[3] = MSDW(event_log_dma);
  743. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
  744. QLA_SUCCESS) {
  745. DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
  746. "log!\n", ha->host_no, __func__));
  747. goto exit_get_event_log;
  748. }
  749. /* Dump Event Log. */
  750. num_valid_entries = mbox_sts[1];
  751. max_event_log_entries = event_log_size /
  752. sizeof(struct conn_event_log_entry);
  753. if (num_valid_entries > max_event_log_entries)
  754. oldest_entry = num_valid_entries % max_event_log_entries;
  755. DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
  756. ha->host_no, num_valid_entries));
  757. if (ql4xextended_error_logging == 3) {
  758. if (oldest_entry == 0) {
  759. /* Circular Buffer has not wrapped around */
  760. for (i=0; i < num_valid_entries; i++) {
  761. qla4xxx_dump_buffer((uint8_t *)event_log+
  762. (i*sizeof(*event_log)),
  763. sizeof(*event_log));
  764. }
  765. }
  766. else {
  767. /* Circular Buffer has wrapped around -
  768. * display accordingly*/
  769. for (i=oldest_entry; i < max_event_log_entries; i++) {
  770. qla4xxx_dump_buffer((uint8_t *)event_log+
  771. (i*sizeof(*event_log)),
  772. sizeof(*event_log));
  773. }
  774. for (i=0; i < oldest_entry; i++) {
  775. qla4xxx_dump_buffer((uint8_t *)event_log+
  776. (i*sizeof(*event_log)),
  777. sizeof(*event_log));
  778. }
  779. }
  780. }
  781. exit_get_event_log:
  782. if (event_log)
  783. dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
  784. event_log_dma);
  785. }
  786. /**
  787. * qla4xxx_abort_task - issues Abort Task
  788. * @ha: Pointer to host adapter structure.
  789. * @srb: Pointer to srb entry
  790. *
  791. * This routine performs a LUN RESET on the specified target/lun.
  792. * The caller must ensure that the ddb_entry and lun_entry pointers
  793. * are valid before calling this routine.
  794. **/
  795. int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
  796. {
  797. uint32_t mbox_cmd[MBOX_REG_COUNT];
  798. uint32_t mbox_sts[MBOX_REG_COUNT];
  799. struct scsi_cmnd *cmd = srb->cmd;
  800. int status = QLA_SUCCESS;
  801. unsigned long flags = 0;
  802. uint32_t index;
  803. /*
  804. * Send abort task command to ISP, so that the ISP will return
  805. * request with ABORT status
  806. */
  807. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  808. memset(&mbox_sts, 0, sizeof(mbox_sts));
  809. spin_lock_irqsave(&ha->hardware_lock, flags);
  810. index = (unsigned long)(unsigned char *)cmd->host_scribble;
  811. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  812. /* Firmware already posted completion on response queue */
  813. if (index == MAX_SRBS)
  814. return status;
  815. mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
  816. mbox_cmd[1] = srb->fw_ddb_index;
  817. mbox_cmd[2] = index;
  818. /* Immediate Command Enable */
  819. mbox_cmd[5] = 0x01;
  820. qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
  821. &mbox_sts[0]);
  822. if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
  823. status = QLA_ERROR;
  824. DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%d: abort task FAILED: "
  825. "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
  826. ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
  827. mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
  828. }
  829. return status;
  830. }
  831. /**
  832. * qla4xxx_reset_lun - issues LUN Reset
  833. * @ha: Pointer to host adapter structure.
  834. * @ddb_entry: Pointer to device database entry
  835. * @lun: lun number
  836. *
  837. * This routine performs a LUN RESET on the specified target/lun.
  838. * The caller must ensure that the ddb_entry and lun_entry pointers
  839. * are valid before calling this routine.
  840. **/
  841. int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
  842. int lun)
  843. {
  844. uint32_t mbox_cmd[MBOX_REG_COUNT];
  845. uint32_t mbox_sts[MBOX_REG_COUNT];
  846. int status = QLA_SUCCESS;
  847. DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
  848. ddb_entry->fw_ddb_index, lun));
  849. /*
  850. * Send lun reset command to ISP, so that the ISP will return all
  851. * outstanding requests with RESET status
  852. */
  853. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  854. memset(&mbox_sts, 0, sizeof(mbox_sts));
  855. mbox_cmd[0] = MBOX_CMD_LUN_RESET;
  856. mbox_cmd[1] = ddb_entry->fw_ddb_index;
  857. mbox_cmd[2] = lun << 8;
  858. mbox_cmd[5] = 0x01; /* Immediate Command Enable */
  859. qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
  860. if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
  861. mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
  862. status = QLA_ERROR;
  863. return status;
  864. }
  865. /**
  866. * qla4xxx_reset_target - issues target Reset
  867. * @ha: Pointer to host adapter structure.
  868. * @db_entry: Pointer to device database entry
  869. * @un_entry: Pointer to lun entry structure
  870. *
  871. * This routine performs a TARGET RESET on the specified target.
  872. * The caller must ensure that the ddb_entry pointers
  873. * are valid before calling this routine.
  874. **/
  875. int qla4xxx_reset_target(struct scsi_qla_host *ha,
  876. struct ddb_entry *ddb_entry)
  877. {
  878. uint32_t mbox_cmd[MBOX_REG_COUNT];
  879. uint32_t mbox_sts[MBOX_REG_COUNT];
  880. int status = QLA_SUCCESS;
  881. DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
  882. ddb_entry->fw_ddb_index));
  883. /*
  884. * Send target reset command to ISP, so that the ISP will return all
  885. * outstanding requests with RESET status
  886. */
  887. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  888. memset(&mbox_sts, 0, sizeof(mbox_sts));
  889. mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
  890. mbox_cmd[1] = ddb_entry->fw_ddb_index;
  891. mbox_cmd[5] = 0x01; /* Immediate Command Enable */
  892. qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
  893. &mbox_sts[0]);
  894. if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
  895. mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
  896. status = QLA_ERROR;
  897. return status;
  898. }
  899. int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
  900. uint32_t offset, uint32_t len)
  901. {
  902. uint32_t mbox_cmd[MBOX_REG_COUNT];
  903. uint32_t mbox_sts[MBOX_REG_COUNT];
  904. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  905. memset(&mbox_sts, 0, sizeof(mbox_sts));
  906. mbox_cmd[0] = MBOX_CMD_READ_FLASH;
  907. mbox_cmd[1] = LSDW(dma_addr);
  908. mbox_cmd[2] = MSDW(dma_addr);
  909. mbox_cmd[3] = offset;
  910. mbox_cmd[4] = len;
  911. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
  912. QLA_SUCCESS) {
  913. DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
  914. "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
  915. __func__, mbox_sts[0], mbox_sts[1], offset, len));
  916. return QLA_ERROR;
  917. }
  918. return QLA_SUCCESS;
  919. }
  920. /**
  921. * qla4xxx_get_fw_version - gets firmware version
  922. * @ha: Pointer to host adapter structure.
  923. *
  924. * Retrieves the firmware version on HBA. In QLA4010, mailboxes 2 & 3 may
  925. * hold an address for data. Make sure that we write 0 to those mailboxes,
  926. * if unused.
  927. **/
  928. int qla4xxx_get_fw_version(struct scsi_qla_host * ha)
  929. {
  930. uint32_t mbox_cmd[MBOX_REG_COUNT];
  931. uint32_t mbox_sts[MBOX_REG_COUNT];
  932. /* Get firmware version. */
  933. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  934. memset(&mbox_sts, 0, sizeof(mbox_sts));
  935. mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
  936. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
  937. QLA_SUCCESS) {
  938. DEBUG2(printk("scsi%ld: %s: MBOX_CMD_ABOUT_FW failed w/ "
  939. "status %04X\n", ha->host_no, __func__, mbox_sts[0]));
  940. return QLA_ERROR;
  941. }
  942. /* Save firmware version information. */
  943. ha->firmware_version[0] = mbox_sts[1];
  944. ha->firmware_version[1] = mbox_sts[2];
  945. ha->patch_number = mbox_sts[3];
  946. ha->build_number = mbox_sts[4];
  947. return QLA_SUCCESS;
  948. }
  949. static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha,
  950. dma_addr_t dma_addr)
  951. {
  952. uint32_t mbox_cmd[MBOX_REG_COUNT];
  953. uint32_t mbox_sts[MBOX_REG_COUNT];
  954. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  955. memset(&mbox_sts, 0, sizeof(mbox_sts));
  956. mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
  957. mbox_cmd[2] = LSDW(dma_addr);
  958. mbox_cmd[3] = MSDW(dma_addr);
  959. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
  960. QLA_SUCCESS) {
  961. DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
  962. ha->host_no, __func__, mbox_sts[0]));
  963. return QLA_ERROR;
  964. }
  965. return QLA_SUCCESS;
  966. }
  967. static int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t *ddb_index)
  968. {
  969. uint32_t mbox_cmd[MBOX_REG_COUNT];
  970. uint32_t mbox_sts[MBOX_REG_COUNT];
  971. memset(&mbox_cmd, 0, sizeof(mbox_cmd));
  972. memset(&mbox_sts, 0, sizeof(mbox_sts));
  973. mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
  974. mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES;
  975. if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
  976. QLA_SUCCESS) {
  977. if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) {
  978. *ddb_index = mbox_sts[2];
  979. } else {
  980. DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
  981. ha->host_no, __func__, mbox_sts[0]));
  982. return QLA_ERROR;
  983. }
  984. } else {
  985. *ddb_index = MAX_PRST_DEV_DB_ENTRIES;
  986. }
  987. return QLA_SUCCESS;
  988. }
  989. int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port)
  990. {
  991. struct dev_db_entry *fw_ddb_entry;
  992. dma_addr_t fw_ddb_entry_dma;
  993. uint32_t ddb_index;
  994. int ret_val = QLA_SUCCESS;
  995. fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev,
  996. sizeof(*fw_ddb_entry),
  997. &fw_ddb_entry_dma, GFP_KERNEL);
  998. if (!fw_ddb_entry) {
  999. DEBUG2(printk("scsi%ld: %s: Unable to allocate dma buffer.\n",
  1000. ha->host_no, __func__));
  1001. ret_val = QLA_ERROR;
  1002. goto exit_send_tgts_no_free;
  1003. }
  1004. ret_val = qla4xxx_get_default_ddb(ha, fw_ddb_entry_dma);
  1005. if (ret_val != QLA_SUCCESS)
  1006. goto exit_send_tgts;
  1007. ret_val = qla4xxx_req_ddb_entry(ha, &ddb_index);
  1008. if (ret_val != QLA_SUCCESS)
  1009. goto exit_send_tgts;
  1010. memset(fw_ddb_entry->iscsi_alias, 0,
  1011. sizeof(fw_ddb_entry->iscsi_alias));
  1012. memset(fw_ddb_entry->iscsi_name, 0,
  1013. sizeof(fw_ddb_entry->iscsi_name));
  1014. memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
  1015. memset(fw_ddb_entry->tgt_addr, 0,
  1016. sizeof(fw_ddb_entry->tgt_addr));
  1017. fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET);
  1018. fw_ddb_entry->port = cpu_to_le16(ntohs(port));
  1019. fw_ddb_entry->ip_addr[0] = *ip;
  1020. fw_ddb_entry->ip_addr[1] = *(ip + 1);
  1021. fw_ddb_entry->ip_addr[2] = *(ip + 2);
  1022. fw_ddb_entry->ip_addr[3] = *(ip + 3);
  1023. ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma);
  1024. exit_send_tgts:
  1025. dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
  1026. fw_ddb_entry, fw_ddb_entry_dma);
  1027. exit_send_tgts_no_free:
  1028. return ret_val;
  1029. }