wl1271_spi.c 10 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2008-2009 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/irq.h>
  24. #include <linux/module.h>
  25. #include <linux/crc7.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/spi/wl12xx.h>
  28. #include <linux/slab.h>
  29. #include "wl1271.h"
  30. #include "wl12xx_80211.h"
  31. #include "wl1271_io.h"
  32. #include "wl1271_reg.h"
  33. #define WSPI_CMD_READ 0x40000000
  34. #define WSPI_CMD_WRITE 0x00000000
  35. #define WSPI_CMD_FIXED 0x20000000
  36. #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
  37. #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
  38. #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
  39. #define WSPI_INIT_CMD_CRC_LEN 5
  40. #define WSPI_INIT_CMD_START 0x00
  41. #define WSPI_INIT_CMD_TX 0x40
  42. /* the extra bypass bit is sampled by the TNET as '1' */
  43. #define WSPI_INIT_CMD_BYPASS_BIT 0x80
  44. #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
  45. #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
  46. #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
  47. #define WSPI_INIT_CMD_IOD 0x40
  48. #define WSPI_INIT_CMD_IP 0x20
  49. #define WSPI_INIT_CMD_CS 0x10
  50. #define WSPI_INIT_CMD_WS 0x08
  51. #define WSPI_INIT_CMD_WSPI 0x01
  52. #define WSPI_INIT_CMD_END 0x01
  53. #define WSPI_INIT_CMD_LEN 8
  54. #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
  55. ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
  56. #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
  57. static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
  58. {
  59. return wl->if_priv;
  60. }
  61. static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
  62. {
  63. return &(wl_to_spi(wl)->dev);
  64. }
  65. static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
  66. {
  67. disable_irq(wl->irq);
  68. }
  69. static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
  70. {
  71. enable_irq(wl->irq);
  72. }
  73. static void wl1271_spi_reset(struct wl1271 *wl)
  74. {
  75. u8 *cmd;
  76. struct spi_transfer t;
  77. struct spi_message m;
  78. cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
  79. if (!cmd) {
  80. wl1271_error("could not allocate cmd for spi reset");
  81. return;
  82. }
  83. memset(&t, 0, sizeof(t));
  84. spi_message_init(&m);
  85. memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
  86. t.tx_buf = cmd;
  87. t.len = WSPI_INIT_CMD_LEN;
  88. spi_message_add_tail(&t, &m);
  89. spi_sync(wl_to_spi(wl), &m);
  90. kfree(cmd);
  91. wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
  92. }
  93. static void wl1271_spi_init(struct wl1271 *wl)
  94. {
  95. u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
  96. struct spi_transfer t;
  97. struct spi_message m;
  98. cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
  99. if (!cmd) {
  100. wl1271_error("could not allocate cmd for spi init");
  101. return;
  102. }
  103. memset(crc, 0, sizeof(crc));
  104. memset(&t, 0, sizeof(t));
  105. spi_message_init(&m);
  106. /*
  107. * Set WSPI_INIT_COMMAND
  108. * the data is being send from the MSB to LSB
  109. */
  110. cmd[2] = 0xff;
  111. cmd[3] = 0xff;
  112. cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
  113. cmd[0] = 0;
  114. cmd[7] = 0;
  115. cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
  116. cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
  117. if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
  118. cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
  119. else
  120. cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
  121. cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
  122. | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
  123. crc[0] = cmd[1];
  124. crc[1] = cmd[0];
  125. crc[2] = cmd[7];
  126. crc[3] = cmd[6];
  127. crc[4] = cmd[5];
  128. cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
  129. cmd[4] |= WSPI_INIT_CMD_END;
  130. t.tx_buf = cmd;
  131. t.len = WSPI_INIT_CMD_LEN;
  132. spi_message_add_tail(&t, &m);
  133. spi_sync(wl_to_spi(wl), &m);
  134. wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
  135. kfree(cmd);
  136. }
  137. #define WL1271_BUSY_WORD_TIMEOUT 1000
  138. static int wl1271_spi_read_busy(struct wl1271 *wl)
  139. {
  140. struct spi_transfer t[1];
  141. struct spi_message m;
  142. u32 *busy_buf;
  143. int num_busy_bytes = 0;
  144. /*
  145. * Read further busy words from SPI until a non-busy word is
  146. * encountered, then read the data itself into the buffer.
  147. */
  148. num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
  149. busy_buf = wl->buffer_busyword;
  150. while (num_busy_bytes) {
  151. num_busy_bytes--;
  152. spi_message_init(&m);
  153. memset(t, 0, sizeof(t));
  154. t[0].rx_buf = busy_buf;
  155. t[0].len = sizeof(u32);
  156. t[0].cs_change = true;
  157. spi_message_add_tail(&t[0], &m);
  158. spi_sync(wl_to_spi(wl), &m);
  159. if (*busy_buf & 0x1)
  160. return 0;
  161. }
  162. /* The SPI bus is unresponsive, the read failed. */
  163. wl1271_error("SPI read busy-word timeout!\n");
  164. return -ETIMEDOUT;
  165. }
  166. static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
  167. size_t len, bool fixed)
  168. {
  169. struct spi_transfer t[3];
  170. struct spi_message m;
  171. u32 *busy_buf;
  172. u32 *cmd;
  173. cmd = &wl->buffer_cmd;
  174. busy_buf = wl->buffer_busyword;
  175. *cmd = 0;
  176. *cmd |= WSPI_CMD_READ;
  177. *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
  178. *cmd |= addr & WSPI_CMD_BYTE_ADDR;
  179. if (fixed)
  180. *cmd |= WSPI_CMD_FIXED;
  181. spi_message_init(&m);
  182. memset(t, 0, sizeof(t));
  183. t[0].tx_buf = cmd;
  184. t[0].len = 4;
  185. t[0].cs_change = true;
  186. spi_message_add_tail(&t[0], &m);
  187. /* Busy and non busy words read */
  188. t[1].rx_buf = busy_buf;
  189. t[1].len = WL1271_BUSY_WORD_LEN;
  190. t[1].cs_change = true;
  191. spi_message_add_tail(&t[1], &m);
  192. spi_sync(wl_to_spi(wl), &m);
  193. if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
  194. wl1271_spi_read_busy(wl)) {
  195. memset(buf, 0, len);
  196. return;
  197. }
  198. spi_message_init(&m);
  199. memset(t, 0, sizeof(t));
  200. t[0].rx_buf = buf;
  201. t[0].len = len;
  202. t[0].cs_change = true;
  203. spi_message_add_tail(&t[0], &m);
  204. spi_sync(wl_to_spi(wl), &m);
  205. wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
  206. wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, len);
  207. }
  208. static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
  209. size_t len, bool fixed)
  210. {
  211. struct spi_transfer t[2];
  212. struct spi_message m;
  213. u32 *cmd;
  214. cmd = &wl->buffer_cmd;
  215. *cmd = 0;
  216. *cmd |= WSPI_CMD_WRITE;
  217. *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
  218. *cmd |= addr & WSPI_CMD_BYTE_ADDR;
  219. if (fixed)
  220. *cmd |= WSPI_CMD_FIXED;
  221. spi_message_init(&m);
  222. memset(t, 0, sizeof(t));
  223. t[0].tx_buf = cmd;
  224. t[0].len = sizeof(*cmd);
  225. spi_message_add_tail(&t[0], &m);
  226. t[1].tx_buf = buf;
  227. t[1].len = len;
  228. spi_message_add_tail(&t[1], &m);
  229. spi_sync(wl_to_spi(wl), &m);
  230. wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
  231. wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, len);
  232. }
  233. static irqreturn_t wl1271_irq(int irq, void *cookie)
  234. {
  235. struct wl1271 *wl;
  236. unsigned long flags;
  237. wl1271_debug(DEBUG_IRQ, "IRQ");
  238. wl = cookie;
  239. /* complete the ELP completion */
  240. spin_lock_irqsave(&wl->wl_lock, flags);
  241. if (wl->elp_compl) {
  242. complete(wl->elp_compl);
  243. wl->elp_compl = NULL;
  244. }
  245. if (!test_and_set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags))
  246. ieee80211_queue_work(wl->hw, &wl->irq_work);
  247. set_bit(WL1271_FLAG_IRQ_PENDING, &wl->flags);
  248. spin_unlock_irqrestore(&wl->wl_lock, flags);
  249. return IRQ_HANDLED;
  250. }
  251. static void wl1271_spi_set_power(struct wl1271 *wl, bool enable)
  252. {
  253. if (wl->set_power)
  254. wl->set_power(enable);
  255. }
  256. static struct wl1271_if_operations spi_ops = {
  257. .read = wl1271_spi_raw_read,
  258. .write = wl1271_spi_raw_write,
  259. .reset = wl1271_spi_reset,
  260. .init = wl1271_spi_init,
  261. .power = wl1271_spi_set_power,
  262. .dev = wl1271_spi_wl_to_dev,
  263. .enable_irq = wl1271_spi_enable_interrupts,
  264. .disable_irq = wl1271_spi_disable_interrupts
  265. };
  266. static int __devinit wl1271_probe(struct spi_device *spi)
  267. {
  268. struct wl12xx_platform_data *pdata;
  269. struct ieee80211_hw *hw;
  270. struct wl1271 *wl;
  271. int ret;
  272. pdata = spi->dev.platform_data;
  273. if (!pdata) {
  274. wl1271_error("no platform data");
  275. return -ENODEV;
  276. }
  277. hw = wl1271_alloc_hw();
  278. if (IS_ERR(hw))
  279. return PTR_ERR(hw);
  280. wl = hw->priv;
  281. dev_set_drvdata(&spi->dev, wl);
  282. wl->if_priv = spi;
  283. wl->if_ops = &spi_ops;
  284. /* This is the only SPI value that we need to set here, the rest
  285. * comes from the board-peripherals file */
  286. spi->bits_per_word = 32;
  287. ret = spi_setup(spi);
  288. if (ret < 0) {
  289. wl1271_error("spi_setup failed");
  290. goto out_free;
  291. }
  292. wl->set_power = pdata->set_power;
  293. if (!wl->set_power) {
  294. wl1271_error("set power function missing in platform data");
  295. ret = -ENODEV;
  296. goto out_free;
  297. }
  298. wl->irq = spi->irq;
  299. if (wl->irq < 0) {
  300. wl1271_error("irq missing in platform data");
  301. ret = -ENODEV;
  302. goto out_free;
  303. }
  304. ret = request_irq(wl->irq, wl1271_irq, 0, DRIVER_NAME, wl);
  305. if (ret < 0) {
  306. wl1271_error("request_irq() failed: %d", ret);
  307. goto out_free;
  308. }
  309. set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING);
  310. disable_irq(wl->irq);
  311. ret = wl1271_init_ieee80211(wl);
  312. if (ret)
  313. goto out_irq;
  314. ret = wl1271_register_hw(wl);
  315. if (ret)
  316. goto out_irq;
  317. wl1271_notice("initialized");
  318. return 0;
  319. out_irq:
  320. free_irq(wl->irq, wl);
  321. out_free:
  322. wl1271_free_hw(wl);
  323. return ret;
  324. }
  325. static int __devexit wl1271_remove(struct spi_device *spi)
  326. {
  327. struct wl1271 *wl = dev_get_drvdata(&spi->dev);
  328. free_irq(wl->irq, wl);
  329. wl1271_unregister_hw(wl);
  330. wl1271_free_hw(wl);
  331. return 0;
  332. }
  333. static struct spi_driver wl1271_spi_driver = {
  334. .driver = {
  335. .name = "wl1271_spi",
  336. .bus = &spi_bus_type,
  337. .owner = THIS_MODULE,
  338. },
  339. .probe = wl1271_probe,
  340. .remove = __devexit_p(wl1271_remove),
  341. };
  342. static int __init wl1271_init(void)
  343. {
  344. int ret;
  345. ret = spi_register_driver(&wl1271_spi_driver);
  346. if (ret < 0) {
  347. wl1271_error("failed to register spi driver: %d", ret);
  348. goto out;
  349. }
  350. out:
  351. return ret;
  352. }
  353. static void __exit wl1271_exit(void)
  354. {
  355. spi_unregister_driver(&wl1271_spi_driver);
  356. wl1271_notice("unloaded");
  357. }
  358. module_init(wl1271_init);
  359. module_exit(wl1271_exit);
  360. MODULE_LICENSE("GPL");
  361. MODULE_AUTHOR("Luciano Coelho <luciano.coelho@nokia.com>");
  362. MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
  363. MODULE_FIRMWARE(WL1271_FW_NAME);
  364. MODULE_ALIAS("spi:wl1271");