iwl-dev.h 40 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * Intel Linux Wireless <ilw@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. /*
  27. * Please use this file (iwl-dev.h) for driver implementation definitions.
  28. * Please use iwl-commands.h for uCode API definitions.
  29. * Please use iwl-4965-hw.h for hardware-related definitions.
  30. */
  31. #ifndef __iwl_dev_h__
  32. #define __iwl_dev_h__
  33. #include <linux/pci.h> /* for struct pci_device_id */
  34. #include <linux/kernel.h>
  35. #include <net/ieee80211_radiotap.h>
  36. #include "iwl-eeprom.h"
  37. #include "iwl-csr.h"
  38. #include "iwl-prph.h"
  39. #include "iwl-fh.h"
  40. #include "iwl-debug.h"
  41. #include "iwl-4965-hw.h"
  42. #include "iwl-3945-hw.h"
  43. #include "iwl-agn-hw.h"
  44. #include "iwl-led.h"
  45. #include "iwl-power.h"
  46. #include "iwl-agn-rs.h"
  47. struct iwl_tx_queue;
  48. /* CT-KILL constants */
  49. #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
  50. #define CT_KILL_THRESHOLD 114 /* in Celsius */
  51. #define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */
  52. /* Default noise level to report when noise measurement is not available.
  53. * This may be because we're:
  54. * 1) Not associated (4965, no beacon statistics being sent to driver)
  55. * 2) Scanning (noise measurement does not apply to associated channel)
  56. * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
  57. * Use default noise value of -127 ... this is below the range of measurable
  58. * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
  59. * Also, -127 works better than 0 when averaging frames with/without
  60. * noise info (e.g. averaging might be done in app); measured dBm values are
  61. * always negative ... using a negative value as the default keeps all
  62. * averages within an s8's (used in some apps) range of negative values. */
  63. #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
  64. /*
  65. * RTS threshold here is total size [2347] minus 4 FCS bytes
  66. * Per spec:
  67. * a value of 0 means RTS on all data/management packets
  68. * a value > max MSDU size means no RTS
  69. * else RTS for data/management frames where MPDU is larger
  70. * than RTS value.
  71. */
  72. #define DEFAULT_RTS_THRESHOLD 2347U
  73. #define MIN_RTS_THRESHOLD 0U
  74. #define MAX_RTS_THRESHOLD 2347U
  75. #define MAX_MSDU_SIZE 2304U
  76. #define MAX_MPDU_SIZE 2346U
  77. #define DEFAULT_BEACON_INTERVAL 100U
  78. #define DEFAULT_SHORT_RETRY_LIMIT 7U
  79. #define DEFAULT_LONG_RETRY_LIMIT 4U
  80. struct iwl_rx_mem_buffer {
  81. dma_addr_t page_dma;
  82. struct page *page;
  83. struct list_head list;
  84. };
  85. #define rxb_addr(r) page_address(r->page)
  86. /* defined below */
  87. struct iwl_device_cmd;
  88. struct iwl_cmd_meta {
  89. /* only for SYNC commands, iff the reply skb is wanted */
  90. struct iwl_host_cmd *source;
  91. /*
  92. * only for ASYNC commands
  93. * (which is somewhat stupid -- look at iwl-sta.c for instance
  94. * which duplicates a bunch of code because the callback isn't
  95. * invoked for SYNC commands, if it were and its result passed
  96. * through it would be simpler...)
  97. */
  98. void (*callback)(struct iwl_priv *priv,
  99. struct iwl_device_cmd *cmd,
  100. struct iwl_rx_packet *pkt);
  101. /* The CMD_SIZE_HUGE flag bit indicates that the command
  102. * structure is stored at the end of the shared queue memory. */
  103. u32 flags;
  104. DEFINE_DMA_UNMAP_ADDR(mapping);
  105. DEFINE_DMA_UNMAP_LEN(len);
  106. };
  107. /*
  108. * Generic queue structure
  109. *
  110. * Contains common data for Rx and Tx queues
  111. */
  112. struct iwl_queue {
  113. int n_bd; /* number of BDs in this queue */
  114. int write_ptr; /* 1-st empty entry (index) host_w*/
  115. int read_ptr; /* last used entry (index) host_r*/
  116. /* use for monitoring and recovering the stuck queue */
  117. int last_read_ptr; /* storing the last read_ptr */
  118. /* number of time read_ptr and last_read_ptr are the same */
  119. u8 repeat_same_read_ptr;
  120. dma_addr_t dma_addr; /* physical addr for BD's */
  121. int n_window; /* safe queue window */
  122. u32 id;
  123. int low_mark; /* low watermark, resume queue if free
  124. * space more than this */
  125. int high_mark; /* high watermark, stop queue if free
  126. * space less than this */
  127. } __packed;
  128. /* One for each TFD */
  129. struct iwl_tx_info {
  130. struct sk_buff *skb;
  131. };
  132. /**
  133. * struct iwl_tx_queue - Tx Queue for DMA
  134. * @q: generic Rx/Tx queue descriptor
  135. * @bd: base of circular buffer of TFDs
  136. * @cmd: array of command/TX buffer pointers
  137. * @meta: array of meta data for each command/tx buffer
  138. * @dma_addr_cmd: physical address of cmd/tx buffer array
  139. * @txb: array of per-TFD driver data
  140. * @need_update: indicates need to update read/write index
  141. * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
  142. *
  143. * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
  144. * descriptors) and required locking structures.
  145. */
  146. #define TFD_TX_CMD_SLOTS 256
  147. #define TFD_CMD_SLOTS 32
  148. struct iwl_tx_queue {
  149. struct iwl_queue q;
  150. void *tfds;
  151. struct iwl_device_cmd **cmd;
  152. struct iwl_cmd_meta *meta;
  153. struct iwl_tx_info *txb;
  154. u8 need_update;
  155. u8 sched_retry;
  156. u8 active;
  157. u8 swq_id;
  158. };
  159. #define IWL_NUM_SCAN_RATES (2)
  160. struct iwl4965_channel_tgd_info {
  161. u8 type;
  162. s8 max_power;
  163. };
  164. struct iwl4965_channel_tgh_info {
  165. s64 last_radar_time;
  166. };
  167. #define IWL4965_MAX_RATE (33)
  168. struct iwl3945_clip_group {
  169. /* maximum power level to prevent clipping for each rate, derived by
  170. * us from this band's saturation power in EEPROM */
  171. const s8 clip_powers[IWL_MAX_RATES];
  172. };
  173. /* current Tx power values to use, one for each rate for each channel.
  174. * requested power is limited by:
  175. * -- regulatory EEPROM limits for this channel
  176. * -- hardware capabilities (clip-powers)
  177. * -- spectrum management
  178. * -- user preference (e.g. iwconfig)
  179. * when requested power is set, base power index must also be set. */
  180. struct iwl3945_channel_power_info {
  181. struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
  182. s8 power_table_index; /* actual (compenst'd) index into gain table */
  183. s8 base_power_index; /* gain index for power at factory temp. */
  184. s8 requested_power; /* power (dBm) requested for this chnl/rate */
  185. };
  186. /* current scan Tx power values to use, one for each scan rate for each
  187. * channel. */
  188. struct iwl3945_scan_power_info {
  189. struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
  190. s8 power_table_index; /* actual (compenst'd) index into gain table */
  191. s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
  192. };
  193. /*
  194. * One for each channel, holds all channel setup data
  195. * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
  196. * with one another!
  197. */
  198. struct iwl_channel_info {
  199. struct iwl4965_channel_tgd_info tgd;
  200. struct iwl4965_channel_tgh_info tgh;
  201. struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
  202. struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
  203. * HT40 channel */
  204. u8 channel; /* channel number */
  205. u8 flags; /* flags copied from EEPROM */
  206. s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
  207. s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
  208. s8 min_power; /* always 0 */
  209. s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
  210. u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
  211. u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
  212. enum ieee80211_band band;
  213. /* HT40 channel info */
  214. s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
  215. u8 ht40_flags; /* flags copied from EEPROM */
  216. u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
  217. /* Radio/DSP gain settings for each "normal" data Tx rate.
  218. * These include, in addition to RF and DSP gain, a few fields for
  219. * remembering/modifying gain settings (indexes). */
  220. struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
  221. /* Radio/DSP gain settings for each scan rate, for directed scans. */
  222. struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
  223. };
  224. #define IWL_TX_FIFO_BK 0
  225. #define IWL_TX_FIFO_BE 1
  226. #define IWL_TX_FIFO_VI 2
  227. #define IWL_TX_FIFO_VO 3
  228. #define IWL_TX_FIFO_UNUSED -1
  229. /* Minimum number of queues. MAX_NUM is defined in hw specific files.
  230. * Set the minimum to accommodate the 4 standard TX queues, 1 command
  231. * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
  232. #define IWL_MIN_NUM_QUEUES 10
  233. /*
  234. * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00,
  235. * the driver maps it into the appropriate device FIFO for the
  236. * uCode.
  237. */
  238. #define IWL_CMD_QUEUE_NUM 4
  239. /* Power management (not Tx power) structures */
  240. enum iwl_pwr_src {
  241. IWL_PWR_SRC_VMAIN,
  242. IWL_PWR_SRC_VAUX,
  243. };
  244. #define IEEE80211_DATA_LEN 2304
  245. #define IEEE80211_4ADDR_LEN 30
  246. #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
  247. #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
  248. struct iwl_frame {
  249. union {
  250. struct ieee80211_hdr frame;
  251. struct iwl_tx_beacon_cmd beacon;
  252. u8 raw[IEEE80211_FRAME_LEN];
  253. u8 cmd[360];
  254. } u;
  255. struct list_head list;
  256. };
  257. #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
  258. #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
  259. #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
  260. enum {
  261. CMD_SYNC = 0,
  262. CMD_SIZE_NORMAL = 0,
  263. CMD_NO_SKB = 0,
  264. CMD_SIZE_HUGE = (1 << 0),
  265. CMD_ASYNC = (1 << 1),
  266. CMD_WANT_SKB = (1 << 2),
  267. };
  268. #define DEF_CMD_PAYLOAD_SIZE 320
  269. /**
  270. * struct iwl_device_cmd
  271. *
  272. * For allocation of the command and tx queues, this establishes the overall
  273. * size of the largest command we send to uCode, except for a scan command
  274. * (which is relatively huge; space is allocated separately).
  275. */
  276. struct iwl_device_cmd {
  277. struct iwl_cmd_header hdr; /* uCode API */
  278. union {
  279. u32 flags;
  280. u8 val8;
  281. u16 val16;
  282. u32 val32;
  283. struct iwl_tx_cmd tx;
  284. struct iwl6000_channel_switch_cmd chswitch;
  285. u8 payload[DEF_CMD_PAYLOAD_SIZE];
  286. } __packed cmd;
  287. } __packed;
  288. #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
  289. struct iwl_host_cmd {
  290. const void *data;
  291. unsigned long reply_page;
  292. void (*callback)(struct iwl_priv *priv,
  293. struct iwl_device_cmd *cmd,
  294. struct iwl_rx_packet *pkt);
  295. u32 flags;
  296. u16 len;
  297. u8 id;
  298. };
  299. #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
  300. #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
  301. #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
  302. /**
  303. * struct iwl_rx_queue - Rx queue
  304. * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
  305. * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
  306. * @read: Shared index to newest available Rx buffer
  307. * @write: Shared index to oldest written Rx packet
  308. * @free_count: Number of pre-allocated buffers in rx_free
  309. * @rx_free: list of free SKBs for use
  310. * @rx_used: List of Rx buffers with no SKB
  311. * @need_update: flag to indicate we need to update read/write index
  312. * @rb_stts: driver's pointer to receive buffer status
  313. * @rb_stts_dma: bus address of receive buffer status
  314. *
  315. * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
  316. */
  317. struct iwl_rx_queue {
  318. __le32 *bd;
  319. dma_addr_t bd_dma;
  320. struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
  321. struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
  322. u32 read;
  323. u32 write;
  324. u32 free_count;
  325. u32 write_actual;
  326. struct list_head rx_free;
  327. struct list_head rx_used;
  328. int need_update;
  329. struct iwl_rb_status *rb_stts;
  330. dma_addr_t rb_stts_dma;
  331. spinlock_t lock;
  332. };
  333. #define IWL_SUPPORTED_RATES_IE_LEN 8
  334. #define MAX_TID_COUNT 9
  335. #define IWL_INVALID_RATE 0xFF
  336. #define IWL_INVALID_VALUE -1
  337. /**
  338. * struct iwl_ht_agg -- aggregation status while waiting for block-ack
  339. * @txq_id: Tx queue used for Tx attempt
  340. * @frame_count: # frames attempted by Tx command
  341. * @wait_for_ba: Expect block-ack before next Tx reply
  342. * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
  343. * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
  344. * @bitmap1: High order, one bit for each frame pending ACK in Tx window
  345. * @rate_n_flags: Rate at which Tx was attempted
  346. *
  347. * If REPLY_TX indicates that aggregation was attempted, driver must wait
  348. * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
  349. * until block ack arrives.
  350. */
  351. struct iwl_ht_agg {
  352. u16 txq_id;
  353. u16 frame_count;
  354. u16 wait_for_ba;
  355. u16 start_idx;
  356. u64 bitmap;
  357. u32 rate_n_flags;
  358. #define IWL_AGG_OFF 0
  359. #define IWL_AGG_ON 1
  360. #define IWL_EMPTYING_HW_QUEUE_ADDBA 2
  361. #define IWL_EMPTYING_HW_QUEUE_DELBA 3
  362. u8 state;
  363. };
  364. struct iwl_tid_data {
  365. u16 seq_number; /* agn only */
  366. u16 tfds_in_queue;
  367. struct iwl_ht_agg agg;
  368. };
  369. struct iwl_hw_key {
  370. enum ieee80211_key_alg alg;
  371. int keylen;
  372. u8 keyidx;
  373. u8 key[32];
  374. };
  375. union iwl_ht_rate_supp {
  376. u16 rates;
  377. struct {
  378. u8 siso_rate;
  379. u8 mimo_rate;
  380. };
  381. };
  382. #define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
  383. /*
  384. * Maximal MPDU density for TX aggregation
  385. * 4 - 2us density
  386. * 5 - 4us density
  387. * 6 - 8us density
  388. * 7 - 16us density
  389. */
  390. #define CFG_HT_MPDU_DENSITY_4USEC (0x5)
  391. #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
  392. struct iwl_ht_config {
  393. /* self configuration data */
  394. bool is_ht;
  395. bool is_40mhz;
  396. bool single_chain_sufficient;
  397. enum ieee80211_smps_mode smps; /* current smps mode */
  398. /* BSS related data */
  399. u8 extension_chan_offset;
  400. u8 ht_protection;
  401. u8 non_GF_STA_present;
  402. };
  403. /* QoS structures */
  404. struct iwl_qos_info {
  405. int qos_active;
  406. struct iwl_qosparam_cmd def_qos_parm;
  407. };
  408. /*
  409. * Structure should be accessed with sta_lock held. When station addition
  410. * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only
  411. * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock
  412. * held.
  413. */
  414. struct iwl_station_entry {
  415. struct iwl_addsta_cmd sta;
  416. struct iwl_tid_data tid[MAX_TID_COUNT];
  417. u8 used;
  418. struct iwl_hw_key keyinfo;
  419. struct iwl_link_quality_cmd *lq;
  420. };
  421. struct iwl_station_priv_common {
  422. u8 sta_id;
  423. };
  424. /*
  425. * iwl_station_priv: Driver's private station information
  426. *
  427. * When mac80211 creates a station it reserves some space (hw->sta_data_size)
  428. * in the structure for use by driver. This structure is places in that
  429. * space.
  430. *
  431. * The common struct MUST be first because it is shared between
  432. * 3945 and agn!
  433. */
  434. struct iwl_station_priv {
  435. struct iwl_station_priv_common common;
  436. struct iwl_lq_sta lq_sta;
  437. atomic_t pending_frames;
  438. bool client;
  439. bool asleep;
  440. };
  441. /**
  442. * struct iwl_vif_priv - driver's private per-interface information
  443. *
  444. * When mac80211 allocates a virtual interface, it can allocate
  445. * space for us to put data into.
  446. */
  447. struct iwl_vif_priv {
  448. u8 ibss_bssid_sta_id;
  449. };
  450. /* one for each uCode image (inst/data, boot/init/runtime) */
  451. struct fw_desc {
  452. void *v_addr; /* access by driver */
  453. dma_addr_t p_addr; /* access by card's busmaster DMA */
  454. u32 len; /* bytes */
  455. };
  456. /* v1/v2 uCode file layout */
  457. struct iwl_ucode_header {
  458. __le32 ver; /* major/minor/API/serial */
  459. union {
  460. struct {
  461. __le32 inst_size; /* bytes of runtime code */
  462. __le32 data_size; /* bytes of runtime data */
  463. __le32 init_size; /* bytes of init code */
  464. __le32 init_data_size; /* bytes of init data */
  465. __le32 boot_size; /* bytes of bootstrap code */
  466. u8 data[0]; /* in same order as sizes */
  467. } v1;
  468. struct {
  469. __le32 build; /* build number */
  470. __le32 inst_size; /* bytes of runtime code */
  471. __le32 data_size; /* bytes of runtime data */
  472. __le32 init_size; /* bytes of init code */
  473. __le32 init_data_size; /* bytes of init data */
  474. __le32 boot_size; /* bytes of bootstrap code */
  475. u8 data[0]; /* in same order as sizes */
  476. } v2;
  477. } u;
  478. };
  479. /*
  480. * new TLV uCode file layout
  481. *
  482. * The new TLV file format contains TLVs, that each specify
  483. * some piece of data. To facilitate "groups", for example
  484. * different instruction image with different capabilities,
  485. * bundled with the same init image, an alternative mechanism
  486. * is provided:
  487. * When the alternative field is 0, that means that the item
  488. * is always valid. When it is non-zero, then it is only
  489. * valid in conjunction with items of the same alternative,
  490. * in which case the driver (user) selects one alternative
  491. * to use.
  492. */
  493. enum iwl_ucode_tlv_type {
  494. IWL_UCODE_TLV_INVALID = 0, /* unused */
  495. IWL_UCODE_TLV_INST = 1,
  496. IWL_UCODE_TLV_DATA = 2,
  497. IWL_UCODE_TLV_INIT = 3,
  498. IWL_UCODE_TLV_INIT_DATA = 4,
  499. IWL_UCODE_TLV_BOOT = 5,
  500. IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
  501. IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
  502. IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
  503. IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
  504. IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
  505. IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
  506. IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
  507. IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
  508. IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
  509. };
  510. struct iwl_ucode_tlv {
  511. __le16 type; /* see above */
  512. __le16 alternative; /* see comment */
  513. __le32 length; /* not including type/length fields */
  514. u8 data[0];
  515. } __packed;
  516. #define IWL_TLV_UCODE_MAGIC 0x0a4c5749
  517. struct iwl_tlv_ucode_header {
  518. /*
  519. * The TLV style ucode header is distinguished from
  520. * the v1/v2 style header by first four bytes being
  521. * zero, as such is an invalid combination of
  522. * major/minor/API/serial versions.
  523. */
  524. __le32 zero;
  525. __le32 magic;
  526. u8 human_readable[64];
  527. __le32 ver; /* major/minor/API/serial */
  528. __le32 build;
  529. __le64 alternatives; /* bitmask of valid alternatives */
  530. /*
  531. * The data contained herein has a TLV layout,
  532. * see above for the TLV header and types.
  533. * Note that each TLV is padded to a length
  534. * that is a multiple of 4 for alignment.
  535. */
  536. u8 data[0];
  537. };
  538. struct iwl4965_ibss_seq {
  539. u8 mac[ETH_ALEN];
  540. u16 seq_num;
  541. u16 frag_num;
  542. unsigned long packet_time;
  543. struct list_head list;
  544. };
  545. struct iwl_sensitivity_ranges {
  546. u16 min_nrg_cck;
  547. u16 max_nrg_cck;
  548. u16 nrg_th_cck;
  549. u16 nrg_th_ofdm;
  550. u16 auto_corr_min_ofdm;
  551. u16 auto_corr_min_ofdm_mrc;
  552. u16 auto_corr_min_ofdm_x1;
  553. u16 auto_corr_min_ofdm_mrc_x1;
  554. u16 auto_corr_max_ofdm;
  555. u16 auto_corr_max_ofdm_mrc;
  556. u16 auto_corr_max_ofdm_x1;
  557. u16 auto_corr_max_ofdm_mrc_x1;
  558. u16 auto_corr_max_cck;
  559. u16 auto_corr_max_cck_mrc;
  560. u16 auto_corr_min_cck;
  561. u16 auto_corr_min_cck_mrc;
  562. u16 barker_corr_th_min;
  563. u16 barker_corr_th_min_mrc;
  564. u16 nrg_th_cca;
  565. };
  566. #define KELVIN_TO_CELSIUS(x) ((x)-273)
  567. #define CELSIUS_TO_KELVIN(x) ((x)+273)
  568. /**
  569. * struct iwl_hw_params
  570. * @max_txq_num: Max # Tx queues supported
  571. * @dma_chnl_num: Number of Tx DMA/FIFO channels
  572. * @scd_bc_tbls_size: size of scheduler byte count tables
  573. * @tfd_size: TFD size
  574. * @tx/rx_chains_num: Number of TX/RX chains
  575. * @valid_tx/rx_ant: usable antennas
  576. * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
  577. * @max_rxq_log: Log-base-2 of max_rxq_size
  578. * @rx_page_order: Rx buffer page order
  579. * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
  580. * @max_stations:
  581. * @bcast_sta_id:
  582. * @ht40_channel: is 40MHz width possible in band 2.4
  583. * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
  584. * @sw_crypto: 0 for hw, 1 for sw
  585. * @max_xxx_size: for ucode uses
  586. * @ct_kill_threshold: temperature threshold
  587. * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
  588. * @calib_init_cfg: setup initial calibrations for the hw
  589. * @struct iwl_sensitivity_ranges: range of sensitivity values
  590. */
  591. struct iwl_hw_params {
  592. u8 max_txq_num;
  593. u8 dma_chnl_num;
  594. u16 scd_bc_tbls_size;
  595. u32 tfd_size;
  596. u8 tx_chains_num;
  597. u8 rx_chains_num;
  598. u8 valid_tx_ant;
  599. u8 valid_rx_ant;
  600. u16 max_rxq_size;
  601. u16 max_rxq_log;
  602. u32 rx_page_order;
  603. u32 rx_wrt_ptr_reg;
  604. u8 max_stations;
  605. u8 bcast_sta_id;
  606. u8 ht40_channel;
  607. u8 max_beacon_itrvl; /* in 1024 ms */
  608. u32 max_inst_size;
  609. u32 max_data_size;
  610. u32 max_bsm_size;
  611. u32 ct_kill_threshold; /* value in hw-dependent units */
  612. u32 ct_kill_exit_threshold; /* value in hw-dependent units */
  613. /* for 1000, 6000 series and up */
  614. u16 beacon_time_tsf_bits;
  615. u32 calib_init_cfg;
  616. const struct iwl_sensitivity_ranges *sens;
  617. };
  618. /******************************************************************************
  619. *
  620. * Functions implemented in core module which are forward declared here
  621. * for use by iwl-[4-5].c
  622. *
  623. * NOTE: The implementation of these functions are not hardware specific
  624. * which is why they are in the core module files.
  625. *
  626. * Naming convention --
  627. * iwl_ <-- Is part of iwlwifi
  628. * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
  629. * iwl4965_bg_ <-- Called from work queue context
  630. * iwl4965_mac_ <-- mac80211 callback
  631. *
  632. ****************************************************************************/
  633. extern void iwl_update_chain_flags(struct iwl_priv *priv);
  634. extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
  635. extern const u8 iwl_bcast_addr[ETH_ALEN];
  636. extern int iwl_rxq_stop(struct iwl_priv *priv);
  637. extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
  638. extern int iwl_queue_space(const struct iwl_queue *q);
  639. static inline int iwl_queue_used(const struct iwl_queue *q, int i)
  640. {
  641. return q->write_ptr >= q->read_ptr ?
  642. (i >= q->read_ptr && i < q->write_ptr) :
  643. !(i < q->read_ptr && i >= q->write_ptr);
  644. }
  645. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  646. {
  647. /*
  648. * This is for init calibration result and scan command which
  649. * required buffer > TFD_MAX_PAYLOAD_SIZE,
  650. * the big buffer at end of command array
  651. */
  652. if (is_huge)
  653. return q->n_window; /* must be power of 2 */
  654. /* Otherwise, use normal size buffers */
  655. return index & (q->n_window - 1);
  656. }
  657. struct iwl_dma_ptr {
  658. dma_addr_t dma;
  659. void *addr;
  660. size_t size;
  661. };
  662. #define IWL_OPERATION_MODE_AUTO 0
  663. #define IWL_OPERATION_MODE_HT_ONLY 1
  664. #define IWL_OPERATION_MODE_MIXED 2
  665. #define IWL_OPERATION_MODE_20MHZ 3
  666. #define IWL_TX_CRC_SIZE 4
  667. #define IWL_TX_DELIMITER_SIZE 4
  668. #define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
  669. /* Sensitivity and chain noise calibration */
  670. #define INITIALIZATION_VALUE 0xFFFF
  671. #define IWL4965_CAL_NUM_BEACONS 20
  672. #define IWL_CAL_NUM_BEACONS 16
  673. #define MAXIMUM_ALLOWED_PATHLOSS 15
  674. #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
  675. #define MAX_FA_OFDM 50
  676. #define MIN_FA_OFDM 5
  677. #define MAX_FA_CCK 50
  678. #define MIN_FA_CCK 5
  679. #define AUTO_CORR_STEP_OFDM 1
  680. #define AUTO_CORR_STEP_CCK 3
  681. #define AUTO_CORR_MAX_TH_CCK 160
  682. #define NRG_DIFF 2
  683. #define NRG_STEP_CCK 2
  684. #define NRG_MARGIN 8
  685. #define MAX_NUMBER_CCK_NO_FA 100
  686. #define AUTO_CORR_CCK_MIN_VAL_DEF (125)
  687. #define CHAIN_A 0
  688. #define CHAIN_B 1
  689. #define CHAIN_C 2
  690. #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
  691. #define ALL_BAND_FILTER 0xFF00
  692. #define IN_BAND_FILTER 0xFF
  693. #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
  694. #define NRG_NUM_PREV_STAT_L 20
  695. #define NUM_RX_CHAINS 3
  696. enum iwl4965_false_alarm_state {
  697. IWL_FA_TOO_MANY = 0,
  698. IWL_FA_TOO_FEW = 1,
  699. IWL_FA_GOOD_RANGE = 2,
  700. };
  701. enum iwl4965_chain_noise_state {
  702. IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
  703. IWL_CHAIN_NOISE_ACCUMULATE,
  704. IWL_CHAIN_NOISE_CALIBRATED,
  705. IWL_CHAIN_NOISE_DONE,
  706. };
  707. enum iwl4965_calib_enabled_state {
  708. IWL_CALIB_DISABLED = 0, /* must be 0 */
  709. IWL_CALIB_ENABLED = 1,
  710. };
  711. /*
  712. * enum iwl_calib
  713. * defines the order in which results of initial calibrations
  714. * should be sent to the runtime uCode
  715. */
  716. enum iwl_calib {
  717. IWL_CALIB_XTAL,
  718. IWL_CALIB_DC,
  719. IWL_CALIB_LO,
  720. IWL_CALIB_TX_IQ,
  721. IWL_CALIB_TX_IQ_PERD,
  722. IWL_CALIB_BASE_BAND,
  723. IWL_CALIB_MAX
  724. };
  725. /* Opaque calibration results */
  726. struct iwl_calib_result {
  727. void *buf;
  728. size_t buf_len;
  729. };
  730. enum ucode_type {
  731. UCODE_NONE = 0,
  732. UCODE_INIT,
  733. UCODE_RT
  734. };
  735. /* Sensitivity calib data */
  736. struct iwl_sensitivity_data {
  737. u32 auto_corr_ofdm;
  738. u32 auto_corr_ofdm_mrc;
  739. u32 auto_corr_ofdm_x1;
  740. u32 auto_corr_ofdm_mrc_x1;
  741. u32 auto_corr_cck;
  742. u32 auto_corr_cck_mrc;
  743. u32 last_bad_plcp_cnt_ofdm;
  744. u32 last_fa_cnt_ofdm;
  745. u32 last_bad_plcp_cnt_cck;
  746. u32 last_fa_cnt_cck;
  747. u32 nrg_curr_state;
  748. u32 nrg_prev_state;
  749. u32 nrg_value[10];
  750. u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
  751. u32 nrg_silence_ref;
  752. u32 nrg_energy_idx;
  753. u32 nrg_silence_idx;
  754. u32 nrg_th_cck;
  755. s32 nrg_auto_corr_silence_diff;
  756. u32 num_in_cck_no_fa;
  757. u32 nrg_th_ofdm;
  758. u16 barker_corr_th_min;
  759. u16 barker_corr_th_min_mrc;
  760. u16 nrg_th_cca;
  761. };
  762. /* Chain noise (differential Rx gain) calib data */
  763. struct iwl_chain_noise_data {
  764. u32 active_chains;
  765. u32 chain_noise_a;
  766. u32 chain_noise_b;
  767. u32 chain_noise_c;
  768. u32 chain_signal_a;
  769. u32 chain_signal_b;
  770. u32 chain_signal_c;
  771. u16 beacon_count;
  772. u8 disconn_array[NUM_RX_CHAINS];
  773. u8 delta_gain_code[NUM_RX_CHAINS];
  774. u8 radio_write;
  775. u8 state;
  776. };
  777. #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
  778. #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
  779. #define IWL_TRAFFIC_ENTRIES (256)
  780. #define IWL_TRAFFIC_ENTRY_SIZE (64)
  781. enum {
  782. MEASUREMENT_READY = (1 << 0),
  783. MEASUREMENT_ACTIVE = (1 << 1),
  784. };
  785. enum iwl_nvm_type {
  786. NVM_DEVICE_TYPE_EEPROM = 0,
  787. NVM_DEVICE_TYPE_OTP,
  788. };
  789. /*
  790. * Two types of OTP memory access modes
  791. * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
  792. * based on physical memory addressing
  793. * IWL_OTP_ACCESS_RELATIVE - relative address mode,
  794. * based on logical memory addressing
  795. */
  796. enum iwl_access_mode {
  797. IWL_OTP_ACCESS_ABSOLUTE,
  798. IWL_OTP_ACCESS_RELATIVE,
  799. };
  800. /**
  801. * enum iwl_pa_type - Power Amplifier type
  802. * @IWL_PA_SYSTEM: based on uCode configuration
  803. * @IWL_PA_INTERNAL: use Internal only
  804. */
  805. enum iwl_pa_type {
  806. IWL_PA_SYSTEM = 0,
  807. IWL_PA_INTERNAL = 1,
  808. };
  809. /* interrupt statistics */
  810. struct isr_statistics {
  811. u32 hw;
  812. u32 sw;
  813. u32 sw_err;
  814. u32 sch;
  815. u32 alive;
  816. u32 rfkill;
  817. u32 ctkill;
  818. u32 wakeup;
  819. u32 rx;
  820. u32 rx_handlers[REPLY_MAX];
  821. u32 tx;
  822. u32 unhandled;
  823. };
  824. #ifdef CONFIG_IWLWIFI_DEBUGFS
  825. /* management statistics */
  826. enum iwl_mgmt_stats {
  827. MANAGEMENT_ASSOC_REQ = 0,
  828. MANAGEMENT_ASSOC_RESP,
  829. MANAGEMENT_REASSOC_REQ,
  830. MANAGEMENT_REASSOC_RESP,
  831. MANAGEMENT_PROBE_REQ,
  832. MANAGEMENT_PROBE_RESP,
  833. MANAGEMENT_BEACON,
  834. MANAGEMENT_ATIM,
  835. MANAGEMENT_DISASSOC,
  836. MANAGEMENT_AUTH,
  837. MANAGEMENT_DEAUTH,
  838. MANAGEMENT_ACTION,
  839. MANAGEMENT_MAX,
  840. };
  841. /* control statistics */
  842. enum iwl_ctrl_stats {
  843. CONTROL_BACK_REQ = 0,
  844. CONTROL_BACK,
  845. CONTROL_PSPOLL,
  846. CONTROL_RTS,
  847. CONTROL_CTS,
  848. CONTROL_ACK,
  849. CONTROL_CFEND,
  850. CONTROL_CFENDACK,
  851. CONTROL_MAX,
  852. };
  853. struct traffic_stats {
  854. u32 mgmt[MANAGEMENT_MAX];
  855. u32 ctrl[CONTROL_MAX];
  856. u32 data_cnt;
  857. u64 data_bytes;
  858. };
  859. #else
  860. struct traffic_stats {
  861. u64 data_bytes;
  862. };
  863. #endif
  864. /*
  865. * iwl_switch_rxon: "channel switch" structure
  866. *
  867. * @ switch_in_progress: channel switch in progress
  868. * @ channel: new channel
  869. */
  870. struct iwl_switch_rxon {
  871. bool switch_in_progress;
  872. __le16 channel;
  873. };
  874. /*
  875. * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
  876. * to perform continuous uCode event logging operation if enabled
  877. */
  878. #define UCODE_TRACE_PERIOD (100)
  879. /*
  880. * iwl_event_log: current uCode event log position
  881. *
  882. * @ucode_trace: enable/disable ucode continuous trace timer
  883. * @num_wraps: how many times the event buffer wraps
  884. * @next_entry: the entry just before the next one that uCode would fill
  885. * @non_wraps_count: counter for no wrap detected when dump ucode events
  886. * @wraps_once_count: counter for wrap once detected when dump ucode events
  887. * @wraps_more_count: counter for wrap more than once detected
  888. * when dump ucode events
  889. */
  890. struct iwl_event_log {
  891. bool ucode_trace;
  892. u32 num_wraps;
  893. u32 next_entry;
  894. int non_wraps_count;
  895. int wraps_once_count;
  896. int wraps_more_count;
  897. };
  898. /*
  899. * host interrupt timeout value
  900. * used with setting interrupt coalescing timer
  901. * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
  902. *
  903. * default interrupt coalescing timer is 64 x 32 = 2048 usecs
  904. * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
  905. */
  906. #define IWL_HOST_INT_TIMEOUT_MAX (0xFF)
  907. #define IWL_HOST_INT_TIMEOUT_DEF (0x40)
  908. #define IWL_HOST_INT_TIMEOUT_MIN (0x0)
  909. #define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
  910. #define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
  911. #define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
  912. /*
  913. * This is the threshold value of plcp error rate per 100mSecs. It is
  914. * used to set and check for the validity of plcp_delta.
  915. */
  916. #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1)
  917. #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50)
  918. #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100)
  919. #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200)
  920. #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255)
  921. #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0)
  922. #define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3)
  923. #define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
  924. /* timer constants use to monitor and recover stuck tx queues in mSecs */
  925. #define IWL_DEF_MONITORING_PERIOD (1000)
  926. #define IWL_LONG_MONITORING_PERIOD (5000)
  927. #define IWL_ONE_HUNDRED_MSECS (100)
  928. #define IWL_SIXTY_SECS (60000)
  929. enum iwl_reset {
  930. IWL_RF_RESET = 0,
  931. IWL_FW_RESET,
  932. IWL_MAX_FORCE_RESET,
  933. };
  934. struct iwl_force_reset {
  935. int reset_request_count;
  936. int reset_success_count;
  937. int reset_reject_count;
  938. unsigned long reset_duration;
  939. unsigned long last_force_reset_jiffies;
  940. };
  941. /* extend beacon time format bit shifting */
  942. /*
  943. * for _3945 devices
  944. * bits 31:24 - extended
  945. * bits 23:0 - interval
  946. */
  947. #define IWL3945_EXT_BEACON_TIME_POS 24
  948. /*
  949. * for _agn devices
  950. * bits 31:22 - extended
  951. * bits 21:0 - interval
  952. */
  953. #define IWLAGN_EXT_BEACON_TIME_POS 22
  954. struct iwl_priv {
  955. /* ieee device used by generic ieee processing code */
  956. struct ieee80211_hw *hw;
  957. struct ieee80211_channel *ieee_channels;
  958. struct ieee80211_rate *ieee_rates;
  959. struct iwl_cfg *cfg;
  960. /* temporary frame storage list */
  961. struct list_head free_frames;
  962. int frames_count;
  963. enum ieee80211_band band;
  964. int alloc_rxb_page;
  965. void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
  966. struct iwl_rx_mem_buffer *rxb);
  967. struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
  968. /* spectrum measurement report caching */
  969. struct iwl_spectrum_notification measure_report;
  970. u8 measurement_status;
  971. /* ucode beacon time */
  972. u32 ucode_beacon_time;
  973. int missed_beacon_threshold;
  974. /* storing the jiffies when the plcp error rate is received */
  975. unsigned long plcp_jiffies;
  976. /* force reset */
  977. struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
  978. /* we allocate array of iwl_channel_info for NIC's valid channels.
  979. * Access via channel # using indirect index array */
  980. struct iwl_channel_info *channel_info; /* channel info array */
  981. u8 channel_count; /* # of channels */
  982. /* thermal calibration */
  983. s32 temperature; /* degrees Kelvin */
  984. s32 last_temperature;
  985. /* init calibration results */
  986. struct iwl_calib_result calib_results[IWL_CALIB_MAX];
  987. /* Scan related variables */
  988. unsigned long scan_start;
  989. unsigned long scan_start_tsf;
  990. void *scan_cmd;
  991. enum ieee80211_band scan_band;
  992. struct cfg80211_scan_request *scan_request;
  993. struct ieee80211_vif *scan_vif;
  994. bool is_internal_short_scan;
  995. u8 scan_tx_ant[IEEE80211_NUM_BANDS];
  996. u8 mgmt_tx_ant;
  997. /* spinlock */
  998. spinlock_t lock; /* protect general shared data */
  999. spinlock_t hcmd_lock; /* protect hcmd */
  1000. spinlock_t reg_lock; /* protect hw register access */
  1001. struct mutex mutex;
  1002. struct mutex sync_cmd_mutex; /* enable serialization of sync commands */
  1003. /* basic pci-network driver stuff */
  1004. struct pci_dev *pci_dev;
  1005. /* pci hardware address support */
  1006. void __iomem *hw_base;
  1007. u32 hw_rev;
  1008. u32 hw_wa_rev;
  1009. u8 rev_id;
  1010. /* EEPROM MAC addresses */
  1011. struct mac_address addresses[2];
  1012. /* uCode images, save to reload in case of failure */
  1013. int fw_index; /* firmware we're trying to load */
  1014. u32 ucode_ver; /* version of ucode, copy of
  1015. iwl_ucode.ver */
  1016. struct fw_desc ucode_code; /* runtime inst */
  1017. struct fw_desc ucode_data; /* runtime data original */
  1018. struct fw_desc ucode_data_backup; /* runtime data save/restore */
  1019. struct fw_desc ucode_init; /* initialization inst */
  1020. struct fw_desc ucode_init_data; /* initialization data */
  1021. struct fw_desc ucode_boot; /* bootstrap inst */
  1022. enum ucode_type ucode_type;
  1023. u8 ucode_write_complete; /* the image write is complete */
  1024. char firmware_name[25];
  1025. struct iwl_rxon_time_cmd rxon_timing;
  1026. /* We declare this const so it can only be
  1027. * changed via explicit cast within the
  1028. * routines that actually update the physical
  1029. * hardware */
  1030. const struct iwl_rxon_cmd active_rxon;
  1031. struct iwl_rxon_cmd staging_rxon;
  1032. struct iwl_switch_rxon switch_rxon;
  1033. /* 1st responses from initialize and runtime uCode images.
  1034. * _agn's initialize alive response contains some calibration data. */
  1035. struct iwl_init_alive_resp card_alive_init;
  1036. struct iwl_alive_resp card_alive;
  1037. unsigned long last_blink_time;
  1038. u8 last_blink_rate;
  1039. u8 allow_blinking;
  1040. u64 led_tpt;
  1041. u16 active_rate;
  1042. u8 start_calib;
  1043. struct iwl_sensitivity_data sensitivity_data;
  1044. struct iwl_chain_noise_data chain_noise_data;
  1045. bool enhance_sensitivity_table;
  1046. __le16 sensitivity_tbl[HD_TABLE_SIZE];
  1047. __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES];
  1048. struct iwl_ht_config current_ht_config;
  1049. /* Rate scaling data */
  1050. u8 retry_rate;
  1051. wait_queue_head_t wait_command_queue;
  1052. int activity_timer_active;
  1053. /* Rx and Tx DMA processing queues */
  1054. struct iwl_rx_queue rxq;
  1055. struct iwl_tx_queue *txq;
  1056. unsigned long txq_ctx_active_msk;
  1057. struct iwl_dma_ptr kw; /* keep warm address */
  1058. struct iwl_dma_ptr scd_bc_tbls;
  1059. u32 scd_base_addr; /* scheduler sram base address */
  1060. unsigned long status;
  1061. /* counts mgmt, ctl, and data packets */
  1062. struct traffic_stats tx_stats;
  1063. struct traffic_stats rx_stats;
  1064. /* counts interrupts */
  1065. struct isr_statistics isr_stats;
  1066. struct iwl_power_mgr power_data;
  1067. struct iwl_tt_mgmt thermal_throttle;
  1068. /* context information */
  1069. u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
  1070. /* station table variables */
  1071. /* Note: if lock and sta_lock are needed, lock must be acquired first */
  1072. spinlock_t sta_lock;
  1073. int num_stations;
  1074. struct iwl_station_entry stations[IWL_STATION_COUNT];
  1075. struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; /* protected by mutex */
  1076. u8 key_mapping_key;
  1077. unsigned long ucode_key_table;
  1078. /* queue refcounts */
  1079. #define IWL_MAX_HW_QUEUES 32
  1080. unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
  1081. /* for each AC */
  1082. atomic_t queue_stop_count[4];
  1083. /* Indication if ieee80211_ops->open has been called */
  1084. u8 is_open;
  1085. u8 mac80211_registered;
  1086. /* eeprom -- this is in the card's little endian byte order */
  1087. u8 *eeprom;
  1088. int nvm_device_type;
  1089. struct iwl_eeprom_calib_info *calib_info;
  1090. enum nl80211_iftype iw_mode;
  1091. struct sk_buff *ibss_beacon;
  1092. /* Last Rx'd beacon timestamp */
  1093. u64 timestamp;
  1094. struct ieee80211_vif *vif;
  1095. union {
  1096. #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
  1097. struct {
  1098. void *shared_virt;
  1099. dma_addr_t shared_phys;
  1100. struct delayed_work thermal_periodic;
  1101. struct delayed_work rfkill_poll;
  1102. struct iwl3945_notif_statistics statistics;
  1103. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1104. struct iwl3945_notif_statistics accum_statistics;
  1105. struct iwl3945_notif_statistics delta_statistics;
  1106. struct iwl3945_notif_statistics max_delta;
  1107. #endif
  1108. u32 sta_supp_rates;
  1109. int last_rx_rssi; /* From Rx packet statistics */
  1110. /* Rx'd packet timing information */
  1111. u32 last_beacon_time;
  1112. u64 last_tsf;
  1113. /*
  1114. * each calibration channel group in the
  1115. * EEPROM has a derived clip setting for
  1116. * each rate.
  1117. */
  1118. const struct iwl3945_clip_group clip_groups[5];
  1119. } _3945;
  1120. #endif
  1121. #if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
  1122. struct {
  1123. /* INT ICT Table */
  1124. __le32 *ict_tbl;
  1125. void *ict_tbl_vir;
  1126. dma_addr_t ict_tbl_dma;
  1127. dma_addr_t aligned_ict_tbl_dma;
  1128. int ict_index;
  1129. u32 inta;
  1130. bool use_ict;
  1131. /*
  1132. * reporting the number of tids has AGG on. 0 means
  1133. * no AGGREGATION
  1134. */
  1135. u8 agg_tids_count;
  1136. struct iwl_rx_phy_res last_phy_res;
  1137. bool last_phy_res_valid;
  1138. struct completion firmware_loading_complete;
  1139. u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
  1140. u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
  1141. /*
  1142. * chain noise reset and gain commands are the
  1143. * two extra calibration commands follows the standard
  1144. * phy calibration commands
  1145. */
  1146. u8 phy_calib_chain_noise_reset_cmd;
  1147. u8 phy_calib_chain_noise_gain_cmd;
  1148. struct iwl_notif_statistics statistics;
  1149. struct iwl_bt_notif_statistics statistics_bt;
  1150. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1151. struct iwl_notif_statistics accum_statistics;
  1152. struct iwl_notif_statistics delta_statistics;
  1153. struct iwl_notif_statistics max_delta;
  1154. struct iwl_bt_notif_statistics accum_statistics_bt;
  1155. struct iwl_bt_notif_statistics delta_statistics_bt;
  1156. struct iwl_bt_notif_statistics max_delta_bt;
  1157. #endif
  1158. } _agn;
  1159. #endif
  1160. };
  1161. struct iwl_hw_params hw_params;
  1162. u32 inta_mask;
  1163. struct iwl_qos_info qos_data;
  1164. struct workqueue_struct *workqueue;
  1165. struct work_struct restart;
  1166. struct work_struct scan_completed;
  1167. struct work_struct rx_replenish;
  1168. struct work_struct abort_scan;
  1169. struct work_struct beacon_update;
  1170. struct work_struct tt_work;
  1171. struct work_struct ct_enter;
  1172. struct work_struct ct_exit;
  1173. struct work_struct start_internal_scan;
  1174. struct work_struct tx_flush;
  1175. struct tasklet_struct irq_tasklet;
  1176. struct delayed_work init_alive_start;
  1177. struct delayed_work alive_start;
  1178. struct delayed_work scan_check;
  1179. /* TX Power */
  1180. s8 tx_power_user_lmt;
  1181. s8 tx_power_device_lmt;
  1182. s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */
  1183. #ifdef CONFIG_IWLWIFI_DEBUG
  1184. /* debugging info */
  1185. u32 debug_level; /* per device debugging will override global
  1186. iwl_debug_level if set */
  1187. #endif /* CONFIG_IWLWIFI_DEBUG */
  1188. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1189. /* debugfs */
  1190. u16 tx_traffic_idx;
  1191. u16 rx_traffic_idx;
  1192. u8 *tx_traffic;
  1193. u8 *rx_traffic;
  1194. struct dentry *debugfs_dir;
  1195. u32 dbgfs_sram_offset, dbgfs_sram_len;
  1196. bool disable_ht40;
  1197. #endif /* CONFIG_IWLWIFI_DEBUGFS */
  1198. struct work_struct txpower_work;
  1199. u32 disable_sens_cal;
  1200. u32 disable_chain_noise_cal;
  1201. u32 disable_tx_power_cal;
  1202. struct work_struct run_time_calib_work;
  1203. struct timer_list statistics_periodic;
  1204. struct timer_list ucode_trace;
  1205. struct timer_list monitor_recover;
  1206. bool hw_ready;
  1207. struct iwl_event_log event_log;
  1208. }; /*iwl_priv */
  1209. static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
  1210. {
  1211. set_bit(txq_id, &priv->txq_ctx_active_msk);
  1212. }
  1213. static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
  1214. {
  1215. clear_bit(txq_id, &priv->txq_ctx_active_msk);
  1216. }
  1217. #ifdef CONFIG_IWLWIFI_DEBUG
  1218. const char *iwl_get_tx_fail_reason(u32 status);
  1219. /*
  1220. * iwl_get_debug_level: Return active debug level for device
  1221. *
  1222. * Using sysfs it is possible to set per device debug level. This debug
  1223. * level will be used if set, otherwise the global debug level which can be
  1224. * set via module parameter is used.
  1225. */
  1226. static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
  1227. {
  1228. if (priv->debug_level)
  1229. return priv->debug_level;
  1230. else
  1231. return iwl_debug_level;
  1232. }
  1233. #else
  1234. static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
  1235. static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
  1236. {
  1237. return iwl_debug_level;
  1238. }
  1239. #endif
  1240. static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
  1241. int txq_id, int idx)
  1242. {
  1243. if (priv->txq[txq_id].txb[idx].skb)
  1244. return (struct ieee80211_hdr *)priv->txq[txq_id].
  1245. txb[idx].skb->data;
  1246. return NULL;
  1247. }
  1248. static inline int iwl_is_associated(struct iwl_priv *priv)
  1249. {
  1250. return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
  1251. }
  1252. static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
  1253. {
  1254. if (ch_info == NULL)
  1255. return 0;
  1256. return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
  1257. }
  1258. static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
  1259. {
  1260. return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
  1261. }
  1262. static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
  1263. {
  1264. return ch_info->band == IEEE80211_BAND_5GHZ;
  1265. }
  1266. static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
  1267. {
  1268. return ch_info->band == IEEE80211_BAND_2GHZ;
  1269. }
  1270. static inline int is_channel_passive(const struct iwl_channel_info *ch)
  1271. {
  1272. return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
  1273. }
  1274. static inline int is_channel_ibss(const struct iwl_channel_info *ch)
  1275. {
  1276. return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
  1277. }
  1278. static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
  1279. {
  1280. __free_pages(page, priv->hw_params.rx_page_order);
  1281. priv->alloc_rxb_page--;
  1282. }
  1283. static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
  1284. {
  1285. free_pages(page, priv->hw_params.rx_page_order);
  1286. priv->alloc_rxb_page--;
  1287. }
  1288. #endif /* __iwl_dev_h__ */