iwl-core.c 80 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h" /* FIXME: remove */
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl core");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. static bool bt_coex_active = true;
  63. module_param(bt_coex_active, bool, S_IRUGO);
  64. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  65. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  66. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  67. IWL_RATE_SISO_##s##M_PLCP, \
  68. IWL_RATE_MIMO2_##s##M_PLCP,\
  69. IWL_RATE_MIMO3_##s##M_PLCP,\
  70. IWL_RATE_##r##M_IEEE, \
  71. IWL_RATE_##ip##M_INDEX, \
  72. IWL_RATE_##in##M_INDEX, \
  73. IWL_RATE_##rp##M_INDEX, \
  74. IWL_RATE_##rn##M_INDEX, \
  75. IWL_RATE_##pp##M_INDEX, \
  76. IWL_RATE_##np##M_INDEX }
  77. u32 iwl_debug_level;
  78. EXPORT_SYMBOL(iwl_debug_level);
  79. /*
  80. * Parameter order:
  81. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  82. *
  83. * If there isn't a valid next or previous rate then INV is used which
  84. * maps to IWL_RATE_INVALID
  85. *
  86. */
  87. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  88. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  89. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  90. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  91. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  92. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  93. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  94. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  95. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  96. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  97. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  98. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  99. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  100. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  101. /* FIXME:RS: ^^ should be INV (legacy) */
  102. };
  103. EXPORT_SYMBOL(iwl_rates);
  104. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  105. {
  106. int idx = 0;
  107. /* HT rate format */
  108. if (rate_n_flags & RATE_MCS_HT_MSK) {
  109. idx = (rate_n_flags & 0xff);
  110. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  111. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  112. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  113. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  114. idx += IWL_FIRST_OFDM_RATE;
  115. /* skip 9M not supported in ht*/
  116. if (idx >= IWL_RATE_9M_INDEX)
  117. idx += 1;
  118. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  119. return idx;
  120. /* legacy rate format, search for match in table */
  121. } else {
  122. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  123. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  124. return idx;
  125. }
  126. return -1;
  127. }
  128. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  129. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
  130. {
  131. int i;
  132. u8 ind = ant;
  133. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  134. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  135. if (valid & BIT(ind))
  136. return ind;
  137. }
  138. return ant;
  139. }
  140. EXPORT_SYMBOL(iwl_toggle_tx_ant);
  141. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  142. EXPORT_SYMBOL(iwl_bcast_addr);
  143. /* This function both allocates and initializes hw and priv. */
  144. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  145. struct ieee80211_ops *hw_ops)
  146. {
  147. struct iwl_priv *priv;
  148. /* mac80211 allocates memory for this device instance, including
  149. * space for this driver's private structure */
  150. struct ieee80211_hw *hw =
  151. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  152. if (hw == NULL) {
  153. pr_err("%s: Can not allocate network device\n",
  154. cfg->name);
  155. goto out;
  156. }
  157. priv = hw->priv;
  158. priv->hw = hw;
  159. out:
  160. return hw;
  161. }
  162. EXPORT_SYMBOL(iwl_alloc_all);
  163. void iwl_hw_detect(struct iwl_priv *priv)
  164. {
  165. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  166. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  167. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  168. }
  169. EXPORT_SYMBOL(iwl_hw_detect);
  170. /*
  171. * QoS support
  172. */
  173. static void iwl_update_qos(struct iwl_priv *priv)
  174. {
  175. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  176. return;
  177. priv->qos_data.def_qos_parm.qos_flags = 0;
  178. if (priv->qos_data.qos_active)
  179. priv->qos_data.def_qos_parm.qos_flags |=
  180. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  181. if (priv->current_ht_config.is_ht)
  182. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  183. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  184. priv->qos_data.qos_active,
  185. priv->qos_data.def_qos_parm.qos_flags);
  186. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  187. sizeof(struct iwl_qosparam_cmd),
  188. &priv->qos_data.def_qos_parm, NULL);
  189. }
  190. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  191. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  192. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  193. struct ieee80211_sta_ht_cap *ht_info,
  194. enum ieee80211_band band)
  195. {
  196. u16 max_bit_rate = 0;
  197. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  198. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  199. ht_info->cap = 0;
  200. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  201. ht_info->ht_supported = true;
  202. if (priv->cfg->ht_greenfield_support)
  203. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  204. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  205. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  206. if (priv->hw_params.ht40_channel & BIT(band)) {
  207. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  208. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  209. ht_info->mcs.rx_mask[4] = 0x01;
  210. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  211. }
  212. if (priv->cfg->mod_params->amsdu_size_8K)
  213. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  214. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  215. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  216. ht_info->mcs.rx_mask[0] = 0xFF;
  217. if (rx_chains_num >= 2)
  218. ht_info->mcs.rx_mask[1] = 0xFF;
  219. if (rx_chains_num >= 3)
  220. ht_info->mcs.rx_mask[2] = 0xFF;
  221. /* Highest supported Rx data rate */
  222. max_bit_rate *= rx_chains_num;
  223. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  224. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  225. /* Tx MCS capabilities */
  226. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  227. if (tx_chains_num != rx_chains_num) {
  228. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  229. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  230. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  231. }
  232. }
  233. /**
  234. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  235. */
  236. int iwlcore_init_geos(struct iwl_priv *priv)
  237. {
  238. struct iwl_channel_info *ch;
  239. struct ieee80211_supported_band *sband;
  240. struct ieee80211_channel *channels;
  241. struct ieee80211_channel *geo_ch;
  242. struct ieee80211_rate *rates;
  243. int i = 0;
  244. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  245. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  246. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  247. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  248. return 0;
  249. }
  250. channels = kzalloc(sizeof(struct ieee80211_channel) *
  251. priv->channel_count, GFP_KERNEL);
  252. if (!channels)
  253. return -ENOMEM;
  254. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  255. GFP_KERNEL);
  256. if (!rates) {
  257. kfree(channels);
  258. return -ENOMEM;
  259. }
  260. /* 5.2GHz channels start after the 2.4GHz channels */
  261. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  262. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  263. /* just OFDM */
  264. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  265. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  266. if (priv->cfg->sku & IWL_SKU_N)
  267. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  268. IEEE80211_BAND_5GHZ);
  269. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  270. sband->channels = channels;
  271. /* OFDM & CCK */
  272. sband->bitrates = rates;
  273. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  274. if (priv->cfg->sku & IWL_SKU_N)
  275. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  276. IEEE80211_BAND_2GHZ);
  277. priv->ieee_channels = channels;
  278. priv->ieee_rates = rates;
  279. for (i = 0; i < priv->channel_count; i++) {
  280. ch = &priv->channel_info[i];
  281. /* FIXME: might be removed if scan is OK */
  282. if (!is_channel_valid(ch))
  283. continue;
  284. if (is_channel_a_band(ch))
  285. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  286. else
  287. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  288. geo_ch = &sband->channels[sband->n_channels++];
  289. geo_ch->center_freq =
  290. ieee80211_channel_to_frequency(ch->channel);
  291. geo_ch->max_power = ch->max_power_avg;
  292. geo_ch->max_antenna_gain = 0xff;
  293. geo_ch->hw_value = ch->channel;
  294. if (is_channel_valid(ch)) {
  295. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  296. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  297. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  298. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  299. if (ch->flags & EEPROM_CHANNEL_RADAR)
  300. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  301. geo_ch->flags |= ch->ht40_extension_channel;
  302. if (ch->max_power_avg > priv->tx_power_device_lmt)
  303. priv->tx_power_device_lmt = ch->max_power_avg;
  304. } else {
  305. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  306. }
  307. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  308. ch->channel, geo_ch->center_freq,
  309. is_channel_a_band(ch) ? "5.2" : "2.4",
  310. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  311. "restricted" : "valid",
  312. geo_ch->flags);
  313. }
  314. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  315. priv->cfg->sku & IWL_SKU_A) {
  316. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  317. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  318. priv->pci_dev->device,
  319. priv->pci_dev->subsystem_device);
  320. priv->cfg->sku &= ~IWL_SKU_A;
  321. }
  322. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  323. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  324. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  325. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  326. return 0;
  327. }
  328. EXPORT_SYMBOL(iwlcore_init_geos);
  329. /*
  330. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  331. */
  332. void iwlcore_free_geos(struct iwl_priv *priv)
  333. {
  334. kfree(priv->ieee_channels);
  335. kfree(priv->ieee_rates);
  336. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  337. }
  338. EXPORT_SYMBOL(iwlcore_free_geos);
  339. /*
  340. * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  341. * function.
  342. */
  343. void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
  344. struct ieee80211_tx_info *info,
  345. __le16 fc, __le32 *tx_flags)
  346. {
  347. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  348. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  349. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  350. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  351. if (!ieee80211_is_mgmt(fc))
  352. return;
  353. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  354. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  355. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  356. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  357. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  358. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  359. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  360. break;
  361. }
  362. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  363. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  364. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  365. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  366. }
  367. }
  368. EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
  369. static bool is_single_rx_stream(struct iwl_priv *priv)
  370. {
  371. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  372. priv->current_ht_config.single_chain_sufficient;
  373. }
  374. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  375. enum ieee80211_band band,
  376. u16 channel, u8 extension_chan_offset)
  377. {
  378. const struct iwl_channel_info *ch_info;
  379. ch_info = iwl_get_channel_info(priv, band, channel);
  380. if (!is_channel_valid(ch_info))
  381. return 0;
  382. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  383. return !(ch_info->ht40_extension_channel &
  384. IEEE80211_CHAN_NO_HT40PLUS);
  385. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  386. return !(ch_info->ht40_extension_channel &
  387. IEEE80211_CHAN_NO_HT40MINUS);
  388. return 0;
  389. }
  390. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  391. struct ieee80211_sta_ht_cap *sta_ht_inf)
  392. {
  393. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  394. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  395. return 0;
  396. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  397. * the bit will not set if it is pure 40MHz case
  398. */
  399. if (sta_ht_inf) {
  400. if (!sta_ht_inf->ht_supported)
  401. return 0;
  402. }
  403. #ifdef CONFIG_IWLWIFI_DEBUGFS
  404. if (priv->disable_ht40)
  405. return 0;
  406. #endif
  407. return iwl_is_channel_extension(priv, priv->band,
  408. le16_to_cpu(priv->staging_rxon.channel),
  409. ht_conf->extension_chan_offset);
  410. }
  411. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  412. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  413. {
  414. u16 new_val = 0;
  415. u16 beacon_factor = 0;
  416. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  417. new_val = beacon_val / beacon_factor;
  418. if (!new_val)
  419. new_val = max_beacon_val;
  420. return new_val;
  421. }
  422. void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
  423. {
  424. u64 tsf;
  425. s32 interval_tm, rem;
  426. unsigned long flags;
  427. struct ieee80211_conf *conf = NULL;
  428. u16 beacon_int;
  429. conf = ieee80211_get_hw_conf(priv->hw);
  430. spin_lock_irqsave(&priv->lock, flags);
  431. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  432. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  433. beacon_int = vif->bss_conf.beacon_int;
  434. if (vif->type == NL80211_IFTYPE_ADHOC) {
  435. /* TODO: we need to get atim_window from upper stack
  436. * for now we set to 0 */
  437. priv->rxon_timing.atim_window = 0;
  438. } else {
  439. priv->rxon_timing.atim_window = 0;
  440. }
  441. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  442. priv->hw_params.max_beacon_itrvl * TIME_UNIT);
  443. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  444. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  445. interval_tm = beacon_int * TIME_UNIT;
  446. rem = do_div(tsf, interval_tm);
  447. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  448. spin_unlock_irqrestore(&priv->lock, flags);
  449. IWL_DEBUG_ASSOC(priv,
  450. "beacon interval %d beacon timer %d beacon tim %d\n",
  451. le16_to_cpu(priv->rxon_timing.beacon_interval),
  452. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  453. le16_to_cpu(priv->rxon_timing.atim_window));
  454. }
  455. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  456. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  457. {
  458. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  459. if (hw_decrypt)
  460. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  461. else
  462. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  463. }
  464. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  465. /**
  466. * iwl_check_rxon_cmd - validate RXON structure is valid
  467. *
  468. * NOTE: This is really only useful during development and can eventually
  469. * be #ifdef'd out once the driver is stable and folks aren't actively
  470. * making changes
  471. */
  472. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  473. {
  474. int error = 0;
  475. int counter = 1;
  476. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  477. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  478. error |= le32_to_cpu(rxon->flags &
  479. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  480. RXON_FLG_RADAR_DETECT_MSK));
  481. if (error)
  482. IWL_WARN(priv, "check 24G fields %d | %d\n",
  483. counter++, error);
  484. } else {
  485. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  486. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  487. if (error)
  488. IWL_WARN(priv, "check 52 fields %d | %d\n",
  489. counter++, error);
  490. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  491. if (error)
  492. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  493. counter++, error);
  494. }
  495. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  496. if (error)
  497. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  498. /* make sure basic rates 6Mbps and 1Mbps are supported */
  499. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  500. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  501. if (error)
  502. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  503. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  504. if (error)
  505. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  506. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  507. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  508. if (error)
  509. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  510. counter++, error);
  511. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  512. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  513. if (error)
  514. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  515. counter++, error);
  516. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  517. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  518. if (error)
  519. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  520. counter++, error);
  521. if (error)
  522. IWL_WARN(priv, "Tuning to channel %d\n",
  523. le16_to_cpu(rxon->channel));
  524. if (error) {
  525. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  526. return -1;
  527. }
  528. return 0;
  529. }
  530. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  531. /**
  532. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  533. * @priv: staging_rxon is compared to active_rxon
  534. *
  535. * If the RXON structure is changing enough to require a new tune,
  536. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  537. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  538. */
  539. int iwl_full_rxon_required(struct iwl_priv *priv)
  540. {
  541. /* These items are only settable from the full RXON command */
  542. if (!(iwl_is_associated(priv)) ||
  543. compare_ether_addr(priv->staging_rxon.bssid_addr,
  544. priv->active_rxon.bssid_addr) ||
  545. compare_ether_addr(priv->staging_rxon.node_addr,
  546. priv->active_rxon.node_addr) ||
  547. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  548. priv->active_rxon.wlap_bssid_addr) ||
  549. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  550. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  551. (priv->staging_rxon.air_propagation !=
  552. priv->active_rxon.air_propagation) ||
  553. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  554. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  555. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  556. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  557. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  558. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  559. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  560. return 1;
  561. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  562. * be updated with the RXON_ASSOC command -- however only some
  563. * flag transitions are allowed using RXON_ASSOC */
  564. /* Check if we are not switching bands */
  565. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  566. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  567. return 1;
  568. /* Check if we are switching association toggle */
  569. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  570. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  571. return 1;
  572. return 0;
  573. }
  574. EXPORT_SYMBOL(iwl_full_rxon_required);
  575. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  576. {
  577. /*
  578. * Assign the lowest rate -- should really get this from
  579. * the beacon skb from mac80211.
  580. */
  581. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  582. return IWL_RATE_1M_PLCP;
  583. else
  584. return IWL_RATE_6M_PLCP;
  585. }
  586. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  587. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  588. {
  589. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  590. if (!ht_conf->is_ht) {
  591. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  592. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  593. RXON_FLG_HT40_PROT_MSK |
  594. RXON_FLG_HT_PROT_MSK);
  595. return;
  596. }
  597. /* FIXME: if the definition of ht_protection changed, the "translation"
  598. * will be needed for rxon->flags
  599. */
  600. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  601. /* Set up channel bandwidth:
  602. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  603. /* clear the HT channel mode before set the mode */
  604. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  605. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  606. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  607. /* pure ht40 */
  608. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  609. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  610. /* Note: control channel is opposite of extension channel */
  611. switch (ht_conf->extension_chan_offset) {
  612. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  613. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  614. break;
  615. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  616. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  617. break;
  618. }
  619. } else {
  620. /* Note: control channel is opposite of extension channel */
  621. switch (ht_conf->extension_chan_offset) {
  622. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  623. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  624. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  625. break;
  626. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  627. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  628. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  629. break;
  630. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  631. default:
  632. /* channel location only valid if in Mixed mode */
  633. IWL_ERR(priv, "invalid extension channel offset\n");
  634. break;
  635. }
  636. }
  637. } else {
  638. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  639. }
  640. if (priv->cfg->ops->hcmd->set_rxon_chain)
  641. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  642. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  643. "extension channel offset 0x%x\n",
  644. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  645. ht_conf->extension_chan_offset);
  646. }
  647. EXPORT_SYMBOL(iwl_set_rxon_ht);
  648. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  649. #define IWL_NUM_RX_CHAINS_SINGLE 2
  650. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  651. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  652. /*
  653. * Determine how many receiver/antenna chains to use.
  654. *
  655. * More provides better reception via diversity. Fewer saves power
  656. * at the expense of throughput, but only when not in powersave to
  657. * start with.
  658. *
  659. * MIMO (dual stream) requires at least 2, but works better with 3.
  660. * This does not determine *which* chains to use, just how many.
  661. */
  662. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  663. {
  664. /* # of Rx chains to use when expecting MIMO. */
  665. if (is_single_rx_stream(priv))
  666. return IWL_NUM_RX_CHAINS_SINGLE;
  667. else
  668. return IWL_NUM_RX_CHAINS_MULTIPLE;
  669. }
  670. /*
  671. * When we are in power saving mode, unless device support spatial
  672. * multiplexing power save, use the active count for rx chain count.
  673. */
  674. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  675. {
  676. /* # Rx chains when idling, depending on SMPS mode */
  677. switch (priv->current_ht_config.smps) {
  678. case IEEE80211_SMPS_STATIC:
  679. case IEEE80211_SMPS_DYNAMIC:
  680. return IWL_NUM_IDLE_CHAINS_SINGLE;
  681. case IEEE80211_SMPS_OFF:
  682. return active_cnt;
  683. default:
  684. WARN(1, "invalid SMPS mode %d",
  685. priv->current_ht_config.smps);
  686. return active_cnt;
  687. }
  688. }
  689. /* up to 4 chains */
  690. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  691. {
  692. u8 res;
  693. res = (chain_bitmap & BIT(0)) >> 0;
  694. res += (chain_bitmap & BIT(1)) >> 1;
  695. res += (chain_bitmap & BIT(2)) >> 2;
  696. res += (chain_bitmap & BIT(3)) >> 3;
  697. return res;
  698. }
  699. /**
  700. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  701. *
  702. * Selects how many and which Rx receivers/antennas/chains to use.
  703. * This should not be used for scan command ... it puts data in wrong place.
  704. */
  705. void iwl_set_rxon_chain(struct iwl_priv *priv)
  706. {
  707. bool is_single = is_single_rx_stream(priv);
  708. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  709. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  710. u32 active_chains;
  711. u16 rx_chain;
  712. /* Tell uCode which antennas are actually connected.
  713. * Before first association, we assume all antennas are connected.
  714. * Just after first association, iwl_chain_noise_calibration()
  715. * checks which antennas actually *are* connected. */
  716. if (priv->chain_noise_data.active_chains)
  717. active_chains = priv->chain_noise_data.active_chains;
  718. else
  719. active_chains = priv->hw_params.valid_rx_ant;
  720. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  721. /* How many receivers should we use? */
  722. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  723. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  724. /* correct rx chain count according hw settings
  725. * and chain noise calibration
  726. */
  727. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  728. if (valid_rx_cnt < active_rx_cnt)
  729. active_rx_cnt = valid_rx_cnt;
  730. if (valid_rx_cnt < idle_rx_cnt)
  731. idle_rx_cnt = valid_rx_cnt;
  732. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  733. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  734. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  735. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  736. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  737. else
  738. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  739. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  740. priv->staging_rxon.rx_chain,
  741. active_rx_cnt, idle_rx_cnt);
  742. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  743. active_rx_cnt < idle_rx_cnt);
  744. }
  745. EXPORT_SYMBOL(iwl_set_rxon_chain);
  746. /* Return valid channel */
  747. u8 iwl_get_single_channel_number(struct iwl_priv *priv,
  748. enum ieee80211_band band)
  749. {
  750. const struct iwl_channel_info *ch_info;
  751. int i;
  752. u8 channel = 0;
  753. /* only scan single channel, good enough to reset the RF */
  754. /* pick the first valid not in-use channel */
  755. if (band == IEEE80211_BAND_5GHZ) {
  756. for (i = 14; i < priv->channel_count; i++) {
  757. if (priv->channel_info[i].channel !=
  758. le16_to_cpu(priv->staging_rxon.channel)) {
  759. channel = priv->channel_info[i].channel;
  760. ch_info = iwl_get_channel_info(priv,
  761. band, channel);
  762. if (is_channel_valid(ch_info))
  763. break;
  764. }
  765. }
  766. } else {
  767. for (i = 0; i < 14; i++) {
  768. if (priv->channel_info[i].channel !=
  769. le16_to_cpu(priv->staging_rxon.channel)) {
  770. channel =
  771. priv->channel_info[i].channel;
  772. ch_info = iwl_get_channel_info(priv,
  773. band, channel);
  774. if (is_channel_valid(ch_info))
  775. break;
  776. }
  777. }
  778. }
  779. return channel;
  780. }
  781. EXPORT_SYMBOL(iwl_get_single_channel_number);
  782. /**
  783. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  784. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  785. * @channel: Any channel valid for the requested phymode
  786. * In addition to setting the staging RXON, priv->phymode is also set.
  787. *
  788. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  789. * in the staging RXON flag structure based on the phymode
  790. */
  791. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  792. {
  793. enum ieee80211_band band = ch->band;
  794. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  795. if (!iwl_get_channel_info(priv, band, channel)) {
  796. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  797. channel, band);
  798. return -EINVAL;
  799. }
  800. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  801. (priv->band == band))
  802. return 0;
  803. priv->staging_rxon.channel = cpu_to_le16(channel);
  804. if (band == IEEE80211_BAND_5GHZ)
  805. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  806. else
  807. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  808. priv->band = band;
  809. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  810. return 0;
  811. }
  812. EXPORT_SYMBOL(iwl_set_rxon_channel);
  813. void iwl_set_flags_for_band(struct iwl_priv *priv,
  814. enum ieee80211_band band,
  815. struct ieee80211_vif *vif)
  816. {
  817. if (band == IEEE80211_BAND_5GHZ) {
  818. priv->staging_rxon.flags &=
  819. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  820. | RXON_FLG_CCK_MSK);
  821. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  822. } else {
  823. /* Copied from iwl_post_associate() */
  824. if (vif && vif->bss_conf.use_short_slot)
  825. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  826. else
  827. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  828. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  829. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  830. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  831. }
  832. }
  833. EXPORT_SYMBOL(iwl_set_flags_for_band);
  834. /*
  835. * initialize rxon structure with default values from eeprom
  836. */
  837. void iwl_connection_init_rx_config(struct iwl_priv *priv,
  838. struct ieee80211_vif *vif)
  839. {
  840. const struct iwl_channel_info *ch_info;
  841. enum nl80211_iftype type = NL80211_IFTYPE_STATION;
  842. if (vif)
  843. type = vif->type;
  844. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  845. switch (type) {
  846. case NL80211_IFTYPE_AP:
  847. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  848. break;
  849. case NL80211_IFTYPE_STATION:
  850. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  851. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  852. break;
  853. case NL80211_IFTYPE_ADHOC:
  854. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  855. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  856. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  857. RXON_FILTER_ACCEPT_GRP_MSK;
  858. break;
  859. default:
  860. IWL_ERR(priv, "Unsupported interface type %d\n", type);
  861. break;
  862. }
  863. #if 0
  864. /* TODO: Figure out when short_preamble would be set and cache from
  865. * that */
  866. if (!hw_to_local(priv->hw)->short_preamble)
  867. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  868. else
  869. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  870. #endif
  871. ch_info = iwl_get_channel_info(priv, priv->band,
  872. le16_to_cpu(priv->active_rxon.channel));
  873. if (!ch_info)
  874. ch_info = &priv->channel_info[0];
  875. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  876. priv->band = ch_info->band;
  877. iwl_set_flags_for_band(priv, priv->band, vif);
  878. priv->staging_rxon.ofdm_basic_rates =
  879. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  880. priv->staging_rxon.cck_basic_rates =
  881. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  882. /* clear both MIX and PURE40 mode flag */
  883. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  884. RXON_FLG_CHANNEL_MODE_PURE_40);
  885. if (vif)
  886. memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN);
  887. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  888. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  889. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  890. }
  891. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  892. void iwl_set_rate(struct iwl_priv *priv)
  893. {
  894. const struct ieee80211_supported_band *hw = NULL;
  895. struct ieee80211_rate *rate;
  896. int i;
  897. hw = iwl_get_hw_mode(priv, priv->band);
  898. if (!hw) {
  899. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  900. return;
  901. }
  902. priv->active_rate = 0;
  903. for (i = 0; i < hw->n_bitrates; i++) {
  904. rate = &(hw->bitrates[i]);
  905. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  906. priv->active_rate |= (1 << rate->hw_value);
  907. }
  908. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  909. priv->staging_rxon.cck_basic_rates =
  910. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  911. priv->staging_rxon.ofdm_basic_rates =
  912. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  913. }
  914. EXPORT_SYMBOL(iwl_set_rate);
  915. void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
  916. {
  917. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  918. return;
  919. if (priv->switch_rxon.switch_in_progress) {
  920. ieee80211_chswitch_done(priv->vif, is_success);
  921. mutex_lock(&priv->mutex);
  922. priv->switch_rxon.switch_in_progress = false;
  923. mutex_unlock(&priv->mutex);
  924. }
  925. }
  926. EXPORT_SYMBOL(iwl_chswitch_done);
  927. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  928. {
  929. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  930. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  931. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  932. if (priv->switch_rxon.switch_in_progress) {
  933. if (!le32_to_cpu(csa->status) &&
  934. (csa->channel == priv->switch_rxon.channel)) {
  935. rxon->channel = csa->channel;
  936. priv->staging_rxon.channel = csa->channel;
  937. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  938. le16_to_cpu(csa->channel));
  939. iwl_chswitch_done(priv, true);
  940. } else {
  941. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  942. le16_to_cpu(csa->channel));
  943. iwl_chswitch_done(priv, false);
  944. }
  945. }
  946. }
  947. EXPORT_SYMBOL(iwl_rx_csa);
  948. #ifdef CONFIG_IWLWIFI_DEBUG
  949. void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  950. {
  951. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  952. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  953. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  954. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  955. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  956. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  957. le32_to_cpu(rxon->filter_flags));
  958. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  959. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  960. rxon->ofdm_basic_rates);
  961. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  962. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  963. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  964. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  965. }
  966. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  967. #endif
  968. /**
  969. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  970. */
  971. void iwl_irq_handle_error(struct iwl_priv *priv)
  972. {
  973. /* Set the FW error flag -- cleared on iwl_down */
  974. set_bit(STATUS_FW_ERROR, &priv->status);
  975. /* Cancel currently queued command. */
  976. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  977. IWL_ERR(priv, "Loaded firmware version: %s\n",
  978. priv->hw->wiphy->fw_version);
  979. priv->cfg->ops->lib->dump_nic_error_log(priv);
  980. if (priv->cfg->ops->lib->dump_csr)
  981. priv->cfg->ops->lib->dump_csr(priv);
  982. if (priv->cfg->ops->lib->dump_fh)
  983. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  984. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  985. #ifdef CONFIG_IWLWIFI_DEBUG
  986. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  987. iwl_print_rx_config_cmd(priv);
  988. #endif
  989. wake_up_interruptible(&priv->wait_command_queue);
  990. /* Keep the restart process from trying to send host
  991. * commands by clearing the INIT status bit */
  992. clear_bit(STATUS_READY, &priv->status);
  993. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  994. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  995. "Restarting adapter due to uCode error.\n");
  996. if (priv->cfg->mod_params->restart_fw)
  997. queue_work(priv->workqueue, &priv->restart);
  998. }
  999. }
  1000. EXPORT_SYMBOL(iwl_irq_handle_error);
  1001. static int iwl_apm_stop_master(struct iwl_priv *priv)
  1002. {
  1003. int ret = 0;
  1004. /* stop device's busmaster DMA activity */
  1005. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  1006. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  1007. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  1008. if (ret)
  1009. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  1010. IWL_DEBUG_INFO(priv, "stop master\n");
  1011. return ret;
  1012. }
  1013. void iwl_apm_stop(struct iwl_priv *priv)
  1014. {
  1015. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  1016. /* Stop device's DMA activity */
  1017. iwl_apm_stop_master(priv);
  1018. /* Reset the entire device */
  1019. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  1020. udelay(10);
  1021. /*
  1022. * Clear "initialization complete" bit to move adapter from
  1023. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  1024. */
  1025. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1026. }
  1027. EXPORT_SYMBOL(iwl_apm_stop);
  1028. /*
  1029. * Start up NIC's basic functionality after it has been reset
  1030. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  1031. * NOTE: This does not load uCode nor start the embedded processor
  1032. */
  1033. int iwl_apm_init(struct iwl_priv *priv)
  1034. {
  1035. int ret = 0;
  1036. u16 lctl;
  1037. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  1038. /*
  1039. * Use "set_bit" below rather than "write", to preserve any hardware
  1040. * bits already set by default after reset.
  1041. */
  1042. /* Disable L0S exit timer (platform NMI Work/Around) */
  1043. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1044. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  1045. /*
  1046. * Disable L0s without affecting L1;
  1047. * don't wait for ICH L0s (ICH bug W/A)
  1048. */
  1049. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1050. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  1051. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  1052. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  1053. /*
  1054. * Enable HAP INTA (interrupt from management bus) to
  1055. * wake device's PCI Express link L1a -> L0s
  1056. * NOTE: This is no-op for 3945 (non-existant bit)
  1057. */
  1058. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1059. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  1060. /*
  1061. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  1062. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  1063. * If so (likely), disable L0S, so device moves directly L0->L1;
  1064. * costs negligible amount of power savings.
  1065. * If not (unlikely), enable L0S, so there is at least some
  1066. * power savings, even without L1.
  1067. */
  1068. if (priv->cfg->set_l0s) {
  1069. lctl = iwl_pcie_link_ctl(priv);
  1070. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  1071. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  1072. /* L1-ASPM enabled; disable(!) L0S */
  1073. iwl_set_bit(priv, CSR_GIO_REG,
  1074. CSR_GIO_REG_VAL_L0S_ENABLED);
  1075. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  1076. } else {
  1077. /* L1-ASPM disabled; enable(!) L0S */
  1078. iwl_clear_bit(priv, CSR_GIO_REG,
  1079. CSR_GIO_REG_VAL_L0S_ENABLED);
  1080. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  1081. }
  1082. }
  1083. /* Configure analog phase-lock-loop before activating to D0A */
  1084. if (priv->cfg->pll_cfg_val)
  1085. iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
  1086. /*
  1087. * Set "initialization complete" bit to move adapter from
  1088. * D0U* --> D0A* (powered-up active) state.
  1089. */
  1090. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1091. /*
  1092. * Wait for clock stabilization; once stabilized, access to
  1093. * device-internal resources is supported, e.g. iwl_write_prph()
  1094. * and accesses to uCode SRAM.
  1095. */
  1096. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  1097. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  1098. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  1099. if (ret < 0) {
  1100. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  1101. goto out;
  1102. }
  1103. /*
  1104. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  1105. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  1106. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  1107. * and don't need BSM to restore data after power-saving sleep.
  1108. *
  1109. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  1110. * do not disable clocks. This preserves any hardware bits already
  1111. * set by default in "CLK_CTRL_REG" after reset.
  1112. */
  1113. if (priv->cfg->use_bsm)
  1114. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1115. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  1116. else
  1117. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1118. APMG_CLK_VAL_DMA_CLK_RQT);
  1119. udelay(20);
  1120. /* Disable L1-Active */
  1121. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  1122. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  1123. out:
  1124. return ret;
  1125. }
  1126. EXPORT_SYMBOL(iwl_apm_init);
  1127. int iwl_set_hw_params(struct iwl_priv *priv)
  1128. {
  1129. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1130. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1131. if (priv->cfg->mod_params->amsdu_size_8K)
  1132. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  1133. else
  1134. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  1135. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1136. if (priv->cfg->mod_params->disable_11n)
  1137. priv->cfg->sku &= ~IWL_SKU_N;
  1138. /* Device-specific setup */
  1139. return priv->cfg->ops->lib->set_hw_params(priv);
  1140. }
  1141. EXPORT_SYMBOL(iwl_set_hw_params);
  1142. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1143. {
  1144. int ret = 0;
  1145. s8 prev_tx_power = priv->tx_power_user_lmt;
  1146. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  1147. IWL_WARN(priv,
  1148. "Requested user TXPOWER %d below lower limit %d.\n",
  1149. tx_power,
  1150. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  1151. return -EINVAL;
  1152. }
  1153. if (tx_power > priv->tx_power_device_lmt) {
  1154. IWL_WARN(priv,
  1155. "Requested user TXPOWER %d above upper limit %d.\n",
  1156. tx_power, priv->tx_power_device_lmt);
  1157. return -EINVAL;
  1158. }
  1159. if (priv->tx_power_user_lmt != tx_power)
  1160. force = true;
  1161. /* if nic is not up don't send command */
  1162. if (iwl_is_ready_rf(priv)) {
  1163. priv->tx_power_user_lmt = tx_power;
  1164. if (force && priv->cfg->ops->lib->send_tx_power)
  1165. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1166. else if (!priv->cfg->ops->lib->send_tx_power)
  1167. ret = -EOPNOTSUPP;
  1168. /*
  1169. * if fail to set tx_power, restore the orig. tx power
  1170. */
  1171. if (ret)
  1172. priv->tx_power_user_lmt = prev_tx_power;
  1173. }
  1174. /*
  1175. * Even this is an async host command, the command
  1176. * will always report success from uCode
  1177. * So once driver can placing the command into the queue
  1178. * successfully, driver can use priv->tx_power_user_lmt
  1179. * to reflect the current tx power
  1180. */
  1181. return ret;
  1182. }
  1183. EXPORT_SYMBOL(iwl_set_tx_power);
  1184. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1185. {
  1186. struct iwl_priv *priv = data;
  1187. u32 inta, inta_mask;
  1188. u32 inta_fh;
  1189. unsigned long flags;
  1190. if (!priv)
  1191. return IRQ_NONE;
  1192. spin_lock_irqsave(&priv->lock, flags);
  1193. /* Disable (but don't clear!) interrupts here to avoid
  1194. * back-to-back ISRs and sporadic interrupts from our NIC.
  1195. * If we have something to service, the tasklet will re-enable ints.
  1196. * If we *don't* have something, we'll re-enable before leaving here. */
  1197. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1198. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1199. /* Discover which interrupts are active/pending */
  1200. inta = iwl_read32(priv, CSR_INT);
  1201. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1202. /* Ignore interrupt if there's nothing in NIC to service.
  1203. * This may be due to IRQ shared with another device,
  1204. * or due to sporadic interrupts thrown from our NIC. */
  1205. if (!inta && !inta_fh) {
  1206. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1207. goto none;
  1208. }
  1209. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1210. /* Hardware disappeared. It might have already raised
  1211. * an interrupt */
  1212. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1213. goto unplugged;
  1214. }
  1215. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1216. inta, inta_mask, inta_fh);
  1217. inta &= ~CSR_INT_BIT_SCD;
  1218. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1219. if (likely(inta || inta_fh))
  1220. tasklet_schedule(&priv->irq_tasklet);
  1221. unplugged:
  1222. spin_unlock_irqrestore(&priv->lock, flags);
  1223. return IRQ_HANDLED;
  1224. none:
  1225. /* re-enable interrupts here since we don't have anything to service. */
  1226. /* only Re-enable if diabled by irq */
  1227. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1228. iwl_enable_interrupts(priv);
  1229. spin_unlock_irqrestore(&priv->lock, flags);
  1230. return IRQ_NONE;
  1231. }
  1232. EXPORT_SYMBOL(iwl_isr_legacy);
  1233. void iwl_send_bt_config(struct iwl_priv *priv)
  1234. {
  1235. struct iwl_bt_cmd bt_cmd = {
  1236. .lead_time = BT_LEAD_TIME_DEF,
  1237. .max_kill = BT_MAX_KILL_DEF,
  1238. .kill_ack_mask = 0,
  1239. .kill_cts_mask = 0,
  1240. };
  1241. if (!bt_coex_active)
  1242. bt_cmd.flags = BT_COEX_DISABLE;
  1243. else
  1244. bt_cmd.flags = BT_COEX_ENABLE;
  1245. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1246. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1247. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1248. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1249. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1250. }
  1251. EXPORT_SYMBOL(iwl_send_bt_config);
  1252. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1253. {
  1254. struct iwl_statistics_cmd statistics_cmd = {
  1255. .configuration_flags =
  1256. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1257. };
  1258. if (flags & CMD_ASYNC)
  1259. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1260. sizeof(struct iwl_statistics_cmd),
  1261. &statistics_cmd, NULL);
  1262. else
  1263. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1264. sizeof(struct iwl_statistics_cmd),
  1265. &statistics_cmd);
  1266. }
  1267. EXPORT_SYMBOL(iwl_send_statistics_request);
  1268. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1269. {
  1270. struct iwl_ct_kill_config cmd;
  1271. struct iwl_ct_kill_throttling_config adv_cmd;
  1272. unsigned long flags;
  1273. int ret = 0;
  1274. spin_lock_irqsave(&priv->lock, flags);
  1275. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1276. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1277. spin_unlock_irqrestore(&priv->lock, flags);
  1278. priv->thermal_throttle.ct_kill_toggle = false;
  1279. if (priv->cfg->support_ct_kill_exit) {
  1280. adv_cmd.critical_temperature_enter =
  1281. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1282. adv_cmd.critical_temperature_exit =
  1283. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1284. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1285. sizeof(adv_cmd), &adv_cmd);
  1286. if (ret)
  1287. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1288. else
  1289. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1290. "succeeded, "
  1291. "critical temperature enter is %d,"
  1292. "exit is %d\n",
  1293. priv->hw_params.ct_kill_threshold,
  1294. priv->hw_params.ct_kill_exit_threshold);
  1295. } else {
  1296. cmd.critical_temperature_R =
  1297. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1298. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1299. sizeof(cmd), &cmd);
  1300. if (ret)
  1301. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1302. else
  1303. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1304. "succeeded, "
  1305. "critical temperature is %d\n",
  1306. priv->hw_params.ct_kill_threshold);
  1307. }
  1308. }
  1309. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1310. /*
  1311. * CARD_STATE_CMD
  1312. *
  1313. * Use: Sets the device's internal card state to enable, disable, or halt
  1314. *
  1315. * When in the 'enable' state the card operates as normal.
  1316. * When in the 'disable' state, the card enters into a low power mode.
  1317. * When in the 'halt' state, the card is shut down and must be fully
  1318. * restarted to come back on.
  1319. */
  1320. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1321. {
  1322. struct iwl_host_cmd cmd = {
  1323. .id = REPLY_CARD_STATE_CMD,
  1324. .len = sizeof(u32),
  1325. .data = &flags,
  1326. .flags = meta_flag,
  1327. };
  1328. return iwl_send_cmd(priv, &cmd);
  1329. }
  1330. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1331. struct iwl_rx_mem_buffer *rxb)
  1332. {
  1333. #ifdef CONFIG_IWLWIFI_DEBUG
  1334. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1335. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1336. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1337. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1338. #endif
  1339. }
  1340. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1341. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1342. struct iwl_rx_mem_buffer *rxb)
  1343. {
  1344. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1345. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1346. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1347. "notification for %s:\n", len,
  1348. get_cmd_string(pkt->hdr.cmd));
  1349. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1350. }
  1351. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1352. void iwl_rx_reply_error(struct iwl_priv *priv,
  1353. struct iwl_rx_mem_buffer *rxb)
  1354. {
  1355. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1356. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1357. "seq 0x%04X ser 0x%08X\n",
  1358. le32_to_cpu(pkt->u.err_resp.error_type),
  1359. get_cmd_string(pkt->u.err_resp.cmd_id),
  1360. pkt->u.err_resp.cmd_id,
  1361. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1362. le32_to_cpu(pkt->u.err_resp.error_info));
  1363. }
  1364. EXPORT_SYMBOL(iwl_rx_reply_error);
  1365. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1366. {
  1367. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1368. }
  1369. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1370. const struct ieee80211_tx_queue_params *params)
  1371. {
  1372. struct iwl_priv *priv = hw->priv;
  1373. unsigned long flags;
  1374. int q;
  1375. IWL_DEBUG_MAC80211(priv, "enter\n");
  1376. if (!iwl_is_ready_rf(priv)) {
  1377. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1378. return -EIO;
  1379. }
  1380. if (queue >= AC_NUM) {
  1381. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1382. return 0;
  1383. }
  1384. q = AC_NUM - 1 - queue;
  1385. spin_lock_irqsave(&priv->lock, flags);
  1386. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1387. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1388. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1389. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1390. cpu_to_le16((params->txop * 32));
  1391. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1392. spin_unlock_irqrestore(&priv->lock, flags);
  1393. IWL_DEBUG_MAC80211(priv, "leave\n");
  1394. return 0;
  1395. }
  1396. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1397. static void iwl_ht_conf(struct iwl_priv *priv,
  1398. struct ieee80211_vif *vif)
  1399. {
  1400. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1401. struct ieee80211_sta *sta;
  1402. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1403. IWL_DEBUG_MAC80211(priv, "enter:\n");
  1404. if (!ht_conf->is_ht)
  1405. return;
  1406. ht_conf->ht_protection =
  1407. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1408. ht_conf->non_GF_STA_present =
  1409. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1410. ht_conf->single_chain_sufficient = false;
  1411. switch (vif->type) {
  1412. case NL80211_IFTYPE_STATION:
  1413. rcu_read_lock();
  1414. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  1415. if (sta) {
  1416. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1417. int maxstreams;
  1418. maxstreams = (ht_cap->mcs.tx_params &
  1419. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1420. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1421. maxstreams += 1;
  1422. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1423. (ht_cap->mcs.rx_mask[2] == 0))
  1424. ht_conf->single_chain_sufficient = true;
  1425. if (maxstreams <= 1)
  1426. ht_conf->single_chain_sufficient = true;
  1427. } else {
  1428. /*
  1429. * If at all, this can only happen through a race
  1430. * when the AP disconnects us while we're still
  1431. * setting up the connection, in that case mac80211
  1432. * will soon tell us about that.
  1433. */
  1434. ht_conf->single_chain_sufficient = true;
  1435. }
  1436. rcu_read_unlock();
  1437. break;
  1438. case NL80211_IFTYPE_ADHOC:
  1439. ht_conf->single_chain_sufficient = true;
  1440. break;
  1441. default:
  1442. break;
  1443. }
  1444. IWL_DEBUG_MAC80211(priv, "leave\n");
  1445. }
  1446. static inline void iwl_set_no_assoc(struct iwl_priv *priv)
  1447. {
  1448. iwl_led_disassociate(priv);
  1449. /*
  1450. * inform the ucode that there is no longer an
  1451. * association and that no more packets should be
  1452. * sent
  1453. */
  1454. priv->staging_rxon.filter_flags &=
  1455. ~RXON_FILTER_ASSOC_MSK;
  1456. priv->staging_rxon.assoc_id = 0;
  1457. iwlcore_commit_rxon(priv);
  1458. }
  1459. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  1460. {
  1461. struct iwl_priv *priv = hw->priv;
  1462. unsigned long flags;
  1463. __le64 timestamp;
  1464. IWL_DEBUG_MAC80211(priv, "enter\n");
  1465. if (!iwl_is_ready_rf(priv)) {
  1466. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1467. return -EIO;
  1468. }
  1469. spin_lock_irqsave(&priv->lock, flags);
  1470. if (priv->ibss_beacon)
  1471. dev_kfree_skb(priv->ibss_beacon);
  1472. priv->ibss_beacon = skb;
  1473. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1474. priv->timestamp = le64_to_cpu(timestamp);
  1475. IWL_DEBUG_MAC80211(priv, "leave\n");
  1476. spin_unlock_irqrestore(&priv->lock, flags);
  1477. priv->cfg->ops->lib->post_associate(priv, priv->vif);
  1478. return 0;
  1479. }
  1480. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1481. struct ieee80211_vif *vif,
  1482. struct ieee80211_bss_conf *bss_conf,
  1483. u32 changes)
  1484. {
  1485. struct iwl_priv *priv = hw->priv;
  1486. int ret;
  1487. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1488. if (!iwl_is_alive(priv))
  1489. return;
  1490. mutex_lock(&priv->mutex);
  1491. if (changes & BSS_CHANGED_QOS) {
  1492. unsigned long flags;
  1493. spin_lock_irqsave(&priv->lock, flags);
  1494. priv->qos_data.qos_active = bss_conf->qos;
  1495. iwl_update_qos(priv);
  1496. spin_unlock_irqrestore(&priv->lock, flags);
  1497. }
  1498. if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
  1499. dev_kfree_skb(priv->ibss_beacon);
  1500. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1501. }
  1502. if (changes & BSS_CHANGED_BEACON_INT) {
  1503. /* TODO: in AP mode, do something to make this take effect */
  1504. }
  1505. if (changes & BSS_CHANGED_BSSID) {
  1506. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1507. /*
  1508. * If there is currently a HW scan going on in the
  1509. * background then we need to cancel it else the RXON
  1510. * below/in post_associate will fail.
  1511. */
  1512. if (iwl_scan_cancel_timeout(priv, 100)) {
  1513. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1514. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1515. mutex_unlock(&priv->mutex);
  1516. return;
  1517. }
  1518. /* mac80211 only sets assoc when in STATION mode */
  1519. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  1520. memcpy(priv->staging_rxon.bssid_addr,
  1521. bss_conf->bssid, ETH_ALEN);
  1522. /* currently needed in a few places */
  1523. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1524. } else {
  1525. priv->staging_rxon.filter_flags &=
  1526. ~RXON_FILTER_ASSOC_MSK;
  1527. }
  1528. }
  1529. /*
  1530. * This needs to be after setting the BSSID in case
  1531. * mac80211 decides to do both changes at once because
  1532. * it will invoke post_associate.
  1533. */
  1534. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1535. changes & BSS_CHANGED_BEACON) {
  1536. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1537. if (beacon)
  1538. iwl_mac_beacon_update(hw, beacon);
  1539. }
  1540. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1541. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1542. bss_conf->use_short_preamble);
  1543. if (bss_conf->use_short_preamble)
  1544. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1545. else
  1546. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1547. }
  1548. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1549. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1550. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1551. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1552. else
  1553. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1554. if (bss_conf->use_cts_prot)
  1555. priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
  1556. else
  1557. priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
  1558. }
  1559. if (changes & BSS_CHANGED_BASIC_RATES) {
  1560. /* XXX use this information
  1561. *
  1562. * To do that, remove code from iwl_set_rate() and put something
  1563. * like this here:
  1564. *
  1565. if (A-band)
  1566. priv->staging_rxon.ofdm_basic_rates =
  1567. bss_conf->basic_rates;
  1568. else
  1569. priv->staging_rxon.ofdm_basic_rates =
  1570. bss_conf->basic_rates >> 4;
  1571. priv->staging_rxon.cck_basic_rates =
  1572. bss_conf->basic_rates & 0xF;
  1573. */
  1574. }
  1575. if (changes & BSS_CHANGED_HT) {
  1576. iwl_ht_conf(priv, vif);
  1577. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1578. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1579. }
  1580. if (changes & BSS_CHANGED_ASSOC) {
  1581. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1582. if (bss_conf->assoc) {
  1583. priv->timestamp = bss_conf->timestamp;
  1584. iwl_led_associate(priv);
  1585. if (!iwl_is_rfkill(priv))
  1586. priv->cfg->ops->lib->post_associate(priv, vif);
  1587. } else
  1588. iwl_set_no_assoc(priv);
  1589. }
  1590. if (changes && iwl_is_associated(priv) && bss_conf->aid) {
  1591. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  1592. changes);
  1593. ret = iwl_send_rxon_assoc(priv);
  1594. if (!ret) {
  1595. /* Sync active_rxon with latest change. */
  1596. memcpy((void *)&priv->active_rxon,
  1597. &priv->staging_rxon,
  1598. sizeof(struct iwl_rxon_cmd));
  1599. }
  1600. }
  1601. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1602. if (vif->bss_conf.enable_beacon) {
  1603. memcpy(priv->staging_rxon.bssid_addr,
  1604. bss_conf->bssid, ETH_ALEN);
  1605. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1606. iwlcore_config_ap(priv, vif);
  1607. } else
  1608. iwl_set_no_assoc(priv);
  1609. }
  1610. if (changes & BSS_CHANGED_IBSS) {
  1611. ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
  1612. bss_conf->ibss_joined);
  1613. if (ret)
  1614. IWL_ERR(priv, "failed to %s IBSS station %pM\n",
  1615. bss_conf->ibss_joined ? "add" : "remove",
  1616. bss_conf->bssid);
  1617. }
  1618. mutex_unlock(&priv->mutex);
  1619. IWL_DEBUG_MAC80211(priv, "leave\n");
  1620. }
  1621. EXPORT_SYMBOL(iwl_bss_info_changed);
  1622. static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
  1623. {
  1624. iwl_connection_init_rx_config(priv, vif);
  1625. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1626. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1627. return iwlcore_commit_rxon(priv);
  1628. }
  1629. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1630. {
  1631. struct iwl_priv *priv = hw->priv;
  1632. int err = 0;
  1633. IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
  1634. vif->type, vif->addr);
  1635. mutex_lock(&priv->mutex);
  1636. if (WARN_ON(!iwl_is_ready_rf(priv))) {
  1637. err = -EINVAL;
  1638. goto out;
  1639. }
  1640. if (priv->vif) {
  1641. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  1642. err = -EOPNOTSUPP;
  1643. goto out;
  1644. }
  1645. priv->vif = vif;
  1646. priv->iw_mode = vif->type;
  1647. err = iwl_set_mode(priv, vif);
  1648. if (err)
  1649. goto out_err;
  1650. goto out;
  1651. out_err:
  1652. priv->vif = NULL;
  1653. priv->iw_mode = NL80211_IFTYPE_STATION;
  1654. out:
  1655. mutex_unlock(&priv->mutex);
  1656. IWL_DEBUG_MAC80211(priv, "leave\n");
  1657. return err;
  1658. }
  1659. EXPORT_SYMBOL(iwl_mac_add_interface);
  1660. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1661. struct ieee80211_vif *vif)
  1662. {
  1663. struct iwl_priv *priv = hw->priv;
  1664. bool scan_completed = false;
  1665. IWL_DEBUG_MAC80211(priv, "enter\n");
  1666. mutex_lock(&priv->mutex);
  1667. if (iwl_is_ready_rf(priv)) {
  1668. iwl_scan_cancel_timeout(priv, 100);
  1669. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1670. iwlcore_commit_rxon(priv);
  1671. }
  1672. if (priv->vif == vif) {
  1673. priv->vif = NULL;
  1674. if (priv->scan_vif == vif) {
  1675. scan_completed = true;
  1676. priv->scan_vif = NULL;
  1677. priv->scan_request = NULL;
  1678. }
  1679. memset(priv->bssid, 0, ETH_ALEN);
  1680. }
  1681. mutex_unlock(&priv->mutex);
  1682. if (scan_completed)
  1683. ieee80211_scan_completed(priv->hw, true);
  1684. IWL_DEBUG_MAC80211(priv, "leave\n");
  1685. }
  1686. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1687. /**
  1688. * iwl_mac_config - mac80211 config callback
  1689. */
  1690. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1691. {
  1692. struct iwl_priv *priv = hw->priv;
  1693. const struct iwl_channel_info *ch_info;
  1694. struct ieee80211_conf *conf = &hw->conf;
  1695. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1696. unsigned long flags = 0;
  1697. int ret = 0;
  1698. u16 ch;
  1699. int scan_active = 0;
  1700. mutex_lock(&priv->mutex);
  1701. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  1702. conf->channel->hw_value, changed);
  1703. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1704. test_bit(STATUS_SCANNING, &priv->status))) {
  1705. scan_active = 1;
  1706. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  1707. }
  1708. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1709. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1710. /* mac80211 uses static for non-HT which is what we want */
  1711. priv->current_ht_config.smps = conf->smps_mode;
  1712. /*
  1713. * Recalculate chain counts.
  1714. *
  1715. * If monitor mode is enabled then mac80211 will
  1716. * set up the SM PS mode to OFF if an HT channel is
  1717. * configured.
  1718. */
  1719. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1720. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1721. }
  1722. /* during scanning mac80211 will delay channel setting until
  1723. * scan finish with changed = 0
  1724. */
  1725. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1726. if (scan_active)
  1727. goto set_ch_out;
  1728. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1729. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  1730. if (!is_channel_valid(ch_info)) {
  1731. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  1732. ret = -EINVAL;
  1733. goto set_ch_out;
  1734. }
  1735. spin_lock_irqsave(&priv->lock, flags);
  1736. /* Configure HT40 channels */
  1737. ht_conf->is_ht = conf_is_ht(conf);
  1738. if (ht_conf->is_ht) {
  1739. if (conf_is_ht40_minus(conf)) {
  1740. ht_conf->extension_chan_offset =
  1741. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1742. ht_conf->is_40mhz = true;
  1743. } else if (conf_is_ht40_plus(conf)) {
  1744. ht_conf->extension_chan_offset =
  1745. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1746. ht_conf->is_40mhz = true;
  1747. } else {
  1748. ht_conf->extension_chan_offset =
  1749. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1750. ht_conf->is_40mhz = false;
  1751. }
  1752. } else
  1753. ht_conf->is_40mhz = false;
  1754. /* Default to no protection. Protection mode will later be set
  1755. * from BSS config in iwl_ht_conf */
  1756. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1757. /* if we are switching from ht to 2.4 clear flags
  1758. * from any ht related info since 2.4 does not
  1759. * support ht */
  1760. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  1761. priv->staging_rxon.flags = 0;
  1762. iwl_set_rxon_channel(priv, conf->channel);
  1763. iwl_set_rxon_ht(priv, ht_conf);
  1764. iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
  1765. spin_unlock_irqrestore(&priv->lock, flags);
  1766. if (priv->cfg->ops->lib->update_bcast_station)
  1767. ret = priv->cfg->ops->lib->update_bcast_station(priv);
  1768. set_ch_out:
  1769. /* The list of supported rates and rate mask can be different
  1770. * for each band; since the band may have changed, reset
  1771. * the rate mask to what mac80211 lists */
  1772. iwl_set_rate(priv);
  1773. }
  1774. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1775. IEEE80211_CONF_CHANGE_IDLE)) {
  1776. ret = iwl_power_update_mode(priv, false);
  1777. if (ret)
  1778. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  1779. }
  1780. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1781. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  1782. priv->tx_power_user_lmt, conf->power_level);
  1783. iwl_set_tx_power(priv, conf->power_level, false);
  1784. }
  1785. if (!iwl_is_ready(priv)) {
  1786. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1787. goto out;
  1788. }
  1789. if (scan_active)
  1790. goto out;
  1791. if (memcmp(&priv->active_rxon,
  1792. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  1793. iwlcore_commit_rxon(priv);
  1794. else
  1795. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  1796. out:
  1797. IWL_DEBUG_MAC80211(priv, "leave\n");
  1798. mutex_unlock(&priv->mutex);
  1799. return ret;
  1800. }
  1801. EXPORT_SYMBOL(iwl_mac_config);
  1802. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  1803. {
  1804. struct iwl_priv *priv = hw->priv;
  1805. unsigned long flags;
  1806. mutex_lock(&priv->mutex);
  1807. IWL_DEBUG_MAC80211(priv, "enter\n");
  1808. spin_lock_irqsave(&priv->lock, flags);
  1809. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  1810. spin_unlock_irqrestore(&priv->lock, flags);
  1811. spin_lock_irqsave(&priv->lock, flags);
  1812. /* new association get rid of ibss beacon skb */
  1813. if (priv->ibss_beacon)
  1814. dev_kfree_skb(priv->ibss_beacon);
  1815. priv->ibss_beacon = NULL;
  1816. priv->timestamp = 0;
  1817. spin_unlock_irqrestore(&priv->lock, flags);
  1818. if (!iwl_is_ready_rf(priv)) {
  1819. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1820. mutex_unlock(&priv->mutex);
  1821. return;
  1822. }
  1823. /* we are restarting association process
  1824. * clear RXON_FILTER_ASSOC_MSK bit
  1825. */
  1826. iwl_scan_cancel_timeout(priv, 100);
  1827. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1828. iwlcore_commit_rxon(priv);
  1829. iwl_set_rate(priv);
  1830. mutex_unlock(&priv->mutex);
  1831. IWL_DEBUG_MAC80211(priv, "leave\n");
  1832. }
  1833. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  1834. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1835. {
  1836. if (!priv->txq)
  1837. priv->txq = kzalloc(
  1838. sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
  1839. GFP_KERNEL);
  1840. if (!priv->txq) {
  1841. IWL_ERR(priv, "Not enough memory for txq\n");
  1842. return -ENOMEM;
  1843. }
  1844. return 0;
  1845. }
  1846. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1847. void iwl_free_txq_mem(struct iwl_priv *priv)
  1848. {
  1849. kfree(priv->txq);
  1850. priv->txq = NULL;
  1851. }
  1852. EXPORT_SYMBOL(iwl_free_txq_mem);
  1853. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1854. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1855. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1856. {
  1857. priv->tx_traffic_idx = 0;
  1858. priv->rx_traffic_idx = 0;
  1859. if (priv->tx_traffic)
  1860. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1861. if (priv->rx_traffic)
  1862. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1863. }
  1864. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  1865. {
  1866. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  1867. if (iwl_debug_level & IWL_DL_TX) {
  1868. if (!priv->tx_traffic) {
  1869. priv->tx_traffic =
  1870. kzalloc(traffic_size, GFP_KERNEL);
  1871. if (!priv->tx_traffic)
  1872. return -ENOMEM;
  1873. }
  1874. }
  1875. if (iwl_debug_level & IWL_DL_RX) {
  1876. if (!priv->rx_traffic) {
  1877. priv->rx_traffic =
  1878. kzalloc(traffic_size, GFP_KERNEL);
  1879. if (!priv->rx_traffic)
  1880. return -ENOMEM;
  1881. }
  1882. }
  1883. iwl_reset_traffic_log(priv);
  1884. return 0;
  1885. }
  1886. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  1887. void iwl_free_traffic_mem(struct iwl_priv *priv)
  1888. {
  1889. kfree(priv->tx_traffic);
  1890. priv->tx_traffic = NULL;
  1891. kfree(priv->rx_traffic);
  1892. priv->rx_traffic = NULL;
  1893. }
  1894. EXPORT_SYMBOL(iwl_free_traffic_mem);
  1895. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  1896. u16 length, struct ieee80211_hdr *header)
  1897. {
  1898. __le16 fc;
  1899. u16 len;
  1900. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  1901. return;
  1902. if (!priv->tx_traffic)
  1903. return;
  1904. fc = header->frame_control;
  1905. if (ieee80211_is_data(fc)) {
  1906. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1907. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1908. memcpy((priv->tx_traffic +
  1909. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1910. header, len);
  1911. priv->tx_traffic_idx =
  1912. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1913. }
  1914. }
  1915. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  1916. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  1917. u16 length, struct ieee80211_hdr *header)
  1918. {
  1919. __le16 fc;
  1920. u16 len;
  1921. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  1922. return;
  1923. if (!priv->rx_traffic)
  1924. return;
  1925. fc = header->frame_control;
  1926. if (ieee80211_is_data(fc)) {
  1927. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1928. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1929. memcpy((priv->rx_traffic +
  1930. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1931. header, len);
  1932. priv->rx_traffic_idx =
  1933. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1934. }
  1935. }
  1936. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  1937. const char *get_mgmt_string(int cmd)
  1938. {
  1939. switch (cmd) {
  1940. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  1941. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  1942. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  1943. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  1944. IWL_CMD(MANAGEMENT_PROBE_REQ);
  1945. IWL_CMD(MANAGEMENT_PROBE_RESP);
  1946. IWL_CMD(MANAGEMENT_BEACON);
  1947. IWL_CMD(MANAGEMENT_ATIM);
  1948. IWL_CMD(MANAGEMENT_DISASSOC);
  1949. IWL_CMD(MANAGEMENT_AUTH);
  1950. IWL_CMD(MANAGEMENT_DEAUTH);
  1951. IWL_CMD(MANAGEMENT_ACTION);
  1952. default:
  1953. return "UNKNOWN";
  1954. }
  1955. }
  1956. const char *get_ctrl_string(int cmd)
  1957. {
  1958. switch (cmd) {
  1959. IWL_CMD(CONTROL_BACK_REQ);
  1960. IWL_CMD(CONTROL_BACK);
  1961. IWL_CMD(CONTROL_PSPOLL);
  1962. IWL_CMD(CONTROL_RTS);
  1963. IWL_CMD(CONTROL_CTS);
  1964. IWL_CMD(CONTROL_ACK);
  1965. IWL_CMD(CONTROL_CFEND);
  1966. IWL_CMD(CONTROL_CFENDACK);
  1967. default:
  1968. return "UNKNOWN";
  1969. }
  1970. }
  1971. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  1972. {
  1973. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  1974. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  1975. priv->led_tpt = 0;
  1976. }
  1977. /*
  1978. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  1979. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  1980. * Use debugFs to display the rx/rx_statistics
  1981. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  1982. * information will be recorded, but DATA pkt still will be recorded
  1983. * for the reason of iwl_led.c need to control the led blinking based on
  1984. * number of tx and rx data.
  1985. *
  1986. */
  1987. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  1988. {
  1989. struct traffic_stats *stats;
  1990. if (is_tx)
  1991. stats = &priv->tx_stats;
  1992. else
  1993. stats = &priv->rx_stats;
  1994. if (ieee80211_is_mgmt(fc)) {
  1995. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1996. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1997. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1998. break;
  1999. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2000. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2001. break;
  2002. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2003. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2004. break;
  2005. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2006. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2007. break;
  2008. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2009. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2010. break;
  2011. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2012. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2013. break;
  2014. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2015. stats->mgmt[MANAGEMENT_BEACON]++;
  2016. break;
  2017. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2018. stats->mgmt[MANAGEMENT_ATIM]++;
  2019. break;
  2020. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2021. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2022. break;
  2023. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2024. stats->mgmt[MANAGEMENT_AUTH]++;
  2025. break;
  2026. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2027. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2028. break;
  2029. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2030. stats->mgmt[MANAGEMENT_ACTION]++;
  2031. break;
  2032. }
  2033. } else if (ieee80211_is_ctl(fc)) {
  2034. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2035. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2036. stats->ctrl[CONTROL_BACK_REQ]++;
  2037. break;
  2038. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2039. stats->ctrl[CONTROL_BACK]++;
  2040. break;
  2041. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2042. stats->ctrl[CONTROL_PSPOLL]++;
  2043. break;
  2044. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2045. stats->ctrl[CONTROL_RTS]++;
  2046. break;
  2047. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2048. stats->ctrl[CONTROL_CTS]++;
  2049. break;
  2050. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2051. stats->ctrl[CONTROL_ACK]++;
  2052. break;
  2053. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2054. stats->ctrl[CONTROL_CFEND]++;
  2055. break;
  2056. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2057. stats->ctrl[CONTROL_CFENDACK]++;
  2058. break;
  2059. }
  2060. } else {
  2061. /* data */
  2062. stats->data_cnt++;
  2063. stats->data_bytes += len;
  2064. }
  2065. iwl_leds_background(priv);
  2066. }
  2067. EXPORT_SYMBOL(iwl_update_stats);
  2068. #endif
  2069. static const char *get_csr_string(int cmd)
  2070. {
  2071. switch (cmd) {
  2072. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  2073. IWL_CMD(CSR_INT_COALESCING);
  2074. IWL_CMD(CSR_INT);
  2075. IWL_CMD(CSR_INT_MASK);
  2076. IWL_CMD(CSR_FH_INT_STATUS);
  2077. IWL_CMD(CSR_GPIO_IN);
  2078. IWL_CMD(CSR_RESET);
  2079. IWL_CMD(CSR_GP_CNTRL);
  2080. IWL_CMD(CSR_HW_REV);
  2081. IWL_CMD(CSR_EEPROM_REG);
  2082. IWL_CMD(CSR_EEPROM_GP);
  2083. IWL_CMD(CSR_OTP_GP_REG);
  2084. IWL_CMD(CSR_GIO_REG);
  2085. IWL_CMD(CSR_GP_UCODE_REG);
  2086. IWL_CMD(CSR_GP_DRIVER_REG);
  2087. IWL_CMD(CSR_UCODE_DRV_GP1);
  2088. IWL_CMD(CSR_UCODE_DRV_GP2);
  2089. IWL_CMD(CSR_LED_REG);
  2090. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  2091. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  2092. IWL_CMD(CSR_ANA_PLL_CFG);
  2093. IWL_CMD(CSR_HW_REV_WA_REG);
  2094. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  2095. default:
  2096. return "UNKNOWN";
  2097. }
  2098. }
  2099. void iwl_dump_csr(struct iwl_priv *priv)
  2100. {
  2101. int i;
  2102. u32 csr_tbl[] = {
  2103. CSR_HW_IF_CONFIG_REG,
  2104. CSR_INT_COALESCING,
  2105. CSR_INT,
  2106. CSR_INT_MASK,
  2107. CSR_FH_INT_STATUS,
  2108. CSR_GPIO_IN,
  2109. CSR_RESET,
  2110. CSR_GP_CNTRL,
  2111. CSR_HW_REV,
  2112. CSR_EEPROM_REG,
  2113. CSR_EEPROM_GP,
  2114. CSR_OTP_GP_REG,
  2115. CSR_GIO_REG,
  2116. CSR_GP_UCODE_REG,
  2117. CSR_GP_DRIVER_REG,
  2118. CSR_UCODE_DRV_GP1,
  2119. CSR_UCODE_DRV_GP2,
  2120. CSR_LED_REG,
  2121. CSR_DRAM_INT_TBL_REG,
  2122. CSR_GIO_CHICKEN_BITS,
  2123. CSR_ANA_PLL_CFG,
  2124. CSR_HW_REV_WA_REG,
  2125. CSR_DBG_HPET_MEM_REG
  2126. };
  2127. IWL_ERR(priv, "CSR values:\n");
  2128. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  2129. "CSR_INT_PERIODIC_REG)\n");
  2130. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  2131. IWL_ERR(priv, " %25s: 0X%08x\n",
  2132. get_csr_string(csr_tbl[i]),
  2133. iwl_read32(priv, csr_tbl[i]));
  2134. }
  2135. }
  2136. EXPORT_SYMBOL(iwl_dump_csr);
  2137. static const char *get_fh_string(int cmd)
  2138. {
  2139. switch (cmd) {
  2140. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  2141. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  2142. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  2143. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  2144. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  2145. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  2146. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  2147. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  2148. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  2149. default:
  2150. return "UNKNOWN";
  2151. }
  2152. }
  2153. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  2154. {
  2155. int i;
  2156. #ifdef CONFIG_IWLWIFI_DEBUG
  2157. int pos = 0;
  2158. size_t bufsz = 0;
  2159. #endif
  2160. u32 fh_tbl[] = {
  2161. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  2162. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  2163. FH_RSCSR_CHNL0_WPTR,
  2164. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  2165. FH_MEM_RSSR_SHARED_CTRL_REG,
  2166. FH_MEM_RSSR_RX_STATUS_REG,
  2167. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  2168. FH_TSSR_TX_STATUS_REG,
  2169. FH_TSSR_TX_ERROR_REG
  2170. };
  2171. #ifdef CONFIG_IWLWIFI_DEBUG
  2172. if (display) {
  2173. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  2174. *buf = kmalloc(bufsz, GFP_KERNEL);
  2175. if (!*buf)
  2176. return -ENOMEM;
  2177. pos += scnprintf(*buf + pos, bufsz - pos,
  2178. "FH register values:\n");
  2179. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2180. pos += scnprintf(*buf + pos, bufsz - pos,
  2181. " %34s: 0X%08x\n",
  2182. get_fh_string(fh_tbl[i]),
  2183. iwl_read_direct32(priv, fh_tbl[i]));
  2184. }
  2185. return pos;
  2186. }
  2187. #endif
  2188. IWL_ERR(priv, "FH register values:\n");
  2189. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2190. IWL_ERR(priv, " %34s: 0X%08x\n",
  2191. get_fh_string(fh_tbl[i]),
  2192. iwl_read_direct32(priv, fh_tbl[i]));
  2193. }
  2194. return 0;
  2195. }
  2196. EXPORT_SYMBOL(iwl_dump_fh);
  2197. static void iwl_force_rf_reset(struct iwl_priv *priv)
  2198. {
  2199. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2200. return;
  2201. if (!iwl_is_associated(priv)) {
  2202. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  2203. return;
  2204. }
  2205. /*
  2206. * There is no easy and better way to force reset the radio,
  2207. * the only known method is switching channel which will force to
  2208. * reset and tune the radio.
  2209. * Use internal short scan (single channel) operation to should
  2210. * achieve this objective.
  2211. * Driver should reset the radio when number of consecutive missed
  2212. * beacon, or any other uCode error condition detected.
  2213. */
  2214. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  2215. iwl_internal_short_hw_scan(priv);
  2216. }
  2217. int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
  2218. {
  2219. struct iwl_force_reset *force_reset;
  2220. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2221. return -EINVAL;
  2222. if (mode >= IWL_MAX_FORCE_RESET) {
  2223. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  2224. return -EINVAL;
  2225. }
  2226. force_reset = &priv->force_reset[mode];
  2227. force_reset->reset_request_count++;
  2228. if (!external) {
  2229. if (force_reset->last_force_reset_jiffies &&
  2230. time_after(force_reset->last_force_reset_jiffies +
  2231. force_reset->reset_duration, jiffies)) {
  2232. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  2233. force_reset->reset_reject_count++;
  2234. return -EAGAIN;
  2235. }
  2236. }
  2237. force_reset->reset_success_count++;
  2238. force_reset->last_force_reset_jiffies = jiffies;
  2239. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  2240. switch (mode) {
  2241. case IWL_RF_RESET:
  2242. iwl_force_rf_reset(priv);
  2243. break;
  2244. case IWL_FW_RESET:
  2245. /*
  2246. * if the request is from external(ex: debugfs),
  2247. * then always perform the request in regardless the module
  2248. * parameter setting
  2249. * if the request is from internal (uCode error or driver
  2250. * detect failure), then fw_restart module parameter
  2251. * need to be check before performing firmware reload
  2252. */
  2253. if (!external && !priv->cfg->mod_params->restart_fw) {
  2254. IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
  2255. "module parameter setting\n");
  2256. break;
  2257. }
  2258. IWL_ERR(priv, "On demand firmware reload\n");
  2259. /* Set the FW error flag -- cleared on iwl_down */
  2260. set_bit(STATUS_FW_ERROR, &priv->status);
  2261. wake_up_interruptible(&priv->wait_command_queue);
  2262. /*
  2263. * Keep the restart process from trying to send host
  2264. * commands by clearing the INIT status bit
  2265. */
  2266. clear_bit(STATUS_READY, &priv->status);
  2267. queue_work(priv->workqueue, &priv->restart);
  2268. break;
  2269. }
  2270. return 0;
  2271. }
  2272. EXPORT_SYMBOL(iwl_force_reset);
  2273. /**
  2274. * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
  2275. *
  2276. * During normal condition (no queue is stuck), the timer is continually set to
  2277. * execute every monitor_recover_period milliseconds after the last timer
  2278. * expired. When the queue read_ptr is at the same place, the timer is
  2279. * shorten to 100mSecs. This is
  2280. * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
  2281. * 2) to detect the stuck queues quicker before the station and AP can
  2282. * disassociate each other.
  2283. *
  2284. * This function monitors all the tx queues and recover from it if any
  2285. * of the queues are stuck.
  2286. * 1. It first check the cmd queue for stuck conditions. If it is stuck,
  2287. * it will recover by resetting the firmware and return.
  2288. * 2. Then, it checks for station association. If it associates it will check
  2289. * other queues. If any queue is stuck, it will recover by resetting
  2290. * the firmware.
  2291. * Note: It the number of times the queue read_ptr to be at the same place to
  2292. * be MAX_REPEAT+1 in order to consider to be stuck.
  2293. */
  2294. /*
  2295. * The maximum number of times the read pointer of the tx queue at the
  2296. * same place without considering to be stuck.
  2297. */
  2298. #define MAX_REPEAT (2)
  2299. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  2300. {
  2301. struct iwl_tx_queue *txq;
  2302. struct iwl_queue *q;
  2303. txq = &priv->txq[cnt];
  2304. q = &txq->q;
  2305. /* queue is empty, skip */
  2306. if (q->read_ptr != q->write_ptr) {
  2307. if (q->read_ptr == q->last_read_ptr) {
  2308. /* a queue has not been read from last time */
  2309. if (q->repeat_same_read_ptr > MAX_REPEAT) {
  2310. IWL_ERR(priv,
  2311. "queue %d stuck %d time. Fw reload.\n",
  2312. q->id, q->repeat_same_read_ptr);
  2313. q->repeat_same_read_ptr = 0;
  2314. iwl_force_reset(priv, IWL_FW_RESET, false);
  2315. } else {
  2316. q->repeat_same_read_ptr++;
  2317. IWL_DEBUG_RADIO(priv,
  2318. "queue %d, not read %d time\n",
  2319. q->id,
  2320. q->repeat_same_read_ptr);
  2321. mod_timer(&priv->monitor_recover, jiffies +
  2322. msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
  2323. }
  2324. return 1;
  2325. } else {
  2326. q->last_read_ptr = q->read_ptr;
  2327. q->repeat_same_read_ptr = 0;
  2328. }
  2329. }
  2330. return 0;
  2331. }
  2332. void iwl_bg_monitor_recover(unsigned long data)
  2333. {
  2334. struct iwl_priv *priv = (struct iwl_priv *)data;
  2335. int cnt;
  2336. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2337. return;
  2338. /* monitor and check for stuck cmd queue */
  2339. if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
  2340. return;
  2341. /* monitor and check for other stuck queues */
  2342. if (iwl_is_associated(priv)) {
  2343. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  2344. /* skip as we already checked the command queue */
  2345. if (cnt == IWL_CMD_QUEUE_NUM)
  2346. continue;
  2347. if (iwl_check_stuck_queue(priv, cnt))
  2348. return;
  2349. }
  2350. }
  2351. /*
  2352. * Reschedule the timer to occur in
  2353. * priv->cfg->monitor_recover_period
  2354. */
  2355. mod_timer(&priv->monitor_recover,
  2356. jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2357. }
  2358. EXPORT_SYMBOL(iwl_bg_monitor_recover);
  2359. /*
  2360. * extended beacon time format
  2361. * time in usec will be changed into a 32-bit value in extended:internal format
  2362. * the extended part is the beacon counts
  2363. * the internal part is the time in usec within one beacon interval
  2364. */
  2365. u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
  2366. {
  2367. u32 quot;
  2368. u32 rem;
  2369. u32 interval = beacon_interval * TIME_UNIT;
  2370. if (!interval || !usec)
  2371. return 0;
  2372. quot = (usec / interval) &
  2373. (iwl_beacon_time_mask_high(priv,
  2374. priv->hw_params.beacon_time_tsf_bits) >>
  2375. priv->hw_params.beacon_time_tsf_bits);
  2376. rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
  2377. priv->hw_params.beacon_time_tsf_bits);
  2378. return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
  2379. }
  2380. EXPORT_SYMBOL(iwl_usecs_to_beacons);
  2381. /* base is usually what we get from ucode with each received frame,
  2382. * the same as HW timer counter counting down
  2383. */
  2384. __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
  2385. u32 addon, u32 beacon_interval)
  2386. {
  2387. u32 base_low = base & iwl_beacon_time_mask_low(priv,
  2388. priv->hw_params.beacon_time_tsf_bits);
  2389. u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
  2390. priv->hw_params.beacon_time_tsf_bits);
  2391. u32 interval = beacon_interval * TIME_UNIT;
  2392. u32 res = (base & iwl_beacon_time_mask_high(priv,
  2393. priv->hw_params.beacon_time_tsf_bits)) +
  2394. (addon & iwl_beacon_time_mask_high(priv,
  2395. priv->hw_params.beacon_time_tsf_bits));
  2396. if (base_low > addon_low)
  2397. res += base_low - addon_low;
  2398. else if (base_low < addon_low) {
  2399. res += interval + base_low - addon_low;
  2400. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  2401. } else
  2402. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  2403. return cpu_to_le32(res);
  2404. }
  2405. EXPORT_SYMBOL(iwl_add_beacon_time);
  2406. #ifdef CONFIG_PM
  2407. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2408. {
  2409. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2410. /*
  2411. * This function is called when system goes into suspend state
  2412. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2413. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2414. * it will not call apm_ops.stop() to stop the DMA operation.
  2415. * Calling apm_ops.stop here to make sure we stop the DMA.
  2416. */
  2417. priv->cfg->ops->lib->apm_ops.stop(priv);
  2418. pci_save_state(pdev);
  2419. pci_disable_device(pdev);
  2420. pci_set_power_state(pdev, PCI_D3hot);
  2421. return 0;
  2422. }
  2423. EXPORT_SYMBOL(iwl_pci_suspend);
  2424. int iwl_pci_resume(struct pci_dev *pdev)
  2425. {
  2426. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2427. int ret;
  2428. bool hw_rfkill = false;
  2429. /*
  2430. * We disable the RETRY_TIMEOUT register (0x41) to keep
  2431. * PCI Tx retries from interfering with C3 CPU state.
  2432. */
  2433. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  2434. pci_set_power_state(pdev, PCI_D0);
  2435. ret = pci_enable_device(pdev);
  2436. if (ret)
  2437. return ret;
  2438. pci_restore_state(pdev);
  2439. iwl_enable_interrupts(priv);
  2440. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  2441. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  2442. hw_rfkill = true;
  2443. if (hw_rfkill)
  2444. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2445. else
  2446. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2447. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
  2448. return 0;
  2449. }
  2450. EXPORT_SYMBOL(iwl_pci_resume);
  2451. #endif /* CONFIG_PM */