main.c 52 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_cache_conf_rate(struct ath_softc *sc,
  20. struct ieee80211_conf *conf)
  21. {
  22. switch (conf->channel->band) {
  23. case IEEE80211_BAND_2GHZ:
  24. if (conf_is_ht20(conf))
  25. sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  26. else if (conf_is_ht40_minus(conf))
  27. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  28. else if (conf_is_ht40_plus(conf))
  29. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  30. else
  31. sc->cur_rate_mode = ATH9K_MODE_11G;
  32. break;
  33. case IEEE80211_BAND_5GHZ:
  34. if (conf_is_ht20(conf))
  35. sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  36. else if (conf_is_ht40_minus(conf))
  37. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  38. else if (conf_is_ht40_plus(conf))
  39. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  40. else
  41. sc->cur_rate_mode = ATH9K_MODE_11A;
  42. break;
  43. default:
  44. BUG_ON(1);
  45. break;
  46. }
  47. }
  48. static void ath_update_txpow(struct ath_softc *sc)
  49. {
  50. struct ath_hw *ah = sc->sc_ah;
  51. if (sc->curtxpow != sc->config.txpowlimit) {
  52. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  53. /* read back in case value is clamped */
  54. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  55. }
  56. }
  57. static u8 parse_mpdudensity(u8 mpdudensity)
  58. {
  59. /*
  60. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  61. * 0 for no restriction
  62. * 1 for 1/4 us
  63. * 2 for 1/2 us
  64. * 3 for 1 us
  65. * 4 for 2 us
  66. * 5 for 4 us
  67. * 6 for 8 us
  68. * 7 for 16 us
  69. */
  70. switch (mpdudensity) {
  71. case 0:
  72. return 0;
  73. case 1:
  74. case 2:
  75. case 3:
  76. /* Our lower layer calculations limit our precision to
  77. 1 microsecond */
  78. return 1;
  79. case 4:
  80. return 2;
  81. case 5:
  82. return 4;
  83. case 6:
  84. return 8;
  85. case 7:
  86. return 16;
  87. default:
  88. return 0;
  89. }
  90. }
  91. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  92. struct ieee80211_hw *hw)
  93. {
  94. struct ieee80211_channel *curchan = hw->conf.channel;
  95. struct ath9k_channel *channel;
  96. u8 chan_idx;
  97. chan_idx = curchan->hw_value;
  98. channel = &sc->sc_ah->channels[chan_idx];
  99. ath9k_update_ichannel(sc, hw, channel);
  100. return channel;
  101. }
  102. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  103. {
  104. unsigned long flags;
  105. bool ret;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  108. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  109. return ret;
  110. }
  111. void ath9k_ps_wakeup(struct ath_softc *sc)
  112. {
  113. unsigned long flags;
  114. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  115. if (++sc->ps_usecount != 1)
  116. goto unlock;
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath9k_ps_restore(struct ath_softc *sc)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  125. if (--sc->ps_usecount != 0)
  126. goto unlock;
  127. if (sc->ps_idle)
  128. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  129. else if (sc->ps_enabled &&
  130. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  131. PS_WAIT_FOR_CAB |
  132. PS_WAIT_FOR_PSPOLL_DATA |
  133. PS_WAIT_FOR_TX_ACK)))
  134. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  135. unlock:
  136. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  137. }
  138. static void ath_start_ani(struct ath_common *common)
  139. {
  140. struct ath_hw *ah = common->ah;
  141. unsigned long timestamp = jiffies_to_msecs(jiffies);
  142. struct ath_softc *sc = (struct ath_softc *) common->priv;
  143. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  144. return;
  145. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  146. return;
  147. common->ani.longcal_timer = timestamp;
  148. common->ani.shortcal_timer = timestamp;
  149. common->ani.checkani_timer = timestamp;
  150. mod_timer(&common->ani.timer,
  151. jiffies +
  152. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  153. }
  154. /*
  155. * Set/change channels. If the channel is really being changed, it's done
  156. * by reseting the chip. To accomplish this we must first cleanup any pending
  157. * DMA, then restart stuff.
  158. */
  159. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  160. struct ath9k_channel *hchan)
  161. {
  162. struct ath_wiphy *aphy = hw->priv;
  163. struct ath_hw *ah = sc->sc_ah;
  164. struct ath_common *common = ath9k_hw_common(ah);
  165. struct ieee80211_conf *conf = &common->hw->conf;
  166. bool fastcc = true, stopped;
  167. struct ieee80211_channel *channel = hw->conf.channel;
  168. struct ath9k_hw_cal_data *caldata = NULL;
  169. int r;
  170. if (sc->sc_flags & SC_OP_INVALID)
  171. return -EIO;
  172. del_timer_sync(&common->ani.timer);
  173. cancel_work_sync(&sc->paprd_work);
  174. cancel_work_sync(&sc->hw_check_work);
  175. cancel_delayed_work_sync(&sc->tx_complete_work);
  176. ath9k_ps_wakeup(sc);
  177. /*
  178. * This is only performed if the channel settings have
  179. * actually changed.
  180. *
  181. * To switch channels clear any pending DMA operations;
  182. * wait long enough for the RX fifo to drain, reset the
  183. * hardware at the new frequency, and then re-enable
  184. * the relevant bits of the h/w.
  185. */
  186. ath9k_hw_set_interrupts(ah, 0);
  187. ath_drain_all_txq(sc, false);
  188. stopped = ath_stoprecv(sc);
  189. /* XXX: do not flush receive queue here. We don't want
  190. * to flush data frames already in queue because of
  191. * changing channel. */
  192. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  193. fastcc = false;
  194. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  195. caldata = &aphy->caldata;
  196. ath_print(common, ATH_DBG_CONFIG,
  197. "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
  198. sc->sc_ah->curchan->channel,
  199. channel->center_freq, conf_is_ht40(conf));
  200. spin_lock_bh(&sc->sc_resetlock);
  201. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  202. if (r) {
  203. ath_print(common, ATH_DBG_FATAL,
  204. "Unable to reset channel (%u MHz), "
  205. "reset status %d\n",
  206. channel->center_freq, r);
  207. spin_unlock_bh(&sc->sc_resetlock);
  208. goto ps_restore;
  209. }
  210. spin_unlock_bh(&sc->sc_resetlock);
  211. if (ath_startrecv(sc) != 0) {
  212. ath_print(common, ATH_DBG_FATAL,
  213. "Unable to restart recv logic\n");
  214. r = -EIO;
  215. goto ps_restore;
  216. }
  217. ath_cache_conf_rate(sc, &hw->conf);
  218. ath_update_txpow(sc);
  219. ath9k_hw_set_interrupts(ah, ah->imask);
  220. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL | SC_OP_SCANNING))) {
  221. ath_start_ani(common);
  222. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  223. ath_beacon_config(sc, NULL);
  224. }
  225. ps_restore:
  226. ath9k_ps_restore(sc);
  227. return r;
  228. }
  229. static void ath_paprd_activate(struct ath_softc *sc)
  230. {
  231. struct ath_hw *ah = sc->sc_ah;
  232. struct ath9k_hw_cal_data *caldata = ah->caldata;
  233. int chain;
  234. if (!caldata || !caldata->paprd_done)
  235. return;
  236. ath9k_ps_wakeup(sc);
  237. ar9003_paprd_enable(ah, false);
  238. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  239. if (!(ah->caps.tx_chainmask & BIT(chain)))
  240. continue;
  241. ar9003_paprd_populate_single_table(ah, caldata, chain);
  242. }
  243. ar9003_paprd_enable(ah, true);
  244. ath9k_ps_restore(sc);
  245. }
  246. void ath_paprd_calibrate(struct work_struct *work)
  247. {
  248. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  249. struct ieee80211_hw *hw = sc->hw;
  250. struct ath_hw *ah = sc->sc_ah;
  251. struct ieee80211_hdr *hdr;
  252. struct sk_buff *skb = NULL;
  253. struct ieee80211_tx_info *tx_info;
  254. int band = hw->conf.channel->band;
  255. struct ieee80211_supported_band *sband = &sc->sbands[band];
  256. struct ath_tx_control txctl;
  257. struct ath9k_hw_cal_data *caldata = ah->caldata;
  258. int qnum, ftype;
  259. int chain_ok = 0;
  260. int chain;
  261. int len = 1800;
  262. int time_left;
  263. int i;
  264. if (!caldata)
  265. return;
  266. skb = alloc_skb(len, GFP_KERNEL);
  267. if (!skb)
  268. return;
  269. tx_info = IEEE80211_SKB_CB(skb);
  270. skb_put(skb, len);
  271. memset(skb->data, 0, len);
  272. hdr = (struct ieee80211_hdr *)skb->data;
  273. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  274. hdr->frame_control = cpu_to_le16(ftype);
  275. hdr->duration_id = cpu_to_le16(10);
  276. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  277. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  278. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  279. memset(&txctl, 0, sizeof(txctl));
  280. qnum = sc->tx.hwq_map[WME_AC_BE];
  281. txctl.txq = &sc->tx.txq[qnum];
  282. ath9k_ps_wakeup(sc);
  283. ar9003_paprd_init_table(ah);
  284. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  285. if (!(ah->caps.tx_chainmask & BIT(chain)))
  286. continue;
  287. chain_ok = 0;
  288. memset(tx_info, 0, sizeof(*tx_info));
  289. tx_info->band = band;
  290. for (i = 0; i < 4; i++) {
  291. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  292. tx_info->control.rates[i].count = 6;
  293. }
  294. init_completion(&sc->paprd_complete);
  295. ar9003_paprd_setup_gain_table(ah, chain);
  296. txctl.paprd = BIT(chain);
  297. if (ath_tx_start(hw, skb, &txctl) != 0)
  298. break;
  299. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  300. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  301. if (!time_left) {
  302. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  303. "Timeout waiting for paprd training on "
  304. "TX chain %d\n",
  305. chain);
  306. goto fail_paprd;
  307. }
  308. if (!ar9003_paprd_is_done(ah))
  309. break;
  310. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  311. break;
  312. chain_ok = 1;
  313. }
  314. kfree_skb(skb);
  315. if (chain_ok) {
  316. caldata->paprd_done = true;
  317. ath_paprd_activate(sc);
  318. }
  319. fail_paprd:
  320. ath9k_ps_restore(sc);
  321. }
  322. /*
  323. * This routine performs the periodic noise floor calibration function
  324. * that is used to adjust and optimize the chip performance. This
  325. * takes environmental changes (location, temperature) into account.
  326. * When the task is complete, it reschedules itself depending on the
  327. * appropriate interval that was calculated.
  328. */
  329. void ath_ani_calibrate(unsigned long data)
  330. {
  331. struct ath_softc *sc = (struct ath_softc *)data;
  332. struct ath_hw *ah = sc->sc_ah;
  333. struct ath_common *common = ath9k_hw_common(ah);
  334. bool longcal = false;
  335. bool shortcal = false;
  336. bool aniflag = false;
  337. unsigned int timestamp = jiffies_to_msecs(jiffies);
  338. u32 cal_interval, short_cal_interval;
  339. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  340. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  341. /* Only calibrate if awake */
  342. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  343. goto set_timer;
  344. ath9k_ps_wakeup(sc);
  345. /* Long calibration runs independently of short calibration. */
  346. if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
  347. longcal = true;
  348. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  349. common->ani.longcal_timer = timestamp;
  350. }
  351. /* Short calibration applies only while caldone is false */
  352. if (!common->ani.caldone) {
  353. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  354. shortcal = true;
  355. ath_print(common, ATH_DBG_ANI,
  356. "shortcal @%lu\n", jiffies);
  357. common->ani.shortcal_timer = timestamp;
  358. common->ani.resetcal_timer = timestamp;
  359. }
  360. } else {
  361. if ((timestamp - common->ani.resetcal_timer) >=
  362. ATH_RESTART_CALINTERVAL) {
  363. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  364. if (common->ani.caldone)
  365. common->ani.resetcal_timer = timestamp;
  366. }
  367. }
  368. /* Verify whether we must check ANI */
  369. if ((timestamp - common->ani.checkani_timer) >=
  370. ah->config.ani_poll_interval) {
  371. aniflag = true;
  372. common->ani.checkani_timer = timestamp;
  373. }
  374. /* Skip all processing if there's nothing to do. */
  375. if (longcal || shortcal || aniflag) {
  376. /* Call ANI routine if necessary */
  377. if (aniflag)
  378. ath9k_hw_ani_monitor(ah, ah->curchan);
  379. /* Perform calibration if necessary */
  380. if (longcal || shortcal) {
  381. common->ani.caldone =
  382. ath9k_hw_calibrate(ah,
  383. ah->curchan,
  384. common->rx_chainmask,
  385. longcal);
  386. if (longcal)
  387. common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
  388. ah->curchan);
  389. ath_print(common, ATH_DBG_ANI,
  390. " calibrate chan %u/%x nf: %d\n",
  391. ah->curchan->channel,
  392. ah->curchan->channelFlags,
  393. common->ani.noise_floor);
  394. }
  395. }
  396. ath9k_ps_restore(sc);
  397. set_timer:
  398. /*
  399. * Set timer interval based on previous results.
  400. * The interval must be the shortest necessary to satisfy ANI,
  401. * short calibration and long calibration.
  402. */
  403. cal_interval = ATH_LONG_CALINTERVAL;
  404. if (sc->sc_ah->config.enable_ani)
  405. cal_interval = min(cal_interval,
  406. (u32)ah->config.ani_poll_interval);
  407. if (!common->ani.caldone)
  408. cal_interval = min(cal_interval, (u32)short_cal_interval);
  409. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  410. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  411. if (!ah->caldata->paprd_done)
  412. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  413. else
  414. ath_paprd_activate(sc);
  415. }
  416. }
  417. /*
  418. * Update tx/rx chainmask. For legacy association,
  419. * hard code chainmask to 1x1, for 11n association, use
  420. * the chainmask configuration, for bt coexistence, use
  421. * the chainmask configuration even in legacy mode.
  422. */
  423. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  424. {
  425. struct ath_hw *ah = sc->sc_ah;
  426. struct ath_common *common = ath9k_hw_common(ah);
  427. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  428. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  429. common->tx_chainmask = ah->caps.tx_chainmask;
  430. common->rx_chainmask = ah->caps.rx_chainmask;
  431. } else {
  432. common->tx_chainmask = 1;
  433. common->rx_chainmask = 1;
  434. }
  435. ath_print(common, ATH_DBG_CONFIG,
  436. "tx chmask: %d, rx chmask: %d\n",
  437. common->tx_chainmask,
  438. common->rx_chainmask);
  439. }
  440. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  441. {
  442. struct ath_node *an;
  443. an = (struct ath_node *)sta->drv_priv;
  444. if (sc->sc_flags & SC_OP_TXAGGR) {
  445. ath_tx_node_init(sc, an);
  446. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  447. sta->ht_cap.ampdu_factor);
  448. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  449. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  450. }
  451. }
  452. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  453. {
  454. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  455. if (sc->sc_flags & SC_OP_TXAGGR)
  456. ath_tx_node_cleanup(sc, an);
  457. }
  458. void ath_hw_check(struct work_struct *work)
  459. {
  460. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  461. int i;
  462. ath9k_ps_wakeup(sc);
  463. for (i = 0; i < 3; i++) {
  464. if (ath9k_hw_check_alive(sc->sc_ah))
  465. goto out;
  466. msleep(1);
  467. }
  468. ath_reset(sc, false);
  469. out:
  470. ath9k_ps_restore(sc);
  471. }
  472. void ath9k_tasklet(unsigned long data)
  473. {
  474. struct ath_softc *sc = (struct ath_softc *)data;
  475. struct ath_hw *ah = sc->sc_ah;
  476. struct ath_common *common = ath9k_hw_common(ah);
  477. u32 status = sc->intrstatus;
  478. u32 rxmask;
  479. ath9k_ps_wakeup(sc);
  480. if (status & ATH9K_INT_FATAL) {
  481. ath_reset(sc, false);
  482. ath9k_ps_restore(sc);
  483. return;
  484. }
  485. if (!ath9k_hw_check_alive(ah))
  486. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  487. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  488. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  489. ATH9K_INT_RXORN);
  490. else
  491. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  492. if (status & rxmask) {
  493. spin_lock_bh(&sc->rx.rxflushlock);
  494. /* Check for high priority Rx first */
  495. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  496. (status & ATH9K_INT_RXHP))
  497. ath_rx_tasklet(sc, 0, true);
  498. ath_rx_tasklet(sc, 0, false);
  499. spin_unlock_bh(&sc->rx.rxflushlock);
  500. }
  501. if (status & ATH9K_INT_TX) {
  502. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  503. ath_tx_edma_tasklet(sc);
  504. else
  505. ath_tx_tasklet(sc);
  506. }
  507. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  508. /*
  509. * TSF sync does not look correct; remain awake to sync with
  510. * the next Beacon.
  511. */
  512. ath_print(common, ATH_DBG_PS,
  513. "TSFOOR - Sync with next Beacon\n");
  514. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  515. }
  516. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  517. if (status & ATH9K_INT_GENTIMER)
  518. ath_gen_timer_isr(sc->sc_ah);
  519. /* re-enable hardware interrupt */
  520. ath9k_hw_set_interrupts(ah, ah->imask);
  521. ath9k_ps_restore(sc);
  522. }
  523. irqreturn_t ath_isr(int irq, void *dev)
  524. {
  525. #define SCHED_INTR ( \
  526. ATH9K_INT_FATAL | \
  527. ATH9K_INT_RXORN | \
  528. ATH9K_INT_RXEOL | \
  529. ATH9K_INT_RX | \
  530. ATH9K_INT_RXLP | \
  531. ATH9K_INT_RXHP | \
  532. ATH9K_INT_TX | \
  533. ATH9K_INT_BMISS | \
  534. ATH9K_INT_CST | \
  535. ATH9K_INT_TSFOOR | \
  536. ATH9K_INT_GENTIMER)
  537. struct ath_softc *sc = dev;
  538. struct ath_hw *ah = sc->sc_ah;
  539. enum ath9k_int status;
  540. bool sched = false;
  541. /*
  542. * The hardware is not ready/present, don't
  543. * touch anything. Note this can happen early
  544. * on if the IRQ is shared.
  545. */
  546. if (sc->sc_flags & SC_OP_INVALID)
  547. return IRQ_NONE;
  548. /* shared irq, not for us */
  549. if (!ath9k_hw_intrpend(ah))
  550. return IRQ_NONE;
  551. /*
  552. * Figure out the reason(s) for the interrupt. Note
  553. * that the hal returns a pseudo-ISR that may include
  554. * bits we haven't explicitly enabled so we mask the
  555. * value to insure we only process bits we requested.
  556. */
  557. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  558. status &= ah->imask; /* discard unasked-for bits */
  559. /*
  560. * If there are no status bits set, then this interrupt was not
  561. * for me (should have been caught above).
  562. */
  563. if (!status)
  564. return IRQ_NONE;
  565. /* Cache the status */
  566. sc->intrstatus = status;
  567. if (status & SCHED_INTR)
  568. sched = true;
  569. /*
  570. * If a FATAL or RXORN interrupt is received, we have to reset the
  571. * chip immediately.
  572. */
  573. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  574. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  575. goto chip_reset;
  576. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  577. (status & ATH9K_INT_BB_WATCHDOG)) {
  578. ar9003_hw_bb_watchdog_dbg_info(ah);
  579. goto chip_reset;
  580. }
  581. if (status & ATH9K_INT_SWBA)
  582. tasklet_schedule(&sc->bcon_tasklet);
  583. if (status & ATH9K_INT_TXURN)
  584. ath9k_hw_updatetxtriglevel(ah, true);
  585. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  586. if (status & ATH9K_INT_RXEOL) {
  587. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  588. ath9k_hw_set_interrupts(ah, ah->imask);
  589. }
  590. }
  591. if (status & ATH9K_INT_MIB) {
  592. /*
  593. * Disable interrupts until we service the MIB
  594. * interrupt; otherwise it will continue to
  595. * fire.
  596. */
  597. ath9k_hw_set_interrupts(ah, 0);
  598. /*
  599. * Let the hal handle the event. We assume
  600. * it will clear whatever condition caused
  601. * the interrupt.
  602. */
  603. ath9k_hw_procmibevent(ah);
  604. ath9k_hw_set_interrupts(ah, ah->imask);
  605. }
  606. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  607. if (status & ATH9K_INT_TIM_TIMER) {
  608. /* Clear RxAbort bit so that we can
  609. * receive frames */
  610. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  611. ath9k_hw_setrxabort(sc->sc_ah, 0);
  612. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  613. }
  614. chip_reset:
  615. ath_debug_stat_interrupt(sc, status);
  616. if (sched) {
  617. /* turn off every interrupt except SWBA */
  618. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  619. tasklet_schedule(&sc->intr_tq);
  620. }
  621. return IRQ_HANDLED;
  622. #undef SCHED_INTR
  623. }
  624. static u32 ath_get_extchanmode(struct ath_softc *sc,
  625. struct ieee80211_channel *chan,
  626. enum nl80211_channel_type channel_type)
  627. {
  628. u32 chanmode = 0;
  629. switch (chan->band) {
  630. case IEEE80211_BAND_2GHZ:
  631. switch(channel_type) {
  632. case NL80211_CHAN_NO_HT:
  633. case NL80211_CHAN_HT20:
  634. chanmode = CHANNEL_G_HT20;
  635. break;
  636. case NL80211_CHAN_HT40PLUS:
  637. chanmode = CHANNEL_G_HT40PLUS;
  638. break;
  639. case NL80211_CHAN_HT40MINUS:
  640. chanmode = CHANNEL_G_HT40MINUS;
  641. break;
  642. }
  643. break;
  644. case IEEE80211_BAND_5GHZ:
  645. switch(channel_type) {
  646. case NL80211_CHAN_NO_HT:
  647. case NL80211_CHAN_HT20:
  648. chanmode = CHANNEL_A_HT20;
  649. break;
  650. case NL80211_CHAN_HT40PLUS:
  651. chanmode = CHANNEL_A_HT40PLUS;
  652. break;
  653. case NL80211_CHAN_HT40MINUS:
  654. chanmode = CHANNEL_A_HT40MINUS;
  655. break;
  656. }
  657. break;
  658. default:
  659. break;
  660. }
  661. return chanmode;
  662. }
  663. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  664. struct ieee80211_vif *vif,
  665. struct ieee80211_bss_conf *bss_conf)
  666. {
  667. struct ath_hw *ah = sc->sc_ah;
  668. struct ath_common *common = ath9k_hw_common(ah);
  669. if (bss_conf->assoc) {
  670. ath_print(common, ATH_DBG_CONFIG,
  671. "Bss Info ASSOC %d, bssid: %pM\n",
  672. bss_conf->aid, common->curbssid);
  673. /* New association, store aid */
  674. common->curaid = bss_conf->aid;
  675. ath9k_hw_write_associd(ah);
  676. /*
  677. * Request a re-configuration of Beacon related timers
  678. * on the receipt of the first Beacon frame (i.e.,
  679. * after time sync with the AP).
  680. */
  681. sc->ps_flags |= PS_BEACON_SYNC;
  682. /* Configure the beacon */
  683. ath_beacon_config(sc, vif);
  684. /* Reset rssi stats */
  685. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  686. sc->sc_flags |= SC_OP_ANI_RUN;
  687. ath_start_ani(common);
  688. } else {
  689. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  690. common->curaid = 0;
  691. /* Stop ANI */
  692. sc->sc_flags &= ~SC_OP_ANI_RUN;
  693. del_timer_sync(&common->ani.timer);
  694. }
  695. }
  696. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  697. {
  698. struct ath_hw *ah = sc->sc_ah;
  699. struct ath_common *common = ath9k_hw_common(ah);
  700. struct ieee80211_channel *channel = hw->conf.channel;
  701. int r;
  702. ath9k_ps_wakeup(sc);
  703. ath9k_hw_configpcipowersave(ah, 0, 0);
  704. if (!ah->curchan)
  705. ah->curchan = ath_get_curchannel(sc, sc->hw);
  706. spin_lock_bh(&sc->sc_resetlock);
  707. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  708. if (r) {
  709. ath_print(common, ATH_DBG_FATAL,
  710. "Unable to reset channel (%u MHz), "
  711. "reset status %d\n",
  712. channel->center_freq, r);
  713. }
  714. spin_unlock_bh(&sc->sc_resetlock);
  715. ath_update_txpow(sc);
  716. if (ath_startrecv(sc) != 0) {
  717. ath_print(common, ATH_DBG_FATAL,
  718. "Unable to restart recv logic\n");
  719. return;
  720. }
  721. if (sc->sc_flags & SC_OP_BEACONS)
  722. ath_beacon_config(sc, NULL); /* restart beacons */
  723. /* Re-Enable interrupts */
  724. ath9k_hw_set_interrupts(ah, ah->imask);
  725. /* Enable LED */
  726. ath9k_hw_cfg_output(ah, ah->led_pin,
  727. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  728. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  729. ieee80211_wake_queues(hw);
  730. ath9k_ps_restore(sc);
  731. }
  732. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  733. {
  734. struct ath_hw *ah = sc->sc_ah;
  735. struct ieee80211_channel *channel = hw->conf.channel;
  736. int r;
  737. ath9k_ps_wakeup(sc);
  738. ieee80211_stop_queues(hw);
  739. /*
  740. * Keep the LED on when the radio is disabled
  741. * during idle unassociated state.
  742. */
  743. if (!sc->ps_idle) {
  744. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  745. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  746. }
  747. /* Disable interrupts */
  748. ath9k_hw_set_interrupts(ah, 0);
  749. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  750. ath_stoprecv(sc); /* turn off frame recv */
  751. ath_flushrecv(sc); /* flush recv queue */
  752. if (!ah->curchan)
  753. ah->curchan = ath_get_curchannel(sc, hw);
  754. spin_lock_bh(&sc->sc_resetlock);
  755. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  756. if (r) {
  757. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  758. "Unable to reset channel (%u MHz), "
  759. "reset status %d\n",
  760. channel->center_freq, r);
  761. }
  762. spin_unlock_bh(&sc->sc_resetlock);
  763. ath9k_hw_phy_disable(ah);
  764. ath9k_hw_configpcipowersave(ah, 1, 1);
  765. ath9k_ps_restore(sc);
  766. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  767. }
  768. int ath_reset(struct ath_softc *sc, bool retry_tx)
  769. {
  770. struct ath_hw *ah = sc->sc_ah;
  771. struct ath_common *common = ath9k_hw_common(ah);
  772. struct ieee80211_hw *hw = sc->hw;
  773. int r;
  774. /* Stop ANI */
  775. del_timer_sync(&common->ani.timer);
  776. ieee80211_stop_queues(hw);
  777. ath9k_hw_set_interrupts(ah, 0);
  778. ath_drain_all_txq(sc, retry_tx);
  779. ath_stoprecv(sc);
  780. ath_flushrecv(sc);
  781. spin_lock_bh(&sc->sc_resetlock);
  782. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  783. if (r)
  784. ath_print(common, ATH_DBG_FATAL,
  785. "Unable to reset hardware; reset status %d\n", r);
  786. spin_unlock_bh(&sc->sc_resetlock);
  787. if (ath_startrecv(sc) != 0)
  788. ath_print(common, ATH_DBG_FATAL,
  789. "Unable to start recv logic\n");
  790. /*
  791. * We may be doing a reset in response to a request
  792. * that changes the channel so update any state that
  793. * might change as a result.
  794. */
  795. ath_cache_conf_rate(sc, &hw->conf);
  796. ath_update_txpow(sc);
  797. if (sc->sc_flags & SC_OP_BEACONS)
  798. ath_beacon_config(sc, NULL); /* restart beacons */
  799. ath9k_hw_set_interrupts(ah, ah->imask);
  800. if (retry_tx) {
  801. int i;
  802. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  803. if (ATH_TXQ_SETUP(sc, i)) {
  804. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  805. ath_txq_schedule(sc, &sc->tx.txq[i]);
  806. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  807. }
  808. }
  809. }
  810. ieee80211_wake_queues(hw);
  811. /* Start ANI */
  812. ath_start_ani(common);
  813. return r;
  814. }
  815. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  816. {
  817. int qnum;
  818. switch (queue) {
  819. case 0:
  820. qnum = sc->tx.hwq_map[WME_AC_VO];
  821. break;
  822. case 1:
  823. qnum = sc->tx.hwq_map[WME_AC_VI];
  824. break;
  825. case 2:
  826. qnum = sc->tx.hwq_map[WME_AC_BE];
  827. break;
  828. case 3:
  829. qnum = sc->tx.hwq_map[WME_AC_BK];
  830. break;
  831. default:
  832. qnum = sc->tx.hwq_map[WME_AC_BE];
  833. break;
  834. }
  835. return qnum;
  836. }
  837. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  838. {
  839. int qnum;
  840. switch (queue) {
  841. case WME_AC_VO:
  842. qnum = 0;
  843. break;
  844. case WME_AC_VI:
  845. qnum = 1;
  846. break;
  847. case WME_AC_BE:
  848. qnum = 2;
  849. break;
  850. case WME_AC_BK:
  851. qnum = 3;
  852. break;
  853. default:
  854. qnum = -1;
  855. break;
  856. }
  857. return qnum;
  858. }
  859. /* XXX: Remove me once we don't depend on ath9k_channel for all
  860. * this redundant data */
  861. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  862. struct ath9k_channel *ichan)
  863. {
  864. struct ieee80211_channel *chan = hw->conf.channel;
  865. struct ieee80211_conf *conf = &hw->conf;
  866. ichan->channel = chan->center_freq;
  867. ichan->chan = chan;
  868. if (chan->band == IEEE80211_BAND_2GHZ) {
  869. ichan->chanmode = CHANNEL_G;
  870. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  871. } else {
  872. ichan->chanmode = CHANNEL_A;
  873. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  874. }
  875. if (conf_is_ht(conf))
  876. ichan->chanmode = ath_get_extchanmode(sc, chan,
  877. conf->channel_type);
  878. }
  879. /**********************/
  880. /* mac80211 callbacks */
  881. /**********************/
  882. static int ath9k_start(struct ieee80211_hw *hw)
  883. {
  884. struct ath_wiphy *aphy = hw->priv;
  885. struct ath_softc *sc = aphy->sc;
  886. struct ath_hw *ah = sc->sc_ah;
  887. struct ath_common *common = ath9k_hw_common(ah);
  888. struct ieee80211_channel *curchan = hw->conf.channel;
  889. struct ath9k_channel *init_channel;
  890. int r;
  891. ath_print(common, ATH_DBG_CONFIG,
  892. "Starting driver with initial channel: %d MHz\n",
  893. curchan->center_freq);
  894. mutex_lock(&sc->mutex);
  895. if (ath9k_wiphy_started(sc)) {
  896. if (sc->chan_idx == curchan->hw_value) {
  897. /*
  898. * Already on the operational channel, the new wiphy
  899. * can be marked active.
  900. */
  901. aphy->state = ATH_WIPHY_ACTIVE;
  902. ieee80211_wake_queues(hw);
  903. } else {
  904. /*
  905. * Another wiphy is on another channel, start the new
  906. * wiphy in paused state.
  907. */
  908. aphy->state = ATH_WIPHY_PAUSED;
  909. ieee80211_stop_queues(hw);
  910. }
  911. mutex_unlock(&sc->mutex);
  912. return 0;
  913. }
  914. aphy->state = ATH_WIPHY_ACTIVE;
  915. /* setup initial channel */
  916. sc->chan_idx = curchan->hw_value;
  917. init_channel = ath_get_curchannel(sc, hw);
  918. /* Reset SERDES registers */
  919. ath9k_hw_configpcipowersave(ah, 0, 0);
  920. /*
  921. * The basic interface to setting the hardware in a good
  922. * state is ``reset''. On return the hardware is known to
  923. * be powered up and with interrupts disabled. This must
  924. * be followed by initialization of the appropriate bits
  925. * and then setup of the interrupt mask.
  926. */
  927. spin_lock_bh(&sc->sc_resetlock);
  928. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  929. if (r) {
  930. ath_print(common, ATH_DBG_FATAL,
  931. "Unable to reset hardware; reset status %d "
  932. "(freq %u MHz)\n", r,
  933. curchan->center_freq);
  934. spin_unlock_bh(&sc->sc_resetlock);
  935. goto mutex_unlock;
  936. }
  937. spin_unlock_bh(&sc->sc_resetlock);
  938. /*
  939. * This is needed only to setup initial state
  940. * but it's best done after a reset.
  941. */
  942. ath_update_txpow(sc);
  943. /*
  944. * Setup the hardware after reset:
  945. * The receive engine is set going.
  946. * Frame transmit is handled entirely
  947. * in the frame output path; there's nothing to do
  948. * here except setup the interrupt mask.
  949. */
  950. if (ath_startrecv(sc) != 0) {
  951. ath_print(common, ATH_DBG_FATAL,
  952. "Unable to start recv logic\n");
  953. r = -EIO;
  954. goto mutex_unlock;
  955. }
  956. /* Setup our intr mask. */
  957. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  958. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  959. ATH9K_INT_GLOBAL;
  960. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  961. ah->imask |= ATH9K_INT_RXHP |
  962. ATH9K_INT_RXLP |
  963. ATH9K_INT_BB_WATCHDOG;
  964. else
  965. ah->imask |= ATH9K_INT_RX;
  966. if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
  967. ah->imask |= ATH9K_INT_GTT;
  968. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  969. ah->imask |= ATH9K_INT_CST;
  970. ath_cache_conf_rate(sc, &hw->conf);
  971. sc->sc_flags &= ~SC_OP_INVALID;
  972. /* Disable BMISS interrupt when we're not associated */
  973. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  974. ath9k_hw_set_interrupts(ah, ah->imask);
  975. ieee80211_wake_queues(hw);
  976. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  977. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  978. !ah->btcoex_hw.enabled) {
  979. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  980. AR_STOMP_LOW_WLAN_WGHT);
  981. ath9k_hw_btcoex_enable(ah);
  982. if (common->bus_ops->bt_coex_prep)
  983. common->bus_ops->bt_coex_prep(common);
  984. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  985. ath9k_btcoex_timer_resume(sc);
  986. }
  987. mutex_unlock:
  988. mutex_unlock(&sc->mutex);
  989. return r;
  990. }
  991. static int ath9k_tx(struct ieee80211_hw *hw,
  992. struct sk_buff *skb)
  993. {
  994. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  995. struct ath_wiphy *aphy = hw->priv;
  996. struct ath_softc *sc = aphy->sc;
  997. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  998. struct ath_tx_control txctl;
  999. int padpos, padsize;
  1000. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1001. int qnum;
  1002. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1003. ath_print(common, ATH_DBG_XMIT,
  1004. "ath9k: %s: TX in unexpected wiphy state "
  1005. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1006. goto exit;
  1007. }
  1008. if (sc->ps_enabled) {
  1009. /*
  1010. * mac80211 does not set PM field for normal data frames, so we
  1011. * need to update that based on the current PS mode.
  1012. */
  1013. if (ieee80211_is_data(hdr->frame_control) &&
  1014. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1015. !ieee80211_has_pm(hdr->frame_control)) {
  1016. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1017. "while in PS mode\n");
  1018. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1019. }
  1020. }
  1021. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1022. /*
  1023. * We are using PS-Poll and mac80211 can request TX while in
  1024. * power save mode. Need to wake up hardware for the TX to be
  1025. * completed and if needed, also for RX of buffered frames.
  1026. */
  1027. ath9k_ps_wakeup(sc);
  1028. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1029. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1030. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1031. ath_print(common, ATH_DBG_PS,
  1032. "Sending PS-Poll to pick a buffered frame\n");
  1033. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1034. } else {
  1035. ath_print(common, ATH_DBG_PS,
  1036. "Wake up to complete TX\n");
  1037. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1038. }
  1039. /*
  1040. * The actual restore operation will happen only after
  1041. * the sc_flags bit is cleared. We are just dropping
  1042. * the ps_usecount here.
  1043. */
  1044. ath9k_ps_restore(sc);
  1045. }
  1046. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1047. /*
  1048. * As a temporary workaround, assign seq# here; this will likely need
  1049. * to be cleaned up to work better with Beacon transmission and virtual
  1050. * BSSes.
  1051. */
  1052. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1053. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1054. sc->tx.seq_no += 0x10;
  1055. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1056. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1057. }
  1058. /* Add the padding after the header if this is not already done */
  1059. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1060. padsize = padpos & 3;
  1061. if (padsize && skb->len>padpos) {
  1062. if (skb_headroom(skb) < padsize)
  1063. return -1;
  1064. skb_push(skb, padsize);
  1065. memmove(skb->data, skb->data + padsize, padpos);
  1066. }
  1067. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1068. txctl.txq = &sc->tx.txq[qnum];
  1069. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1070. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1071. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1072. goto exit;
  1073. }
  1074. return 0;
  1075. exit:
  1076. dev_kfree_skb_any(skb);
  1077. return 0;
  1078. }
  1079. static void ath9k_stop(struct ieee80211_hw *hw)
  1080. {
  1081. struct ath_wiphy *aphy = hw->priv;
  1082. struct ath_softc *sc = aphy->sc;
  1083. struct ath_hw *ah = sc->sc_ah;
  1084. struct ath_common *common = ath9k_hw_common(ah);
  1085. int i;
  1086. mutex_lock(&sc->mutex);
  1087. aphy->state = ATH_WIPHY_INACTIVE;
  1088. if (led_blink)
  1089. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1090. cancel_delayed_work_sync(&sc->tx_complete_work);
  1091. cancel_work_sync(&sc->paprd_work);
  1092. cancel_work_sync(&sc->hw_check_work);
  1093. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1094. if (sc->sec_wiphy[i])
  1095. break;
  1096. }
  1097. if (i == sc->num_sec_wiphy) {
  1098. cancel_delayed_work_sync(&sc->wiphy_work);
  1099. cancel_work_sync(&sc->chan_work);
  1100. }
  1101. if (sc->sc_flags & SC_OP_INVALID) {
  1102. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1103. mutex_unlock(&sc->mutex);
  1104. return;
  1105. }
  1106. if (ath9k_wiphy_started(sc)) {
  1107. mutex_unlock(&sc->mutex);
  1108. return; /* another wiphy still in use */
  1109. }
  1110. /* Ensure HW is awake when we try to shut it down. */
  1111. ath9k_ps_wakeup(sc);
  1112. if (ah->btcoex_hw.enabled) {
  1113. ath9k_hw_btcoex_disable(ah);
  1114. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1115. ath9k_btcoex_timer_pause(sc);
  1116. }
  1117. /* make sure h/w will not generate any interrupt
  1118. * before setting the invalid flag. */
  1119. ath9k_hw_set_interrupts(ah, 0);
  1120. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1121. ath_drain_all_txq(sc, false);
  1122. ath_stoprecv(sc);
  1123. ath9k_hw_phy_disable(ah);
  1124. } else
  1125. sc->rx.rxlink = NULL;
  1126. /* disable HAL and put h/w to sleep */
  1127. ath9k_hw_disable(ah);
  1128. ath9k_hw_configpcipowersave(ah, 1, 1);
  1129. ath9k_ps_restore(sc);
  1130. /* Finally, put the chip in FULL SLEEP mode */
  1131. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1132. sc->sc_flags |= SC_OP_INVALID;
  1133. mutex_unlock(&sc->mutex);
  1134. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1135. }
  1136. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1137. struct ieee80211_vif *vif)
  1138. {
  1139. struct ath_wiphy *aphy = hw->priv;
  1140. struct ath_softc *sc = aphy->sc;
  1141. struct ath_hw *ah = sc->sc_ah;
  1142. struct ath_common *common = ath9k_hw_common(ah);
  1143. struct ath_vif *avp = (void *)vif->drv_priv;
  1144. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1145. int ret = 0;
  1146. mutex_lock(&sc->mutex);
  1147. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
  1148. sc->nvifs > 0) {
  1149. ret = -ENOBUFS;
  1150. goto out;
  1151. }
  1152. switch (vif->type) {
  1153. case NL80211_IFTYPE_STATION:
  1154. ic_opmode = NL80211_IFTYPE_STATION;
  1155. break;
  1156. case NL80211_IFTYPE_ADHOC:
  1157. case NL80211_IFTYPE_AP:
  1158. case NL80211_IFTYPE_MESH_POINT:
  1159. if (sc->nbcnvifs >= ATH_BCBUF) {
  1160. ret = -ENOBUFS;
  1161. goto out;
  1162. }
  1163. ic_opmode = vif->type;
  1164. break;
  1165. default:
  1166. ath_print(common, ATH_DBG_FATAL,
  1167. "Interface type %d not yet supported\n", vif->type);
  1168. ret = -EOPNOTSUPP;
  1169. goto out;
  1170. }
  1171. ath_print(common, ATH_DBG_CONFIG,
  1172. "Attach a VIF of type: %d\n", ic_opmode);
  1173. /* Set the VIF opmode */
  1174. avp->av_opmode = ic_opmode;
  1175. avp->av_bslot = -1;
  1176. sc->nvifs++;
  1177. if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  1178. ath9k_set_bssid_mask(hw);
  1179. if (sc->nvifs > 1)
  1180. goto out; /* skip global settings for secondary vif */
  1181. if (ic_opmode == NL80211_IFTYPE_AP) {
  1182. ath9k_hw_set_tsfadjust(ah, 1);
  1183. sc->sc_flags |= SC_OP_TSF_RESET;
  1184. }
  1185. /* Set the device opmode */
  1186. ah->opmode = ic_opmode;
  1187. /*
  1188. * Enable MIB interrupts when there are hardware phy counters.
  1189. * Note we only do this (at the moment) for station mode.
  1190. */
  1191. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1192. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1193. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1194. if (ah->config.enable_ani)
  1195. ah->imask |= ATH9K_INT_MIB;
  1196. ah->imask |= ATH9K_INT_TSFOOR;
  1197. }
  1198. ath9k_hw_set_interrupts(ah, ah->imask);
  1199. if (vif->type == NL80211_IFTYPE_AP ||
  1200. vif->type == NL80211_IFTYPE_ADHOC ||
  1201. vif->type == NL80211_IFTYPE_MONITOR) {
  1202. sc->sc_flags |= SC_OP_ANI_RUN;
  1203. ath_start_ani(common);
  1204. }
  1205. out:
  1206. mutex_unlock(&sc->mutex);
  1207. return ret;
  1208. }
  1209. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1210. struct ieee80211_vif *vif)
  1211. {
  1212. struct ath_wiphy *aphy = hw->priv;
  1213. struct ath_softc *sc = aphy->sc;
  1214. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1215. struct ath_vif *avp = (void *)vif->drv_priv;
  1216. int i;
  1217. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1218. mutex_lock(&sc->mutex);
  1219. /* Stop ANI */
  1220. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1221. del_timer_sync(&common->ani.timer);
  1222. /* Reclaim beacon resources */
  1223. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1224. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1225. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1226. ath9k_ps_wakeup(sc);
  1227. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1228. ath9k_ps_restore(sc);
  1229. }
  1230. ath_beacon_return(sc, avp);
  1231. sc->sc_flags &= ~SC_OP_BEACONS;
  1232. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1233. if (sc->beacon.bslot[i] == vif) {
  1234. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1235. "slot\n", __func__);
  1236. sc->beacon.bslot[i] = NULL;
  1237. sc->beacon.bslot_aphy[i] = NULL;
  1238. }
  1239. }
  1240. sc->nvifs--;
  1241. mutex_unlock(&sc->mutex);
  1242. }
  1243. void ath9k_enable_ps(struct ath_softc *sc)
  1244. {
  1245. struct ath_hw *ah = sc->sc_ah;
  1246. sc->ps_enabled = true;
  1247. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1248. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1249. ah->imask |= ATH9K_INT_TIM_TIMER;
  1250. ath9k_hw_set_interrupts(ah, ah->imask);
  1251. }
  1252. ath9k_hw_setrxabort(ah, 1);
  1253. }
  1254. }
  1255. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1256. {
  1257. struct ath_wiphy *aphy = hw->priv;
  1258. struct ath_softc *sc = aphy->sc;
  1259. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1260. struct ieee80211_conf *conf = &hw->conf;
  1261. struct ath_hw *ah = sc->sc_ah;
  1262. bool disable_radio;
  1263. mutex_lock(&sc->mutex);
  1264. /*
  1265. * Leave this as the first check because we need to turn on the
  1266. * radio if it was disabled before prior to processing the rest
  1267. * of the changes. Likewise we must only disable the radio towards
  1268. * the end.
  1269. */
  1270. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1271. bool enable_radio;
  1272. bool all_wiphys_idle;
  1273. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1274. spin_lock_bh(&sc->wiphy_lock);
  1275. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1276. ath9k_set_wiphy_idle(aphy, idle);
  1277. enable_radio = (!idle && all_wiphys_idle);
  1278. /*
  1279. * After we unlock here its possible another wiphy
  1280. * can be re-renabled so to account for that we will
  1281. * only disable the radio toward the end of this routine
  1282. * if by then all wiphys are still idle.
  1283. */
  1284. spin_unlock_bh(&sc->wiphy_lock);
  1285. if (enable_radio) {
  1286. sc->ps_idle = false;
  1287. ath_radio_enable(sc, hw);
  1288. ath_print(common, ATH_DBG_CONFIG,
  1289. "not-idle: enabling radio\n");
  1290. }
  1291. }
  1292. /*
  1293. * We just prepare to enable PS. We have to wait until our AP has
  1294. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1295. * those ACKs and end up retransmitting the same null data frames.
  1296. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1297. */
  1298. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1299. if (conf->flags & IEEE80211_CONF_PS) {
  1300. sc->ps_flags |= PS_ENABLED;
  1301. /*
  1302. * At this point we know hardware has received an ACK
  1303. * of a previously sent null data frame.
  1304. */
  1305. if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
  1306. sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
  1307. ath9k_enable_ps(sc);
  1308. }
  1309. } else {
  1310. sc->ps_enabled = false;
  1311. sc->ps_flags &= ~(PS_ENABLED |
  1312. PS_NULLFUNC_COMPLETED);
  1313. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  1314. if (!(ah->caps.hw_caps &
  1315. ATH9K_HW_CAP_AUTOSLEEP)) {
  1316. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1317. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1318. PS_WAIT_FOR_CAB |
  1319. PS_WAIT_FOR_PSPOLL_DATA |
  1320. PS_WAIT_FOR_TX_ACK);
  1321. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1322. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1323. ath9k_hw_set_interrupts(sc->sc_ah,
  1324. ah->imask);
  1325. }
  1326. }
  1327. }
  1328. }
  1329. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1330. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1331. ath_print(common, ATH_DBG_CONFIG,
  1332. "HW opmode set to Monitor mode\n");
  1333. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1334. }
  1335. }
  1336. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1337. struct ieee80211_channel *curchan = hw->conf.channel;
  1338. int pos = curchan->hw_value;
  1339. aphy->chan_idx = pos;
  1340. aphy->chan_is_ht = conf_is_ht(conf);
  1341. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1342. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1343. else
  1344. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1345. if (aphy->state == ATH_WIPHY_SCAN ||
  1346. aphy->state == ATH_WIPHY_ACTIVE)
  1347. ath9k_wiphy_pause_all_forced(sc, aphy);
  1348. else {
  1349. /*
  1350. * Do not change operational channel based on a paused
  1351. * wiphy changes.
  1352. */
  1353. goto skip_chan_change;
  1354. }
  1355. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1356. curchan->center_freq);
  1357. /* XXX: remove me eventualy */
  1358. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1359. ath_update_chainmask(sc, conf_is_ht(conf));
  1360. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1361. ath_print(common, ATH_DBG_FATAL,
  1362. "Unable to set channel\n");
  1363. mutex_unlock(&sc->mutex);
  1364. return -EINVAL;
  1365. }
  1366. }
  1367. skip_chan_change:
  1368. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1369. sc->config.txpowlimit = 2 * conf->power_level;
  1370. ath_update_txpow(sc);
  1371. }
  1372. spin_lock_bh(&sc->wiphy_lock);
  1373. disable_radio = ath9k_all_wiphys_idle(sc);
  1374. spin_unlock_bh(&sc->wiphy_lock);
  1375. if (disable_radio) {
  1376. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1377. sc->ps_idle = true;
  1378. ath_radio_disable(sc, hw);
  1379. }
  1380. mutex_unlock(&sc->mutex);
  1381. return 0;
  1382. }
  1383. #define SUPPORTED_FILTERS \
  1384. (FIF_PROMISC_IN_BSS | \
  1385. FIF_ALLMULTI | \
  1386. FIF_CONTROL | \
  1387. FIF_PSPOLL | \
  1388. FIF_OTHER_BSS | \
  1389. FIF_BCN_PRBRESP_PROMISC | \
  1390. FIF_FCSFAIL)
  1391. /* FIXME: sc->sc_full_reset ? */
  1392. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1393. unsigned int changed_flags,
  1394. unsigned int *total_flags,
  1395. u64 multicast)
  1396. {
  1397. struct ath_wiphy *aphy = hw->priv;
  1398. struct ath_softc *sc = aphy->sc;
  1399. u32 rfilt;
  1400. changed_flags &= SUPPORTED_FILTERS;
  1401. *total_flags &= SUPPORTED_FILTERS;
  1402. sc->rx.rxfilter = *total_flags;
  1403. ath9k_ps_wakeup(sc);
  1404. rfilt = ath_calcrxfilter(sc);
  1405. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1406. ath9k_ps_restore(sc);
  1407. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1408. "Set HW RX filter: 0x%x\n", rfilt);
  1409. }
  1410. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1411. struct ieee80211_vif *vif,
  1412. struct ieee80211_sta *sta)
  1413. {
  1414. struct ath_wiphy *aphy = hw->priv;
  1415. struct ath_softc *sc = aphy->sc;
  1416. ath_node_attach(sc, sta);
  1417. return 0;
  1418. }
  1419. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1420. struct ieee80211_vif *vif,
  1421. struct ieee80211_sta *sta)
  1422. {
  1423. struct ath_wiphy *aphy = hw->priv;
  1424. struct ath_softc *sc = aphy->sc;
  1425. ath_node_detach(sc, sta);
  1426. return 0;
  1427. }
  1428. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1429. const struct ieee80211_tx_queue_params *params)
  1430. {
  1431. struct ath_wiphy *aphy = hw->priv;
  1432. struct ath_softc *sc = aphy->sc;
  1433. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1434. struct ath9k_tx_queue_info qi;
  1435. int ret = 0, qnum;
  1436. if (queue >= WME_NUM_AC)
  1437. return 0;
  1438. mutex_lock(&sc->mutex);
  1439. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1440. qi.tqi_aifs = params->aifs;
  1441. qi.tqi_cwmin = params->cw_min;
  1442. qi.tqi_cwmax = params->cw_max;
  1443. qi.tqi_burstTime = params->txop;
  1444. qnum = ath_get_hal_qnum(queue, sc);
  1445. ath_print(common, ATH_DBG_CONFIG,
  1446. "Configure tx [queue/halq] [%d/%d], "
  1447. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1448. queue, qnum, params->aifs, params->cw_min,
  1449. params->cw_max, params->txop);
  1450. ret = ath_txq_update(sc, qnum, &qi);
  1451. if (ret)
  1452. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1453. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1454. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1455. ath_beaconq_config(sc);
  1456. mutex_unlock(&sc->mutex);
  1457. return ret;
  1458. }
  1459. static int ath9k_set_key(struct ieee80211_hw *hw,
  1460. enum set_key_cmd cmd,
  1461. struct ieee80211_vif *vif,
  1462. struct ieee80211_sta *sta,
  1463. struct ieee80211_key_conf *key)
  1464. {
  1465. struct ath_wiphy *aphy = hw->priv;
  1466. struct ath_softc *sc = aphy->sc;
  1467. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1468. int ret = 0;
  1469. if (modparam_nohwcrypt)
  1470. return -ENOSPC;
  1471. mutex_lock(&sc->mutex);
  1472. ath9k_ps_wakeup(sc);
  1473. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1474. switch (cmd) {
  1475. case SET_KEY:
  1476. ret = ath9k_cmn_key_config(common, vif, sta, key);
  1477. if (ret >= 0) {
  1478. key->hw_key_idx = ret;
  1479. /* push IV and Michael MIC generation to stack */
  1480. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1481. if (key->alg == ALG_TKIP)
  1482. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1483. if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
  1484. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1485. ret = 0;
  1486. }
  1487. break;
  1488. case DISABLE_KEY:
  1489. ath9k_cmn_key_delete(common, key);
  1490. break;
  1491. default:
  1492. ret = -EINVAL;
  1493. }
  1494. ath9k_ps_restore(sc);
  1495. mutex_unlock(&sc->mutex);
  1496. return ret;
  1497. }
  1498. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1499. struct ieee80211_vif *vif,
  1500. struct ieee80211_bss_conf *bss_conf,
  1501. u32 changed)
  1502. {
  1503. struct ath_wiphy *aphy = hw->priv;
  1504. struct ath_softc *sc = aphy->sc;
  1505. struct ath_hw *ah = sc->sc_ah;
  1506. struct ath_common *common = ath9k_hw_common(ah);
  1507. struct ath_vif *avp = (void *)vif->drv_priv;
  1508. int slottime;
  1509. int error;
  1510. mutex_lock(&sc->mutex);
  1511. if (changed & BSS_CHANGED_BSSID) {
  1512. /* Set BSSID */
  1513. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1514. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1515. common->curaid = 0;
  1516. ath9k_hw_write_associd(ah);
  1517. /* Set aggregation protection mode parameters */
  1518. sc->config.ath_aggr_prot = 0;
  1519. /* Only legacy IBSS for now */
  1520. if (vif->type == NL80211_IFTYPE_ADHOC)
  1521. ath_update_chainmask(sc, 0);
  1522. ath_print(common, ATH_DBG_CONFIG,
  1523. "BSSID: %pM aid: 0x%x\n",
  1524. common->curbssid, common->curaid);
  1525. /* need to reconfigure the beacon */
  1526. sc->sc_flags &= ~SC_OP_BEACONS ;
  1527. }
  1528. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1529. if ((changed & BSS_CHANGED_BEACON) ||
  1530. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1531. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1532. error = ath_beacon_alloc(aphy, vif);
  1533. if (!error)
  1534. ath_beacon_config(sc, vif);
  1535. }
  1536. if (changed & BSS_CHANGED_ERP_SLOT) {
  1537. if (bss_conf->use_short_slot)
  1538. slottime = 9;
  1539. else
  1540. slottime = 20;
  1541. if (vif->type == NL80211_IFTYPE_AP) {
  1542. /*
  1543. * Defer update, so that connected stations can adjust
  1544. * their settings at the same time.
  1545. * See beacon.c for more details
  1546. */
  1547. sc->beacon.slottime = slottime;
  1548. sc->beacon.updateslot = UPDATE;
  1549. } else {
  1550. ah->slottime = slottime;
  1551. ath9k_hw_init_global_settings(ah);
  1552. }
  1553. }
  1554. /* Disable transmission of beacons */
  1555. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1556. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1557. if (changed & BSS_CHANGED_BEACON_INT) {
  1558. sc->beacon_interval = bss_conf->beacon_int;
  1559. /*
  1560. * In case of AP mode, the HW TSF has to be reset
  1561. * when the beacon interval changes.
  1562. */
  1563. if (vif->type == NL80211_IFTYPE_AP) {
  1564. sc->sc_flags |= SC_OP_TSF_RESET;
  1565. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1566. error = ath_beacon_alloc(aphy, vif);
  1567. if (!error)
  1568. ath_beacon_config(sc, vif);
  1569. } else {
  1570. ath_beacon_config(sc, vif);
  1571. }
  1572. }
  1573. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1574. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1575. bss_conf->use_short_preamble);
  1576. if (bss_conf->use_short_preamble)
  1577. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1578. else
  1579. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1580. }
  1581. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1582. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1583. bss_conf->use_cts_prot);
  1584. if (bss_conf->use_cts_prot &&
  1585. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1586. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1587. else
  1588. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1589. }
  1590. if (changed & BSS_CHANGED_ASSOC) {
  1591. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1592. bss_conf->assoc);
  1593. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1594. }
  1595. mutex_unlock(&sc->mutex);
  1596. }
  1597. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1598. {
  1599. u64 tsf;
  1600. struct ath_wiphy *aphy = hw->priv;
  1601. struct ath_softc *sc = aphy->sc;
  1602. mutex_lock(&sc->mutex);
  1603. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1604. mutex_unlock(&sc->mutex);
  1605. return tsf;
  1606. }
  1607. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1608. {
  1609. struct ath_wiphy *aphy = hw->priv;
  1610. struct ath_softc *sc = aphy->sc;
  1611. mutex_lock(&sc->mutex);
  1612. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1613. mutex_unlock(&sc->mutex);
  1614. }
  1615. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1616. {
  1617. struct ath_wiphy *aphy = hw->priv;
  1618. struct ath_softc *sc = aphy->sc;
  1619. mutex_lock(&sc->mutex);
  1620. ath9k_ps_wakeup(sc);
  1621. ath9k_hw_reset_tsf(sc->sc_ah);
  1622. ath9k_ps_restore(sc);
  1623. mutex_unlock(&sc->mutex);
  1624. }
  1625. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1626. struct ieee80211_vif *vif,
  1627. enum ieee80211_ampdu_mlme_action action,
  1628. struct ieee80211_sta *sta,
  1629. u16 tid, u16 *ssn)
  1630. {
  1631. struct ath_wiphy *aphy = hw->priv;
  1632. struct ath_softc *sc = aphy->sc;
  1633. int ret = 0;
  1634. local_bh_disable();
  1635. switch (action) {
  1636. case IEEE80211_AMPDU_RX_START:
  1637. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1638. ret = -ENOTSUPP;
  1639. break;
  1640. case IEEE80211_AMPDU_RX_STOP:
  1641. break;
  1642. case IEEE80211_AMPDU_TX_START:
  1643. ath9k_ps_wakeup(sc);
  1644. ath_tx_aggr_start(sc, sta, tid, ssn);
  1645. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1646. ath9k_ps_restore(sc);
  1647. break;
  1648. case IEEE80211_AMPDU_TX_STOP:
  1649. ath9k_ps_wakeup(sc);
  1650. ath_tx_aggr_stop(sc, sta, tid);
  1651. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1652. ath9k_ps_restore(sc);
  1653. break;
  1654. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1655. ath9k_ps_wakeup(sc);
  1656. ath_tx_aggr_resume(sc, sta, tid);
  1657. ath9k_ps_restore(sc);
  1658. break;
  1659. default:
  1660. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1661. "Unknown AMPDU action\n");
  1662. }
  1663. local_bh_enable();
  1664. return ret;
  1665. }
  1666. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1667. struct survey_info *survey)
  1668. {
  1669. struct ath_wiphy *aphy = hw->priv;
  1670. struct ath_softc *sc = aphy->sc;
  1671. struct ath_hw *ah = sc->sc_ah;
  1672. struct ath_common *common = ath9k_hw_common(ah);
  1673. struct ieee80211_conf *conf = &hw->conf;
  1674. if (idx != 0)
  1675. return -ENOENT;
  1676. survey->channel = conf->channel;
  1677. survey->filled = SURVEY_INFO_NOISE_DBM;
  1678. survey->noise = common->ani.noise_floor;
  1679. return 0;
  1680. }
  1681. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1682. {
  1683. struct ath_wiphy *aphy = hw->priv;
  1684. struct ath_softc *sc = aphy->sc;
  1685. mutex_lock(&sc->mutex);
  1686. if (ath9k_wiphy_scanning(sc)) {
  1687. /*
  1688. * There is a race here in mac80211 but fixing it requires
  1689. * we revisit how we handle the scan complete callback.
  1690. * After mac80211 fixes we will not have configured hardware
  1691. * to the home channel nor would we have configured the RX
  1692. * filter yet.
  1693. */
  1694. mutex_unlock(&sc->mutex);
  1695. return;
  1696. }
  1697. aphy->state = ATH_WIPHY_SCAN;
  1698. ath9k_wiphy_pause_all_forced(sc, aphy);
  1699. sc->sc_flags |= SC_OP_SCANNING;
  1700. mutex_unlock(&sc->mutex);
  1701. }
  1702. /*
  1703. * XXX: this requires a revisit after the driver
  1704. * scan_complete gets moved to another place/removed in mac80211.
  1705. */
  1706. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1707. {
  1708. struct ath_wiphy *aphy = hw->priv;
  1709. struct ath_softc *sc = aphy->sc;
  1710. mutex_lock(&sc->mutex);
  1711. aphy->state = ATH_WIPHY_ACTIVE;
  1712. sc->sc_flags &= ~SC_OP_SCANNING;
  1713. mutex_unlock(&sc->mutex);
  1714. }
  1715. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1716. {
  1717. struct ath_wiphy *aphy = hw->priv;
  1718. struct ath_softc *sc = aphy->sc;
  1719. struct ath_hw *ah = sc->sc_ah;
  1720. mutex_lock(&sc->mutex);
  1721. ah->coverage_class = coverage_class;
  1722. ath9k_hw_init_global_settings(ah);
  1723. mutex_unlock(&sc->mutex);
  1724. }
  1725. struct ieee80211_ops ath9k_ops = {
  1726. .tx = ath9k_tx,
  1727. .start = ath9k_start,
  1728. .stop = ath9k_stop,
  1729. .add_interface = ath9k_add_interface,
  1730. .remove_interface = ath9k_remove_interface,
  1731. .config = ath9k_config,
  1732. .configure_filter = ath9k_configure_filter,
  1733. .sta_add = ath9k_sta_add,
  1734. .sta_remove = ath9k_sta_remove,
  1735. .conf_tx = ath9k_conf_tx,
  1736. .bss_info_changed = ath9k_bss_info_changed,
  1737. .set_key = ath9k_set_key,
  1738. .get_tsf = ath9k_get_tsf,
  1739. .set_tsf = ath9k_set_tsf,
  1740. .reset_tsf = ath9k_reset_tsf,
  1741. .ampdu_action = ath9k_ampdu_action,
  1742. .get_survey = ath9k_get_survey,
  1743. .sw_scan_start = ath9k_sw_scan_start,
  1744. .sw_scan_complete = ath9k_sw_scan_complete,
  1745. .rfkill_poll = ath9k_rfkill_poll_state,
  1746. .set_coverage_class = ath9k_set_coverage_class,
  1747. };