htc_drv_init.c 23 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "htc.h"
  17. MODULE_AUTHOR("Atheros Communications");
  18. MODULE_LICENSE("Dual BSD/GPL");
  19. MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  20. static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  21. module_param_named(debug, ath9k_debug, uint, 0);
  22. MODULE_PARM_DESC(debug, "Debugging mask");
  23. int htc_modparam_nohwcrypt;
  24. module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  25. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  26. #define CHAN2G(_freq, _idx) { \
  27. .center_freq = (_freq), \
  28. .hw_value = (_idx), \
  29. .max_power = 20, \
  30. }
  31. #define CHAN5G(_freq, _idx) { \
  32. .band = IEEE80211_BAND_5GHZ, \
  33. .center_freq = (_freq), \
  34. .hw_value = (_idx), \
  35. .max_power = 20, \
  36. }
  37. static struct ieee80211_channel ath9k_2ghz_channels[] = {
  38. CHAN2G(2412, 0), /* Channel 1 */
  39. CHAN2G(2417, 1), /* Channel 2 */
  40. CHAN2G(2422, 2), /* Channel 3 */
  41. CHAN2G(2427, 3), /* Channel 4 */
  42. CHAN2G(2432, 4), /* Channel 5 */
  43. CHAN2G(2437, 5), /* Channel 6 */
  44. CHAN2G(2442, 6), /* Channel 7 */
  45. CHAN2G(2447, 7), /* Channel 8 */
  46. CHAN2G(2452, 8), /* Channel 9 */
  47. CHAN2G(2457, 9), /* Channel 10 */
  48. CHAN2G(2462, 10), /* Channel 11 */
  49. CHAN2G(2467, 11), /* Channel 12 */
  50. CHAN2G(2472, 12), /* Channel 13 */
  51. CHAN2G(2484, 13), /* Channel 14 */
  52. };
  53. static struct ieee80211_channel ath9k_5ghz_channels[] = {
  54. /* _We_ call this UNII 1 */
  55. CHAN5G(5180, 14), /* Channel 36 */
  56. CHAN5G(5200, 15), /* Channel 40 */
  57. CHAN5G(5220, 16), /* Channel 44 */
  58. CHAN5G(5240, 17), /* Channel 48 */
  59. /* _We_ call this UNII 2 */
  60. CHAN5G(5260, 18), /* Channel 52 */
  61. CHAN5G(5280, 19), /* Channel 56 */
  62. CHAN5G(5300, 20), /* Channel 60 */
  63. CHAN5G(5320, 21), /* Channel 64 */
  64. /* _We_ call this "Middle band" */
  65. CHAN5G(5500, 22), /* Channel 100 */
  66. CHAN5G(5520, 23), /* Channel 104 */
  67. CHAN5G(5540, 24), /* Channel 108 */
  68. CHAN5G(5560, 25), /* Channel 112 */
  69. CHAN5G(5580, 26), /* Channel 116 */
  70. CHAN5G(5600, 27), /* Channel 120 */
  71. CHAN5G(5620, 28), /* Channel 124 */
  72. CHAN5G(5640, 29), /* Channel 128 */
  73. CHAN5G(5660, 30), /* Channel 132 */
  74. CHAN5G(5680, 31), /* Channel 136 */
  75. CHAN5G(5700, 32), /* Channel 140 */
  76. /* _We_ call this UNII 3 */
  77. CHAN5G(5745, 33), /* Channel 149 */
  78. CHAN5G(5765, 34), /* Channel 153 */
  79. CHAN5G(5785, 35), /* Channel 157 */
  80. CHAN5G(5805, 36), /* Channel 161 */
  81. CHAN5G(5825, 37), /* Channel 165 */
  82. };
  83. /* Atheros hardware rate code addition for short premble */
  84. #define SHPCHECK(__hw_rate, __flags) \
  85. ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
  86. #define RATE(_bitrate, _hw_rate, _flags) { \
  87. .bitrate = (_bitrate), \
  88. .flags = (_flags), \
  89. .hw_value = (_hw_rate), \
  90. .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
  91. }
  92. static struct ieee80211_rate ath9k_legacy_rates[] = {
  93. RATE(10, 0x1b, 0),
  94. RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
  95. RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
  96. RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
  97. RATE(60, 0x0b, 0),
  98. RATE(90, 0x0f, 0),
  99. RATE(120, 0x0a, 0),
  100. RATE(180, 0x0e, 0),
  101. RATE(240, 0x09, 0),
  102. RATE(360, 0x0d, 0),
  103. RATE(480, 0x08, 0),
  104. RATE(540, 0x0c, 0),
  105. };
  106. static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
  107. {
  108. int time_left;
  109. if (atomic_read(&priv->htc->tgt_ready) > 0) {
  110. atomic_dec(&priv->htc->tgt_ready);
  111. return 0;
  112. }
  113. /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
  114. time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
  115. if (!time_left) {
  116. dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
  117. return -ETIMEDOUT;
  118. }
  119. atomic_dec(&priv->htc->tgt_ready);
  120. return 0;
  121. }
  122. static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
  123. {
  124. ath9k_htc_exit_debug(priv->ah);
  125. ath9k_hw_deinit(priv->ah);
  126. tasklet_kill(&priv->wmi_tasklet);
  127. tasklet_kill(&priv->rx_tasklet);
  128. tasklet_kill(&priv->tx_tasklet);
  129. kfree(priv->ah);
  130. priv->ah = NULL;
  131. }
  132. static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
  133. {
  134. struct ieee80211_hw *hw = priv->hw;
  135. wiphy_rfkill_stop_polling(hw->wiphy);
  136. ath9k_deinit_leds(priv);
  137. ieee80211_unregister_hw(hw);
  138. ath9k_rx_cleanup(priv);
  139. ath9k_tx_cleanup(priv);
  140. ath9k_deinit_priv(priv);
  141. }
  142. static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
  143. u16 service_id,
  144. void (*tx) (void *,
  145. struct sk_buff *,
  146. enum htc_endpoint_id,
  147. bool txok),
  148. enum htc_endpoint_id *ep_id)
  149. {
  150. struct htc_service_connreq req;
  151. memset(&req, 0, sizeof(struct htc_service_connreq));
  152. req.service_id = service_id;
  153. req.ep_callbacks.priv = priv;
  154. req.ep_callbacks.rx = ath9k_htc_rxep;
  155. req.ep_callbacks.tx = tx;
  156. return htc_connect_service(priv->htc, &req, ep_id);
  157. }
  158. static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
  159. {
  160. int ret;
  161. /* WMI CMD*/
  162. ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
  163. if (ret)
  164. goto err;
  165. /* Beacon */
  166. ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
  167. &priv->beacon_ep);
  168. if (ret)
  169. goto err;
  170. /* CAB */
  171. ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
  172. &priv->cab_ep);
  173. if (ret)
  174. goto err;
  175. /* UAPSD */
  176. ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
  177. &priv->uapsd_ep);
  178. if (ret)
  179. goto err;
  180. /* MGMT */
  181. ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
  182. &priv->mgmt_ep);
  183. if (ret)
  184. goto err;
  185. /* DATA BE */
  186. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
  187. &priv->data_be_ep);
  188. if (ret)
  189. goto err;
  190. /* DATA BK */
  191. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
  192. &priv->data_bk_ep);
  193. if (ret)
  194. goto err;
  195. /* DATA VI */
  196. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
  197. &priv->data_vi_ep);
  198. if (ret)
  199. goto err;
  200. /* DATA VO */
  201. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
  202. &priv->data_vo_ep);
  203. if (ret)
  204. goto err;
  205. /*
  206. * Setup required credits before initializing HTC.
  207. * This is a bit hacky, but, since queuing is done in
  208. * the HIF layer, shouldn't matter much.
  209. */
  210. switch(devid) {
  211. case 0x7010:
  212. case 0x7015:
  213. case 0x9018:
  214. priv->htc->credits = 45;
  215. break;
  216. default:
  217. priv->htc->credits = 33;
  218. }
  219. ret = htc_init(priv->htc);
  220. if (ret)
  221. goto err;
  222. dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
  223. priv->htc->credits);
  224. return 0;
  225. err:
  226. dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
  227. return ret;
  228. }
  229. static int ath9k_reg_notifier(struct wiphy *wiphy,
  230. struct regulatory_request *request)
  231. {
  232. struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
  233. struct ath9k_htc_priv *priv = hw->priv;
  234. return ath_reg_notifier_apply(wiphy, request,
  235. ath9k_hw_regulatory(priv->ah));
  236. }
  237. static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
  238. {
  239. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  240. struct ath_common *common = ath9k_hw_common(ah);
  241. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  242. __be32 val, reg = cpu_to_be32(reg_offset);
  243. int r;
  244. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
  245. (u8 *) &reg, sizeof(reg),
  246. (u8 *) &val, sizeof(val),
  247. 100);
  248. if (unlikely(r)) {
  249. ath_print(common, ATH_DBG_WMI,
  250. "REGISTER READ FAILED: (0x%04x, %d)\n",
  251. reg_offset, r);
  252. return -EIO;
  253. }
  254. return be32_to_cpu(val);
  255. }
  256. static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
  257. {
  258. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  259. struct ath_common *common = ath9k_hw_common(ah);
  260. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  261. __be32 buf[2] = {
  262. cpu_to_be32(reg_offset),
  263. cpu_to_be32(val),
  264. };
  265. int r;
  266. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  267. (u8 *) &buf, sizeof(buf),
  268. (u8 *) &val, sizeof(val),
  269. 100);
  270. if (unlikely(r)) {
  271. ath_print(common, ATH_DBG_WMI,
  272. "REGISTER WRITE FAILED:(0x%04x, %d)\n",
  273. reg_offset, r);
  274. }
  275. }
  276. static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
  277. {
  278. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  279. struct ath_common *common = ath9k_hw_common(ah);
  280. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  281. u32 rsp_status;
  282. int r;
  283. mutex_lock(&priv->wmi->multi_write_mutex);
  284. /* Store the register/value */
  285. priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
  286. cpu_to_be32(reg_offset);
  287. priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
  288. cpu_to_be32(val);
  289. priv->wmi->multi_write_idx++;
  290. /* If the buffer is full, send it out. */
  291. if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
  292. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  293. (u8 *) &priv->wmi->multi_write,
  294. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  295. (u8 *) &rsp_status, sizeof(rsp_status),
  296. 100);
  297. if (unlikely(r)) {
  298. ath_print(common, ATH_DBG_WMI,
  299. "REGISTER WRITE FAILED, multi len: %d\n",
  300. priv->wmi->multi_write_idx);
  301. }
  302. priv->wmi->multi_write_idx = 0;
  303. }
  304. mutex_unlock(&priv->wmi->multi_write_mutex);
  305. }
  306. static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
  307. {
  308. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  309. struct ath_common *common = ath9k_hw_common(ah);
  310. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  311. if (atomic_read(&priv->wmi->mwrite_cnt))
  312. ath9k_regwrite_buffer(hw_priv, val, reg_offset);
  313. else
  314. ath9k_regwrite_single(hw_priv, val, reg_offset);
  315. }
  316. static void ath9k_enable_regwrite_buffer(void *hw_priv)
  317. {
  318. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  319. struct ath_common *common = ath9k_hw_common(ah);
  320. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  321. atomic_inc(&priv->wmi->mwrite_cnt);
  322. }
  323. static void ath9k_disable_regwrite_buffer(void *hw_priv)
  324. {
  325. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  326. struct ath_common *common = ath9k_hw_common(ah);
  327. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  328. atomic_dec(&priv->wmi->mwrite_cnt);
  329. }
  330. static void ath9k_regwrite_flush(void *hw_priv)
  331. {
  332. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  333. struct ath_common *common = ath9k_hw_common(ah);
  334. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  335. u32 rsp_status;
  336. int r;
  337. mutex_lock(&priv->wmi->multi_write_mutex);
  338. if (priv->wmi->multi_write_idx) {
  339. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  340. (u8 *) &priv->wmi->multi_write,
  341. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  342. (u8 *) &rsp_status, sizeof(rsp_status),
  343. 100);
  344. if (unlikely(r)) {
  345. ath_print(common, ATH_DBG_WMI,
  346. "REGISTER WRITE FAILED, multi len: %d\n",
  347. priv->wmi->multi_write_idx);
  348. }
  349. priv->wmi->multi_write_idx = 0;
  350. }
  351. mutex_unlock(&priv->wmi->multi_write_mutex);
  352. }
  353. static const struct ath_ops ath9k_common_ops = {
  354. .read = ath9k_regread,
  355. .write = ath9k_regwrite,
  356. .enable_write_buffer = ath9k_enable_regwrite_buffer,
  357. .disable_write_buffer = ath9k_disable_regwrite_buffer,
  358. .write_flush = ath9k_regwrite_flush,
  359. };
  360. static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
  361. {
  362. *csz = L1_CACHE_BYTES >> 2;
  363. }
  364. static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
  365. {
  366. struct ath_hw *ah = (struct ath_hw *) common->ah;
  367. (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
  368. if (!ath9k_hw_wait(ah,
  369. AR_EEPROM_STATUS_DATA,
  370. AR_EEPROM_STATUS_DATA_BUSY |
  371. AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
  372. AH_WAIT_TIMEOUT))
  373. return false;
  374. *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
  375. AR_EEPROM_STATUS_DATA_VAL);
  376. return true;
  377. }
  378. static const struct ath_bus_ops ath9k_usb_bus_ops = {
  379. .ath_bus_type = ATH_USB,
  380. .read_cachesize = ath_usb_read_cachesize,
  381. .eeprom_read = ath_usb_eeprom_read,
  382. };
  383. static void setup_ht_cap(struct ath9k_htc_priv *priv,
  384. struct ieee80211_sta_ht_cap *ht_info)
  385. {
  386. struct ath_common *common = ath9k_hw_common(priv->ah);
  387. u8 tx_streams, rx_streams;
  388. int i;
  389. ht_info->ht_supported = true;
  390. ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
  391. IEEE80211_HT_CAP_SM_PS |
  392. IEEE80211_HT_CAP_SGI_40 |
  393. IEEE80211_HT_CAP_DSSSCCK40;
  394. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
  395. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  396. ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
  397. ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  398. ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
  399. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  400. /* ath9k_htc supports only 1 or 2 stream devices */
  401. tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
  402. rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
  403. ath_print(common, ATH_DBG_CONFIG,
  404. "TX streams %d, RX streams: %d\n",
  405. tx_streams, rx_streams);
  406. if (tx_streams != rx_streams) {
  407. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  408. ht_info->mcs.tx_params |= ((tx_streams - 1) <<
  409. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  410. }
  411. for (i = 0; i < rx_streams; i++)
  412. ht_info->mcs.rx_mask[i] = 0xff;
  413. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
  414. }
  415. static int ath9k_init_queues(struct ath9k_htc_priv *priv)
  416. {
  417. struct ath_common *common = ath9k_hw_common(priv->ah);
  418. int i;
  419. for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
  420. priv->hwq_map[i] = -1;
  421. priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
  422. if (priv->beaconq == -1) {
  423. ath_print(common, ATH_DBG_FATAL,
  424. "Unable to setup BEACON xmit queue\n");
  425. goto err;
  426. }
  427. priv->cabq = ath9k_htc_cabq_setup(priv);
  428. if (priv->cabq == -1) {
  429. ath_print(common, ATH_DBG_FATAL,
  430. "Unable to setup CAB xmit queue\n");
  431. goto err;
  432. }
  433. if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
  434. ath_print(common, ATH_DBG_FATAL,
  435. "Unable to setup xmit queue for BE traffic\n");
  436. goto err;
  437. }
  438. if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
  439. ath_print(common, ATH_DBG_FATAL,
  440. "Unable to setup xmit queue for BK traffic\n");
  441. goto err;
  442. }
  443. if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
  444. ath_print(common, ATH_DBG_FATAL,
  445. "Unable to setup xmit queue for VI traffic\n");
  446. goto err;
  447. }
  448. if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
  449. ath_print(common, ATH_DBG_FATAL,
  450. "Unable to setup xmit queue for VO traffic\n");
  451. goto err;
  452. }
  453. return 0;
  454. err:
  455. return -EINVAL;
  456. }
  457. static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
  458. {
  459. struct ath_common *common = ath9k_hw_common(priv->ah);
  460. int i = 0;
  461. /* Get the hardware key cache size. */
  462. common->keymax = priv->ah->caps.keycache_size;
  463. if (common->keymax > ATH_KEYMAX) {
  464. ath_print(common, ATH_DBG_ANY,
  465. "Warning, using only %u entries in %u key cache\n",
  466. ATH_KEYMAX, common->keymax);
  467. common->keymax = ATH_KEYMAX;
  468. }
  469. /*
  470. * Reset the key cache since some parts do not
  471. * reset the contents on initial power up.
  472. */
  473. for (i = 0; i < common->keymax; i++)
  474. ath9k_hw_keyreset(priv->ah, (u16) i);
  475. }
  476. static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
  477. {
  478. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
  479. priv->sbands[IEEE80211_BAND_2GHZ].channels =
  480. ath9k_2ghz_channels;
  481. priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
  482. priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
  483. ARRAY_SIZE(ath9k_2ghz_channels);
  484. priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
  485. priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
  486. ARRAY_SIZE(ath9k_legacy_rates);
  487. }
  488. if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) {
  489. priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
  490. priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
  491. priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
  492. ARRAY_SIZE(ath9k_5ghz_channels);
  493. priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
  494. ath9k_legacy_rates + 4;
  495. priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
  496. ARRAY_SIZE(ath9k_legacy_rates) - 4;
  497. }
  498. }
  499. static void ath9k_init_misc(struct ath9k_htc_priv *priv)
  500. {
  501. struct ath_common *common = ath9k_hw_common(priv->ah);
  502. common->tx_chainmask = priv->ah->caps.tx_chainmask;
  503. common->rx_chainmask = priv->ah->caps.rx_chainmask;
  504. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  505. memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
  506. priv->ah->opmode = NL80211_IFTYPE_STATION;
  507. }
  508. static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid)
  509. {
  510. struct ath_hw *ah = NULL;
  511. struct ath_common *common;
  512. int ret = 0, csz = 0;
  513. priv->op_flags |= OP_INVALID;
  514. ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
  515. if (!ah)
  516. return -ENOMEM;
  517. ah->hw_version.devid = devid;
  518. ah->hw_version.subsysid = 0; /* FIXME */
  519. priv->ah = ah;
  520. common = ath9k_hw_common(ah);
  521. common->ops = &ath9k_common_ops;
  522. common->bus_ops = &ath9k_usb_bus_ops;
  523. common->ah = ah;
  524. common->hw = priv->hw;
  525. common->priv = priv;
  526. common->debug_mask = ath9k_debug;
  527. spin_lock_init(&priv->wmi->wmi_lock);
  528. spin_lock_init(&priv->beacon_lock);
  529. spin_lock_init(&priv->tx_lock);
  530. mutex_init(&priv->mutex);
  531. mutex_init(&priv->htc_pm_lock);
  532. tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
  533. (unsigned long)priv);
  534. tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
  535. (unsigned long)priv);
  536. tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
  537. INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
  538. INIT_WORK(&priv->ps_work, ath9k_ps_work);
  539. /*
  540. * Cache line size is used to size and align various
  541. * structures used to communicate with the hardware.
  542. */
  543. ath_read_cachesize(common, &csz);
  544. common->cachelsz = csz << 2; /* convert to bytes */
  545. ret = ath9k_hw_init(ah);
  546. if (ret) {
  547. ath_print(common, ATH_DBG_FATAL,
  548. "Unable to initialize hardware; "
  549. "initialization status: %d\n", ret);
  550. goto err_hw;
  551. }
  552. ret = ath9k_htc_init_debug(ah);
  553. if (ret) {
  554. ath_print(common, ATH_DBG_FATAL,
  555. "Unable to create debugfs files\n");
  556. goto err_debug;
  557. }
  558. ret = ath9k_init_queues(priv);
  559. if (ret)
  560. goto err_queues;
  561. ath9k_init_crypto(priv);
  562. ath9k_init_channels_rates(priv);
  563. ath9k_init_misc(priv);
  564. return 0;
  565. err_queues:
  566. ath9k_htc_exit_debug(ah);
  567. err_debug:
  568. ath9k_hw_deinit(ah);
  569. err_hw:
  570. kfree(ah);
  571. priv->ah = NULL;
  572. return ret;
  573. }
  574. static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
  575. struct ieee80211_hw *hw)
  576. {
  577. struct ath_common *common = ath9k_hw_common(priv->ah);
  578. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  579. IEEE80211_HW_AMPDU_AGGREGATION |
  580. IEEE80211_HW_SPECTRUM_MGMT |
  581. IEEE80211_HW_HAS_RATE_CONTROL |
  582. IEEE80211_HW_RX_INCLUDES_FCS |
  583. IEEE80211_HW_SUPPORTS_PS |
  584. IEEE80211_HW_PS_NULLFUNC_STACK;
  585. hw->wiphy->interface_modes =
  586. BIT(NL80211_IFTYPE_STATION) |
  587. BIT(NL80211_IFTYPE_ADHOC);
  588. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  589. hw->queues = 4;
  590. hw->channel_change_time = 5000;
  591. hw->max_listen_interval = 10;
  592. hw->vif_data_size = sizeof(struct ath9k_htc_vif);
  593. hw->sta_data_size = sizeof(struct ath9k_htc_sta);
  594. /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
  595. hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
  596. sizeof(struct htc_frame_hdr) + 4;
  597. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
  598. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  599. &priv->sbands[IEEE80211_BAND_2GHZ];
  600. if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
  601. hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  602. &priv->sbands[IEEE80211_BAND_5GHZ];
  603. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
  604. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
  605. setup_ht_cap(priv,
  606. &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
  607. if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
  608. setup_ht_cap(priv,
  609. &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
  610. }
  611. SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
  612. }
  613. static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid)
  614. {
  615. struct ieee80211_hw *hw = priv->hw;
  616. struct ath_common *common;
  617. struct ath_hw *ah;
  618. int error = 0;
  619. struct ath_regulatory *reg;
  620. /* Bring up device */
  621. error = ath9k_init_priv(priv, devid);
  622. if (error != 0)
  623. goto err_init;
  624. ah = priv->ah;
  625. common = ath9k_hw_common(ah);
  626. ath9k_set_hw_capab(priv, hw);
  627. /* Initialize regulatory */
  628. error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
  629. ath9k_reg_notifier);
  630. if (error)
  631. goto err_regd;
  632. reg = &common->regulatory;
  633. /* Setup TX */
  634. error = ath9k_tx_init(priv);
  635. if (error != 0)
  636. goto err_tx;
  637. /* Setup RX */
  638. error = ath9k_rx_init(priv);
  639. if (error != 0)
  640. goto err_rx;
  641. /* Register with mac80211 */
  642. error = ieee80211_register_hw(hw);
  643. if (error)
  644. goto err_register;
  645. /* Handle world regulatory */
  646. if (!ath_is_world_regd(reg)) {
  647. error = regulatory_hint(hw->wiphy, reg->alpha2);
  648. if (error)
  649. goto err_world;
  650. }
  651. ath9k_init_leds(priv);
  652. ath9k_start_rfkill_poll(priv);
  653. return 0;
  654. err_world:
  655. ieee80211_unregister_hw(hw);
  656. err_register:
  657. ath9k_rx_cleanup(priv);
  658. err_rx:
  659. ath9k_tx_cleanup(priv);
  660. err_tx:
  661. /* Nothing */
  662. err_regd:
  663. ath9k_deinit_priv(priv);
  664. err_init:
  665. return error;
  666. }
  667. int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
  668. u16 devid)
  669. {
  670. struct ieee80211_hw *hw;
  671. struct ath9k_htc_priv *priv;
  672. int ret;
  673. hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
  674. if (!hw)
  675. return -ENOMEM;
  676. priv = hw->priv;
  677. priv->hw = hw;
  678. priv->htc = htc_handle;
  679. priv->dev = dev;
  680. htc_handle->drv_priv = priv;
  681. SET_IEEE80211_DEV(hw, priv->dev);
  682. ret = ath9k_htc_wait_for_target(priv);
  683. if (ret)
  684. goto err_free;
  685. priv->wmi = ath9k_init_wmi(priv);
  686. if (!priv->wmi) {
  687. ret = -EINVAL;
  688. goto err_free;
  689. }
  690. ret = ath9k_init_htc_services(priv, devid);
  691. if (ret)
  692. goto err_init;
  693. /* The device may have been unplugged earlier. */
  694. priv->op_flags &= ~OP_UNPLUGGED;
  695. ret = ath9k_init_device(priv, devid);
  696. if (ret)
  697. goto err_init;
  698. return 0;
  699. err_init:
  700. ath9k_deinit_wmi(priv);
  701. err_free:
  702. ieee80211_free_hw(hw);
  703. return ret;
  704. }
  705. void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
  706. {
  707. if (htc_handle->drv_priv) {
  708. /* Check if the device has been yanked out. */
  709. if (hotunplug)
  710. htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
  711. ath9k_deinit_device(htc_handle->drv_priv);
  712. ath9k_deinit_wmi(htc_handle->drv_priv);
  713. ieee80211_free_hw(htc_handle->drv_priv->hw);
  714. }
  715. }
  716. #ifdef CONFIG_PM
  717. int ath9k_htc_resume(struct htc_target *htc_handle)
  718. {
  719. int ret;
  720. ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
  721. if (ret)
  722. return ret;
  723. ret = ath9k_init_htc_services(htc_handle->drv_priv,
  724. htc_handle->drv_priv->ah->hw_version.devid);
  725. return ret;
  726. }
  727. #endif
  728. static int __init ath9k_htc_init(void)
  729. {
  730. int error;
  731. error = ath9k_htc_debug_create_root();
  732. if (error < 0) {
  733. printk(KERN_ERR
  734. "ath9k_htc: Unable to create debugfs root: %d\n",
  735. error);
  736. goto err_dbg;
  737. }
  738. error = ath9k_hif_usb_init();
  739. if (error < 0) {
  740. printk(KERN_ERR
  741. "ath9k_htc: No USB devices found,"
  742. " driver not installed.\n");
  743. error = -ENODEV;
  744. goto err_usb;
  745. }
  746. return 0;
  747. err_usb:
  748. ath9k_htc_debug_remove_root();
  749. err_dbg:
  750. return error;
  751. }
  752. module_init(ath9k_htc_init);
  753. static void __exit ath9k_htc_exit(void)
  754. {
  755. ath9k_hif_usb_exit();
  756. ath9k_htc_debug_remove_root();
  757. printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
  758. }
  759. module_exit(ath9k_htc_exit);