base.h 7.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240
  1. /*-
  2. * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer,
  10. * without modification.
  11. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  12. * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
  13. * redistribution must be conditioned upon including a substantially
  14. * similar Disclaimer requirement for further binary redistribution.
  15. * 3. Neither the names of the above-listed copyright holders nor the names
  16. * of any contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * Alternatively, this software may be distributed under the terms of the
  20. * GNU General Public License ("GPL") version 2 as published by the Free
  21. * Software Foundation.
  22. *
  23. * NO WARRANTY
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26. * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
  27. * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
  28. * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
  29. * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  32. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  34. * THE POSSIBILITY OF SUCH DAMAGES.
  35. *
  36. */
  37. /*
  38. * Definitions for the Atheros Wireless LAN controller driver.
  39. */
  40. #ifndef _DEV_ATH_ATHVAR_H
  41. #define _DEV_ATH_ATHVAR_H
  42. #include <linux/interrupt.h>
  43. #include <linux/list.h>
  44. #include <linux/wireless.h>
  45. #include <linux/if_ether.h>
  46. #include <linux/leds.h>
  47. #include <linux/rfkill.h>
  48. #include <linux/workqueue.h>
  49. #include "ath5k.h"
  50. #include "debug.h"
  51. #include "ani.h"
  52. #include "../regd.h"
  53. #include "../ath.h"
  54. #define ATH_RXBUF 40 /* number of RX buffers */
  55. #define ATH_TXBUF 200 /* number of TX buffers */
  56. #define ATH_BCBUF 1 /* number of beacon buffers */
  57. struct ath5k_buf {
  58. struct list_head list;
  59. struct ath5k_desc *desc; /* virtual addr of desc */
  60. dma_addr_t daddr; /* physical addr of desc */
  61. struct sk_buff *skb; /* skbuff for buf */
  62. dma_addr_t skbaddr;/* physical addr of skb data */
  63. };
  64. /*
  65. * Data transmit queue state. One of these exists for each
  66. * hardware transmit queue. Packets sent to us from above
  67. * are assigned to queues based on their priority. Not all
  68. * devices support a complete set of hardware transmit queues.
  69. * For those devices the array sc_ac2q will map multiple
  70. * priorities to fewer hardware queues (typically all to one
  71. * hardware queue).
  72. */
  73. struct ath5k_txq {
  74. unsigned int qnum; /* hardware q number */
  75. u32 *link; /* link ptr in last TX desc */
  76. struct list_head q; /* transmit queue */
  77. spinlock_t lock; /* lock on q and link */
  78. bool setup;
  79. };
  80. #define ATH5K_LED_MAX_NAME_LEN 31
  81. /*
  82. * State for LED triggers
  83. */
  84. struct ath5k_led
  85. {
  86. char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
  87. struct ath5k_softc *sc; /* driver state */
  88. struct led_classdev led_dev; /* led classdev */
  89. };
  90. /* Rfkill */
  91. struct ath5k_rfkill {
  92. /* GPIO PIN for rfkill */
  93. u16 gpio;
  94. /* polarity of rfkill GPIO PIN */
  95. bool polarity;
  96. /* RFKILL toggle tasklet */
  97. struct tasklet_struct toggleq;
  98. };
  99. /* statistics */
  100. struct ath5k_statistics {
  101. /* antenna use */
  102. unsigned int antenna_rx[5]; /* frames count per antenna RX */
  103. unsigned int antenna_tx[5]; /* frames count per antenna TX */
  104. /* frame errors */
  105. unsigned int rx_all_count; /* all RX frames, including errors */
  106. unsigned int tx_all_count; /* all TX frames, including errors */
  107. unsigned int rxerr_crc;
  108. unsigned int rxerr_phy;
  109. unsigned int rxerr_phy_code[32];
  110. unsigned int rxerr_fifo;
  111. unsigned int rxerr_decrypt;
  112. unsigned int rxerr_mic;
  113. unsigned int rxerr_proc;
  114. unsigned int rxerr_jumbo;
  115. unsigned int txerr_retry;
  116. unsigned int txerr_fifo;
  117. unsigned int txerr_filt;
  118. /* MIB counters */
  119. unsigned int ack_fail;
  120. unsigned int rts_fail;
  121. unsigned int rts_ok;
  122. unsigned int fcs_error;
  123. unsigned int beacons;
  124. unsigned int mib_intr;
  125. unsigned int rxorn_intr;
  126. unsigned int rxeol_intr;
  127. };
  128. #if CHAN_DEBUG
  129. #define ATH_CHAN_MAX (26+26+26+200+200)
  130. #else
  131. #define ATH_CHAN_MAX (14+14+14+252+20)
  132. #endif
  133. /* Software Carrier, keeps track of the driver state
  134. * associated with an instance of a device */
  135. struct ath5k_softc {
  136. struct pci_dev *pdev; /* for dma mapping */
  137. void __iomem *iobase; /* address of the device */
  138. struct mutex lock; /* dev-level lock */
  139. struct ieee80211_hw *hw; /* IEEE 802.11 common */
  140. struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
  141. struct ieee80211_channel channels[ATH_CHAN_MAX];
  142. struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
  143. s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
  144. enum nl80211_iftype opmode;
  145. struct ath5k_hw *ah; /* Atheros HW */
  146. struct ieee80211_supported_band *curband;
  147. #ifdef CONFIG_ATH5K_DEBUG
  148. struct ath5k_dbg_info debug; /* debug info */
  149. #endif /* CONFIG_ATH5K_DEBUG */
  150. struct ath5k_buf *bufptr; /* allocated buffer ptr */
  151. struct ath5k_desc *desc; /* TX/RX descriptors */
  152. dma_addr_t desc_daddr; /* DMA (physical) address */
  153. size_t desc_len; /* size of TX/RX descriptors */
  154. DECLARE_BITMAP(status, 5);
  155. #define ATH_STAT_INVALID 0 /* disable hardware accesses */
  156. #define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
  157. #define ATH_STAT_PROMISC 2
  158. #define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
  159. #define ATH_STAT_STARTED 4 /* opened & irqs enabled */
  160. unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
  161. unsigned int curmode; /* current phy mode */
  162. struct ieee80211_channel *curchan; /* current h/w channel */
  163. struct ieee80211_vif *vif;
  164. enum ath5k_int imask; /* interrupt mask copy */
  165. u8 bssidmask[ETH_ALEN];
  166. unsigned int led_pin, /* GPIO pin for driving LED */
  167. led_on; /* pin setting for LED on */
  168. struct work_struct reset_work; /* deferred chip reset */
  169. unsigned int rxbufsize; /* rx size based on mtu */
  170. struct list_head rxbuf; /* receive buffer */
  171. spinlock_t rxbuflock;
  172. u32 *rxlink; /* link ptr in last RX desc */
  173. struct tasklet_struct rxtq; /* rx intr tasklet */
  174. struct ath5k_led rx_led; /* rx led */
  175. struct list_head txbuf; /* transmit buffer */
  176. spinlock_t txbuflock;
  177. unsigned int txbuf_len; /* buf count in txbuf list */
  178. struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
  179. struct ath5k_txq *txq; /* main tx queue */
  180. struct tasklet_struct txtq; /* tx intr tasklet */
  181. struct ath5k_led tx_led; /* tx led */
  182. struct ath5k_rfkill rf_kill;
  183. struct tasklet_struct calib; /* calibration tasklet */
  184. spinlock_t block; /* protects beacon */
  185. struct tasklet_struct beacontq; /* beacon intr tasklet */
  186. struct ath5k_buf *bbuf; /* beacon buffer */
  187. unsigned int bhalq, /* SW q for outgoing beacons */
  188. bmisscount, /* missed beacon transmits */
  189. bintval, /* beacon interval in TU */
  190. bsent;
  191. unsigned int nexttbtt; /* next beacon time in TU */
  192. struct ath5k_txq *cabq; /* content after beacon */
  193. int power_level; /* Requested tx power in dbm */
  194. bool assoc; /* associate state */
  195. bool enable_beacon; /* true if beacons are on */
  196. struct ath5k_statistics stats;
  197. struct ath5k_ani_state ani_state;
  198. struct tasklet_struct ani_tasklet; /* ANI calibration */
  199. };
  200. #define ath5k_hw_hasbssidmask(_ah) \
  201. (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
  202. #define ath5k_hw_hasveol(_ah) \
  203. (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
  204. #endif