qlcnic_ethtool.c 28 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/types.h>
  25. #include <linux/delay.h>
  26. #include <linux/pci.h>
  27. #include <linux/io.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/ethtool.h>
  30. #include "qlcnic.h"
  31. struct qlcnic_stats {
  32. char stat_string[ETH_GSTRING_LEN];
  33. int sizeof_stat;
  34. int stat_offset;
  35. };
  36. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  37. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  38. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  39. {"xmit_called",
  40. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  41. {"xmit_finished",
  42. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  43. {"rx_dropped",
  44. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  45. {"tx_dropped",
  46. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  47. {"csummed",
  48. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  49. {"rx_pkts",
  50. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  51. {"lro_pkts",
  52. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  53. {"rx_bytes",
  54. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  55. {"tx_bytes",
  56. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  57. {"lrobytes",
  58. QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  59. {"lso_frames",
  60. QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  61. {"xmit_on",
  62. QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  63. {"xmit_off",
  64. QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  65. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  66. QLC_OFF(stats.skb_alloc_failure)},
  67. {"null rxbuf",
  68. QLC_SIZEOF(stats.null_rxbuf), QLC_OFF(stats.null_rxbuf)},
  69. {"rx dma map error", QLC_SIZEOF(stats.rx_dma_map_error),
  70. QLC_OFF(stats.rx_dma_map_error)},
  71. {"tx dma map error", QLC_SIZEOF(stats.tx_dma_map_error),
  72. QLC_OFF(stats.tx_dma_map_error)},
  73. };
  74. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  75. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  76. "Register_Test_on_offline",
  77. "Link_Test_on_offline",
  78. "Interrupt_Test_offline",
  79. "Loopback_Test_offline"
  80. };
  81. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  82. #define QLCNIC_RING_REGS_COUNT 20
  83. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  84. #define QLCNIC_MAX_EEPROM_LEN 1024
  85. static const u32 diag_registers[] = {
  86. CRB_CMDPEG_STATE,
  87. CRB_RCVPEG_STATE,
  88. CRB_XG_STATE_P3,
  89. CRB_FW_CAPABILITIES_1,
  90. ISR_INT_STATE_REG,
  91. QLCNIC_CRB_DEV_REF_COUNT,
  92. QLCNIC_CRB_DEV_STATE,
  93. QLCNIC_CRB_DRV_STATE,
  94. QLCNIC_CRB_DRV_SCRATCH,
  95. QLCNIC_CRB_DEV_PARTITION_INFO,
  96. QLCNIC_CRB_DRV_IDC_VER,
  97. QLCNIC_PEG_ALIVE_COUNTER,
  98. QLCNIC_PEG_HALT_STATUS1,
  99. QLCNIC_PEG_HALT_STATUS2,
  100. QLCNIC_CRB_PEG_NET_0+0x3c,
  101. QLCNIC_CRB_PEG_NET_1+0x3c,
  102. QLCNIC_CRB_PEG_NET_2+0x3c,
  103. QLCNIC_CRB_PEG_NET_4+0x3c,
  104. -1
  105. };
  106. static int qlcnic_get_regs_len(struct net_device *dev)
  107. {
  108. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN;
  109. }
  110. static int qlcnic_get_eeprom_len(struct net_device *dev)
  111. {
  112. return QLCNIC_FLASH_TOTAL_SIZE;
  113. }
  114. static void
  115. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  116. {
  117. struct qlcnic_adapter *adapter = netdev_priv(dev);
  118. u32 fw_major, fw_minor, fw_build;
  119. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  120. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  121. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  122. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  123. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  124. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  125. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  126. }
  127. static int
  128. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  129. {
  130. struct qlcnic_adapter *adapter = netdev_priv(dev);
  131. int check_sfp_module = 0;
  132. u16 pcifn = adapter->ahw.pci_func;
  133. /* read which mode */
  134. if (adapter->ahw.port_type == QLCNIC_GBE) {
  135. ecmd->supported = (SUPPORTED_10baseT_Half |
  136. SUPPORTED_10baseT_Full |
  137. SUPPORTED_100baseT_Half |
  138. SUPPORTED_100baseT_Full |
  139. SUPPORTED_1000baseT_Half |
  140. SUPPORTED_1000baseT_Full);
  141. ecmd->advertising = (ADVERTISED_100baseT_Half |
  142. ADVERTISED_100baseT_Full |
  143. ADVERTISED_1000baseT_Half |
  144. ADVERTISED_1000baseT_Full);
  145. ecmd->speed = adapter->link_speed;
  146. ecmd->duplex = adapter->link_duplex;
  147. ecmd->autoneg = adapter->link_autoneg;
  148. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  149. u32 val;
  150. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  151. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  152. ecmd->supported = SUPPORTED_1000baseT_Full;
  153. ecmd->advertising = ADVERTISED_1000baseT_Full;
  154. } else {
  155. ecmd->supported = SUPPORTED_10000baseT_Full;
  156. ecmd->advertising = ADVERTISED_10000baseT_Full;
  157. }
  158. if (netif_running(dev) && adapter->has_link_events) {
  159. ecmd->speed = adapter->link_speed;
  160. ecmd->autoneg = adapter->link_autoneg;
  161. ecmd->duplex = adapter->link_duplex;
  162. goto skip;
  163. }
  164. val = QLCRD32(adapter, P3_LINK_SPEED_REG(pcifn));
  165. ecmd->speed = P3_LINK_SPEED_MHZ *
  166. P3_LINK_SPEED_VAL(pcifn, val);
  167. ecmd->duplex = DUPLEX_FULL;
  168. ecmd->autoneg = AUTONEG_DISABLE;
  169. } else
  170. return -EIO;
  171. skip:
  172. ecmd->phy_address = adapter->physical_port;
  173. ecmd->transceiver = XCVR_EXTERNAL;
  174. switch (adapter->ahw.board_type) {
  175. case QLCNIC_BRDTYPE_P3_REF_QG:
  176. case QLCNIC_BRDTYPE_P3_4_GB:
  177. case QLCNIC_BRDTYPE_P3_4_GB_MM:
  178. ecmd->supported |= SUPPORTED_Autoneg;
  179. ecmd->advertising |= ADVERTISED_Autoneg;
  180. case QLCNIC_BRDTYPE_P3_10G_CX4:
  181. case QLCNIC_BRDTYPE_P3_10G_CX4_LP:
  182. case QLCNIC_BRDTYPE_P3_10000_BASE_T:
  183. ecmd->supported |= SUPPORTED_TP;
  184. ecmd->advertising |= ADVERTISED_TP;
  185. ecmd->port = PORT_TP;
  186. ecmd->autoneg = adapter->link_autoneg;
  187. break;
  188. case QLCNIC_BRDTYPE_P3_IMEZ:
  189. case QLCNIC_BRDTYPE_P3_XG_LOM:
  190. case QLCNIC_BRDTYPE_P3_HMEZ:
  191. ecmd->supported |= SUPPORTED_MII;
  192. ecmd->advertising |= ADVERTISED_MII;
  193. ecmd->port = PORT_MII;
  194. ecmd->autoneg = AUTONEG_DISABLE;
  195. break;
  196. case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS:
  197. case QLCNIC_BRDTYPE_P3_10G_SFP_CT:
  198. case QLCNIC_BRDTYPE_P3_10G_SFP_QT:
  199. ecmd->advertising |= ADVERTISED_TP;
  200. ecmd->supported |= SUPPORTED_TP;
  201. check_sfp_module = netif_running(dev) &&
  202. adapter->has_link_events;
  203. case QLCNIC_BRDTYPE_P3_10G_XFP:
  204. ecmd->supported |= SUPPORTED_FIBRE;
  205. ecmd->advertising |= ADVERTISED_FIBRE;
  206. ecmd->port = PORT_FIBRE;
  207. ecmd->autoneg = AUTONEG_DISABLE;
  208. break;
  209. case QLCNIC_BRDTYPE_P3_10G_TP:
  210. if (adapter->ahw.port_type == QLCNIC_XGBE) {
  211. ecmd->autoneg = AUTONEG_DISABLE;
  212. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  213. ecmd->advertising |=
  214. (ADVERTISED_FIBRE | ADVERTISED_TP);
  215. ecmd->port = PORT_FIBRE;
  216. check_sfp_module = netif_running(dev) &&
  217. adapter->has_link_events;
  218. } else {
  219. ecmd->autoneg = AUTONEG_ENABLE;
  220. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  221. ecmd->advertising |=
  222. (ADVERTISED_TP | ADVERTISED_Autoneg);
  223. ecmd->port = PORT_TP;
  224. }
  225. break;
  226. default:
  227. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  228. adapter->ahw.board_type);
  229. return -EIO;
  230. }
  231. if (check_sfp_module) {
  232. switch (adapter->module_type) {
  233. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  234. case LINKEVENT_MODULE_OPTICAL_SRLR:
  235. case LINKEVENT_MODULE_OPTICAL_LRM:
  236. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  237. ecmd->port = PORT_FIBRE;
  238. break;
  239. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  240. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  241. case LINKEVENT_MODULE_TWINAX:
  242. ecmd->port = PORT_TP;
  243. break;
  244. default:
  245. ecmd->port = PORT_OTHER;
  246. }
  247. }
  248. return 0;
  249. }
  250. static int
  251. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  252. {
  253. struct qlcnic_adapter *adapter = netdev_priv(dev);
  254. __u32 status;
  255. /* read which mode */
  256. if (adapter->ahw.port_type == QLCNIC_GBE) {
  257. /* autonegotiation */
  258. if (qlcnic_fw_cmd_set_phy(adapter,
  259. QLCNIC_NIU_GB_MII_MGMT_ADDR_AUTONEG,
  260. ecmd->autoneg) != 0)
  261. return -EIO;
  262. else
  263. adapter->link_autoneg = ecmd->autoneg;
  264. if (qlcnic_fw_cmd_query_phy(adapter,
  265. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  266. &status) != 0)
  267. return -EIO;
  268. switch (ecmd->speed) {
  269. case SPEED_10:
  270. qlcnic_set_phy_speed(status, 0);
  271. break;
  272. case SPEED_100:
  273. qlcnic_set_phy_speed(status, 1);
  274. break;
  275. case SPEED_1000:
  276. qlcnic_set_phy_speed(status, 2);
  277. break;
  278. }
  279. if (ecmd->duplex == DUPLEX_HALF)
  280. qlcnic_clear_phy_duplex(status);
  281. if (ecmd->duplex == DUPLEX_FULL)
  282. qlcnic_set_phy_duplex(status);
  283. if (qlcnic_fw_cmd_set_phy(adapter,
  284. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  285. *((int *)&status)) != 0)
  286. return -EIO;
  287. else {
  288. adapter->link_speed = ecmd->speed;
  289. adapter->link_duplex = ecmd->duplex;
  290. }
  291. } else
  292. return -EOPNOTSUPP;
  293. if (!netif_running(dev))
  294. return 0;
  295. dev->netdev_ops->ndo_stop(dev);
  296. return dev->netdev_ops->ndo_open(dev);
  297. }
  298. static void
  299. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  300. {
  301. struct qlcnic_adapter *adapter = netdev_priv(dev);
  302. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  303. struct qlcnic_host_sds_ring *sds_ring;
  304. u32 *regs_buff = p;
  305. int ring, i = 0;
  306. memset(p, 0, qlcnic_get_regs_len(dev));
  307. regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
  308. (adapter->pdev)->device;
  309. for (i = 0; diag_registers[i] != -1; i++)
  310. regs_buff[i] = QLCRD32(adapter, diag_registers[i]);
  311. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  312. return;
  313. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  314. regs_buff[i++] = 1; /* No. of tx ring */
  315. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  316. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  317. regs_buff[i++] = 2; /* No. of rx ring */
  318. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  319. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  320. regs_buff[i++] = adapter->max_sds_rings;
  321. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  322. sds_ring = &(recv_ctx->sds_rings[ring]);
  323. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  324. }
  325. }
  326. static u32 qlcnic_test_link(struct net_device *dev)
  327. {
  328. struct qlcnic_adapter *adapter = netdev_priv(dev);
  329. u32 val;
  330. val = QLCRD32(adapter, CRB_XG_STATE_P3);
  331. val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
  332. return (val == XG_LINK_UP_P3) ? 0 : 1;
  333. }
  334. static int
  335. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  336. u8 *bytes)
  337. {
  338. struct qlcnic_adapter *adapter = netdev_priv(dev);
  339. int offset;
  340. int ret;
  341. if (eeprom->len == 0)
  342. return -EINVAL;
  343. eeprom->magic = (adapter->pdev)->vendor |
  344. ((adapter->pdev)->device << 16);
  345. offset = eeprom->offset;
  346. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  347. eeprom->len);
  348. if (ret < 0)
  349. return ret;
  350. return 0;
  351. }
  352. static void
  353. qlcnic_get_ringparam(struct net_device *dev,
  354. struct ethtool_ringparam *ring)
  355. {
  356. struct qlcnic_adapter *adapter = netdev_priv(dev);
  357. ring->rx_pending = adapter->num_rxd;
  358. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  359. ring->tx_pending = adapter->num_txd;
  360. if (adapter->ahw.port_type == QLCNIC_GBE) {
  361. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_1G;
  362. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_1G;
  363. } else {
  364. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_10G;
  365. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  366. }
  367. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  368. ring->rx_mini_max_pending = 0;
  369. ring->rx_mini_pending = 0;
  370. }
  371. static u32
  372. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  373. {
  374. u32 num_desc;
  375. num_desc = max(val, min);
  376. num_desc = min(num_desc, max);
  377. num_desc = roundup_pow_of_two(num_desc);
  378. if (val != num_desc) {
  379. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  380. qlcnic_driver_name, r_name, num_desc, val);
  381. }
  382. return num_desc;
  383. }
  384. static int
  385. qlcnic_set_ringparam(struct net_device *dev,
  386. struct ethtool_ringparam *ring)
  387. {
  388. struct qlcnic_adapter *adapter = netdev_priv(dev);
  389. u16 max_rcv_desc = MAX_RCV_DESCRIPTORS_10G;
  390. u16 max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  391. u16 num_rxd, num_jumbo_rxd, num_txd;
  392. if (ring->rx_mini_pending)
  393. return -EOPNOTSUPP;
  394. if (adapter->ahw.port_type == QLCNIC_GBE) {
  395. max_rcv_desc = MAX_RCV_DESCRIPTORS_1G;
  396. max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  397. }
  398. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  399. MIN_RCV_DESCRIPTORS, max_rcv_desc, "rx");
  400. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  401. MIN_JUMBO_DESCRIPTORS, max_jumbo_desc, "rx jumbo");
  402. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  403. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  404. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  405. num_jumbo_rxd == adapter->num_jumbo_rxd)
  406. return 0;
  407. adapter->num_rxd = num_rxd;
  408. adapter->num_jumbo_rxd = num_jumbo_rxd;
  409. adapter->num_txd = num_txd;
  410. return qlcnic_reset_context(adapter);
  411. }
  412. static void
  413. qlcnic_get_pauseparam(struct net_device *netdev,
  414. struct ethtool_pauseparam *pause)
  415. {
  416. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  417. int port = adapter->physical_port;
  418. __u32 val;
  419. if (adapter->ahw.port_type == QLCNIC_GBE) {
  420. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  421. return;
  422. /* get flow control settings */
  423. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  424. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  425. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  426. switch (port) {
  427. case 0:
  428. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  429. break;
  430. case 1:
  431. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  432. break;
  433. case 2:
  434. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  435. break;
  436. case 3:
  437. default:
  438. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  439. break;
  440. }
  441. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  442. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  443. return;
  444. pause->rx_pause = 1;
  445. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  446. if (port == 0)
  447. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  448. else
  449. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  450. } else {
  451. dev_err(&netdev->dev, "Unknown board type: %x\n",
  452. adapter->ahw.port_type);
  453. }
  454. }
  455. static int
  456. qlcnic_set_pauseparam(struct net_device *netdev,
  457. struct ethtool_pauseparam *pause)
  458. {
  459. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  460. int port = adapter->physical_port;
  461. __u32 val;
  462. /* read mode */
  463. if (adapter->ahw.port_type == QLCNIC_GBE) {
  464. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  465. return -EIO;
  466. /* set flow control */
  467. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  468. if (pause->rx_pause)
  469. qlcnic_gb_rx_flowctl(val);
  470. else
  471. qlcnic_gb_unset_rx_flowctl(val);
  472. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  473. val);
  474. /* set autoneg */
  475. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  476. switch (port) {
  477. case 0:
  478. if (pause->tx_pause)
  479. qlcnic_gb_unset_gb0_mask(val);
  480. else
  481. qlcnic_gb_set_gb0_mask(val);
  482. break;
  483. case 1:
  484. if (pause->tx_pause)
  485. qlcnic_gb_unset_gb1_mask(val);
  486. else
  487. qlcnic_gb_set_gb1_mask(val);
  488. break;
  489. case 2:
  490. if (pause->tx_pause)
  491. qlcnic_gb_unset_gb2_mask(val);
  492. else
  493. qlcnic_gb_set_gb2_mask(val);
  494. break;
  495. case 3:
  496. default:
  497. if (pause->tx_pause)
  498. qlcnic_gb_unset_gb3_mask(val);
  499. else
  500. qlcnic_gb_set_gb3_mask(val);
  501. break;
  502. }
  503. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  504. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  505. if (!pause->rx_pause || pause->autoneg)
  506. return -EOPNOTSUPP;
  507. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  508. return -EIO;
  509. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  510. if (port == 0) {
  511. if (pause->tx_pause)
  512. qlcnic_xg_unset_xg0_mask(val);
  513. else
  514. qlcnic_xg_set_xg0_mask(val);
  515. } else {
  516. if (pause->tx_pause)
  517. qlcnic_xg_unset_xg1_mask(val);
  518. else
  519. qlcnic_xg_set_xg1_mask(val);
  520. }
  521. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  522. } else {
  523. dev_err(&netdev->dev, "Unknown board type: %x\n",
  524. adapter->ahw.port_type);
  525. }
  526. return 0;
  527. }
  528. static int qlcnic_reg_test(struct net_device *dev)
  529. {
  530. struct qlcnic_adapter *adapter = netdev_priv(dev);
  531. u32 data_read;
  532. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  533. if ((data_read & 0xffff) != adapter->pdev->vendor)
  534. return 1;
  535. return 0;
  536. }
  537. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  538. {
  539. switch (sset) {
  540. case ETH_SS_TEST:
  541. return QLCNIC_TEST_LEN;
  542. case ETH_SS_STATS:
  543. return QLCNIC_STATS_LEN;
  544. default:
  545. return -EOPNOTSUPP;
  546. }
  547. }
  548. #define QLC_ILB_PKT_SIZE 64
  549. static void qlcnic_create_loopback_buff(unsigned char *data)
  550. {
  551. unsigned char random_data[] = {0xa8, 0x06, 0x45, 0x00};
  552. memset(data, 0x4e, QLC_ILB_PKT_SIZE);
  553. memset(data, 0xff, 12);
  554. memcpy(data + 12, random_data, sizeof(random_data));
  555. }
  556. int qlcnic_check_loopback_buff(unsigned char *data)
  557. {
  558. unsigned char buff[QLC_ILB_PKT_SIZE];
  559. qlcnic_create_loopback_buff(buff);
  560. return memcmp(data, buff, QLC_ILB_PKT_SIZE);
  561. }
  562. static int qlcnic_do_ilb_test(struct qlcnic_adapter *adapter)
  563. {
  564. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  565. struct qlcnic_host_sds_ring *sds_ring = &recv_ctx->sds_rings[0];
  566. struct sk_buff *skb;
  567. int i;
  568. for (i = 0; i < 16; i++) {
  569. skb = dev_alloc_skb(QLC_ILB_PKT_SIZE);
  570. qlcnic_create_loopback_buff(skb->data);
  571. skb_put(skb, QLC_ILB_PKT_SIZE);
  572. adapter->diag_cnt = 0;
  573. qlcnic_xmit_frame(skb, adapter->netdev);
  574. msleep(5);
  575. qlcnic_process_rcv_ring_diag(sds_ring);
  576. dev_kfree_skb_any(skb);
  577. if (!adapter->diag_cnt)
  578. return -1;
  579. }
  580. return 0;
  581. }
  582. static int qlcnic_loopback_test(struct net_device *netdev)
  583. {
  584. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  585. int max_sds_rings = adapter->max_sds_rings;
  586. int ret;
  587. if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC) {
  588. dev_warn(&adapter->pdev->dev, "Loopback test not supported"
  589. "for non privilege function\n");
  590. return 0;
  591. }
  592. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  593. return -EIO;
  594. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_LOOPBACK_TEST);
  595. if (ret)
  596. goto clear_it;
  597. ret = qlcnic_set_ilb_mode(adapter);
  598. if (ret)
  599. goto done;
  600. ret = qlcnic_do_ilb_test(adapter);
  601. qlcnic_clear_ilb_mode(adapter);
  602. done:
  603. qlcnic_diag_free_res(netdev, max_sds_rings);
  604. clear_it:
  605. adapter->max_sds_rings = max_sds_rings;
  606. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  607. return ret;
  608. }
  609. static int qlcnic_irq_test(struct net_device *netdev)
  610. {
  611. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  612. int max_sds_rings = adapter->max_sds_rings;
  613. int ret;
  614. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  615. return -EIO;
  616. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  617. if (ret)
  618. goto clear_it;
  619. adapter->diag_cnt = 0;
  620. ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func,
  621. adapter->fw_hal_version, adapter->portnum,
  622. 0, 0, 0x00000011);
  623. if (ret)
  624. goto done;
  625. msleep(10);
  626. ret = !adapter->diag_cnt;
  627. done:
  628. qlcnic_diag_free_res(netdev, max_sds_rings);
  629. clear_it:
  630. adapter->max_sds_rings = max_sds_rings;
  631. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  632. return ret;
  633. }
  634. static void
  635. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  636. u64 *data)
  637. {
  638. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  639. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  640. data[2] = qlcnic_irq_test(dev);
  641. if (data[2])
  642. eth_test->flags |= ETH_TEST_FL_FAILED;
  643. data[3] = qlcnic_loopback_test(dev);
  644. if (data[3])
  645. eth_test->flags |= ETH_TEST_FL_FAILED;
  646. }
  647. data[0] = qlcnic_reg_test(dev);
  648. if (data[0])
  649. eth_test->flags |= ETH_TEST_FL_FAILED;
  650. /* link test */
  651. data[1] = (u64) qlcnic_test_link(dev);
  652. if (data[1])
  653. eth_test->flags |= ETH_TEST_FL_FAILED;
  654. }
  655. static void
  656. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  657. {
  658. int index;
  659. switch (stringset) {
  660. case ETH_SS_TEST:
  661. memcpy(data, *qlcnic_gstrings_test,
  662. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  663. break;
  664. case ETH_SS_STATS:
  665. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  666. memcpy(data + index * ETH_GSTRING_LEN,
  667. qlcnic_gstrings_stats[index].stat_string,
  668. ETH_GSTRING_LEN);
  669. }
  670. break;
  671. }
  672. }
  673. static void
  674. qlcnic_get_ethtool_stats(struct net_device *dev,
  675. struct ethtool_stats *stats, u64 * data)
  676. {
  677. struct qlcnic_adapter *adapter = netdev_priv(dev);
  678. int index;
  679. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  680. char *p =
  681. (char *)adapter +
  682. qlcnic_gstrings_stats[index].stat_offset;
  683. data[index] =
  684. (qlcnic_gstrings_stats[index].sizeof_stat ==
  685. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  686. }
  687. }
  688. static u32 qlcnic_get_tx_csum(struct net_device *dev)
  689. {
  690. return dev->features & NETIF_F_IP_CSUM;
  691. }
  692. static u32 qlcnic_get_rx_csum(struct net_device *dev)
  693. {
  694. struct qlcnic_adapter *adapter = netdev_priv(dev);
  695. return adapter->rx_csum;
  696. }
  697. static int qlcnic_set_rx_csum(struct net_device *dev, u32 data)
  698. {
  699. struct qlcnic_adapter *adapter = netdev_priv(dev);
  700. adapter->rx_csum = !!data;
  701. return 0;
  702. }
  703. static u32 qlcnic_get_tso(struct net_device *dev)
  704. {
  705. return (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) != 0;
  706. }
  707. static int qlcnic_set_tso(struct net_device *dev, u32 data)
  708. {
  709. struct qlcnic_adapter *adapter = netdev_priv(dev);
  710. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO))
  711. return -EOPNOTSUPP;
  712. if (data)
  713. dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  714. else
  715. dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  716. return 0;
  717. }
  718. static int qlcnic_blink_led(struct net_device *dev, u32 val)
  719. {
  720. struct qlcnic_adapter *adapter = netdev_priv(dev);
  721. int ret;
  722. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  723. return -EIO;
  724. ret = adapter->nic_ops->config_led(adapter, 1, 0xf);
  725. if (ret) {
  726. dev_err(&adapter->pdev->dev,
  727. "Failed to set LED blink state.\n");
  728. return ret;
  729. }
  730. msleep_interruptible(val * 1000);
  731. ret = adapter->nic_ops->config_led(adapter, 0, 0xf);
  732. if (ret) {
  733. dev_err(&adapter->pdev->dev,
  734. "Failed to reset LED blink state.\n");
  735. return ret;
  736. }
  737. return 0;
  738. }
  739. static void
  740. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  741. {
  742. struct qlcnic_adapter *adapter = netdev_priv(dev);
  743. u32 wol_cfg;
  744. wol->supported = 0;
  745. wol->wolopts = 0;
  746. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  747. if (wol_cfg & (1UL << adapter->portnum))
  748. wol->supported |= WAKE_MAGIC;
  749. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  750. if (wol_cfg & (1UL << adapter->portnum))
  751. wol->wolopts |= WAKE_MAGIC;
  752. }
  753. static int
  754. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  755. {
  756. struct qlcnic_adapter *adapter = netdev_priv(dev);
  757. u32 wol_cfg;
  758. if (wol->wolopts & ~WAKE_MAGIC)
  759. return -EOPNOTSUPP;
  760. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  761. if (!(wol_cfg & (1 << adapter->portnum)))
  762. return -EOPNOTSUPP;
  763. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  764. if (wol->wolopts & WAKE_MAGIC)
  765. wol_cfg |= 1UL << adapter->portnum;
  766. else
  767. wol_cfg &= ~(1UL << adapter->portnum);
  768. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  769. return 0;
  770. }
  771. /*
  772. * Set the coalescing parameters. Currently only normal is supported.
  773. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  774. * firmware coalescing to default.
  775. */
  776. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  777. struct ethtool_coalesce *ethcoal)
  778. {
  779. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  780. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  781. return -EINVAL;
  782. /*
  783. * Return Error if unsupported values or
  784. * unsupported parameters are set.
  785. */
  786. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  787. ethcoal->rx_max_coalesced_frames > 0xffff ||
  788. ethcoal->tx_coalesce_usecs > 0xffff ||
  789. ethcoal->tx_max_coalesced_frames > 0xffff ||
  790. ethcoal->rx_coalesce_usecs_irq ||
  791. ethcoal->rx_max_coalesced_frames_irq ||
  792. ethcoal->tx_coalesce_usecs_irq ||
  793. ethcoal->tx_max_coalesced_frames_irq ||
  794. ethcoal->stats_block_coalesce_usecs ||
  795. ethcoal->use_adaptive_rx_coalesce ||
  796. ethcoal->use_adaptive_tx_coalesce ||
  797. ethcoal->pkt_rate_low ||
  798. ethcoal->rx_coalesce_usecs_low ||
  799. ethcoal->rx_max_coalesced_frames_low ||
  800. ethcoal->tx_coalesce_usecs_low ||
  801. ethcoal->tx_max_coalesced_frames_low ||
  802. ethcoal->pkt_rate_high ||
  803. ethcoal->rx_coalesce_usecs_high ||
  804. ethcoal->rx_max_coalesced_frames_high ||
  805. ethcoal->tx_coalesce_usecs_high ||
  806. ethcoal->tx_max_coalesced_frames_high)
  807. return -EINVAL;
  808. if (!ethcoal->rx_coalesce_usecs ||
  809. !ethcoal->rx_max_coalesced_frames) {
  810. adapter->coal.flags = QLCNIC_INTR_DEFAULT;
  811. adapter->coal.normal.data.rx_time_us =
  812. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  813. adapter->coal.normal.data.rx_packets =
  814. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  815. } else {
  816. adapter->coal.flags = 0;
  817. adapter->coal.normal.data.rx_time_us =
  818. ethcoal->rx_coalesce_usecs;
  819. adapter->coal.normal.data.rx_packets =
  820. ethcoal->rx_max_coalesced_frames;
  821. }
  822. adapter->coal.normal.data.tx_time_us = ethcoal->tx_coalesce_usecs;
  823. adapter->coal.normal.data.tx_packets =
  824. ethcoal->tx_max_coalesced_frames;
  825. qlcnic_config_intr_coalesce(adapter);
  826. return 0;
  827. }
  828. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  829. struct ethtool_coalesce *ethcoal)
  830. {
  831. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  832. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  833. return -EINVAL;
  834. ethcoal->rx_coalesce_usecs = adapter->coal.normal.data.rx_time_us;
  835. ethcoal->tx_coalesce_usecs = adapter->coal.normal.data.tx_time_us;
  836. ethcoal->rx_max_coalesced_frames =
  837. adapter->coal.normal.data.rx_packets;
  838. ethcoal->tx_max_coalesced_frames =
  839. adapter->coal.normal.data.tx_packets;
  840. return 0;
  841. }
  842. static int qlcnic_set_flags(struct net_device *netdev, u32 data)
  843. {
  844. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  845. int hw_lro;
  846. if (data & ~ETH_FLAG_LRO)
  847. return -EINVAL;
  848. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO))
  849. return -EINVAL;
  850. if (data & ETH_FLAG_LRO) {
  851. hw_lro = QLCNIC_LRO_ENABLED;
  852. netdev->features |= NETIF_F_LRO;
  853. } else {
  854. hw_lro = 0;
  855. netdev->features &= ~NETIF_F_LRO;
  856. }
  857. if (qlcnic_config_hw_lro(adapter, hw_lro))
  858. return -EIO;
  859. if ((hw_lro == 0) && qlcnic_send_lro_cleanup(adapter))
  860. return -EIO;
  861. return 0;
  862. }
  863. static u32 qlcnic_get_msglevel(struct net_device *netdev)
  864. {
  865. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  866. return adapter->msg_enable;
  867. }
  868. static void qlcnic_set_msglevel(struct net_device *netdev, u32 msglvl)
  869. {
  870. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  871. adapter->msg_enable = msglvl;
  872. }
  873. const struct ethtool_ops qlcnic_ethtool_ops = {
  874. .get_settings = qlcnic_get_settings,
  875. .set_settings = qlcnic_set_settings,
  876. .get_drvinfo = qlcnic_get_drvinfo,
  877. .get_regs_len = qlcnic_get_regs_len,
  878. .get_regs = qlcnic_get_regs,
  879. .get_link = ethtool_op_get_link,
  880. .get_eeprom_len = qlcnic_get_eeprom_len,
  881. .get_eeprom = qlcnic_get_eeprom,
  882. .get_ringparam = qlcnic_get_ringparam,
  883. .set_ringparam = qlcnic_set_ringparam,
  884. .get_pauseparam = qlcnic_get_pauseparam,
  885. .set_pauseparam = qlcnic_set_pauseparam,
  886. .get_tx_csum = qlcnic_get_tx_csum,
  887. .set_tx_csum = ethtool_op_set_tx_csum,
  888. .set_sg = ethtool_op_set_sg,
  889. .get_tso = qlcnic_get_tso,
  890. .set_tso = qlcnic_set_tso,
  891. .get_wol = qlcnic_get_wol,
  892. .set_wol = qlcnic_set_wol,
  893. .self_test = qlcnic_diag_test,
  894. .get_strings = qlcnic_get_strings,
  895. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  896. .get_sset_count = qlcnic_get_sset_count,
  897. .get_rx_csum = qlcnic_get_rx_csum,
  898. .set_rx_csum = qlcnic_set_rx_csum,
  899. .get_coalesce = qlcnic_get_intr_coalesce,
  900. .set_coalesce = qlcnic_set_intr_coalesce,
  901. .get_flags = ethtool_op_get_flags,
  902. .set_flags = qlcnic_set_flags,
  903. .phys_id = qlcnic_blink_led,
  904. .set_msglevel = qlcnic_set_msglevel,
  905. .get_msglevel = qlcnic_get_msglevel,
  906. };