bnx2x_stats.c 43 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2010 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #include "bnx2x_cmn.h"
  18. #include "bnx2x_stats.h"
  19. /* Statistics */
  20. /****************************************************************************
  21. * Macros
  22. ****************************************************************************/
  23. /* sum[hi:lo] += add[hi:lo] */
  24. #define ADD_64(s_hi, a_hi, s_lo, a_lo) \
  25. do { \
  26. s_lo += a_lo; \
  27. s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
  28. } while (0)
  29. /* difference = minuend - subtrahend */
  30. #define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
  31. do { \
  32. if (m_lo < s_lo) { \
  33. /* underflow */ \
  34. d_hi = m_hi - s_hi; \
  35. if (d_hi > 0) { \
  36. /* we can 'loan' 1 */ \
  37. d_hi--; \
  38. d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
  39. } else { \
  40. /* m_hi <= s_hi */ \
  41. d_hi = 0; \
  42. d_lo = 0; \
  43. } \
  44. } else { \
  45. /* m_lo >= s_lo */ \
  46. if (m_hi < s_hi) { \
  47. d_hi = 0; \
  48. d_lo = 0; \
  49. } else { \
  50. /* m_hi >= s_hi */ \
  51. d_hi = m_hi - s_hi; \
  52. d_lo = m_lo - s_lo; \
  53. } \
  54. } \
  55. } while (0)
  56. #define UPDATE_STAT64(s, t) \
  57. do { \
  58. DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \
  59. diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \
  60. pstats->mac_stx[0].t##_hi = new->s##_hi; \
  61. pstats->mac_stx[0].t##_lo = new->s##_lo; \
  62. ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \
  63. pstats->mac_stx[1].t##_lo, diff.lo); \
  64. } while (0)
  65. #define UPDATE_STAT64_NIG(s, t) \
  66. do { \
  67. DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \
  68. diff.lo, new->s##_lo, old->s##_lo); \
  69. ADD_64(estats->t##_hi, diff.hi, \
  70. estats->t##_lo, diff.lo); \
  71. } while (0)
  72. /* sum[hi:lo] += add */
  73. #define ADD_EXTEND_64(s_hi, s_lo, a) \
  74. do { \
  75. s_lo += a; \
  76. s_hi += (s_lo < a) ? 1 : 0; \
  77. } while (0)
  78. #define UPDATE_EXTEND_STAT(s) \
  79. do { \
  80. ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \
  81. pstats->mac_stx[1].s##_lo, \
  82. new->s); \
  83. } while (0)
  84. #define UPDATE_EXTEND_TSTAT(s, t) \
  85. do { \
  86. diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \
  87. old_tclient->s = tclient->s; \
  88. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  89. } while (0)
  90. #define UPDATE_EXTEND_USTAT(s, t) \
  91. do { \
  92. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  93. old_uclient->s = uclient->s; \
  94. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  95. } while (0)
  96. #define UPDATE_EXTEND_XSTAT(s, t) \
  97. do { \
  98. diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \
  99. old_xclient->s = xclient->s; \
  100. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  101. } while (0)
  102. /* minuend -= subtrahend */
  103. #define SUB_64(m_hi, s_hi, m_lo, s_lo) \
  104. do { \
  105. DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \
  106. } while (0)
  107. /* minuend[hi:lo] -= subtrahend */
  108. #define SUB_EXTEND_64(m_hi, m_lo, s) \
  109. do { \
  110. SUB_64(m_hi, 0, m_lo, s); \
  111. } while (0)
  112. #define SUB_EXTEND_USTAT(s, t) \
  113. do { \
  114. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  115. SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  116. } while (0)
  117. /*
  118. * General service functions
  119. */
  120. static inline long bnx2x_hilo(u32 *hiref)
  121. {
  122. u32 lo = *(hiref + 1);
  123. #if (BITS_PER_LONG == 64)
  124. u32 hi = *hiref;
  125. return HILO_U64(hi, lo);
  126. #else
  127. return lo;
  128. #endif
  129. }
  130. /*
  131. * Init service functions
  132. */
  133. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  134. {
  135. if (!bp->stats_pending) {
  136. struct eth_query_ramrod_data ramrod_data = {0};
  137. int i, rc;
  138. spin_lock_bh(&bp->stats_lock);
  139. ramrod_data.drv_counter = bp->stats_counter++;
  140. ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
  141. for_each_queue(bp, i)
  142. ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id);
  143. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_STAT_QUERY, 0,
  144. ((u32 *)&ramrod_data)[1],
  145. ((u32 *)&ramrod_data)[0], 0);
  146. if (rc == 0) {
  147. /* stats ramrod has it's own slot on the spq */
  148. bp->spq_left++;
  149. bp->stats_pending = 1;
  150. }
  151. spin_unlock_bh(&bp->stats_lock);
  152. }
  153. }
  154. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  155. {
  156. struct dmae_command *dmae = &bp->stats_dmae;
  157. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  158. *stats_comp = DMAE_COMP_VAL;
  159. if (CHIP_REV_IS_SLOW(bp))
  160. return;
  161. /* loader */
  162. if (bp->executer_idx) {
  163. int loader_idx = PMF_DMAE_C(bp);
  164. memset(dmae, 0, sizeof(struct dmae_command));
  165. dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  166. DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
  167. DMAE_CMD_DST_RESET |
  168. #ifdef __BIG_ENDIAN
  169. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  170. #else
  171. DMAE_CMD_ENDIANITY_DW_SWAP |
  172. #endif
  173. (BP_PORT(bp) ? DMAE_CMD_PORT_1 :
  174. DMAE_CMD_PORT_0) |
  175. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  176. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  177. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  178. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  179. sizeof(struct dmae_command) *
  180. (loader_idx + 1)) >> 2;
  181. dmae->dst_addr_hi = 0;
  182. dmae->len = sizeof(struct dmae_command) >> 2;
  183. if (CHIP_IS_E1(bp))
  184. dmae->len--;
  185. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  186. dmae->comp_addr_hi = 0;
  187. dmae->comp_val = 1;
  188. *stats_comp = 0;
  189. bnx2x_post_dmae(bp, dmae, loader_idx);
  190. } else if (bp->func_stx) {
  191. *stats_comp = 0;
  192. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  193. }
  194. }
  195. static int bnx2x_stats_comp(struct bnx2x *bp)
  196. {
  197. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  198. int cnt = 10;
  199. might_sleep();
  200. while (*stats_comp != DMAE_COMP_VAL) {
  201. if (!cnt) {
  202. BNX2X_ERR("timeout waiting for stats finished\n");
  203. break;
  204. }
  205. cnt--;
  206. msleep(1);
  207. }
  208. return 1;
  209. }
  210. /*
  211. * Statistics service functions
  212. */
  213. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  214. {
  215. struct dmae_command *dmae;
  216. u32 opcode;
  217. int loader_idx = PMF_DMAE_C(bp);
  218. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  219. /* sanity */
  220. if (!IS_E1HMF(bp) || !bp->port.pmf || !bp->port.port_stx) {
  221. BNX2X_ERR("BUG!\n");
  222. return;
  223. }
  224. bp->executer_idx = 0;
  225. opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  226. DMAE_CMD_C_ENABLE |
  227. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  228. #ifdef __BIG_ENDIAN
  229. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  230. #else
  231. DMAE_CMD_ENDIANITY_DW_SWAP |
  232. #endif
  233. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  234. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  235. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  236. dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC);
  237. dmae->src_addr_lo = bp->port.port_stx >> 2;
  238. dmae->src_addr_hi = 0;
  239. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  240. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  241. dmae->len = DMAE_LEN32_RD_MAX;
  242. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  243. dmae->comp_addr_hi = 0;
  244. dmae->comp_val = 1;
  245. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  246. dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
  247. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  248. dmae->src_addr_hi = 0;
  249. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  250. DMAE_LEN32_RD_MAX * 4);
  251. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  252. DMAE_LEN32_RD_MAX * 4);
  253. dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
  254. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  255. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  256. dmae->comp_val = DMAE_COMP_VAL;
  257. *stats_comp = 0;
  258. bnx2x_hw_stats_post(bp);
  259. bnx2x_stats_comp(bp);
  260. }
  261. static void bnx2x_port_stats_init(struct bnx2x *bp)
  262. {
  263. struct dmae_command *dmae;
  264. int port = BP_PORT(bp);
  265. int vn = BP_E1HVN(bp);
  266. u32 opcode;
  267. int loader_idx = PMF_DMAE_C(bp);
  268. u32 mac_addr;
  269. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  270. /* sanity */
  271. if (!bp->link_vars.link_up || !bp->port.pmf) {
  272. BNX2X_ERR("BUG!\n");
  273. return;
  274. }
  275. bp->executer_idx = 0;
  276. /* MCP */
  277. opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  278. DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
  279. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  280. #ifdef __BIG_ENDIAN
  281. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  282. #else
  283. DMAE_CMD_ENDIANITY_DW_SWAP |
  284. #endif
  285. (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  286. (vn << DMAE_CMD_E1HVN_SHIFT));
  287. if (bp->port.port_stx) {
  288. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  289. dmae->opcode = opcode;
  290. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  291. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  292. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  293. dmae->dst_addr_hi = 0;
  294. dmae->len = sizeof(struct host_port_stats) >> 2;
  295. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  296. dmae->comp_addr_hi = 0;
  297. dmae->comp_val = 1;
  298. }
  299. if (bp->func_stx) {
  300. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  301. dmae->opcode = opcode;
  302. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  303. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  304. dmae->dst_addr_lo = bp->func_stx >> 2;
  305. dmae->dst_addr_hi = 0;
  306. dmae->len = sizeof(struct host_func_stats) >> 2;
  307. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  308. dmae->comp_addr_hi = 0;
  309. dmae->comp_val = 1;
  310. }
  311. /* MAC */
  312. opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  313. DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
  314. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  315. #ifdef __BIG_ENDIAN
  316. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  317. #else
  318. DMAE_CMD_ENDIANITY_DW_SWAP |
  319. #endif
  320. (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  321. (vn << DMAE_CMD_E1HVN_SHIFT));
  322. if (bp->link_vars.mac_type == MAC_TYPE_BMAC) {
  323. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  324. NIG_REG_INGRESS_BMAC0_MEM);
  325. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  326. BIGMAC_REGISTER_TX_STAT_GTBYT */
  327. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  328. dmae->opcode = opcode;
  329. dmae->src_addr_lo = (mac_addr +
  330. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  331. dmae->src_addr_hi = 0;
  332. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  333. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  334. dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  335. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  336. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  337. dmae->comp_addr_hi = 0;
  338. dmae->comp_val = 1;
  339. /* BIGMAC_REGISTER_RX_STAT_GR64 ..
  340. BIGMAC_REGISTER_RX_STAT_GRIPJ */
  341. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  342. dmae->opcode = opcode;
  343. dmae->src_addr_lo = (mac_addr +
  344. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  345. dmae->src_addr_hi = 0;
  346. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  347. offsetof(struct bmac_stats, rx_stat_gr64_lo));
  348. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  349. offsetof(struct bmac_stats, rx_stat_gr64_lo));
  350. dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  351. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  352. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  353. dmae->comp_addr_hi = 0;
  354. dmae->comp_val = 1;
  355. } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  356. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  357. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  358. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  359. dmae->opcode = opcode;
  360. dmae->src_addr_lo = (mac_addr +
  361. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  362. dmae->src_addr_hi = 0;
  363. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  364. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  365. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  366. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  367. dmae->comp_addr_hi = 0;
  368. dmae->comp_val = 1;
  369. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  370. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  371. dmae->opcode = opcode;
  372. dmae->src_addr_lo = (mac_addr +
  373. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  374. dmae->src_addr_hi = 0;
  375. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  376. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  377. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  378. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  379. dmae->len = 1;
  380. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  381. dmae->comp_addr_hi = 0;
  382. dmae->comp_val = 1;
  383. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  384. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  385. dmae->opcode = opcode;
  386. dmae->src_addr_lo = (mac_addr +
  387. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  388. dmae->src_addr_hi = 0;
  389. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  390. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  391. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  392. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  393. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  394. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  395. dmae->comp_addr_hi = 0;
  396. dmae->comp_val = 1;
  397. }
  398. /* NIG */
  399. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  400. dmae->opcode = opcode;
  401. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  402. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  403. dmae->src_addr_hi = 0;
  404. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  405. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  406. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  407. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  408. dmae->comp_addr_hi = 0;
  409. dmae->comp_val = 1;
  410. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  411. dmae->opcode = opcode;
  412. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  413. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  414. dmae->src_addr_hi = 0;
  415. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  416. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  417. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  418. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  419. dmae->len = (2*sizeof(u32)) >> 2;
  420. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  421. dmae->comp_addr_hi = 0;
  422. dmae->comp_val = 1;
  423. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  424. dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  425. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  426. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  427. #ifdef __BIG_ENDIAN
  428. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  429. #else
  430. DMAE_CMD_ENDIANITY_DW_SWAP |
  431. #endif
  432. (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  433. (vn << DMAE_CMD_E1HVN_SHIFT));
  434. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  435. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  436. dmae->src_addr_hi = 0;
  437. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  438. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  439. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  440. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  441. dmae->len = (2*sizeof(u32)) >> 2;
  442. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  443. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  444. dmae->comp_val = DMAE_COMP_VAL;
  445. *stats_comp = 0;
  446. }
  447. static void bnx2x_func_stats_init(struct bnx2x *bp)
  448. {
  449. struct dmae_command *dmae = &bp->stats_dmae;
  450. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  451. /* sanity */
  452. if (!bp->func_stx) {
  453. BNX2X_ERR("BUG!\n");
  454. return;
  455. }
  456. bp->executer_idx = 0;
  457. memset(dmae, 0, sizeof(struct dmae_command));
  458. dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  459. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  460. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  461. #ifdef __BIG_ENDIAN
  462. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  463. #else
  464. DMAE_CMD_ENDIANITY_DW_SWAP |
  465. #endif
  466. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  467. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  468. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  469. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  470. dmae->dst_addr_lo = bp->func_stx >> 2;
  471. dmae->dst_addr_hi = 0;
  472. dmae->len = sizeof(struct host_func_stats) >> 2;
  473. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  474. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  475. dmae->comp_val = DMAE_COMP_VAL;
  476. *stats_comp = 0;
  477. }
  478. static void bnx2x_stats_start(struct bnx2x *bp)
  479. {
  480. if (bp->port.pmf)
  481. bnx2x_port_stats_init(bp);
  482. else if (bp->func_stx)
  483. bnx2x_func_stats_init(bp);
  484. bnx2x_hw_stats_post(bp);
  485. bnx2x_storm_stats_post(bp);
  486. }
  487. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  488. {
  489. bnx2x_stats_comp(bp);
  490. bnx2x_stats_pmf_update(bp);
  491. bnx2x_stats_start(bp);
  492. }
  493. static void bnx2x_stats_restart(struct bnx2x *bp)
  494. {
  495. bnx2x_stats_comp(bp);
  496. bnx2x_stats_start(bp);
  497. }
  498. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  499. {
  500. struct bmac_stats *new = bnx2x_sp(bp, mac_stats.bmac_stats);
  501. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  502. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  503. struct {
  504. u32 lo;
  505. u32 hi;
  506. } diff;
  507. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  508. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  509. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  510. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  511. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  512. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  513. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  514. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  515. UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
  516. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  517. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  518. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  519. UPDATE_STAT64(tx_stat_gt127,
  520. tx_stat_etherstatspkts65octetsto127octets);
  521. UPDATE_STAT64(tx_stat_gt255,
  522. tx_stat_etherstatspkts128octetsto255octets);
  523. UPDATE_STAT64(tx_stat_gt511,
  524. tx_stat_etherstatspkts256octetsto511octets);
  525. UPDATE_STAT64(tx_stat_gt1023,
  526. tx_stat_etherstatspkts512octetsto1023octets);
  527. UPDATE_STAT64(tx_stat_gt1518,
  528. tx_stat_etherstatspkts1024octetsto1522octets);
  529. UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
  530. UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
  531. UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
  532. UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
  533. UPDATE_STAT64(tx_stat_gterr,
  534. tx_stat_dot3statsinternalmactransmiterrors);
  535. UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
  536. estats->pause_frames_received_hi =
  537. pstats->mac_stx[1].rx_stat_bmac_xpf_hi;
  538. estats->pause_frames_received_lo =
  539. pstats->mac_stx[1].rx_stat_bmac_xpf_lo;
  540. estats->pause_frames_sent_hi =
  541. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  542. estats->pause_frames_sent_lo =
  543. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  544. }
  545. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  546. {
  547. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  548. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  549. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  550. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  551. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  552. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  553. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  554. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  555. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  556. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  557. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  558. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  559. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  560. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  561. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  562. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  563. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  564. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  565. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  566. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  567. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  568. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  569. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  570. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  571. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  572. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  573. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  574. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  575. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  576. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  577. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  578. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  579. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  580. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  581. estats->pause_frames_received_hi =
  582. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  583. estats->pause_frames_received_lo =
  584. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  585. ADD_64(estats->pause_frames_received_hi,
  586. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  587. estats->pause_frames_received_lo,
  588. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  589. estats->pause_frames_sent_hi =
  590. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  591. estats->pause_frames_sent_lo =
  592. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  593. ADD_64(estats->pause_frames_sent_hi,
  594. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  595. estats->pause_frames_sent_lo,
  596. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  597. }
  598. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  599. {
  600. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  601. struct nig_stats *old = &(bp->port.old_nig_stats);
  602. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  603. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  604. struct {
  605. u32 lo;
  606. u32 hi;
  607. } diff;
  608. if (bp->link_vars.mac_type == MAC_TYPE_BMAC)
  609. bnx2x_bmac_stats_update(bp);
  610. else if (bp->link_vars.mac_type == MAC_TYPE_EMAC)
  611. bnx2x_emac_stats_update(bp);
  612. else { /* unreached */
  613. BNX2X_ERR("stats updated by DMAE but no MAC active\n");
  614. return -1;
  615. }
  616. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  617. new->brb_discard - old->brb_discard);
  618. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  619. new->brb_truncate - old->brb_truncate);
  620. UPDATE_STAT64_NIG(egress_mac_pkt0,
  621. etherstatspkts1024octetsto1522octets);
  622. UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets);
  623. memcpy(old, new, sizeof(struct nig_stats));
  624. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  625. sizeof(struct mac_stx));
  626. estats->brb_drop_hi = pstats->brb_drop_hi;
  627. estats->brb_drop_lo = pstats->brb_drop_lo;
  628. pstats->host_port_stats_start = ++pstats->host_port_stats_end;
  629. if (!BP_NOMCP(bp)) {
  630. u32 nig_timer_max =
  631. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  632. if (nig_timer_max != estats->nig_timer_max) {
  633. estats->nig_timer_max = nig_timer_max;
  634. BNX2X_ERR("NIG timer max (%u)\n",
  635. estats->nig_timer_max);
  636. }
  637. }
  638. return 0;
  639. }
  640. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  641. {
  642. struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
  643. struct tstorm_per_port_stats *tport =
  644. &stats->tstorm_common.port_statistics;
  645. struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
  646. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  647. int i;
  648. u16 cur_stats_counter;
  649. /* Make sure we use the value of the counter
  650. * used for sending the last stats ramrod.
  651. */
  652. spin_lock_bh(&bp->stats_lock);
  653. cur_stats_counter = bp->stats_counter - 1;
  654. spin_unlock_bh(&bp->stats_lock);
  655. memcpy(&(fstats->total_bytes_received_hi),
  656. &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
  657. sizeof(struct host_func_stats) - 2*sizeof(u32));
  658. estats->error_bytes_received_hi = 0;
  659. estats->error_bytes_received_lo = 0;
  660. estats->etherstatsoverrsizepkts_hi = 0;
  661. estats->etherstatsoverrsizepkts_lo = 0;
  662. estats->no_buff_discard_hi = 0;
  663. estats->no_buff_discard_lo = 0;
  664. for_each_queue(bp, i) {
  665. struct bnx2x_fastpath *fp = &bp->fp[i];
  666. int cl_id = fp->cl_id;
  667. struct tstorm_per_client_stats *tclient =
  668. &stats->tstorm_common.client_statistics[cl_id];
  669. struct tstorm_per_client_stats *old_tclient = &fp->old_tclient;
  670. struct ustorm_per_client_stats *uclient =
  671. &stats->ustorm_common.client_statistics[cl_id];
  672. struct ustorm_per_client_stats *old_uclient = &fp->old_uclient;
  673. struct xstorm_per_client_stats *xclient =
  674. &stats->xstorm_common.client_statistics[cl_id];
  675. struct xstorm_per_client_stats *old_xclient = &fp->old_xclient;
  676. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  677. u32 diff;
  678. /* are storm stats valid? */
  679. if (le16_to_cpu(xclient->stats_counter) != cur_stats_counter) {
  680. DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
  681. " xstorm counter (0x%x) != stats_counter (0x%x)\n",
  682. i, xclient->stats_counter, cur_stats_counter + 1);
  683. return -1;
  684. }
  685. if (le16_to_cpu(tclient->stats_counter) != cur_stats_counter) {
  686. DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
  687. " tstorm counter (0x%x) != stats_counter (0x%x)\n",
  688. i, tclient->stats_counter, cur_stats_counter + 1);
  689. return -2;
  690. }
  691. if (le16_to_cpu(uclient->stats_counter) != cur_stats_counter) {
  692. DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
  693. " ustorm counter (0x%x) != stats_counter (0x%x)\n",
  694. i, uclient->stats_counter, cur_stats_counter + 1);
  695. return -4;
  696. }
  697. qstats->total_bytes_received_hi =
  698. le32_to_cpu(tclient->rcv_broadcast_bytes.hi);
  699. qstats->total_bytes_received_lo =
  700. le32_to_cpu(tclient->rcv_broadcast_bytes.lo);
  701. ADD_64(qstats->total_bytes_received_hi,
  702. le32_to_cpu(tclient->rcv_multicast_bytes.hi),
  703. qstats->total_bytes_received_lo,
  704. le32_to_cpu(tclient->rcv_multicast_bytes.lo));
  705. ADD_64(qstats->total_bytes_received_hi,
  706. le32_to_cpu(tclient->rcv_unicast_bytes.hi),
  707. qstats->total_bytes_received_lo,
  708. le32_to_cpu(tclient->rcv_unicast_bytes.lo));
  709. SUB_64(qstats->total_bytes_received_hi,
  710. le32_to_cpu(uclient->bcast_no_buff_bytes.hi),
  711. qstats->total_bytes_received_lo,
  712. le32_to_cpu(uclient->bcast_no_buff_bytes.lo));
  713. SUB_64(qstats->total_bytes_received_hi,
  714. le32_to_cpu(uclient->mcast_no_buff_bytes.hi),
  715. qstats->total_bytes_received_lo,
  716. le32_to_cpu(uclient->mcast_no_buff_bytes.lo));
  717. SUB_64(qstats->total_bytes_received_hi,
  718. le32_to_cpu(uclient->ucast_no_buff_bytes.hi),
  719. qstats->total_bytes_received_lo,
  720. le32_to_cpu(uclient->ucast_no_buff_bytes.lo));
  721. qstats->valid_bytes_received_hi =
  722. qstats->total_bytes_received_hi;
  723. qstats->valid_bytes_received_lo =
  724. qstats->total_bytes_received_lo;
  725. qstats->error_bytes_received_hi =
  726. le32_to_cpu(tclient->rcv_error_bytes.hi);
  727. qstats->error_bytes_received_lo =
  728. le32_to_cpu(tclient->rcv_error_bytes.lo);
  729. ADD_64(qstats->total_bytes_received_hi,
  730. qstats->error_bytes_received_hi,
  731. qstats->total_bytes_received_lo,
  732. qstats->error_bytes_received_lo);
  733. UPDATE_EXTEND_TSTAT(rcv_unicast_pkts,
  734. total_unicast_packets_received);
  735. UPDATE_EXTEND_TSTAT(rcv_multicast_pkts,
  736. total_multicast_packets_received);
  737. UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts,
  738. total_broadcast_packets_received);
  739. UPDATE_EXTEND_TSTAT(packets_too_big_discard,
  740. etherstatsoverrsizepkts);
  741. UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
  742. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  743. total_unicast_packets_received);
  744. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  745. total_multicast_packets_received);
  746. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  747. total_broadcast_packets_received);
  748. UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
  749. UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
  750. UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
  751. qstats->total_bytes_transmitted_hi =
  752. le32_to_cpu(xclient->unicast_bytes_sent.hi);
  753. qstats->total_bytes_transmitted_lo =
  754. le32_to_cpu(xclient->unicast_bytes_sent.lo);
  755. ADD_64(qstats->total_bytes_transmitted_hi,
  756. le32_to_cpu(xclient->multicast_bytes_sent.hi),
  757. qstats->total_bytes_transmitted_lo,
  758. le32_to_cpu(xclient->multicast_bytes_sent.lo));
  759. ADD_64(qstats->total_bytes_transmitted_hi,
  760. le32_to_cpu(xclient->broadcast_bytes_sent.hi),
  761. qstats->total_bytes_transmitted_lo,
  762. le32_to_cpu(xclient->broadcast_bytes_sent.lo));
  763. UPDATE_EXTEND_XSTAT(unicast_pkts_sent,
  764. total_unicast_packets_transmitted);
  765. UPDATE_EXTEND_XSTAT(multicast_pkts_sent,
  766. total_multicast_packets_transmitted);
  767. UPDATE_EXTEND_XSTAT(broadcast_pkts_sent,
  768. total_broadcast_packets_transmitted);
  769. old_tclient->checksum_discard = tclient->checksum_discard;
  770. old_tclient->ttl0_discard = tclient->ttl0_discard;
  771. ADD_64(fstats->total_bytes_received_hi,
  772. qstats->total_bytes_received_hi,
  773. fstats->total_bytes_received_lo,
  774. qstats->total_bytes_received_lo);
  775. ADD_64(fstats->total_bytes_transmitted_hi,
  776. qstats->total_bytes_transmitted_hi,
  777. fstats->total_bytes_transmitted_lo,
  778. qstats->total_bytes_transmitted_lo);
  779. ADD_64(fstats->total_unicast_packets_received_hi,
  780. qstats->total_unicast_packets_received_hi,
  781. fstats->total_unicast_packets_received_lo,
  782. qstats->total_unicast_packets_received_lo);
  783. ADD_64(fstats->total_multicast_packets_received_hi,
  784. qstats->total_multicast_packets_received_hi,
  785. fstats->total_multicast_packets_received_lo,
  786. qstats->total_multicast_packets_received_lo);
  787. ADD_64(fstats->total_broadcast_packets_received_hi,
  788. qstats->total_broadcast_packets_received_hi,
  789. fstats->total_broadcast_packets_received_lo,
  790. qstats->total_broadcast_packets_received_lo);
  791. ADD_64(fstats->total_unicast_packets_transmitted_hi,
  792. qstats->total_unicast_packets_transmitted_hi,
  793. fstats->total_unicast_packets_transmitted_lo,
  794. qstats->total_unicast_packets_transmitted_lo);
  795. ADD_64(fstats->total_multicast_packets_transmitted_hi,
  796. qstats->total_multicast_packets_transmitted_hi,
  797. fstats->total_multicast_packets_transmitted_lo,
  798. qstats->total_multicast_packets_transmitted_lo);
  799. ADD_64(fstats->total_broadcast_packets_transmitted_hi,
  800. qstats->total_broadcast_packets_transmitted_hi,
  801. fstats->total_broadcast_packets_transmitted_lo,
  802. qstats->total_broadcast_packets_transmitted_lo);
  803. ADD_64(fstats->valid_bytes_received_hi,
  804. qstats->valid_bytes_received_hi,
  805. fstats->valid_bytes_received_lo,
  806. qstats->valid_bytes_received_lo);
  807. ADD_64(estats->error_bytes_received_hi,
  808. qstats->error_bytes_received_hi,
  809. estats->error_bytes_received_lo,
  810. qstats->error_bytes_received_lo);
  811. ADD_64(estats->etherstatsoverrsizepkts_hi,
  812. qstats->etherstatsoverrsizepkts_hi,
  813. estats->etherstatsoverrsizepkts_lo,
  814. qstats->etherstatsoverrsizepkts_lo);
  815. ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
  816. estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
  817. }
  818. ADD_64(fstats->total_bytes_received_hi,
  819. estats->rx_stat_ifhcinbadoctets_hi,
  820. fstats->total_bytes_received_lo,
  821. estats->rx_stat_ifhcinbadoctets_lo);
  822. memcpy(estats, &(fstats->total_bytes_received_hi),
  823. sizeof(struct host_func_stats) - 2*sizeof(u32));
  824. ADD_64(estats->etherstatsoverrsizepkts_hi,
  825. estats->rx_stat_dot3statsframestoolong_hi,
  826. estats->etherstatsoverrsizepkts_lo,
  827. estats->rx_stat_dot3statsframestoolong_lo);
  828. ADD_64(estats->error_bytes_received_hi,
  829. estats->rx_stat_ifhcinbadoctets_hi,
  830. estats->error_bytes_received_lo,
  831. estats->rx_stat_ifhcinbadoctets_lo);
  832. if (bp->port.pmf) {
  833. estats->mac_filter_discard =
  834. le32_to_cpu(tport->mac_filter_discard);
  835. estats->xxoverflow_discard =
  836. le32_to_cpu(tport->xxoverflow_discard);
  837. estats->brb_truncate_discard =
  838. le32_to_cpu(tport->brb_truncate_discard);
  839. estats->mac_discard = le32_to_cpu(tport->mac_discard);
  840. }
  841. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  842. bp->stats_pending = 0;
  843. return 0;
  844. }
  845. static void bnx2x_net_stats_update(struct bnx2x *bp)
  846. {
  847. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  848. struct net_device_stats *nstats = &bp->dev->stats;
  849. int i;
  850. nstats->rx_packets =
  851. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  852. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  853. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  854. nstats->tx_packets =
  855. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  856. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  857. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  858. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  859. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  860. nstats->rx_dropped = estats->mac_discard;
  861. for_each_queue(bp, i)
  862. nstats->rx_dropped +=
  863. le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
  864. nstats->tx_dropped = 0;
  865. nstats->multicast =
  866. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  867. nstats->collisions =
  868. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  869. nstats->rx_length_errors =
  870. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  871. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  872. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  873. bnx2x_hilo(&estats->brb_truncate_hi);
  874. nstats->rx_crc_errors =
  875. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  876. nstats->rx_frame_errors =
  877. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  878. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  879. nstats->rx_missed_errors = estats->xxoverflow_discard;
  880. nstats->rx_errors = nstats->rx_length_errors +
  881. nstats->rx_over_errors +
  882. nstats->rx_crc_errors +
  883. nstats->rx_frame_errors +
  884. nstats->rx_fifo_errors +
  885. nstats->rx_missed_errors;
  886. nstats->tx_aborted_errors =
  887. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  888. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  889. nstats->tx_carrier_errors =
  890. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  891. nstats->tx_fifo_errors = 0;
  892. nstats->tx_heartbeat_errors = 0;
  893. nstats->tx_window_errors = 0;
  894. nstats->tx_errors = nstats->tx_aborted_errors +
  895. nstats->tx_carrier_errors +
  896. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  897. }
  898. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  899. {
  900. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  901. int i;
  902. estats->driver_xoff = 0;
  903. estats->rx_err_discard_pkt = 0;
  904. estats->rx_skb_alloc_failed = 0;
  905. estats->hw_csum_err = 0;
  906. for_each_queue(bp, i) {
  907. struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
  908. estats->driver_xoff += qstats->driver_xoff;
  909. estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
  910. estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
  911. estats->hw_csum_err += qstats->hw_csum_err;
  912. }
  913. }
  914. static void bnx2x_stats_update(struct bnx2x *bp)
  915. {
  916. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  917. if (*stats_comp != DMAE_COMP_VAL)
  918. return;
  919. if (bp->port.pmf)
  920. bnx2x_hw_stats_update(bp);
  921. if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
  922. BNX2X_ERR("storm stats were not updated for 3 times\n");
  923. bnx2x_panic();
  924. return;
  925. }
  926. bnx2x_net_stats_update(bp);
  927. bnx2x_drv_stats_update(bp);
  928. if (netif_msg_timer(bp)) {
  929. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  930. int i;
  931. printk(KERN_DEBUG "%s: brb drops %u brb truncate %u\n",
  932. bp->dev->name,
  933. estats->brb_drop_lo, estats->brb_truncate_lo);
  934. for_each_queue(bp, i) {
  935. struct bnx2x_fastpath *fp = &bp->fp[i];
  936. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  937. printk(KERN_DEBUG "%s: rx usage(%4u) *rx_cons_sb(%u)"
  938. " rx pkt(%lu) rx calls(%lu %lu)\n",
  939. fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
  940. fp->rx_comp_cons),
  941. le16_to_cpu(*fp->rx_cons_sb),
  942. bnx2x_hilo(&qstats->
  943. total_unicast_packets_received_hi),
  944. fp->rx_calls, fp->rx_pkt);
  945. }
  946. for_each_queue(bp, i) {
  947. struct bnx2x_fastpath *fp = &bp->fp[i];
  948. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  949. struct netdev_queue *txq =
  950. netdev_get_tx_queue(bp->dev, i);
  951. printk(KERN_DEBUG "%s: tx avail(%4u) *tx_cons_sb(%u)"
  952. " tx pkt(%lu) tx calls (%lu)"
  953. " %s (Xoff events %u)\n",
  954. fp->name, bnx2x_tx_avail(fp),
  955. le16_to_cpu(*fp->tx_cons_sb),
  956. bnx2x_hilo(&qstats->
  957. total_unicast_packets_transmitted_hi),
  958. fp->tx_pkt,
  959. (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"),
  960. qstats->driver_xoff);
  961. }
  962. }
  963. bnx2x_hw_stats_post(bp);
  964. bnx2x_storm_stats_post(bp);
  965. }
  966. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  967. {
  968. struct dmae_command *dmae;
  969. u32 opcode;
  970. int loader_idx = PMF_DMAE_C(bp);
  971. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  972. bp->executer_idx = 0;
  973. opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  974. DMAE_CMD_C_ENABLE |
  975. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  976. #ifdef __BIG_ENDIAN
  977. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  978. #else
  979. DMAE_CMD_ENDIANITY_DW_SWAP |
  980. #endif
  981. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  982. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  983. if (bp->port.port_stx) {
  984. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  985. if (bp->func_stx)
  986. dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC);
  987. else
  988. dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
  989. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  990. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  991. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  992. dmae->dst_addr_hi = 0;
  993. dmae->len = sizeof(struct host_port_stats) >> 2;
  994. if (bp->func_stx) {
  995. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  996. dmae->comp_addr_hi = 0;
  997. dmae->comp_val = 1;
  998. } else {
  999. dmae->comp_addr_lo =
  1000. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1001. dmae->comp_addr_hi =
  1002. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1003. dmae->comp_val = DMAE_COMP_VAL;
  1004. *stats_comp = 0;
  1005. }
  1006. }
  1007. if (bp->func_stx) {
  1008. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1009. dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
  1010. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1011. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1012. dmae->dst_addr_lo = bp->func_stx >> 2;
  1013. dmae->dst_addr_hi = 0;
  1014. dmae->len = sizeof(struct host_func_stats) >> 2;
  1015. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1016. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1017. dmae->comp_val = DMAE_COMP_VAL;
  1018. *stats_comp = 0;
  1019. }
  1020. }
  1021. static void bnx2x_stats_stop(struct bnx2x *bp)
  1022. {
  1023. int update = 0;
  1024. bnx2x_stats_comp(bp);
  1025. if (bp->port.pmf)
  1026. update = (bnx2x_hw_stats_update(bp) == 0);
  1027. update |= (bnx2x_storm_stats_update(bp) == 0);
  1028. if (update) {
  1029. bnx2x_net_stats_update(bp);
  1030. if (bp->port.pmf)
  1031. bnx2x_port_stats_stop(bp);
  1032. bnx2x_hw_stats_post(bp);
  1033. bnx2x_stats_comp(bp);
  1034. }
  1035. }
  1036. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1037. {
  1038. }
  1039. static const struct {
  1040. void (*action)(struct bnx2x *bp);
  1041. enum bnx2x_stats_state next_state;
  1042. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1043. /* state event */
  1044. {
  1045. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1046. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1047. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1048. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1049. },
  1050. {
  1051. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1052. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1053. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1054. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1055. }
  1056. };
  1057. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1058. {
  1059. enum bnx2x_stats_state state;
  1060. if (unlikely(bp->panic))
  1061. return;
  1062. /* Protect a state change flow */
  1063. spin_lock_bh(&bp->stats_lock);
  1064. state = bp->stats_state;
  1065. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1066. spin_unlock_bh(&bp->stats_lock);
  1067. bnx2x_stats_stm[state][event].action(bp);
  1068. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1069. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1070. state, event, bp->stats_state);
  1071. }
  1072. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1073. {
  1074. struct dmae_command *dmae;
  1075. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1076. /* sanity */
  1077. if (!bp->port.pmf || !bp->port.port_stx) {
  1078. BNX2X_ERR("BUG!\n");
  1079. return;
  1080. }
  1081. bp->executer_idx = 0;
  1082. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1083. dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  1084. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  1085. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  1086. #ifdef __BIG_ENDIAN
  1087. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  1088. #else
  1089. DMAE_CMD_ENDIANITY_DW_SWAP |
  1090. #endif
  1091. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  1092. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  1093. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1094. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1095. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1096. dmae->dst_addr_hi = 0;
  1097. dmae->len = sizeof(struct host_port_stats) >> 2;
  1098. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1099. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1100. dmae->comp_val = DMAE_COMP_VAL;
  1101. *stats_comp = 0;
  1102. bnx2x_hw_stats_post(bp);
  1103. bnx2x_stats_comp(bp);
  1104. }
  1105. static void bnx2x_func_stats_base_init(struct bnx2x *bp)
  1106. {
  1107. int vn, vn_max = IS_E1HMF(bp) ? E1HVN_MAX : E1VN_MAX;
  1108. int port = BP_PORT(bp);
  1109. int func;
  1110. u32 func_stx;
  1111. /* sanity */
  1112. if (!bp->port.pmf || !bp->func_stx) {
  1113. BNX2X_ERR("BUG!\n");
  1114. return;
  1115. }
  1116. /* save our func_stx */
  1117. func_stx = bp->func_stx;
  1118. for (vn = VN_0; vn < vn_max; vn++) {
  1119. func = 2*vn + port;
  1120. bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param);
  1121. bnx2x_func_stats_init(bp);
  1122. bnx2x_hw_stats_post(bp);
  1123. bnx2x_stats_comp(bp);
  1124. }
  1125. /* restore our func_stx */
  1126. bp->func_stx = func_stx;
  1127. }
  1128. static void bnx2x_func_stats_base_update(struct bnx2x *bp)
  1129. {
  1130. struct dmae_command *dmae = &bp->stats_dmae;
  1131. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1132. /* sanity */
  1133. if (!bp->func_stx) {
  1134. BNX2X_ERR("BUG!\n");
  1135. return;
  1136. }
  1137. bp->executer_idx = 0;
  1138. memset(dmae, 0, sizeof(struct dmae_command));
  1139. dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  1140. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  1141. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  1142. #ifdef __BIG_ENDIAN
  1143. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  1144. #else
  1145. DMAE_CMD_ENDIANITY_DW_SWAP |
  1146. #endif
  1147. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  1148. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  1149. dmae->src_addr_lo = bp->func_stx >> 2;
  1150. dmae->src_addr_hi = 0;
  1151. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
  1152. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
  1153. dmae->len = sizeof(struct host_func_stats) >> 2;
  1154. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1155. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1156. dmae->comp_val = DMAE_COMP_VAL;
  1157. *stats_comp = 0;
  1158. bnx2x_hw_stats_post(bp);
  1159. bnx2x_stats_comp(bp);
  1160. }
  1161. void bnx2x_stats_init(struct bnx2x *bp)
  1162. {
  1163. int port = BP_PORT(bp);
  1164. int func = BP_FUNC(bp);
  1165. int i;
  1166. bp->stats_pending = 0;
  1167. bp->executer_idx = 0;
  1168. bp->stats_counter = 0;
  1169. /* port and func stats for management */
  1170. if (!BP_NOMCP(bp)) {
  1171. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1172. bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param);
  1173. } else {
  1174. bp->port.port_stx = 0;
  1175. bp->func_stx = 0;
  1176. }
  1177. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1178. bp->port.port_stx, bp->func_stx);
  1179. /* port stats */
  1180. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1181. bp->port.old_nig_stats.brb_discard =
  1182. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1183. bp->port.old_nig_stats.brb_truncate =
  1184. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1185. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1186. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1187. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1188. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1189. /* function stats */
  1190. for_each_queue(bp, i) {
  1191. struct bnx2x_fastpath *fp = &bp->fp[i];
  1192. memset(&fp->old_tclient, 0,
  1193. sizeof(struct tstorm_per_client_stats));
  1194. memset(&fp->old_uclient, 0,
  1195. sizeof(struct ustorm_per_client_stats));
  1196. memset(&fp->old_xclient, 0,
  1197. sizeof(struct xstorm_per_client_stats));
  1198. memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats));
  1199. }
  1200. memset(&bp->dev->stats, 0, sizeof(struct net_device_stats));
  1201. memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats));
  1202. bp->stats_state = STATS_STATE_DISABLED;
  1203. if (bp->port.pmf) {
  1204. if (bp->port.port_stx)
  1205. bnx2x_port_stats_base_init(bp);
  1206. if (bp->func_stx)
  1207. bnx2x_func_stats_base_init(bp);
  1208. } else if (bp->func_stx)
  1209. bnx2x_func_stats_base_update(bp);
  1210. }