vpx3220.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622
  1. /*
  2. * vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
  3. *
  4. * Copyright (C) 2001 Laurent Pinchart <lpinchart@freegates.be>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/types.h>
  24. #include <linux/slab.h>
  25. #include <asm/uaccess.h>
  26. #include <linux/i2c.h>
  27. #include <linux/videodev2.h>
  28. #include <media/v4l2-device.h>
  29. #include <media/v4l2-chip-ident.h>
  30. #include <media/v4l2-i2c-drv.h>
  31. MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
  32. MODULE_AUTHOR("Laurent Pinchart");
  33. MODULE_LICENSE("GPL");
  34. static int debug;
  35. module_param(debug, int, 0);
  36. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  37. #define VPX_TIMEOUT_COUNT 10
  38. /* ----------------------------------------------------------------------- */
  39. struct vpx3220 {
  40. struct v4l2_subdev sd;
  41. unsigned char reg[255];
  42. v4l2_std_id norm;
  43. int ident;
  44. int input;
  45. int enable;
  46. int bright;
  47. int contrast;
  48. int hue;
  49. int sat;
  50. };
  51. static inline struct vpx3220 *to_vpx3220(struct v4l2_subdev *sd)
  52. {
  53. return container_of(sd, struct vpx3220, sd);
  54. }
  55. static char *inputs[] = { "internal", "composite", "svideo" };
  56. /* ----------------------------------------------------------------------- */
  57. static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  58. {
  59. struct i2c_client *client = v4l2_get_subdevdata(sd);
  60. struct vpx3220 *decoder = i2c_get_clientdata(client);
  61. decoder->reg[reg] = value;
  62. return i2c_smbus_write_byte_data(client, reg, value);
  63. }
  64. static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
  65. {
  66. struct i2c_client *client = v4l2_get_subdevdata(sd);
  67. return i2c_smbus_read_byte_data(client, reg);
  68. }
  69. static int vpx3220_fp_status(struct v4l2_subdev *sd)
  70. {
  71. unsigned char status;
  72. unsigned int i;
  73. for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
  74. status = vpx3220_read(sd, 0x29);
  75. if (!(status & 4))
  76. return 0;
  77. udelay(10);
  78. if (need_resched())
  79. cond_resched();
  80. }
  81. return -1;
  82. }
  83. static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
  84. {
  85. struct i2c_client *client = v4l2_get_subdevdata(sd);
  86. /* Write the 16-bit address to the FPWR register */
  87. if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
  88. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  89. return -1;
  90. }
  91. if (vpx3220_fp_status(sd) < 0)
  92. return -1;
  93. /* Write the 16-bit data to the FPDAT register */
  94. if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
  95. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  96. return -1;
  97. }
  98. return 0;
  99. }
  100. static u16 vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
  101. {
  102. struct i2c_client *client = v4l2_get_subdevdata(sd);
  103. s16 data;
  104. /* Write the 16-bit address to the FPRD register */
  105. if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
  106. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  107. return -1;
  108. }
  109. if (vpx3220_fp_status(sd) < 0)
  110. return -1;
  111. /* Read the 16-bit data from the FPDAT register */
  112. data = i2c_smbus_read_word_data(client, 0x28);
  113. if (data == -1) {
  114. v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
  115. return -1;
  116. }
  117. return swab16(data);
  118. }
  119. static int vpx3220_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
  120. {
  121. u8 reg;
  122. int ret = -1;
  123. while (len >= 2) {
  124. reg = *data++;
  125. ret = vpx3220_write(sd, reg, *data++);
  126. if (ret < 0)
  127. break;
  128. len -= 2;
  129. }
  130. return ret;
  131. }
  132. static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
  133. const u16 *data, unsigned int len)
  134. {
  135. u8 reg;
  136. int ret = 0;
  137. while (len > 1) {
  138. reg = *data++;
  139. ret |= vpx3220_fp_write(sd, reg, *data++);
  140. len -= 2;
  141. }
  142. return ret;
  143. }
  144. /* ---------------------------------------------------------------------- */
  145. static const unsigned short init_ntsc[] = {
  146. 0x1c, 0x00, /* NTSC tint angle */
  147. 0x88, 17, /* Window 1 vertical */
  148. 0x89, 240, /* Vertical lines in */
  149. 0x8a, 240, /* Vertical lines out */
  150. 0x8b, 000, /* Horizontal begin */
  151. 0x8c, 640, /* Horizontal length */
  152. 0x8d, 640, /* Number of pixels */
  153. 0x8f, 0xc00, /* Disable window 2 */
  154. 0xf0, 0x73, /* 13.5 MHz transport, Forced
  155. * mode, latch windows */
  156. 0xf2, 0x13, /* NTSC M, composite input */
  157. 0xe7, 0x1e1, /* Enable vertical standard
  158. * locking @ 240 lines */
  159. };
  160. static const unsigned short init_pal[] = {
  161. 0x88, 23, /* Window 1 vertical begin */
  162. 0x89, 288, /* Vertical lines in (16 lines
  163. * skipped by the VFE) */
  164. 0x8a, 288, /* Vertical lines out (16 lines
  165. * skipped by the VFE) */
  166. 0x8b, 16, /* Horizontal begin */
  167. 0x8c, 768, /* Horizontal length */
  168. 0x8d, 784, /* Number of pixels
  169. * Must be >= Horizontal begin + Horizontal length */
  170. 0x8f, 0xc00, /* Disable window 2 */
  171. 0xf0, 0x77, /* 13.5 MHz transport, Forced
  172. * mode, latch windows */
  173. 0xf2, 0x3d1, /* PAL B,G,H,I, composite input */
  174. 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
  175. };
  176. static const unsigned short init_secam[] = {
  177. 0x88, 23, /* Window 1 vertical begin */
  178. 0x89, 288, /* Vertical lines in (16 lines
  179. * skipped by the VFE) */
  180. 0x8a, 288, /* Vertical lines out (16 lines
  181. * skipped by the VFE) */
  182. 0x8b, 16, /* Horizontal begin */
  183. 0x8c, 768, /* Horizontal length */
  184. 0x8d, 784, /* Number of pixels
  185. * Must be >= Horizontal begin + Horizontal length */
  186. 0x8f, 0xc00, /* Disable window 2 */
  187. 0xf0, 0x77, /* 13.5 MHz transport, Forced
  188. * mode, latch windows */
  189. 0xf2, 0x3d5, /* SECAM, composite input */
  190. 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
  191. };
  192. static const unsigned char init_common[] = {
  193. 0xf2, 0x00, /* Disable all outputs */
  194. 0x33, 0x0d, /* Luma : VIN2, Chroma : CIN
  195. * (clamp off) */
  196. 0xd8, 0xa8, /* HREF/VREF active high, VREF
  197. * pulse = 2, Odd/Even flag */
  198. 0x20, 0x03, /* IF compensation 0dB/oct */
  199. 0xe0, 0xff, /* Open up all comparators */
  200. 0xe1, 0x00,
  201. 0xe2, 0x7f,
  202. 0xe3, 0x80,
  203. 0xe4, 0x7f,
  204. 0xe5, 0x80,
  205. 0xe6, 0x00, /* Brightness set to 0 */
  206. 0xe7, 0xe0, /* Contrast to 1.0, noise shaping
  207. * 10 to 8 2-bit error diffusion */
  208. 0xe8, 0xf8, /* YUV422, CbCr binary offset,
  209. * ... (p.32) */
  210. 0xea, 0x18, /* LLC2 connected, output FIFO
  211. * reset with VACTintern */
  212. 0xf0, 0x8a, /* Half full level to 10, bus
  213. * shuffler [7:0, 23:16, 15:8] */
  214. 0xf1, 0x18, /* Single clock, sync mode, no
  215. * FE delay, no HLEN counter */
  216. 0xf8, 0x12, /* Port A, PIXCLK, HF# & FE#
  217. * strength to 2 */
  218. 0xf9, 0x24, /* Port B, HREF, VREF, PREF &
  219. * ALPHA strength to 4 */
  220. };
  221. static const unsigned short init_fp[] = {
  222. 0x59, 0,
  223. 0xa0, 2070, /* ACC reference */
  224. 0xa3, 0,
  225. 0xa4, 0,
  226. 0xa8, 30,
  227. 0xb2, 768,
  228. 0xbe, 27,
  229. 0x58, 0,
  230. 0x26, 0,
  231. 0x4b, 0x298, /* PLL gain */
  232. };
  233. static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
  234. {
  235. struct vpx3220 *decoder = to_vpx3220(sd);
  236. vpx3220_write_block(sd, init_common, sizeof(init_common));
  237. vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
  238. if (decoder->norm & V4L2_STD_NTSC)
  239. vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
  240. else if (decoder->norm & V4L2_STD_PAL)
  241. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  242. else if (decoder->norm & V4L2_STD_SECAM)
  243. vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
  244. else
  245. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  246. return 0;
  247. }
  248. static int vpx3220_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
  249. {
  250. int res = V4L2_IN_ST_NO_SIGNAL, status;
  251. v4l2_std_id std = 0;
  252. status = vpx3220_fp_read(sd, 0x0f3);
  253. v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);
  254. if (status < 0)
  255. return status;
  256. if ((status & 0x20) == 0) {
  257. res = 0;
  258. switch (status & 0x18) {
  259. case 0x00:
  260. case 0x10:
  261. case 0x14:
  262. case 0x18:
  263. std = V4L2_STD_PAL;
  264. break;
  265. case 0x08:
  266. std = V4L2_STD_SECAM;
  267. break;
  268. case 0x04:
  269. case 0x0c:
  270. case 0x1c:
  271. std = V4L2_STD_NTSC;
  272. break;
  273. }
  274. }
  275. if (pstd)
  276. *pstd = std;
  277. if (pstatus)
  278. *pstatus = status;
  279. return 0;
  280. }
  281. static int vpx3220_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
  282. {
  283. v4l2_dbg(1, debug, sd, "querystd\n");
  284. return vpx3220_status(sd, NULL, std);
  285. }
  286. static int vpx3220_g_input_status(struct v4l2_subdev *sd, u32 *status)
  287. {
  288. v4l2_dbg(1, debug, sd, "g_input_status\n");
  289. return vpx3220_status(sd, status, NULL);
  290. }
  291. static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  292. {
  293. struct vpx3220 *decoder = to_vpx3220(sd);
  294. int temp_input;
  295. /* Here we back up the input selection because it gets
  296. overwritten when we fill the registers with the
  297. choosen video norm */
  298. temp_input = vpx3220_fp_read(sd, 0xf2);
  299. v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
  300. if (std & V4L2_STD_NTSC) {
  301. vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
  302. v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
  303. } else if (std & V4L2_STD_PAL) {
  304. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  305. v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
  306. } else if (std & V4L2_STD_SECAM) {
  307. vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
  308. v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
  309. } else {
  310. return -EINVAL;
  311. }
  312. decoder->norm = std;
  313. /* And here we set the backed up video input again */
  314. vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);
  315. udelay(10);
  316. return 0;
  317. }
  318. static int vpx3220_s_routing(struct v4l2_subdev *sd,
  319. u32 input, u32 output, u32 config)
  320. {
  321. int data;
  322. /* RJ: input = 0: ST8 (PCTV) input
  323. input = 1: COMPOSITE input
  324. input = 2: SVHS input */
  325. const int input_vals[3][2] = {
  326. {0x0c, 0},
  327. {0x0d, 0},
  328. {0x0e, 1}
  329. };
  330. if (input > 2)
  331. return -EINVAL;
  332. v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[input]);
  333. vpx3220_write(sd, 0x33, input_vals[input][0]);
  334. data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
  335. if (data < 0)
  336. return data;
  337. /* 0x0010 is required to latch the setting */
  338. vpx3220_fp_write(sd, 0xf2,
  339. data | (input_vals[input][1] << 5) | 0x0010);
  340. udelay(10);
  341. return 0;
  342. }
  343. static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
  344. {
  345. v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");
  346. vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
  347. return 0;
  348. }
  349. static int vpx3220_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  350. {
  351. switch (qc->id) {
  352. case V4L2_CID_BRIGHTNESS:
  353. v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
  354. break;
  355. case V4L2_CID_CONTRAST:
  356. v4l2_ctrl_query_fill(qc, 0, 63, 1, 32);
  357. break;
  358. case V4L2_CID_SATURATION:
  359. v4l2_ctrl_query_fill(qc, 0, 4095, 1, 2048);
  360. break;
  361. case V4L2_CID_HUE:
  362. v4l2_ctrl_query_fill(qc, -512, 511, 1, 0);
  363. break;
  364. default:
  365. return -EINVAL;
  366. }
  367. return 0;
  368. }
  369. static int vpx3220_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  370. {
  371. struct vpx3220 *decoder = to_vpx3220(sd);
  372. switch (ctrl->id) {
  373. case V4L2_CID_BRIGHTNESS:
  374. ctrl->value = decoder->bright;
  375. break;
  376. case V4L2_CID_CONTRAST:
  377. ctrl->value = decoder->contrast;
  378. break;
  379. case V4L2_CID_SATURATION:
  380. ctrl->value = decoder->sat;
  381. break;
  382. case V4L2_CID_HUE:
  383. ctrl->value = decoder->hue;
  384. break;
  385. default:
  386. return -EINVAL;
  387. }
  388. return 0;
  389. }
  390. static int vpx3220_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  391. {
  392. struct vpx3220 *decoder = to_vpx3220(sd);
  393. switch (ctrl->id) {
  394. case V4L2_CID_BRIGHTNESS:
  395. if (decoder->bright != ctrl->value) {
  396. decoder->bright = ctrl->value;
  397. vpx3220_write(sd, 0xe6, decoder->bright);
  398. }
  399. break;
  400. case V4L2_CID_CONTRAST:
  401. if (decoder->contrast != ctrl->value) {
  402. /* Bit 7 and 8 is for noise shaping */
  403. decoder->contrast = ctrl->value;
  404. vpx3220_write(sd, 0xe7, decoder->contrast + 192);
  405. }
  406. break;
  407. case V4L2_CID_SATURATION:
  408. if (decoder->sat != ctrl->value) {
  409. decoder->sat = ctrl->value;
  410. vpx3220_fp_write(sd, 0xa0, decoder->sat);
  411. }
  412. break;
  413. case V4L2_CID_HUE:
  414. if (decoder->hue != ctrl->value) {
  415. decoder->hue = ctrl->value;
  416. vpx3220_fp_write(sd, 0x1c, decoder->hue);
  417. }
  418. break;
  419. default:
  420. return -EINVAL;
  421. }
  422. return 0;
  423. }
  424. static int vpx3220_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
  425. {
  426. struct vpx3220 *decoder = to_vpx3220(sd);
  427. struct i2c_client *client = v4l2_get_subdevdata(sd);
  428. return v4l2_chip_ident_i2c_client(client, chip, decoder->ident, 0);
  429. }
  430. /* ----------------------------------------------------------------------- */
  431. static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
  432. .g_chip_ident = vpx3220_g_chip_ident,
  433. .init = vpx3220_init,
  434. .g_ctrl = vpx3220_g_ctrl,
  435. .s_ctrl = vpx3220_s_ctrl,
  436. .queryctrl = vpx3220_queryctrl,
  437. .s_std = vpx3220_s_std,
  438. };
  439. static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
  440. .s_routing = vpx3220_s_routing,
  441. .s_stream = vpx3220_s_stream,
  442. .querystd = vpx3220_querystd,
  443. .g_input_status = vpx3220_g_input_status,
  444. };
  445. static const struct v4l2_subdev_ops vpx3220_ops = {
  446. .core = &vpx3220_core_ops,
  447. .video = &vpx3220_video_ops,
  448. };
  449. /* -----------------------------------------------------------------------
  450. * Client management code
  451. */
  452. static int vpx3220_probe(struct i2c_client *client,
  453. const struct i2c_device_id *id)
  454. {
  455. struct vpx3220 *decoder;
  456. struct v4l2_subdev *sd;
  457. const char *name = NULL;
  458. u8 ver;
  459. u16 pn;
  460. /* Check if the adapter supports the needed features */
  461. if (!i2c_check_functionality(client->adapter,
  462. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
  463. return -ENODEV;
  464. decoder = kzalloc(sizeof(struct vpx3220), GFP_KERNEL);
  465. if (decoder == NULL)
  466. return -ENOMEM;
  467. sd = &decoder->sd;
  468. v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
  469. decoder->norm = V4L2_STD_PAL;
  470. decoder->input = 0;
  471. decoder->enable = 1;
  472. decoder->bright = 32768;
  473. decoder->contrast = 32768;
  474. decoder->hue = 32768;
  475. decoder->sat = 32768;
  476. ver = i2c_smbus_read_byte_data(client, 0x00);
  477. pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
  478. i2c_smbus_read_byte_data(client, 0x01);
  479. decoder->ident = V4L2_IDENT_VPX3220A;
  480. if (ver == 0xec) {
  481. switch (pn) {
  482. case 0x4680:
  483. name = "vpx3220a";
  484. break;
  485. case 0x4260:
  486. name = "vpx3216b";
  487. decoder->ident = V4L2_IDENT_VPX3216B;
  488. break;
  489. case 0x4280:
  490. name = "vpx3214c";
  491. decoder->ident = V4L2_IDENT_VPX3214C;
  492. break;
  493. }
  494. }
  495. if (name)
  496. v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
  497. client->addr << 1, client->adapter->name);
  498. else
  499. v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
  500. ver, pn, client->addr << 1, client->adapter->name);
  501. vpx3220_write_block(sd, init_common, sizeof(init_common));
  502. vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
  503. /* Default to PAL */
  504. vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
  505. return 0;
  506. }
  507. static int vpx3220_remove(struct i2c_client *client)
  508. {
  509. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  510. v4l2_device_unregister_subdev(sd);
  511. kfree(to_vpx3220(sd));
  512. return 0;
  513. }
  514. static const struct i2c_device_id vpx3220_id[] = {
  515. { "vpx3220a", 0 },
  516. { "vpx3216b", 0 },
  517. { "vpx3214c", 0 },
  518. { }
  519. };
  520. MODULE_DEVICE_TABLE(i2c, vpx3220_id);
  521. static struct v4l2_i2c_driver_data v4l2_i2c_data = {
  522. .name = "vpx3220",
  523. .probe = vpx3220_probe,
  524. .remove = vpx3220_remove,
  525. .id_table = vpx3220_id,
  526. };