Kconfig 6.0 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. config INTEL_MID_DMAC
  30. tristate "Intel MID DMA support for Peripheral DMA controllers"
  31. depends on PCI && X86
  32. select DMA_ENGINE
  33. default n
  34. help
  35. Enable support for the Intel(R) MID DMA engine present
  36. in Intel MID chipsets.
  37. Say Y here if you have such a chipset.
  38. If unsure, say N.
  39. config ASYNC_TX_DISABLE_CHANNEL_SWITCH
  40. bool
  41. config INTEL_IOATDMA
  42. tristate "Intel I/OAT DMA support"
  43. depends on PCI && X86
  44. select DMA_ENGINE
  45. select DCA
  46. select ASYNC_TX_DISABLE_CHANNEL_SWITCH
  47. select ASYNC_TX_DISABLE_PQ_VAL_DMA
  48. select ASYNC_TX_DISABLE_XOR_VAL_DMA
  49. help
  50. Enable support for the Intel(R) I/OAT DMA engine present
  51. in recent Intel Xeon chipsets.
  52. Say Y here if you have such a chipset.
  53. If unsure, say N.
  54. config INTEL_IOP_ADMA
  55. tristate "Intel IOP ADMA support"
  56. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  57. select DMA_ENGINE
  58. help
  59. Enable support for the Intel(R) IOP Series RAID engines.
  60. config DW_DMAC
  61. tristate "Synopsys DesignWare AHB DMA support"
  62. depends on AVR32
  63. select DMA_ENGINE
  64. default y if CPU_AT32AP7000
  65. help
  66. Support the Synopsys DesignWare AHB DMA controller. This
  67. can be integrated in chips such as the Atmel AT32ap7000.
  68. config AT_HDMAC
  69. tristate "Atmel AHB DMA support"
  70. depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
  71. select DMA_ENGINE
  72. help
  73. Support the Atmel AHB DMA controller. This can be integrated in
  74. chips such as the Atmel AT91SAM9RL.
  75. config FSL_DMA
  76. tristate "Freescale Elo and Elo Plus DMA support"
  77. depends on FSL_SOC
  78. select DMA_ENGINE
  79. ---help---
  80. Enable support for the Freescale Elo and Elo Plus DMA controllers.
  81. The Elo is the DMA controller on some 82xx and 83xx parts, and the
  82. Elo Plus is the DMA controller on 85xx and 86xx parts.
  83. config MPC512X_DMA
  84. tristate "Freescale MPC512x built-in DMA engine support"
  85. depends on PPC_MPC512x
  86. select DMA_ENGINE
  87. ---help---
  88. Enable support for the Freescale MPC512x built-in DMA engine.
  89. config MV_XOR
  90. bool "Marvell XOR engine support"
  91. depends on PLAT_ORION
  92. select DMA_ENGINE
  93. ---help---
  94. Enable support for the Marvell XOR engine.
  95. config MX3_IPU
  96. bool "MX3x Image Processing Unit support"
  97. depends on ARCH_MX3
  98. select DMA_ENGINE
  99. default y
  100. help
  101. If you plan to use the Image Processing unit in the i.MX3x, say
  102. Y here. If unsure, select Y.
  103. config MX3_IPU_IRQS
  104. int "Number of dynamically mapped interrupts for IPU"
  105. depends on MX3_IPU
  106. range 2 137
  107. default 4
  108. help
  109. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  110. To avoid bloating the irq_desc[] array we allocate a sufficient
  111. number of IRQ slots and map them dynamically to specific sources.
  112. config TXX9_DMAC
  113. tristate "Toshiba TXx9 SoC DMA support"
  114. depends on MACH_TX49XX || MACH_TX39XX
  115. select DMA_ENGINE
  116. help
  117. Support the TXx9 SoC internal DMA controller. This can be
  118. integrated in chips such as the Toshiba TX4927/38/39.
  119. config SH_DMAE
  120. tristate "Renesas SuperH DMAC support"
  121. depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
  122. depends on !SH_DMA_API
  123. select DMA_ENGINE
  124. help
  125. Enable support for the Renesas SuperH DMA controllers.
  126. config COH901318
  127. bool "ST-Ericsson COH901318 DMA support"
  128. select DMA_ENGINE
  129. depends on ARCH_U300
  130. help
  131. Enable support for ST-Ericsson COH 901 318 DMA.
  132. config STE_DMA40
  133. bool "ST-Ericsson DMA40 support"
  134. depends on ARCH_U8500
  135. select DMA_ENGINE
  136. help
  137. Support for ST-Ericsson DMA40 controller
  138. config AMCC_PPC440SPE_ADMA
  139. tristate "AMCC PPC440SPe ADMA support"
  140. depends on 440SPe || 440SP
  141. select DMA_ENGINE
  142. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  143. help
  144. Enable support for the AMCC PPC440SPe RAID engines.
  145. config TIMB_DMA
  146. tristate "Timberdale FPGA DMA support"
  147. depends on MFD_TIMBERDALE || HAS_IOMEM
  148. select DMA_ENGINE
  149. help
  150. Enable support for the Timberdale FPGA DMA engine.
  151. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  152. bool
  153. config PL330_DMA
  154. tristate "DMA API Driver for PL330"
  155. select DMA_ENGINE
  156. depends on PL330
  157. help
  158. Select if your platform has one or more PL330 DMACs.
  159. You need to provide platform specific settings via
  160. platform_data for a dma-pl330 device.
  161. config PCH_DMA
  162. tristate "Topcliff PCH DMA support"
  163. depends on PCI && X86
  164. select DMA_ENGINE
  165. help
  166. Enable support for the Topcliff PCH DMA engine.
  167. config DMA_ENGINE
  168. bool
  169. comment "DMA Clients"
  170. depends on DMA_ENGINE
  171. config NET_DMA
  172. bool "Network: TCP receive copy offload"
  173. depends on DMA_ENGINE && NET
  174. default (INTEL_IOATDMA || FSL_DMA)
  175. help
  176. This enables the use of DMA engines in the network stack to
  177. offload receive copy-to-user operations, freeing CPU cycles.
  178. Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
  179. say N.
  180. config ASYNC_TX_DMA
  181. bool "Async_tx: Offload support for the async_tx api"
  182. depends on DMA_ENGINE
  183. help
  184. This allows the async_tx api to take advantage of offload engines for
  185. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  186. a dma engine that can perform raid operations and you have enabled
  187. MD_RAID456 say Y.
  188. If unsure, say N.
  189. config DMATEST
  190. tristate "DMA Test client"
  191. depends on DMA_ENGINE
  192. help
  193. Simple DMA test client. Say N unless you're debugging a
  194. DMA Device driver.
  195. endif