cm4040_cs.c 16 KB

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  1. /*
  2. * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
  3. *
  4. * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
  5. *
  6. * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
  7. * - add support for poll()
  8. * - driver cleanup
  9. * - add waitqueues
  10. * - adhere to linux kernel coding style and policies
  11. * - support 2.6.13 "new style" pcmcia interface
  12. * - add class interface for udev device creation
  13. *
  14. * The device basically is a USB CCID compliant device that has been
  15. * attached to an I/O-Mapped FIFO.
  16. *
  17. * All rights reserved, Dual BSD/GPL Licensed.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/init.h>
  23. #include <linux/fs.h>
  24. #include <linux/delay.h>
  25. #include <linux/poll.h>
  26. #include <linux/smp_lock.h>
  27. #include <linux/wait.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/io.h>
  30. #include <pcmcia/cs.h>
  31. #include <pcmcia/cistpl.h>
  32. #include <pcmcia/cisreg.h>
  33. #include <pcmcia/ciscode.h>
  34. #include <pcmcia/ds.h>
  35. #include "cm4040_cs.h"
  36. #define reader_to_dev(x) (&x->p_dev->dev)
  37. /* n (debug level) is ignored */
  38. /* additional debug output may be enabled by re-compiling with
  39. * CM4040_DEBUG set */
  40. /* #define CM4040_DEBUG */
  41. #define DEBUGP(n, rdr, x, args...) do { \
  42. dev_dbg(reader_to_dev(rdr), "%s:" x, \
  43. __func__ , ## args); \
  44. } while (0)
  45. static char *version =
  46. "OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte";
  47. #define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ)
  48. #define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ)
  49. #define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ)
  50. #define READ_WRITE_BUFFER_SIZE 512
  51. #define POLL_LOOP_COUNT 1000
  52. /* how often to poll for fifo status change */
  53. #define POLL_PERIOD msecs_to_jiffies(10)
  54. static void reader_release(struct pcmcia_device *link);
  55. static int major;
  56. static struct class *cmx_class;
  57. #define BS_READABLE 0x01
  58. #define BS_WRITABLE 0x02
  59. struct reader_dev {
  60. struct pcmcia_device *p_dev;
  61. wait_queue_head_t devq;
  62. wait_queue_head_t poll_wait;
  63. wait_queue_head_t read_wait;
  64. wait_queue_head_t write_wait;
  65. unsigned long buffer_status;
  66. unsigned long timeout;
  67. unsigned char s_buf[READ_WRITE_BUFFER_SIZE];
  68. unsigned char r_buf[READ_WRITE_BUFFER_SIZE];
  69. struct timer_list poll_timer;
  70. };
  71. static struct pcmcia_device *dev_table[CM_MAX_DEV];
  72. #ifndef CM4040_DEBUG
  73. #define xoutb outb
  74. #define xinb inb
  75. #else
  76. static inline void xoutb(unsigned char val, unsigned short port)
  77. {
  78. pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
  79. outb(val, port);
  80. }
  81. static inline unsigned char xinb(unsigned short port)
  82. {
  83. unsigned char val;
  84. val = inb(port);
  85. pr_debug("%.2x=inb(%.4x)\n", val, port);
  86. return val;
  87. }
  88. #endif
  89. /* poll the device fifo status register. not to be confused with
  90. * the poll syscall. */
  91. static void cm4040_do_poll(unsigned long dummy)
  92. {
  93. struct reader_dev *dev = (struct reader_dev *) dummy;
  94. unsigned int obs = xinb(dev->p_dev->resource[0]->start
  95. + REG_OFFSET_BUFFER_STATUS);
  96. if ((obs & BSR_BULK_IN_FULL)) {
  97. set_bit(BS_READABLE, &dev->buffer_status);
  98. DEBUGP(4, dev, "waking up read_wait\n");
  99. wake_up_interruptible(&dev->read_wait);
  100. } else
  101. clear_bit(BS_READABLE, &dev->buffer_status);
  102. if (!(obs & BSR_BULK_OUT_FULL)) {
  103. set_bit(BS_WRITABLE, &dev->buffer_status);
  104. DEBUGP(4, dev, "waking up write_wait\n");
  105. wake_up_interruptible(&dev->write_wait);
  106. } else
  107. clear_bit(BS_WRITABLE, &dev->buffer_status);
  108. if (dev->buffer_status)
  109. wake_up_interruptible(&dev->poll_wait);
  110. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  111. }
  112. static void cm4040_stop_poll(struct reader_dev *dev)
  113. {
  114. del_timer_sync(&dev->poll_timer);
  115. }
  116. static int wait_for_bulk_out_ready(struct reader_dev *dev)
  117. {
  118. int i, rc;
  119. int iobase = dev->p_dev->resource[0]->start;
  120. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  121. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  122. & BSR_BULK_OUT_FULL) == 0) {
  123. DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
  124. return 1;
  125. }
  126. }
  127. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  128. dev->timeout);
  129. rc = wait_event_interruptible_timeout(dev->write_wait,
  130. test_and_clear_bit(BS_WRITABLE,
  131. &dev->buffer_status),
  132. dev->timeout);
  133. if (rc > 0)
  134. DEBUGP(4, dev, "woke up: BulkOut empty\n");
  135. else if (rc == 0)
  136. DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
  137. else if (rc < 0)
  138. DEBUGP(4, dev, "woke up: signal arrived\n");
  139. return rc;
  140. }
  141. /* Write to Sync Control Register */
  142. static int write_sync_reg(unsigned char val, struct reader_dev *dev)
  143. {
  144. int iobase = dev->p_dev->resource[0]->start;
  145. int rc;
  146. rc = wait_for_bulk_out_ready(dev);
  147. if (rc <= 0)
  148. return rc;
  149. xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
  150. rc = wait_for_bulk_out_ready(dev);
  151. if (rc <= 0)
  152. return rc;
  153. return 1;
  154. }
  155. static int wait_for_bulk_in_ready(struct reader_dev *dev)
  156. {
  157. int i, rc;
  158. int iobase = dev->p_dev->resource[0]->start;
  159. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  160. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  161. & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
  162. DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
  163. return 1;
  164. }
  165. }
  166. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  167. dev->timeout);
  168. rc = wait_event_interruptible_timeout(dev->read_wait,
  169. test_and_clear_bit(BS_READABLE,
  170. &dev->buffer_status),
  171. dev->timeout);
  172. if (rc > 0)
  173. DEBUGP(4, dev, "woke up: BulkIn full\n");
  174. else if (rc == 0)
  175. DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
  176. else if (rc < 0)
  177. DEBUGP(4, dev, "woke up: signal arrived\n");
  178. return rc;
  179. }
  180. static ssize_t cm4040_read(struct file *filp, char __user *buf,
  181. size_t count, loff_t *ppos)
  182. {
  183. struct reader_dev *dev = filp->private_data;
  184. int iobase = dev->p_dev->resource[0]->start;
  185. size_t bytes_to_read;
  186. unsigned long i;
  187. size_t min_bytes_to_read;
  188. int rc;
  189. unsigned char uc;
  190. DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
  191. if (count == 0)
  192. return 0;
  193. if (count < 10)
  194. return -EFAULT;
  195. if (filp->f_flags & O_NONBLOCK) {
  196. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  197. DEBUGP(2, dev, "<- cm4040_read (failure)\n");
  198. return -EAGAIN;
  199. }
  200. if (!pcmcia_dev_present(dev->p_dev))
  201. return -ENODEV;
  202. for (i = 0; i < 5; i++) {
  203. rc = wait_for_bulk_in_ready(dev);
  204. if (rc <= 0) {
  205. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  206. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  207. if (rc == -ERESTARTSYS)
  208. return rc;
  209. return -EIO;
  210. }
  211. dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
  212. #ifdef CM4040_DEBUG
  213. pr_debug("%lu:%2x ", i, dev->r_buf[i]);
  214. }
  215. pr_debug("\n");
  216. #else
  217. }
  218. #endif
  219. bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]);
  220. DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);
  221. min_bytes_to_read = min(count, bytes_to_read + 5);
  222. min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);
  223. DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);
  224. for (i = 0; i < (min_bytes_to_read-5); i++) {
  225. rc = wait_for_bulk_in_ready(dev);
  226. if (rc <= 0) {
  227. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  228. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  229. if (rc == -ERESTARTSYS)
  230. return rc;
  231. return -EIO;
  232. }
  233. dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
  234. #ifdef CM4040_DEBUG
  235. pr_debug("%lu:%2x ", i, dev->r_buf[i]);
  236. }
  237. pr_debug("\n");
  238. #else
  239. }
  240. #endif
  241. *ppos = min_bytes_to_read;
  242. if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
  243. return -EFAULT;
  244. rc = wait_for_bulk_in_ready(dev);
  245. if (rc <= 0) {
  246. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  247. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  248. if (rc == -ERESTARTSYS)
  249. return rc;
  250. return -EIO;
  251. }
  252. rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
  253. if (rc <= 0) {
  254. DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
  255. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  256. if (rc == -ERESTARTSYS)
  257. return rc;
  258. else
  259. return -EIO;
  260. }
  261. uc = xinb(iobase + REG_OFFSET_BULK_IN);
  262. DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
  263. return min_bytes_to_read;
  264. }
  265. static ssize_t cm4040_write(struct file *filp, const char __user *buf,
  266. size_t count, loff_t *ppos)
  267. {
  268. struct reader_dev *dev = filp->private_data;
  269. int iobase = dev->p_dev->resource[0]->start;
  270. ssize_t rc;
  271. int i;
  272. unsigned int bytes_to_write;
  273. DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);
  274. if (count == 0) {
  275. DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
  276. return 0;
  277. }
  278. if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) {
  279. DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count);
  280. return -EIO;
  281. }
  282. if (filp->f_flags & O_NONBLOCK) {
  283. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  284. DEBUGP(4, dev, "<- cm4040_write (failure)\n");
  285. return -EAGAIN;
  286. }
  287. if (!pcmcia_dev_present(dev->p_dev))
  288. return -ENODEV;
  289. bytes_to_write = count;
  290. if (copy_from_user(dev->s_buf, buf, bytes_to_write))
  291. return -EFAULT;
  292. switch (dev->s_buf[0]) {
  293. case CMD_PC_TO_RDR_XFRBLOCK:
  294. case CMD_PC_TO_RDR_SECURE:
  295. case CMD_PC_TO_RDR_TEST_SECURE:
  296. case CMD_PC_TO_RDR_OK_SECURE:
  297. dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
  298. break;
  299. case CMD_PC_TO_RDR_ICCPOWERON:
  300. dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
  301. break;
  302. case CMD_PC_TO_RDR_GETSLOTSTATUS:
  303. case CMD_PC_TO_RDR_ICCPOWEROFF:
  304. case CMD_PC_TO_RDR_GETPARAMETERS:
  305. case CMD_PC_TO_RDR_RESETPARAMETERS:
  306. case CMD_PC_TO_RDR_SETPARAMETERS:
  307. case CMD_PC_TO_RDR_ESCAPE:
  308. case CMD_PC_TO_RDR_ICCCLOCK:
  309. default:
  310. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  311. break;
  312. }
  313. rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
  314. if (rc <= 0) {
  315. DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
  316. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  317. if (rc == -ERESTARTSYS)
  318. return rc;
  319. else
  320. return -EIO;
  321. }
  322. DEBUGP(4, dev, "start \n");
  323. for (i = 0; i < bytes_to_write; i++) {
  324. rc = wait_for_bulk_out_ready(dev);
  325. if (rc <= 0) {
  326. DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n",
  327. rc);
  328. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  329. if (rc == -ERESTARTSYS)
  330. return rc;
  331. else
  332. return -EIO;
  333. }
  334. xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
  335. }
  336. DEBUGP(4, dev, "end\n");
  337. rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);
  338. if (rc <= 0) {
  339. DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
  340. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  341. if (rc == -ERESTARTSYS)
  342. return rc;
  343. else
  344. return -EIO;
  345. }
  346. DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
  347. return count;
  348. }
  349. static unsigned int cm4040_poll(struct file *filp, poll_table *wait)
  350. {
  351. struct reader_dev *dev = filp->private_data;
  352. unsigned int mask = 0;
  353. poll_wait(filp, &dev->poll_wait, wait);
  354. if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
  355. mask |= POLLIN | POLLRDNORM;
  356. if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
  357. mask |= POLLOUT | POLLWRNORM;
  358. DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);
  359. return mask;
  360. }
  361. static int cm4040_open(struct inode *inode, struct file *filp)
  362. {
  363. struct reader_dev *dev;
  364. struct pcmcia_device *link;
  365. int minor = iminor(inode);
  366. int ret;
  367. if (minor >= CM_MAX_DEV)
  368. return -ENODEV;
  369. lock_kernel();
  370. link = dev_table[minor];
  371. if (link == NULL || !pcmcia_dev_present(link)) {
  372. ret = -ENODEV;
  373. goto out;
  374. }
  375. if (link->open) {
  376. ret = -EBUSY;
  377. goto out;
  378. }
  379. dev = link->priv;
  380. filp->private_data = dev;
  381. if (filp->f_flags & O_NONBLOCK) {
  382. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  383. ret = -EAGAIN;
  384. goto out;
  385. }
  386. link->open = 1;
  387. dev->poll_timer.data = (unsigned long) dev;
  388. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  389. DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
  390. ret = nonseekable_open(inode, filp);
  391. out:
  392. unlock_kernel();
  393. return ret;
  394. }
  395. static int cm4040_close(struct inode *inode, struct file *filp)
  396. {
  397. struct reader_dev *dev = filp->private_data;
  398. struct pcmcia_device *link;
  399. int minor = iminor(inode);
  400. DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
  401. iminor(inode));
  402. if (minor >= CM_MAX_DEV)
  403. return -ENODEV;
  404. link = dev_table[minor];
  405. if (link == NULL)
  406. return -ENODEV;
  407. cm4040_stop_poll(dev);
  408. link->open = 0;
  409. wake_up(&dev->devq);
  410. DEBUGP(2, dev, "<- cm4040_close\n");
  411. return 0;
  412. }
  413. static void cm4040_reader_release(struct pcmcia_device *link)
  414. {
  415. struct reader_dev *dev = link->priv;
  416. DEBUGP(3, dev, "-> cm4040_reader_release\n");
  417. while (link->open) {
  418. DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
  419. "until process has terminated\n");
  420. wait_event(dev->devq, (link->open == 0));
  421. }
  422. DEBUGP(3, dev, "<- cm4040_reader_release\n");
  423. return;
  424. }
  425. static int cm4040_config_check(struct pcmcia_device *p_dev,
  426. cistpl_cftable_entry_t *cfg,
  427. cistpl_cftable_entry_t *dflt,
  428. unsigned int vcc,
  429. void *priv_data)
  430. {
  431. int rc;
  432. if (!cfg->io.nwin)
  433. return -ENODEV;
  434. /* Get the IOaddr */
  435. p_dev->resource[0]->start = cfg->io.win[0].base;
  436. p_dev->resource[0]->end = cfg->io.win[0].len;
  437. p_dev->resource[0]->flags |= pcmcia_io_cfg_data_width(cfg->io.flags);
  438. p_dev->io_lines = cfg->io.flags & CISTPL_IO_LINES_MASK;
  439. rc = pcmcia_request_io(p_dev);
  440. dev_printk(KERN_INFO, &p_dev->dev,
  441. "pcmcia_request_io returned 0x%x\n", rc);
  442. return rc;
  443. }
  444. static int reader_config(struct pcmcia_device *link, int devno)
  445. {
  446. struct reader_dev *dev;
  447. int fail_rc;
  448. if (pcmcia_loop_config(link, cm4040_config_check, NULL))
  449. goto cs_release;
  450. link->conf.IntType = 00000002;
  451. fail_rc = pcmcia_request_configuration(link, &link->conf);
  452. if (fail_rc != 0) {
  453. dev_printk(KERN_INFO, &link->dev,
  454. "pcmcia_request_configuration failed 0x%x\n",
  455. fail_rc);
  456. goto cs_release;
  457. }
  458. dev = link->priv;
  459. DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
  460. link->resource[0]);
  461. DEBUGP(2, dev, "<- reader_config (succ)\n");
  462. return 0;
  463. cs_release:
  464. reader_release(link);
  465. return -ENODEV;
  466. }
  467. static void reader_release(struct pcmcia_device *link)
  468. {
  469. cm4040_reader_release(link);
  470. pcmcia_disable_device(link);
  471. }
  472. static int reader_probe(struct pcmcia_device *link)
  473. {
  474. struct reader_dev *dev;
  475. int i, ret;
  476. for (i = 0; i < CM_MAX_DEV; i++) {
  477. if (dev_table[i] == NULL)
  478. break;
  479. }
  480. if (i == CM_MAX_DEV)
  481. return -ENODEV;
  482. dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
  483. if (dev == NULL)
  484. return -ENOMEM;
  485. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  486. dev->buffer_status = 0;
  487. link->priv = dev;
  488. dev->p_dev = link;
  489. link->conf.IntType = INT_MEMORY_AND_IO;
  490. dev_table[i] = link;
  491. init_waitqueue_head(&dev->devq);
  492. init_waitqueue_head(&dev->poll_wait);
  493. init_waitqueue_head(&dev->read_wait);
  494. init_waitqueue_head(&dev->write_wait);
  495. setup_timer(&dev->poll_timer, cm4040_do_poll, 0);
  496. ret = reader_config(link, i);
  497. if (ret) {
  498. dev_table[i] = NULL;
  499. kfree(dev);
  500. return ret;
  501. }
  502. device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);
  503. return 0;
  504. }
  505. static void reader_detach(struct pcmcia_device *link)
  506. {
  507. struct reader_dev *dev = link->priv;
  508. int devno;
  509. /* find device */
  510. for (devno = 0; devno < CM_MAX_DEV; devno++) {
  511. if (dev_table[devno] == link)
  512. break;
  513. }
  514. if (devno == CM_MAX_DEV)
  515. return;
  516. reader_release(link);
  517. dev_table[devno] = NULL;
  518. kfree(dev);
  519. device_destroy(cmx_class, MKDEV(major, devno));
  520. return;
  521. }
  522. static const struct file_operations reader_fops = {
  523. .owner = THIS_MODULE,
  524. .read = cm4040_read,
  525. .write = cm4040_write,
  526. .open = cm4040_open,
  527. .release = cm4040_close,
  528. .poll = cm4040_poll,
  529. };
  530. static struct pcmcia_device_id cm4040_ids[] = {
  531. PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
  532. PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
  533. 0xE32CDD8C, 0x8F23318B),
  534. PCMCIA_DEVICE_NULL,
  535. };
  536. MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);
  537. static struct pcmcia_driver reader_driver = {
  538. .owner = THIS_MODULE,
  539. .drv = {
  540. .name = "cm4040_cs",
  541. },
  542. .probe = reader_probe,
  543. .remove = reader_detach,
  544. .id_table = cm4040_ids,
  545. };
  546. static int __init cm4040_init(void)
  547. {
  548. int rc;
  549. printk(KERN_INFO "%s\n", version);
  550. cmx_class = class_create(THIS_MODULE, "cardman_4040");
  551. if (IS_ERR(cmx_class))
  552. return PTR_ERR(cmx_class);
  553. major = register_chrdev(0, DEVICE_NAME, &reader_fops);
  554. if (major < 0) {
  555. printk(KERN_WARNING MODULE_NAME
  556. ": could not get major number\n");
  557. class_destroy(cmx_class);
  558. return major;
  559. }
  560. rc = pcmcia_register_driver(&reader_driver);
  561. if (rc < 0) {
  562. unregister_chrdev(major, DEVICE_NAME);
  563. class_destroy(cmx_class);
  564. return rc;
  565. }
  566. return 0;
  567. }
  568. static void __exit cm4040_exit(void)
  569. {
  570. printk(KERN_INFO MODULE_NAME ": unloading\n");
  571. pcmcia_unregister_driver(&reader_driver);
  572. unregister_chrdev(major, DEVICE_NAME);
  573. class_destroy(cmx_class);
  574. }
  575. module_init(cm4040_init);
  576. module_exit(cm4040_exit);
  577. MODULE_LICENSE("Dual BSD/GPL");