cciss.c 139 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/smp_lock.h>
  29. #include <linux/delay.h>
  30. #include <linux/major.h>
  31. #include <linux/fs.h>
  32. #include <linux/bio.h>
  33. #include <linux/blkpg.h>
  34. #include <linux/timer.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/seq_file.h>
  37. #include <linux/init.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/hdreg.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/compat.h>
  42. #include <linux/mutex.h>
  43. #include <asm/uaccess.h>
  44. #include <asm/io.h>
  45. #include <linux/dma-mapping.h>
  46. #include <linux/blkdev.h>
  47. #include <linux/genhd.h>
  48. #include <linux/completion.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/sg.h>
  51. #include <scsi/scsi_ioctl.h>
  52. #include <linux/cdrom.h>
  53. #include <linux/scatterlist.h>
  54. #include <linux/kthread.h>
  55. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  56. #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  57. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  58. /* Embedded module documentation macros - see modules.h */
  59. MODULE_AUTHOR("Hewlett-Packard Company");
  60. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  61. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  62. MODULE_VERSION("3.6.26");
  63. MODULE_LICENSE("GPL");
  64. static int cciss_allow_hpsa;
  65. module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
  66. MODULE_PARM_DESC(cciss_allow_hpsa,
  67. "Prevent cciss driver from accessing hardware known to be "
  68. " supported by the hpsa driver");
  69. #include "cciss_cmd.h"
  70. #include "cciss.h"
  71. #include <linux/cciss_ioctl.h>
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id cciss_pci_device_id[] = {
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  78. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  79. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  80. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  81. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  82. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  97. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  98. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  99. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
  100. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
  101. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  102. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  103. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  104. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  105. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  106. {0,}
  107. };
  108. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  109. /* board_id = Subsystem Device ID & Vendor ID
  110. * product = Marketing Name for the board
  111. * access = Address of the struct of function pointers
  112. */
  113. static struct board_type products[] = {
  114. {0x40700E11, "Smart Array 5300", &SA5_access},
  115. {0x40800E11, "Smart Array 5i", &SA5B_access},
  116. {0x40820E11, "Smart Array 532", &SA5B_access},
  117. {0x40830E11, "Smart Array 5312", &SA5B_access},
  118. {0x409A0E11, "Smart Array 641", &SA5_access},
  119. {0x409B0E11, "Smart Array 642", &SA5_access},
  120. {0x409C0E11, "Smart Array 6400", &SA5_access},
  121. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  122. {0x40910E11, "Smart Array 6i", &SA5_access},
  123. {0x3225103C, "Smart Array P600", &SA5_access},
  124. {0x3235103C, "Smart Array P400i", &SA5_access},
  125. {0x3211103C, "Smart Array E200i", &SA5_access},
  126. {0x3212103C, "Smart Array E200", &SA5_access},
  127. {0x3213103C, "Smart Array E200i", &SA5_access},
  128. {0x3214103C, "Smart Array E200i", &SA5_access},
  129. {0x3215103C, "Smart Array E200i", &SA5_access},
  130. {0x3237103C, "Smart Array E500", &SA5_access},
  131. /* controllers below this line are also supported by the hpsa driver. */
  132. #define HPSA_BOUNDARY 0x3223103C
  133. {0x3223103C, "Smart Array P800", &SA5_access},
  134. {0x3234103C, "Smart Array P400", &SA5_access},
  135. {0x323D103C, "Smart Array P700m", &SA5_access},
  136. {0x3241103C, "Smart Array P212", &SA5_access},
  137. {0x3243103C, "Smart Array P410", &SA5_access},
  138. {0x3245103C, "Smart Array P410i", &SA5_access},
  139. {0x3247103C, "Smart Array P411", &SA5_access},
  140. {0x3249103C, "Smart Array P812", &SA5_access},
  141. {0x324A103C, "Smart Array P712m", &SA5_access},
  142. {0x324B103C, "Smart Array P711m", &SA5_access},
  143. {0x3250103C, "Smart Array", &SA5_access},
  144. {0x3251103C, "Smart Array", &SA5_access},
  145. {0x3252103C, "Smart Array", &SA5_access},
  146. {0x3253103C, "Smart Array", &SA5_access},
  147. {0x3254103C, "Smart Array", &SA5_access},
  148. };
  149. /* How long to wait (in milliseconds) for board to go into simple mode */
  150. #define MAX_CONFIG_WAIT 30000
  151. #define MAX_IOCTL_CONFIG_WAIT 1000
  152. /*define how many times we will try a command because of bus resets */
  153. #define MAX_CMD_RETRIES 3
  154. #define MAX_CTLR 32
  155. /* Originally cciss driver only supports 8 major numbers */
  156. #define MAX_CTLR_ORIG 8
  157. static ctlr_info_t *hba[MAX_CTLR];
  158. static struct task_struct *cciss_scan_thread;
  159. static DEFINE_MUTEX(scan_mutex);
  160. static LIST_HEAD(scan_q);
  161. static void do_cciss_request(struct request_queue *q);
  162. static irqreturn_t do_cciss_intx(int irq, void *dev_id);
  163. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
  164. static int cciss_open(struct block_device *bdev, fmode_t mode);
  165. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
  166. static int cciss_release(struct gendisk *disk, fmode_t mode);
  167. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  168. unsigned int cmd, unsigned long arg);
  169. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  170. unsigned int cmd, unsigned long arg);
  171. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  172. static int cciss_revalidate(struct gendisk *disk);
  173. static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
  174. static int deregister_disk(ctlr_info_t *h, int drv_index,
  175. int clear_all, int via_ioctl);
  176. static void cciss_read_capacity(ctlr_info_t *h, int logvol,
  177. sector_t *total_size, unsigned int *block_size);
  178. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  179. sector_t *total_size, unsigned int *block_size);
  180. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  181. sector_t total_size,
  182. unsigned int block_size, InquiryData_struct *inq_buff,
  183. drive_info_struct *drv);
  184. static void __devinit cciss_interrupt_mode(ctlr_info_t *);
  185. static void start_io(ctlr_info_t *h);
  186. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  187. __u8 page_code, unsigned char scsi3addr[],
  188. int cmd_type);
  189. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  190. int attempt_retry);
  191. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  192. static int add_to_scan_list(struct ctlr_info *h);
  193. static int scan_thread(void *data);
  194. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  195. static void cciss_hba_release(struct device *dev);
  196. static void cciss_device_release(struct device *dev);
  197. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
  198. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
  199. static inline u32 next_command(ctlr_info_t *h);
  200. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  201. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  202. u64 *cfg_offset);
  203. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  204. unsigned long *memory_bar);
  205. /* performant mode helper functions */
  206. static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
  207. int *bucket_map);
  208. static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
  209. #ifdef CONFIG_PROC_FS
  210. static void cciss_procinit(ctlr_info_t *h);
  211. #else
  212. static void cciss_procinit(ctlr_info_t *h)
  213. {
  214. }
  215. #endif /* CONFIG_PROC_FS */
  216. #ifdef CONFIG_COMPAT
  217. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  218. unsigned, unsigned long);
  219. #endif
  220. static const struct block_device_operations cciss_fops = {
  221. .owner = THIS_MODULE,
  222. .open = cciss_unlocked_open,
  223. .release = cciss_release,
  224. .ioctl = do_ioctl,
  225. .getgeo = cciss_getgeo,
  226. #ifdef CONFIG_COMPAT
  227. .compat_ioctl = cciss_compat_ioctl,
  228. #endif
  229. .revalidate_disk = cciss_revalidate,
  230. };
  231. /* set_performant_mode: Modify the tag for cciss performant
  232. * set bit 0 for pull model, bits 3-1 for block fetch
  233. * register number
  234. */
  235. static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
  236. {
  237. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  238. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  239. }
  240. /*
  241. * Enqueuing and dequeuing functions for cmdlists.
  242. */
  243. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  244. {
  245. hlist_add_head(&c->list, list);
  246. }
  247. static inline void removeQ(CommandList_struct *c)
  248. {
  249. /*
  250. * After kexec/dump some commands might still
  251. * be in flight, which the firmware will try
  252. * to complete. Resetting the firmware doesn't work
  253. * with old fw revisions, so we have to mark
  254. * them off as 'stale' to prevent the driver from
  255. * falling over.
  256. */
  257. if (WARN_ON(hlist_unhashed(&c->list))) {
  258. c->cmd_type = CMD_MSG_STALE;
  259. return;
  260. }
  261. hlist_del_init(&c->list);
  262. }
  263. static void enqueue_cmd_and_start_io(ctlr_info_t *h,
  264. CommandList_struct *c)
  265. {
  266. unsigned long flags;
  267. set_performant_mode(h, c);
  268. spin_lock_irqsave(&h->lock, flags);
  269. addQ(&h->reqQ, c);
  270. h->Qdepth++;
  271. if (h->Qdepth > h->maxQsinceinit)
  272. h->maxQsinceinit = h->Qdepth;
  273. start_io(h);
  274. spin_unlock_irqrestore(&h->lock, flags);
  275. }
  276. static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
  277. int nr_cmds)
  278. {
  279. int i;
  280. if (!cmd_sg_list)
  281. return;
  282. for (i = 0; i < nr_cmds; i++) {
  283. kfree(cmd_sg_list[i]);
  284. cmd_sg_list[i] = NULL;
  285. }
  286. kfree(cmd_sg_list);
  287. }
  288. static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
  289. ctlr_info_t *h, int chainsize, int nr_cmds)
  290. {
  291. int j;
  292. SGDescriptor_struct **cmd_sg_list;
  293. if (chainsize <= 0)
  294. return NULL;
  295. cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
  296. if (!cmd_sg_list)
  297. return NULL;
  298. /* Build up chain blocks for each command */
  299. for (j = 0; j < nr_cmds; j++) {
  300. /* Need a block of chainsized s/g elements. */
  301. cmd_sg_list[j] = kmalloc((chainsize *
  302. sizeof(*cmd_sg_list[j])), GFP_KERNEL);
  303. if (!cmd_sg_list[j]) {
  304. dev_err(&h->pdev->dev, "Cannot get memory "
  305. "for s/g chains.\n");
  306. goto clean;
  307. }
  308. }
  309. return cmd_sg_list;
  310. clean:
  311. cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
  312. return NULL;
  313. }
  314. static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
  315. {
  316. SGDescriptor_struct *chain_sg;
  317. u64bit temp64;
  318. if (c->Header.SGTotal <= h->max_cmd_sgentries)
  319. return;
  320. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  321. temp64.val32.lower = chain_sg->Addr.lower;
  322. temp64.val32.upper = chain_sg->Addr.upper;
  323. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  324. }
  325. static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
  326. SGDescriptor_struct *chain_block, int len)
  327. {
  328. SGDescriptor_struct *chain_sg;
  329. u64bit temp64;
  330. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  331. chain_sg->Ext = CCISS_SG_CHAIN;
  332. chain_sg->Len = len;
  333. temp64.val = pci_map_single(h->pdev, chain_block, len,
  334. PCI_DMA_TODEVICE);
  335. chain_sg->Addr.lower = temp64.val32.lower;
  336. chain_sg->Addr.upper = temp64.val32.upper;
  337. }
  338. #include "cciss_scsi.c" /* For SCSI tape support */
  339. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  340. "UNKNOWN"
  341. };
  342. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
  343. #ifdef CONFIG_PROC_FS
  344. /*
  345. * Report information about this controller.
  346. */
  347. #define ENG_GIG 1000000000
  348. #define ENG_GIG_FACTOR (ENG_GIG/512)
  349. #define ENGAGE_SCSI "engage scsi"
  350. static struct proc_dir_entry *proc_cciss;
  351. static void cciss_seq_show_header(struct seq_file *seq)
  352. {
  353. ctlr_info_t *h = seq->private;
  354. seq_printf(seq, "%s: HP %s Controller\n"
  355. "Board ID: 0x%08lx\n"
  356. "Firmware Version: %c%c%c%c\n"
  357. "IRQ: %d\n"
  358. "Logical drives: %d\n"
  359. "Current Q depth: %d\n"
  360. "Current # commands on controller: %d\n"
  361. "Max Q depth since init: %d\n"
  362. "Max # commands on controller since init: %d\n"
  363. "Max SG entries since init: %d\n",
  364. h->devname,
  365. h->product_name,
  366. (unsigned long)h->board_id,
  367. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  368. h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
  369. h->num_luns,
  370. h->Qdepth, h->commands_outstanding,
  371. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  372. #ifdef CONFIG_CISS_SCSI_TAPE
  373. cciss_seq_tape_report(seq, h);
  374. #endif /* CONFIG_CISS_SCSI_TAPE */
  375. }
  376. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  377. {
  378. ctlr_info_t *h = seq->private;
  379. unsigned long flags;
  380. /* prevent displaying bogus info during configuration
  381. * or deconfiguration of a logical volume
  382. */
  383. spin_lock_irqsave(&h->lock, flags);
  384. if (h->busy_configuring) {
  385. spin_unlock_irqrestore(&h->lock, flags);
  386. return ERR_PTR(-EBUSY);
  387. }
  388. h->busy_configuring = 1;
  389. spin_unlock_irqrestore(&h->lock, flags);
  390. if (*pos == 0)
  391. cciss_seq_show_header(seq);
  392. return pos;
  393. }
  394. static int cciss_seq_show(struct seq_file *seq, void *v)
  395. {
  396. sector_t vol_sz, vol_sz_frac;
  397. ctlr_info_t *h = seq->private;
  398. unsigned ctlr = h->ctlr;
  399. loff_t *pos = v;
  400. drive_info_struct *drv = h->drv[*pos];
  401. if (*pos > h->highest_lun)
  402. return 0;
  403. if (drv == NULL) /* it's possible for h->drv[] to have holes. */
  404. return 0;
  405. if (drv->heads == 0)
  406. return 0;
  407. vol_sz = drv->nr_blocks;
  408. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  409. vol_sz_frac *= 100;
  410. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  411. if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
  412. drv->raid_level = RAID_UNKNOWN;
  413. seq_printf(seq, "cciss/c%dd%d:"
  414. "\t%4u.%02uGB\tRAID %s\n",
  415. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  416. raid_label[drv->raid_level]);
  417. return 0;
  418. }
  419. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  420. {
  421. ctlr_info_t *h = seq->private;
  422. if (*pos > h->highest_lun)
  423. return NULL;
  424. *pos += 1;
  425. return pos;
  426. }
  427. static void cciss_seq_stop(struct seq_file *seq, void *v)
  428. {
  429. ctlr_info_t *h = seq->private;
  430. /* Only reset h->busy_configuring if we succeeded in setting
  431. * it during cciss_seq_start. */
  432. if (v == ERR_PTR(-EBUSY))
  433. return;
  434. h->busy_configuring = 0;
  435. }
  436. static const struct seq_operations cciss_seq_ops = {
  437. .start = cciss_seq_start,
  438. .show = cciss_seq_show,
  439. .next = cciss_seq_next,
  440. .stop = cciss_seq_stop,
  441. };
  442. static int cciss_seq_open(struct inode *inode, struct file *file)
  443. {
  444. int ret = seq_open(file, &cciss_seq_ops);
  445. struct seq_file *seq = file->private_data;
  446. if (!ret)
  447. seq->private = PDE(inode)->data;
  448. return ret;
  449. }
  450. static ssize_t
  451. cciss_proc_write(struct file *file, const char __user *buf,
  452. size_t length, loff_t *ppos)
  453. {
  454. int err;
  455. char *buffer;
  456. #ifndef CONFIG_CISS_SCSI_TAPE
  457. return -EINVAL;
  458. #endif
  459. if (!buf || length > PAGE_SIZE - 1)
  460. return -EINVAL;
  461. buffer = (char *)__get_free_page(GFP_KERNEL);
  462. if (!buffer)
  463. return -ENOMEM;
  464. err = -EFAULT;
  465. if (copy_from_user(buffer, buf, length))
  466. goto out;
  467. buffer[length] = '\0';
  468. #ifdef CONFIG_CISS_SCSI_TAPE
  469. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  470. struct seq_file *seq = file->private_data;
  471. ctlr_info_t *h = seq->private;
  472. err = cciss_engage_scsi(h);
  473. if (err == 0)
  474. err = length;
  475. } else
  476. #endif /* CONFIG_CISS_SCSI_TAPE */
  477. err = -EINVAL;
  478. /* might be nice to have "disengage" too, but it's not
  479. safely possible. (only 1 module use count, lock issues.) */
  480. out:
  481. free_page((unsigned long)buffer);
  482. return err;
  483. }
  484. static const struct file_operations cciss_proc_fops = {
  485. .owner = THIS_MODULE,
  486. .open = cciss_seq_open,
  487. .read = seq_read,
  488. .llseek = seq_lseek,
  489. .release = seq_release,
  490. .write = cciss_proc_write,
  491. };
  492. static void __devinit cciss_procinit(ctlr_info_t *h)
  493. {
  494. struct proc_dir_entry *pde;
  495. if (proc_cciss == NULL)
  496. proc_cciss = proc_mkdir("driver/cciss", NULL);
  497. if (!proc_cciss)
  498. return;
  499. pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  500. S_IROTH, proc_cciss,
  501. &cciss_proc_fops, h);
  502. }
  503. #endif /* CONFIG_PROC_FS */
  504. #define MAX_PRODUCT_NAME_LEN 19
  505. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  506. #define to_drv(n) container_of(n, drive_info_struct, dev)
  507. static ssize_t host_store_rescan(struct device *dev,
  508. struct device_attribute *attr,
  509. const char *buf, size_t count)
  510. {
  511. struct ctlr_info *h = to_hba(dev);
  512. add_to_scan_list(h);
  513. wake_up_process(cciss_scan_thread);
  514. wait_for_completion_interruptible(&h->scan_wait);
  515. return count;
  516. }
  517. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  518. static ssize_t dev_show_unique_id(struct device *dev,
  519. struct device_attribute *attr,
  520. char *buf)
  521. {
  522. drive_info_struct *drv = to_drv(dev);
  523. struct ctlr_info *h = to_hba(drv->dev.parent);
  524. __u8 sn[16];
  525. unsigned long flags;
  526. int ret = 0;
  527. spin_lock_irqsave(&h->lock, flags);
  528. if (h->busy_configuring)
  529. ret = -EBUSY;
  530. else
  531. memcpy(sn, drv->serial_no, sizeof(sn));
  532. spin_unlock_irqrestore(&h->lock, flags);
  533. if (ret)
  534. return ret;
  535. else
  536. return snprintf(buf, 16 * 2 + 2,
  537. "%02X%02X%02X%02X%02X%02X%02X%02X"
  538. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  539. sn[0], sn[1], sn[2], sn[3],
  540. sn[4], sn[5], sn[6], sn[7],
  541. sn[8], sn[9], sn[10], sn[11],
  542. sn[12], sn[13], sn[14], sn[15]);
  543. }
  544. static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  545. static ssize_t dev_show_vendor(struct device *dev,
  546. struct device_attribute *attr,
  547. char *buf)
  548. {
  549. drive_info_struct *drv = to_drv(dev);
  550. struct ctlr_info *h = to_hba(drv->dev.parent);
  551. char vendor[VENDOR_LEN + 1];
  552. unsigned long flags;
  553. int ret = 0;
  554. spin_lock_irqsave(&h->lock, flags);
  555. if (h->busy_configuring)
  556. ret = -EBUSY;
  557. else
  558. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  559. spin_unlock_irqrestore(&h->lock, flags);
  560. if (ret)
  561. return ret;
  562. else
  563. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  564. }
  565. static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  566. static ssize_t dev_show_model(struct device *dev,
  567. struct device_attribute *attr,
  568. char *buf)
  569. {
  570. drive_info_struct *drv = to_drv(dev);
  571. struct ctlr_info *h = to_hba(drv->dev.parent);
  572. char model[MODEL_LEN + 1];
  573. unsigned long flags;
  574. int ret = 0;
  575. spin_lock_irqsave(&h->lock, flags);
  576. if (h->busy_configuring)
  577. ret = -EBUSY;
  578. else
  579. memcpy(model, drv->model, MODEL_LEN + 1);
  580. spin_unlock_irqrestore(&h->lock, flags);
  581. if (ret)
  582. return ret;
  583. else
  584. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  585. }
  586. static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  587. static ssize_t dev_show_rev(struct device *dev,
  588. struct device_attribute *attr,
  589. char *buf)
  590. {
  591. drive_info_struct *drv = to_drv(dev);
  592. struct ctlr_info *h = to_hba(drv->dev.parent);
  593. char rev[REV_LEN + 1];
  594. unsigned long flags;
  595. int ret = 0;
  596. spin_lock_irqsave(&h->lock, flags);
  597. if (h->busy_configuring)
  598. ret = -EBUSY;
  599. else
  600. memcpy(rev, drv->rev, REV_LEN + 1);
  601. spin_unlock_irqrestore(&h->lock, flags);
  602. if (ret)
  603. return ret;
  604. else
  605. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  606. }
  607. static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  608. static ssize_t cciss_show_lunid(struct device *dev,
  609. struct device_attribute *attr, char *buf)
  610. {
  611. drive_info_struct *drv = to_drv(dev);
  612. struct ctlr_info *h = to_hba(drv->dev.parent);
  613. unsigned long flags;
  614. unsigned char lunid[8];
  615. spin_lock_irqsave(&h->lock, flags);
  616. if (h->busy_configuring) {
  617. spin_unlock_irqrestore(&h->lock, flags);
  618. return -EBUSY;
  619. }
  620. if (!drv->heads) {
  621. spin_unlock_irqrestore(&h->lock, flags);
  622. return -ENOTTY;
  623. }
  624. memcpy(lunid, drv->LunID, sizeof(lunid));
  625. spin_unlock_irqrestore(&h->lock, flags);
  626. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  627. lunid[0], lunid[1], lunid[2], lunid[3],
  628. lunid[4], lunid[5], lunid[6], lunid[7]);
  629. }
  630. static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
  631. static ssize_t cciss_show_raid_level(struct device *dev,
  632. struct device_attribute *attr, char *buf)
  633. {
  634. drive_info_struct *drv = to_drv(dev);
  635. struct ctlr_info *h = to_hba(drv->dev.parent);
  636. int raid;
  637. unsigned long flags;
  638. spin_lock_irqsave(&h->lock, flags);
  639. if (h->busy_configuring) {
  640. spin_unlock_irqrestore(&h->lock, flags);
  641. return -EBUSY;
  642. }
  643. raid = drv->raid_level;
  644. spin_unlock_irqrestore(&h->lock, flags);
  645. if (raid < 0 || raid > RAID_UNKNOWN)
  646. raid = RAID_UNKNOWN;
  647. return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
  648. raid_label[raid]);
  649. }
  650. static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
  651. static ssize_t cciss_show_usage_count(struct device *dev,
  652. struct device_attribute *attr, char *buf)
  653. {
  654. drive_info_struct *drv = to_drv(dev);
  655. struct ctlr_info *h = to_hba(drv->dev.parent);
  656. unsigned long flags;
  657. int count;
  658. spin_lock_irqsave(&h->lock, flags);
  659. if (h->busy_configuring) {
  660. spin_unlock_irqrestore(&h->lock, flags);
  661. return -EBUSY;
  662. }
  663. count = drv->usage_count;
  664. spin_unlock_irqrestore(&h->lock, flags);
  665. return snprintf(buf, 20, "%d\n", count);
  666. }
  667. static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
  668. static struct attribute *cciss_host_attrs[] = {
  669. &dev_attr_rescan.attr,
  670. NULL
  671. };
  672. static struct attribute_group cciss_host_attr_group = {
  673. .attrs = cciss_host_attrs,
  674. };
  675. static const struct attribute_group *cciss_host_attr_groups[] = {
  676. &cciss_host_attr_group,
  677. NULL
  678. };
  679. static struct device_type cciss_host_type = {
  680. .name = "cciss_host",
  681. .groups = cciss_host_attr_groups,
  682. .release = cciss_hba_release,
  683. };
  684. static struct attribute *cciss_dev_attrs[] = {
  685. &dev_attr_unique_id.attr,
  686. &dev_attr_model.attr,
  687. &dev_attr_vendor.attr,
  688. &dev_attr_rev.attr,
  689. &dev_attr_lunid.attr,
  690. &dev_attr_raid_level.attr,
  691. &dev_attr_usage_count.attr,
  692. NULL
  693. };
  694. static struct attribute_group cciss_dev_attr_group = {
  695. .attrs = cciss_dev_attrs,
  696. };
  697. static const struct attribute_group *cciss_dev_attr_groups[] = {
  698. &cciss_dev_attr_group,
  699. NULL
  700. };
  701. static struct device_type cciss_dev_type = {
  702. .name = "cciss_device",
  703. .groups = cciss_dev_attr_groups,
  704. .release = cciss_device_release,
  705. };
  706. static struct bus_type cciss_bus_type = {
  707. .name = "cciss",
  708. };
  709. /*
  710. * cciss_hba_release is called when the reference count
  711. * of h->dev goes to zero.
  712. */
  713. static void cciss_hba_release(struct device *dev)
  714. {
  715. /*
  716. * nothing to do, but need this to avoid a warning
  717. * about not having a release handler from lib/kref.c.
  718. */
  719. }
  720. /*
  721. * Initialize sysfs entry for each controller. This sets up and registers
  722. * the 'cciss#' directory for each individual controller under
  723. * /sys/bus/pci/devices/<dev>/.
  724. */
  725. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  726. {
  727. device_initialize(&h->dev);
  728. h->dev.type = &cciss_host_type;
  729. h->dev.bus = &cciss_bus_type;
  730. dev_set_name(&h->dev, "%s", h->devname);
  731. h->dev.parent = &h->pdev->dev;
  732. return device_add(&h->dev);
  733. }
  734. /*
  735. * Remove sysfs entries for an hba.
  736. */
  737. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  738. {
  739. device_del(&h->dev);
  740. put_device(&h->dev); /* final put. */
  741. }
  742. /* cciss_device_release is called when the reference count
  743. * of h->drv[x]dev goes to zero.
  744. */
  745. static void cciss_device_release(struct device *dev)
  746. {
  747. drive_info_struct *drv = to_drv(dev);
  748. kfree(drv);
  749. }
  750. /*
  751. * Initialize sysfs for each logical drive. This sets up and registers
  752. * the 'c#d#' directory for each individual logical drive under
  753. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  754. * /sys/block/cciss!c#d# to this entry.
  755. */
  756. static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  757. int drv_index)
  758. {
  759. struct device *dev;
  760. if (h->drv[drv_index]->device_initialized)
  761. return 0;
  762. dev = &h->drv[drv_index]->dev;
  763. device_initialize(dev);
  764. dev->type = &cciss_dev_type;
  765. dev->bus = &cciss_bus_type;
  766. dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
  767. dev->parent = &h->dev;
  768. h->drv[drv_index]->device_initialized = 1;
  769. return device_add(dev);
  770. }
  771. /*
  772. * Remove sysfs entries for a logical drive.
  773. */
  774. static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
  775. int ctlr_exiting)
  776. {
  777. struct device *dev = &h->drv[drv_index]->dev;
  778. /* special case for c*d0, we only destroy it on controller exit */
  779. if (drv_index == 0 && !ctlr_exiting)
  780. return;
  781. device_del(dev);
  782. put_device(dev); /* the "final" put. */
  783. h->drv[drv_index] = NULL;
  784. }
  785. /*
  786. * For operations that cannot sleep, a command block is allocated at init,
  787. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  788. * which ones are free or in use.
  789. */
  790. static CommandList_struct *cmd_alloc(ctlr_info_t *h)
  791. {
  792. CommandList_struct *c;
  793. int i;
  794. u64bit temp64;
  795. dma_addr_t cmd_dma_handle, err_dma_handle;
  796. do {
  797. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  798. if (i == h->nr_cmds)
  799. return NULL;
  800. } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
  801. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  802. c = h->cmd_pool + i;
  803. memset(c, 0, sizeof(CommandList_struct));
  804. cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
  805. c->err_info = h->errinfo_pool + i;
  806. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  807. err_dma_handle = h->errinfo_pool_dhandle
  808. + i * sizeof(ErrorInfo_struct);
  809. h->nr_allocs++;
  810. c->cmdindex = i;
  811. INIT_HLIST_NODE(&c->list);
  812. c->busaddr = (__u32) cmd_dma_handle;
  813. temp64.val = (__u64) err_dma_handle;
  814. c->ErrDesc.Addr.lower = temp64.val32.lower;
  815. c->ErrDesc.Addr.upper = temp64.val32.upper;
  816. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  817. c->ctlr = h->ctlr;
  818. return c;
  819. }
  820. /* allocate a command using pci_alloc_consistent, used for ioctls,
  821. * etc., not for the main i/o path.
  822. */
  823. static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
  824. {
  825. CommandList_struct *c;
  826. u64bit temp64;
  827. dma_addr_t cmd_dma_handle, err_dma_handle;
  828. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  829. sizeof(CommandList_struct), &cmd_dma_handle);
  830. if (c == NULL)
  831. return NULL;
  832. memset(c, 0, sizeof(CommandList_struct));
  833. c->cmdindex = -1;
  834. c->err_info = (ErrorInfo_struct *)
  835. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  836. &err_dma_handle);
  837. if (c->err_info == NULL) {
  838. pci_free_consistent(h->pdev,
  839. sizeof(CommandList_struct), c, cmd_dma_handle);
  840. return NULL;
  841. }
  842. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  843. INIT_HLIST_NODE(&c->list);
  844. c->busaddr = (__u32) cmd_dma_handle;
  845. temp64.val = (__u64) err_dma_handle;
  846. c->ErrDesc.Addr.lower = temp64.val32.lower;
  847. c->ErrDesc.Addr.upper = temp64.val32.upper;
  848. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  849. c->ctlr = h->ctlr;
  850. return c;
  851. }
  852. static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
  853. {
  854. int i;
  855. i = c - h->cmd_pool;
  856. clear_bit(i & (BITS_PER_LONG - 1),
  857. h->cmd_pool_bits + (i / BITS_PER_LONG));
  858. h->nr_frees++;
  859. }
  860. static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
  861. {
  862. u64bit temp64;
  863. temp64.val32.lower = c->ErrDesc.Addr.lower;
  864. temp64.val32.upper = c->ErrDesc.Addr.upper;
  865. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  866. c->err_info, (dma_addr_t) temp64.val);
  867. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  868. c, (dma_addr_t) c->busaddr);
  869. }
  870. static inline ctlr_info_t *get_host(struct gendisk *disk)
  871. {
  872. return disk->queue->queuedata;
  873. }
  874. static inline drive_info_struct *get_drv(struct gendisk *disk)
  875. {
  876. return disk->private_data;
  877. }
  878. /*
  879. * Open. Make sure the device is really there.
  880. */
  881. static int cciss_open(struct block_device *bdev, fmode_t mode)
  882. {
  883. ctlr_info_t *h = get_host(bdev->bd_disk);
  884. drive_info_struct *drv = get_drv(bdev->bd_disk);
  885. dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
  886. if (drv->busy_configuring)
  887. return -EBUSY;
  888. /*
  889. * Root is allowed to open raw volume zero even if it's not configured
  890. * so array config can still work. Root is also allowed to open any
  891. * volume that has a LUN ID, so it can issue IOCTL to reread the
  892. * disk information. I don't think I really like this
  893. * but I'm already using way to many device nodes to claim another one
  894. * for "raw controller".
  895. */
  896. if (drv->heads == 0) {
  897. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  898. /* if not node 0 make sure it is a partition = 0 */
  899. if (MINOR(bdev->bd_dev) & 0x0f) {
  900. return -ENXIO;
  901. /* if it is, make sure we have a LUN ID */
  902. } else if (memcmp(drv->LunID, CTLR_LUNID,
  903. sizeof(drv->LunID))) {
  904. return -ENXIO;
  905. }
  906. }
  907. if (!capable(CAP_SYS_ADMIN))
  908. return -EPERM;
  909. }
  910. drv->usage_count++;
  911. h->usage_count++;
  912. return 0;
  913. }
  914. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
  915. {
  916. int ret;
  917. lock_kernel();
  918. ret = cciss_open(bdev, mode);
  919. unlock_kernel();
  920. return ret;
  921. }
  922. /*
  923. * Close. Sync first.
  924. */
  925. static int cciss_release(struct gendisk *disk, fmode_t mode)
  926. {
  927. ctlr_info_t *h;
  928. drive_info_struct *drv;
  929. lock_kernel();
  930. h = get_host(disk);
  931. drv = get_drv(disk);
  932. dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
  933. drv->usage_count--;
  934. h->usage_count--;
  935. unlock_kernel();
  936. return 0;
  937. }
  938. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  939. unsigned cmd, unsigned long arg)
  940. {
  941. int ret;
  942. lock_kernel();
  943. ret = cciss_ioctl(bdev, mode, cmd, arg);
  944. unlock_kernel();
  945. return ret;
  946. }
  947. #ifdef CONFIG_COMPAT
  948. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  949. unsigned cmd, unsigned long arg);
  950. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  951. unsigned cmd, unsigned long arg);
  952. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  953. unsigned cmd, unsigned long arg)
  954. {
  955. switch (cmd) {
  956. case CCISS_GETPCIINFO:
  957. case CCISS_GETINTINFO:
  958. case CCISS_SETINTINFO:
  959. case CCISS_GETNODENAME:
  960. case CCISS_SETNODENAME:
  961. case CCISS_GETHEARTBEAT:
  962. case CCISS_GETBUSTYPES:
  963. case CCISS_GETFIRMVER:
  964. case CCISS_GETDRIVVER:
  965. case CCISS_REVALIDVOLS:
  966. case CCISS_DEREGDISK:
  967. case CCISS_REGNEWDISK:
  968. case CCISS_REGNEWD:
  969. case CCISS_RESCANDISK:
  970. case CCISS_GETLUNINFO:
  971. return do_ioctl(bdev, mode, cmd, arg);
  972. case CCISS_PASSTHRU32:
  973. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  974. case CCISS_BIG_PASSTHRU32:
  975. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  976. default:
  977. return -ENOIOCTLCMD;
  978. }
  979. }
  980. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  981. unsigned cmd, unsigned long arg)
  982. {
  983. IOCTL32_Command_struct __user *arg32 =
  984. (IOCTL32_Command_struct __user *) arg;
  985. IOCTL_Command_struct arg64;
  986. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  987. int err;
  988. u32 cp;
  989. err = 0;
  990. err |=
  991. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  992. sizeof(arg64.LUN_info));
  993. err |=
  994. copy_from_user(&arg64.Request, &arg32->Request,
  995. sizeof(arg64.Request));
  996. err |=
  997. copy_from_user(&arg64.error_info, &arg32->error_info,
  998. sizeof(arg64.error_info));
  999. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1000. err |= get_user(cp, &arg32->buf);
  1001. arg64.buf = compat_ptr(cp);
  1002. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1003. if (err)
  1004. return -EFAULT;
  1005. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  1006. if (err)
  1007. return err;
  1008. err |=
  1009. copy_in_user(&arg32->error_info, &p->error_info,
  1010. sizeof(arg32->error_info));
  1011. if (err)
  1012. return -EFAULT;
  1013. return err;
  1014. }
  1015. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  1016. unsigned cmd, unsigned long arg)
  1017. {
  1018. BIG_IOCTL32_Command_struct __user *arg32 =
  1019. (BIG_IOCTL32_Command_struct __user *) arg;
  1020. BIG_IOCTL_Command_struct arg64;
  1021. BIG_IOCTL_Command_struct __user *p =
  1022. compat_alloc_user_space(sizeof(arg64));
  1023. int err;
  1024. u32 cp;
  1025. err = 0;
  1026. err |=
  1027. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  1028. sizeof(arg64.LUN_info));
  1029. err |=
  1030. copy_from_user(&arg64.Request, &arg32->Request,
  1031. sizeof(arg64.Request));
  1032. err |=
  1033. copy_from_user(&arg64.error_info, &arg32->error_info,
  1034. sizeof(arg64.error_info));
  1035. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1036. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  1037. err |= get_user(cp, &arg32->buf);
  1038. arg64.buf = compat_ptr(cp);
  1039. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1040. if (err)
  1041. return -EFAULT;
  1042. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  1043. if (err)
  1044. return err;
  1045. err |=
  1046. copy_in_user(&arg32->error_info, &p->error_info,
  1047. sizeof(arg32->error_info));
  1048. if (err)
  1049. return -EFAULT;
  1050. return err;
  1051. }
  1052. #endif
  1053. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1054. {
  1055. drive_info_struct *drv = get_drv(bdev->bd_disk);
  1056. if (!drv->cylinders)
  1057. return -ENXIO;
  1058. geo->heads = drv->heads;
  1059. geo->sectors = drv->sectors;
  1060. geo->cylinders = drv->cylinders;
  1061. return 0;
  1062. }
  1063. static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  1064. {
  1065. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1066. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  1067. (void)check_for_unit_attention(h, c);
  1068. }
  1069. /*
  1070. * ioctl
  1071. */
  1072. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  1073. unsigned int cmd, unsigned long arg)
  1074. {
  1075. struct gendisk *disk = bdev->bd_disk;
  1076. ctlr_info_t *h = get_host(disk);
  1077. drive_info_struct *drv = get_drv(disk);
  1078. void __user *argp = (void __user *)arg;
  1079. dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
  1080. cmd, arg);
  1081. switch (cmd) {
  1082. case CCISS_GETPCIINFO:
  1083. {
  1084. cciss_pci_info_struct pciinfo;
  1085. if (!arg)
  1086. return -EINVAL;
  1087. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  1088. pciinfo.bus = h->pdev->bus->number;
  1089. pciinfo.dev_fn = h->pdev->devfn;
  1090. pciinfo.board_id = h->board_id;
  1091. if (copy_to_user
  1092. (argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  1093. return -EFAULT;
  1094. return 0;
  1095. }
  1096. case CCISS_GETINTINFO:
  1097. {
  1098. cciss_coalint_struct intinfo;
  1099. if (!arg)
  1100. return -EINVAL;
  1101. intinfo.delay =
  1102. readl(&h->cfgtable->HostWrite.CoalIntDelay);
  1103. intinfo.count =
  1104. readl(&h->cfgtable->HostWrite.CoalIntCount);
  1105. if (copy_to_user
  1106. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  1107. return -EFAULT;
  1108. return 0;
  1109. }
  1110. case CCISS_SETINTINFO:
  1111. {
  1112. cciss_coalint_struct intinfo;
  1113. unsigned long flags;
  1114. int i;
  1115. if (!arg)
  1116. return -EINVAL;
  1117. if (!capable(CAP_SYS_ADMIN))
  1118. return -EPERM;
  1119. if (copy_from_user
  1120. (&intinfo, argp, sizeof(cciss_coalint_struct)))
  1121. return -EFAULT;
  1122. if ((intinfo.delay == 0) && (intinfo.count == 0))
  1123. return -EINVAL;
  1124. spin_lock_irqsave(&h->lock, flags);
  1125. /* Update the field, and then ring the doorbell */
  1126. writel(intinfo.delay,
  1127. &(h->cfgtable->HostWrite.CoalIntDelay));
  1128. writel(intinfo.count,
  1129. &(h->cfgtable->HostWrite.CoalIntCount));
  1130. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1131. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1132. if (!(readl(h->vaddr + SA5_DOORBELL)
  1133. & CFGTBL_ChangeReq))
  1134. break;
  1135. /* delay and try again */
  1136. udelay(1000);
  1137. }
  1138. spin_unlock_irqrestore(&h->lock, flags);
  1139. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1140. return -EAGAIN;
  1141. return 0;
  1142. }
  1143. case CCISS_GETNODENAME:
  1144. {
  1145. NodeName_type NodeName;
  1146. int i;
  1147. if (!arg)
  1148. return -EINVAL;
  1149. for (i = 0; i < 16; i++)
  1150. NodeName[i] =
  1151. readb(&h->cfgtable->ServerName[i]);
  1152. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  1153. return -EFAULT;
  1154. return 0;
  1155. }
  1156. case CCISS_SETNODENAME:
  1157. {
  1158. NodeName_type NodeName;
  1159. unsigned long flags;
  1160. int i;
  1161. if (!arg)
  1162. return -EINVAL;
  1163. if (!capable(CAP_SYS_ADMIN))
  1164. return -EPERM;
  1165. if (copy_from_user
  1166. (NodeName, argp, sizeof(NodeName_type)))
  1167. return -EFAULT;
  1168. spin_lock_irqsave(&h->lock, flags);
  1169. /* Update the field, and then ring the doorbell */
  1170. for (i = 0; i < 16; i++)
  1171. writeb(NodeName[i],
  1172. &h->cfgtable->ServerName[i]);
  1173. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1174. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1175. if (!(readl(h->vaddr + SA5_DOORBELL)
  1176. & CFGTBL_ChangeReq))
  1177. break;
  1178. /* delay and try again */
  1179. udelay(1000);
  1180. }
  1181. spin_unlock_irqrestore(&h->lock, flags);
  1182. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1183. return -EAGAIN;
  1184. return 0;
  1185. }
  1186. case CCISS_GETHEARTBEAT:
  1187. {
  1188. Heartbeat_type heartbeat;
  1189. if (!arg)
  1190. return -EINVAL;
  1191. heartbeat = readl(&h->cfgtable->HeartBeat);
  1192. if (copy_to_user
  1193. (argp, &heartbeat, sizeof(Heartbeat_type)))
  1194. return -EFAULT;
  1195. return 0;
  1196. }
  1197. case CCISS_GETBUSTYPES:
  1198. {
  1199. BusTypes_type BusTypes;
  1200. if (!arg)
  1201. return -EINVAL;
  1202. BusTypes = readl(&h->cfgtable->BusTypes);
  1203. if (copy_to_user
  1204. (argp, &BusTypes, sizeof(BusTypes_type)))
  1205. return -EFAULT;
  1206. return 0;
  1207. }
  1208. case CCISS_GETFIRMVER:
  1209. {
  1210. FirmwareVer_type firmware;
  1211. if (!arg)
  1212. return -EINVAL;
  1213. memcpy(firmware, h->firm_ver, 4);
  1214. if (copy_to_user
  1215. (argp, firmware, sizeof(FirmwareVer_type)))
  1216. return -EFAULT;
  1217. return 0;
  1218. }
  1219. case CCISS_GETDRIVVER:
  1220. {
  1221. DriverVer_type DriverVer = DRIVER_VERSION;
  1222. if (!arg)
  1223. return -EINVAL;
  1224. if (copy_to_user
  1225. (argp, &DriverVer, sizeof(DriverVer_type)))
  1226. return -EFAULT;
  1227. return 0;
  1228. }
  1229. case CCISS_DEREGDISK:
  1230. case CCISS_REGNEWD:
  1231. case CCISS_REVALIDVOLS:
  1232. return rebuild_lun_table(h, 0, 1);
  1233. case CCISS_GETLUNINFO:{
  1234. LogvolInfo_struct luninfo;
  1235. memcpy(&luninfo.LunID, drv->LunID,
  1236. sizeof(luninfo.LunID));
  1237. luninfo.num_opens = drv->usage_count;
  1238. luninfo.num_parts = 0;
  1239. if (copy_to_user(argp, &luninfo,
  1240. sizeof(LogvolInfo_struct)))
  1241. return -EFAULT;
  1242. return 0;
  1243. }
  1244. case CCISS_PASSTHRU:
  1245. {
  1246. IOCTL_Command_struct iocommand;
  1247. CommandList_struct *c;
  1248. char *buff = NULL;
  1249. u64bit temp64;
  1250. DECLARE_COMPLETION_ONSTACK(wait);
  1251. if (!arg)
  1252. return -EINVAL;
  1253. if (!capable(CAP_SYS_RAWIO))
  1254. return -EPERM;
  1255. if (copy_from_user
  1256. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1257. return -EFAULT;
  1258. if ((iocommand.buf_size < 1) &&
  1259. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1260. return -EINVAL;
  1261. }
  1262. #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
  1263. /* Check kmalloc limits */
  1264. if (iocommand.buf_size > 128000)
  1265. return -EINVAL;
  1266. #endif
  1267. if (iocommand.buf_size > 0) {
  1268. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1269. if (buff == NULL)
  1270. return -EFAULT;
  1271. }
  1272. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1273. /* Copy the data into the buffer we created */
  1274. if (copy_from_user
  1275. (buff, iocommand.buf, iocommand.buf_size)) {
  1276. kfree(buff);
  1277. return -EFAULT;
  1278. }
  1279. } else {
  1280. memset(buff, 0, iocommand.buf_size);
  1281. }
  1282. c = cmd_special_alloc(h);
  1283. if (!c) {
  1284. kfree(buff);
  1285. return -ENOMEM;
  1286. }
  1287. /* Fill in the command type */
  1288. c->cmd_type = CMD_IOCTL_PEND;
  1289. /* Fill in Command Header */
  1290. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1291. if (iocommand.buf_size > 0) /* buffer to fill */
  1292. {
  1293. c->Header.SGList = 1;
  1294. c->Header.SGTotal = 1;
  1295. } else /* no buffers to fill */
  1296. {
  1297. c->Header.SGList = 0;
  1298. c->Header.SGTotal = 0;
  1299. }
  1300. c->Header.LUN = iocommand.LUN_info;
  1301. /* use the kernel address the cmd block for tag */
  1302. c->Header.Tag.lower = c->busaddr;
  1303. /* Fill in Request block */
  1304. c->Request = iocommand.Request;
  1305. /* Fill in the scatter gather information */
  1306. if (iocommand.buf_size > 0) {
  1307. temp64.val = pci_map_single(h->pdev, buff,
  1308. iocommand.buf_size,
  1309. PCI_DMA_BIDIRECTIONAL);
  1310. c->SG[0].Addr.lower = temp64.val32.lower;
  1311. c->SG[0].Addr.upper = temp64.val32.upper;
  1312. c->SG[0].Len = iocommand.buf_size;
  1313. c->SG[0].Ext = 0; /* we are not chaining */
  1314. }
  1315. c->waiting = &wait;
  1316. enqueue_cmd_and_start_io(h, c);
  1317. wait_for_completion(&wait);
  1318. /* unlock the buffers from DMA */
  1319. temp64.val32.lower = c->SG[0].Addr.lower;
  1320. temp64.val32.upper = c->SG[0].Addr.upper;
  1321. pci_unmap_single(h->pdev, (dma_addr_t) temp64.val,
  1322. iocommand.buf_size,
  1323. PCI_DMA_BIDIRECTIONAL);
  1324. check_ioctl_unit_attention(h, c);
  1325. /* Copy the error information out */
  1326. iocommand.error_info = *(c->err_info);
  1327. if (copy_to_user
  1328. (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1329. kfree(buff);
  1330. cmd_special_free(h, c);
  1331. return -EFAULT;
  1332. }
  1333. if (iocommand.Request.Type.Direction == XFER_READ) {
  1334. /* Copy the data out of the buffer we created */
  1335. if (copy_to_user
  1336. (iocommand.buf, buff, iocommand.buf_size)) {
  1337. kfree(buff);
  1338. cmd_special_free(h, c);
  1339. return -EFAULT;
  1340. }
  1341. }
  1342. kfree(buff);
  1343. cmd_special_free(h, c);
  1344. return 0;
  1345. }
  1346. case CCISS_BIG_PASSTHRU:{
  1347. BIG_IOCTL_Command_struct *ioc;
  1348. CommandList_struct *c;
  1349. unsigned char **buff = NULL;
  1350. int *buff_size = NULL;
  1351. u64bit temp64;
  1352. BYTE sg_used = 0;
  1353. int status = 0;
  1354. int i;
  1355. DECLARE_COMPLETION_ONSTACK(wait);
  1356. __u32 left;
  1357. __u32 sz;
  1358. BYTE __user *data_ptr;
  1359. if (!arg)
  1360. return -EINVAL;
  1361. if (!capable(CAP_SYS_RAWIO))
  1362. return -EPERM;
  1363. ioc = (BIG_IOCTL_Command_struct *)
  1364. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1365. if (!ioc) {
  1366. status = -ENOMEM;
  1367. goto cleanup1;
  1368. }
  1369. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1370. status = -EFAULT;
  1371. goto cleanup1;
  1372. }
  1373. if ((ioc->buf_size < 1) &&
  1374. (ioc->Request.Type.Direction != XFER_NONE)) {
  1375. status = -EINVAL;
  1376. goto cleanup1;
  1377. }
  1378. /* Check kmalloc limits using all SGs */
  1379. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1380. status = -EINVAL;
  1381. goto cleanup1;
  1382. }
  1383. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1384. status = -EINVAL;
  1385. goto cleanup1;
  1386. }
  1387. buff =
  1388. kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1389. if (!buff) {
  1390. status = -ENOMEM;
  1391. goto cleanup1;
  1392. }
  1393. buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
  1394. GFP_KERNEL);
  1395. if (!buff_size) {
  1396. status = -ENOMEM;
  1397. goto cleanup1;
  1398. }
  1399. left = ioc->buf_size;
  1400. data_ptr = ioc->buf;
  1401. while (left) {
  1402. sz = (left >
  1403. ioc->malloc_size) ? ioc->
  1404. malloc_size : left;
  1405. buff_size[sg_used] = sz;
  1406. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1407. if (buff[sg_used] == NULL) {
  1408. status = -ENOMEM;
  1409. goto cleanup1;
  1410. }
  1411. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1412. if (copy_from_user
  1413. (buff[sg_used], data_ptr, sz)) {
  1414. status = -EFAULT;
  1415. goto cleanup1;
  1416. }
  1417. } else {
  1418. memset(buff[sg_used], 0, sz);
  1419. }
  1420. left -= sz;
  1421. data_ptr += sz;
  1422. sg_used++;
  1423. }
  1424. c = cmd_special_alloc(h);
  1425. if (!c) {
  1426. status = -ENOMEM;
  1427. goto cleanup1;
  1428. }
  1429. c->cmd_type = CMD_IOCTL_PEND;
  1430. c->Header.ReplyQueue = 0;
  1431. if (ioc->buf_size > 0) {
  1432. c->Header.SGList = sg_used;
  1433. c->Header.SGTotal = sg_used;
  1434. } else {
  1435. c->Header.SGList = 0;
  1436. c->Header.SGTotal = 0;
  1437. }
  1438. c->Header.LUN = ioc->LUN_info;
  1439. c->Header.Tag.lower = c->busaddr;
  1440. c->Request = ioc->Request;
  1441. if (ioc->buf_size > 0) {
  1442. for (i = 0; i < sg_used; i++) {
  1443. temp64.val =
  1444. pci_map_single(h->pdev, buff[i],
  1445. buff_size[i],
  1446. PCI_DMA_BIDIRECTIONAL);
  1447. c->SG[i].Addr.lower =
  1448. temp64.val32.lower;
  1449. c->SG[i].Addr.upper =
  1450. temp64.val32.upper;
  1451. c->SG[i].Len = buff_size[i];
  1452. c->SG[i].Ext = 0; /* we are not chaining */
  1453. }
  1454. }
  1455. c->waiting = &wait;
  1456. enqueue_cmd_and_start_io(h, c);
  1457. wait_for_completion(&wait);
  1458. /* unlock the buffers from DMA */
  1459. for (i = 0; i < sg_used; i++) {
  1460. temp64.val32.lower = c->SG[i].Addr.lower;
  1461. temp64.val32.upper = c->SG[i].Addr.upper;
  1462. pci_unmap_single(h->pdev,
  1463. (dma_addr_t) temp64.val, buff_size[i],
  1464. PCI_DMA_BIDIRECTIONAL);
  1465. }
  1466. check_ioctl_unit_attention(h, c);
  1467. /* Copy the error information out */
  1468. ioc->error_info = *(c->err_info);
  1469. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1470. cmd_special_free(h, c);
  1471. status = -EFAULT;
  1472. goto cleanup1;
  1473. }
  1474. if (ioc->Request.Type.Direction == XFER_READ) {
  1475. /* Copy the data out of the buffer we created */
  1476. BYTE __user *ptr = ioc->buf;
  1477. for (i = 0; i < sg_used; i++) {
  1478. if (copy_to_user
  1479. (ptr, buff[i], buff_size[i])) {
  1480. cmd_special_free(h, c);
  1481. status = -EFAULT;
  1482. goto cleanup1;
  1483. }
  1484. ptr += buff_size[i];
  1485. }
  1486. }
  1487. cmd_special_free(h, c);
  1488. status = 0;
  1489. cleanup1:
  1490. if (buff) {
  1491. for (i = 0; i < sg_used; i++)
  1492. kfree(buff[i]);
  1493. kfree(buff);
  1494. }
  1495. kfree(buff_size);
  1496. kfree(ioc);
  1497. return status;
  1498. }
  1499. /* scsi_cmd_ioctl handles these, below, though some are not */
  1500. /* very meaningful for cciss. SG_IO is the main one people want. */
  1501. case SG_GET_VERSION_NUM:
  1502. case SG_SET_TIMEOUT:
  1503. case SG_GET_TIMEOUT:
  1504. case SG_GET_RESERVED_SIZE:
  1505. case SG_SET_RESERVED_SIZE:
  1506. case SG_EMULATED_HOST:
  1507. case SG_IO:
  1508. case SCSI_IOCTL_SEND_COMMAND:
  1509. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1510. /* scsi_cmd_ioctl would normally handle these, below, but */
  1511. /* they aren't a good fit for cciss, as CD-ROMs are */
  1512. /* not supported, and we don't have any bus/target/lun */
  1513. /* which we present to the kernel. */
  1514. case CDROM_SEND_PACKET:
  1515. case CDROMCLOSETRAY:
  1516. case CDROMEJECT:
  1517. case SCSI_IOCTL_GET_IDLUN:
  1518. case SCSI_IOCTL_GET_BUS_NUMBER:
  1519. default:
  1520. return -ENOTTY;
  1521. }
  1522. }
  1523. static void cciss_check_queues(ctlr_info_t *h)
  1524. {
  1525. int start_queue = h->next_to_run;
  1526. int i;
  1527. /* check to see if we have maxed out the number of commands that can
  1528. * be placed on the queue. If so then exit. We do this check here
  1529. * in case the interrupt we serviced was from an ioctl and did not
  1530. * free any new commands.
  1531. */
  1532. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1533. return;
  1534. /* We have room on the queue for more commands. Now we need to queue
  1535. * them up. We will also keep track of the next queue to run so
  1536. * that every queue gets a chance to be started first.
  1537. */
  1538. for (i = 0; i < h->highest_lun + 1; i++) {
  1539. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1540. /* make sure the disk has been added and the drive is real
  1541. * because this can be called from the middle of init_one.
  1542. */
  1543. if (!h->drv[curr_queue])
  1544. continue;
  1545. if (!(h->drv[curr_queue]->queue) ||
  1546. !(h->drv[curr_queue]->heads))
  1547. continue;
  1548. blk_start_queue(h->gendisk[curr_queue]->queue);
  1549. /* check to see if we have maxed out the number of commands
  1550. * that can be placed on the queue.
  1551. */
  1552. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1553. if (curr_queue == start_queue) {
  1554. h->next_to_run =
  1555. (start_queue + 1) % (h->highest_lun + 1);
  1556. break;
  1557. } else {
  1558. h->next_to_run = curr_queue;
  1559. break;
  1560. }
  1561. }
  1562. }
  1563. }
  1564. static void cciss_softirq_done(struct request *rq)
  1565. {
  1566. CommandList_struct *c = rq->completion_data;
  1567. ctlr_info_t *h = hba[c->ctlr];
  1568. SGDescriptor_struct *curr_sg = c->SG;
  1569. u64bit temp64;
  1570. unsigned long flags;
  1571. int i, ddir;
  1572. int sg_index = 0;
  1573. if (c->Request.Type.Direction == XFER_READ)
  1574. ddir = PCI_DMA_FROMDEVICE;
  1575. else
  1576. ddir = PCI_DMA_TODEVICE;
  1577. /* command did not need to be retried */
  1578. /* unmap the DMA mapping for all the scatter gather elements */
  1579. for (i = 0; i < c->Header.SGList; i++) {
  1580. if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
  1581. cciss_unmap_sg_chain_block(h, c);
  1582. /* Point to the next block */
  1583. curr_sg = h->cmd_sg_list[c->cmdindex];
  1584. sg_index = 0;
  1585. }
  1586. temp64.val32.lower = curr_sg[sg_index].Addr.lower;
  1587. temp64.val32.upper = curr_sg[sg_index].Addr.upper;
  1588. pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
  1589. ddir);
  1590. ++sg_index;
  1591. }
  1592. dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
  1593. /* set the residual count for pc requests */
  1594. if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
  1595. rq->resid_len = c->err_info->ResidualCnt;
  1596. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1597. spin_lock_irqsave(&h->lock, flags);
  1598. cmd_free(h, c);
  1599. cciss_check_queues(h);
  1600. spin_unlock_irqrestore(&h->lock, flags);
  1601. }
  1602. static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
  1603. unsigned char scsi3addr[], uint32_t log_unit)
  1604. {
  1605. memcpy(scsi3addr, h->drv[log_unit]->LunID,
  1606. sizeof(h->drv[log_unit]->LunID));
  1607. }
  1608. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1609. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1610. * they cannot be read.
  1611. */
  1612. static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
  1613. char *vendor, char *model, char *rev)
  1614. {
  1615. int rc;
  1616. InquiryData_struct *inq_buf;
  1617. unsigned char scsi3addr[8];
  1618. *vendor = '\0';
  1619. *model = '\0';
  1620. *rev = '\0';
  1621. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1622. if (!inq_buf)
  1623. return;
  1624. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1625. rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
  1626. scsi3addr, TYPE_CMD);
  1627. if (rc == IO_OK) {
  1628. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1629. vendor[VENDOR_LEN] = '\0';
  1630. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1631. model[MODEL_LEN] = '\0';
  1632. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1633. rev[REV_LEN] = '\0';
  1634. }
  1635. kfree(inq_buf);
  1636. return;
  1637. }
  1638. /* This function gets the serial number of a logical drive via
  1639. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1640. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1641. * are returned instead.
  1642. */
  1643. static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
  1644. unsigned char *serial_no, int buflen)
  1645. {
  1646. #define PAGE_83_INQ_BYTES 64
  1647. int rc;
  1648. unsigned char *buf;
  1649. unsigned char scsi3addr[8];
  1650. if (buflen > 16)
  1651. buflen = 16;
  1652. memset(serial_no, 0xff, buflen);
  1653. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1654. if (!buf)
  1655. return;
  1656. memset(serial_no, 0, buflen);
  1657. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1658. rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
  1659. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1660. if (rc == IO_OK)
  1661. memcpy(serial_no, &buf[8], buflen);
  1662. kfree(buf);
  1663. return;
  1664. }
  1665. /*
  1666. * cciss_add_disk sets up the block device queue for a logical drive
  1667. */
  1668. static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1669. int drv_index)
  1670. {
  1671. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1672. if (!disk->queue)
  1673. goto init_queue_failure;
  1674. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1675. disk->major = h->major;
  1676. disk->first_minor = drv_index << NWD_SHIFT;
  1677. disk->fops = &cciss_fops;
  1678. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1679. goto cleanup_queue;
  1680. disk->private_data = h->drv[drv_index];
  1681. disk->driverfs_dev = &h->drv[drv_index]->dev;
  1682. /* Set up queue information */
  1683. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1684. /* This is a hardware imposed limit. */
  1685. blk_queue_max_segments(disk->queue, h->maxsgentries);
  1686. blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
  1687. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1688. disk->queue->queuedata = h;
  1689. blk_queue_logical_block_size(disk->queue,
  1690. h->drv[drv_index]->block_size);
  1691. /* Make sure all queue data is written out before */
  1692. /* setting h->drv[drv_index]->queue, as setting this */
  1693. /* allows the interrupt handler to start the queue */
  1694. wmb();
  1695. h->drv[drv_index]->queue = disk->queue;
  1696. add_disk(disk);
  1697. return 0;
  1698. cleanup_queue:
  1699. blk_cleanup_queue(disk->queue);
  1700. disk->queue = NULL;
  1701. init_queue_failure:
  1702. return -1;
  1703. }
  1704. /* This function will check the usage_count of the drive to be updated/added.
  1705. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1706. * the drive's capacity, geometry, or serial number has changed,
  1707. * then the drive information will be updated and the disk will be
  1708. * re-registered with the kernel. If these conditions don't hold,
  1709. * then it will be left alone for the next reboot. The exception to this
  1710. * is disk 0 which will always be left registered with the kernel since it
  1711. * is also the controller node. Any changes to disk 0 will show up on
  1712. * the next reboot.
  1713. */
  1714. static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
  1715. int first_time, int via_ioctl)
  1716. {
  1717. struct gendisk *disk;
  1718. InquiryData_struct *inq_buff = NULL;
  1719. unsigned int block_size;
  1720. sector_t total_size;
  1721. unsigned long flags = 0;
  1722. int ret = 0;
  1723. drive_info_struct *drvinfo;
  1724. /* Get information about the disk and modify the driver structure */
  1725. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1726. drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
  1727. if (inq_buff == NULL || drvinfo == NULL)
  1728. goto mem_msg;
  1729. /* testing to see if 16-byte CDBs are already being used */
  1730. if (h->cciss_read == CCISS_READ_16) {
  1731. cciss_read_capacity_16(h, drv_index,
  1732. &total_size, &block_size);
  1733. } else {
  1734. cciss_read_capacity(h, drv_index, &total_size, &block_size);
  1735. /* if read_capacity returns all F's this volume is >2TB */
  1736. /* in size so we switch to 16-byte CDB's for all */
  1737. /* read/write ops */
  1738. if (total_size == 0xFFFFFFFFULL) {
  1739. cciss_read_capacity_16(h, drv_index,
  1740. &total_size, &block_size);
  1741. h->cciss_read = CCISS_READ_16;
  1742. h->cciss_write = CCISS_WRITE_16;
  1743. } else {
  1744. h->cciss_read = CCISS_READ_10;
  1745. h->cciss_write = CCISS_WRITE_10;
  1746. }
  1747. }
  1748. cciss_geometry_inquiry(h, drv_index, total_size, block_size,
  1749. inq_buff, drvinfo);
  1750. drvinfo->block_size = block_size;
  1751. drvinfo->nr_blocks = total_size + 1;
  1752. cciss_get_device_descr(h, drv_index, drvinfo->vendor,
  1753. drvinfo->model, drvinfo->rev);
  1754. cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
  1755. sizeof(drvinfo->serial_no));
  1756. /* Save the lunid in case we deregister the disk, below. */
  1757. memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
  1758. sizeof(drvinfo->LunID));
  1759. /* Is it the same disk we already know, and nothing's changed? */
  1760. if (h->drv[drv_index]->raid_level != -1 &&
  1761. ((memcmp(drvinfo->serial_no,
  1762. h->drv[drv_index]->serial_no, 16) == 0) &&
  1763. drvinfo->block_size == h->drv[drv_index]->block_size &&
  1764. drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
  1765. drvinfo->heads == h->drv[drv_index]->heads &&
  1766. drvinfo->sectors == h->drv[drv_index]->sectors &&
  1767. drvinfo->cylinders == h->drv[drv_index]->cylinders))
  1768. /* The disk is unchanged, nothing to update */
  1769. goto freeret;
  1770. /* If we get here it's not the same disk, or something's changed,
  1771. * so we need to * deregister it, and re-register it, if it's not
  1772. * in use.
  1773. * If the disk already exists then deregister it before proceeding
  1774. * (unless it's the first disk (for the controller node).
  1775. */
  1776. if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
  1777. dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
  1778. spin_lock_irqsave(&h->lock, flags);
  1779. h->drv[drv_index]->busy_configuring = 1;
  1780. spin_unlock_irqrestore(&h->lock, flags);
  1781. /* deregister_disk sets h->drv[drv_index]->queue = NULL
  1782. * which keeps the interrupt handler from starting
  1783. * the queue.
  1784. */
  1785. ret = deregister_disk(h, drv_index, 0, via_ioctl);
  1786. }
  1787. /* If the disk is in use return */
  1788. if (ret)
  1789. goto freeret;
  1790. /* Save the new information from cciss_geometry_inquiry
  1791. * and serial number inquiry. If the disk was deregistered
  1792. * above, then h->drv[drv_index] will be NULL.
  1793. */
  1794. if (h->drv[drv_index] == NULL) {
  1795. drvinfo->device_initialized = 0;
  1796. h->drv[drv_index] = drvinfo;
  1797. drvinfo = NULL; /* so it won't be freed below. */
  1798. } else {
  1799. /* special case for cxd0 */
  1800. h->drv[drv_index]->block_size = drvinfo->block_size;
  1801. h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
  1802. h->drv[drv_index]->heads = drvinfo->heads;
  1803. h->drv[drv_index]->sectors = drvinfo->sectors;
  1804. h->drv[drv_index]->cylinders = drvinfo->cylinders;
  1805. h->drv[drv_index]->raid_level = drvinfo->raid_level;
  1806. memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
  1807. memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
  1808. VENDOR_LEN + 1);
  1809. memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
  1810. memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
  1811. }
  1812. ++h->num_luns;
  1813. disk = h->gendisk[drv_index];
  1814. set_capacity(disk, h->drv[drv_index]->nr_blocks);
  1815. /* If it's not disk 0 (drv_index != 0)
  1816. * or if it was disk 0, but there was previously
  1817. * no actual corresponding configured logical drive
  1818. * (raid_leve == -1) then we want to update the
  1819. * logical drive's information.
  1820. */
  1821. if (drv_index || first_time) {
  1822. if (cciss_add_disk(h, disk, drv_index) != 0) {
  1823. cciss_free_gendisk(h, drv_index);
  1824. cciss_free_drive_info(h, drv_index);
  1825. dev_warn(&h->pdev->dev, "could not update disk %d\n",
  1826. drv_index);
  1827. --h->num_luns;
  1828. }
  1829. }
  1830. freeret:
  1831. kfree(inq_buff);
  1832. kfree(drvinfo);
  1833. return;
  1834. mem_msg:
  1835. dev_err(&h->pdev->dev, "out of memory\n");
  1836. goto freeret;
  1837. }
  1838. /* This function will find the first index of the controllers drive array
  1839. * that has a null drv pointer and allocate the drive info struct and
  1840. * will return that index This is where new drives will be added.
  1841. * If the index to be returned is greater than the highest_lun index for
  1842. * the controller then highest_lun is set * to this new index.
  1843. * If there are no available indexes or if tha allocation fails, then -1
  1844. * is returned. * "controller_node" is used to know if this is a real
  1845. * logical drive, or just the controller node, which determines if this
  1846. * counts towards highest_lun.
  1847. */
  1848. static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
  1849. {
  1850. int i;
  1851. drive_info_struct *drv;
  1852. /* Search for an empty slot for our drive info */
  1853. for (i = 0; i < CISS_MAX_LUN; i++) {
  1854. /* if not cxd0 case, and it's occupied, skip it. */
  1855. if (h->drv[i] && i != 0)
  1856. continue;
  1857. /*
  1858. * If it's cxd0 case, and drv is alloc'ed already, and a
  1859. * disk is configured there, skip it.
  1860. */
  1861. if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
  1862. continue;
  1863. /*
  1864. * We've found an empty slot. Update highest_lun
  1865. * provided this isn't just the fake cxd0 controller node.
  1866. */
  1867. if (i > h->highest_lun && !controller_node)
  1868. h->highest_lun = i;
  1869. /* If adding a real disk at cxd0, and it's already alloc'ed */
  1870. if (i == 0 && h->drv[i] != NULL)
  1871. return i;
  1872. /*
  1873. * Found an empty slot, not already alloc'ed. Allocate it.
  1874. * Mark it with raid_level == -1, so we know it's new later on.
  1875. */
  1876. drv = kzalloc(sizeof(*drv), GFP_KERNEL);
  1877. if (!drv)
  1878. return -1;
  1879. drv->raid_level = -1; /* so we know it's new */
  1880. h->drv[i] = drv;
  1881. return i;
  1882. }
  1883. return -1;
  1884. }
  1885. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
  1886. {
  1887. kfree(h->drv[drv_index]);
  1888. h->drv[drv_index] = NULL;
  1889. }
  1890. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
  1891. {
  1892. put_disk(h->gendisk[drv_index]);
  1893. h->gendisk[drv_index] = NULL;
  1894. }
  1895. /* cciss_add_gendisk finds a free hba[]->drv structure
  1896. * and allocates a gendisk if needed, and sets the lunid
  1897. * in the drvinfo structure. It returns the index into
  1898. * the ->drv[] array, or -1 if none are free.
  1899. * is_controller_node indicates whether highest_lun should
  1900. * count this disk, or if it's only being added to provide
  1901. * a means to talk to the controller in case no logical
  1902. * drives have yet been configured.
  1903. */
  1904. static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
  1905. int controller_node)
  1906. {
  1907. int drv_index;
  1908. drv_index = cciss_alloc_drive_info(h, controller_node);
  1909. if (drv_index == -1)
  1910. return -1;
  1911. /*Check if the gendisk needs to be allocated */
  1912. if (!h->gendisk[drv_index]) {
  1913. h->gendisk[drv_index] =
  1914. alloc_disk(1 << NWD_SHIFT);
  1915. if (!h->gendisk[drv_index]) {
  1916. dev_err(&h->pdev->dev,
  1917. "could not allocate a new disk %d\n",
  1918. drv_index);
  1919. goto err_free_drive_info;
  1920. }
  1921. }
  1922. memcpy(h->drv[drv_index]->LunID, lunid,
  1923. sizeof(h->drv[drv_index]->LunID));
  1924. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1925. goto err_free_disk;
  1926. /* Don't need to mark this busy because nobody */
  1927. /* else knows about this disk yet to contend */
  1928. /* for access to it. */
  1929. h->drv[drv_index]->busy_configuring = 0;
  1930. wmb();
  1931. return drv_index;
  1932. err_free_disk:
  1933. cciss_free_gendisk(h, drv_index);
  1934. err_free_drive_info:
  1935. cciss_free_drive_info(h, drv_index);
  1936. return -1;
  1937. }
  1938. /* This is for the special case of a controller which
  1939. * has no logical drives. In this case, we still need
  1940. * to register a disk so the controller can be accessed
  1941. * by the Array Config Utility.
  1942. */
  1943. static void cciss_add_controller_node(ctlr_info_t *h)
  1944. {
  1945. struct gendisk *disk;
  1946. int drv_index;
  1947. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1948. return;
  1949. drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
  1950. if (drv_index == -1)
  1951. goto error;
  1952. h->drv[drv_index]->block_size = 512;
  1953. h->drv[drv_index]->nr_blocks = 0;
  1954. h->drv[drv_index]->heads = 0;
  1955. h->drv[drv_index]->sectors = 0;
  1956. h->drv[drv_index]->cylinders = 0;
  1957. h->drv[drv_index]->raid_level = -1;
  1958. memset(h->drv[drv_index]->serial_no, 0, 16);
  1959. disk = h->gendisk[drv_index];
  1960. if (cciss_add_disk(h, disk, drv_index) == 0)
  1961. return;
  1962. cciss_free_gendisk(h, drv_index);
  1963. cciss_free_drive_info(h, drv_index);
  1964. error:
  1965. dev_warn(&h->pdev->dev, "could not add disk 0.\n");
  1966. return;
  1967. }
  1968. /* This function will add and remove logical drives from the Logical
  1969. * drive array of the controller and maintain persistency of ordering
  1970. * so that mount points are preserved until the next reboot. This allows
  1971. * for the removal of logical drives in the middle of the drive array
  1972. * without a re-ordering of those drives.
  1973. * INPUT
  1974. * h = The controller to perform the operations on
  1975. */
  1976. static int rebuild_lun_table(ctlr_info_t *h, int first_time,
  1977. int via_ioctl)
  1978. {
  1979. int num_luns;
  1980. ReportLunData_struct *ld_buff = NULL;
  1981. int return_code;
  1982. int listlength = 0;
  1983. int i;
  1984. int drv_found;
  1985. int drv_index = 0;
  1986. unsigned char lunid[8] = CTLR_LUNID;
  1987. unsigned long flags;
  1988. if (!capable(CAP_SYS_RAWIO))
  1989. return -EPERM;
  1990. /* Set busy_configuring flag for this operation */
  1991. spin_lock_irqsave(&h->lock, flags);
  1992. if (h->busy_configuring) {
  1993. spin_unlock_irqrestore(&h->lock, flags);
  1994. return -EBUSY;
  1995. }
  1996. h->busy_configuring = 1;
  1997. spin_unlock_irqrestore(&h->lock, flags);
  1998. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1999. if (ld_buff == NULL)
  2000. goto mem_msg;
  2001. return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
  2002. sizeof(ReportLunData_struct),
  2003. 0, CTLR_LUNID, TYPE_CMD);
  2004. if (return_code == IO_OK)
  2005. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  2006. else { /* reading number of logical volumes failed */
  2007. dev_warn(&h->pdev->dev,
  2008. "report logical volume command failed\n");
  2009. listlength = 0;
  2010. goto freeret;
  2011. }
  2012. num_luns = listlength / 8; /* 8 bytes per entry */
  2013. if (num_luns > CISS_MAX_LUN) {
  2014. num_luns = CISS_MAX_LUN;
  2015. dev_warn(&h->pdev->dev, "more luns configured"
  2016. " on controller than can be handled by"
  2017. " this driver.\n");
  2018. }
  2019. if (num_luns == 0)
  2020. cciss_add_controller_node(h);
  2021. /* Compare controller drive array to driver's drive array
  2022. * to see if any drives are missing on the controller due
  2023. * to action of Array Config Utility (user deletes drive)
  2024. * and deregister logical drives which have disappeared.
  2025. */
  2026. for (i = 0; i <= h->highest_lun; i++) {
  2027. int j;
  2028. drv_found = 0;
  2029. /* skip holes in the array from already deleted drives */
  2030. if (h->drv[i] == NULL)
  2031. continue;
  2032. for (j = 0; j < num_luns; j++) {
  2033. memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
  2034. if (memcmp(h->drv[i]->LunID, lunid,
  2035. sizeof(lunid)) == 0) {
  2036. drv_found = 1;
  2037. break;
  2038. }
  2039. }
  2040. if (!drv_found) {
  2041. /* Deregister it from the OS, it's gone. */
  2042. spin_lock_irqsave(&h->lock, flags);
  2043. h->drv[i]->busy_configuring = 1;
  2044. spin_unlock_irqrestore(&h->lock, flags);
  2045. return_code = deregister_disk(h, i, 1, via_ioctl);
  2046. if (h->drv[i] != NULL)
  2047. h->drv[i]->busy_configuring = 0;
  2048. }
  2049. }
  2050. /* Compare controller drive array to driver's drive array.
  2051. * Check for updates in the drive information and any new drives
  2052. * on the controller due to ACU adding logical drives, or changing
  2053. * a logical drive's size, etc. Reregister any new/changed drives
  2054. */
  2055. for (i = 0; i < num_luns; i++) {
  2056. int j;
  2057. drv_found = 0;
  2058. memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
  2059. /* Find if the LUN is already in the drive array
  2060. * of the driver. If so then update its info
  2061. * if not in use. If it does not exist then find
  2062. * the first free index and add it.
  2063. */
  2064. for (j = 0; j <= h->highest_lun; j++) {
  2065. if (h->drv[j] != NULL &&
  2066. memcmp(h->drv[j]->LunID, lunid,
  2067. sizeof(h->drv[j]->LunID)) == 0) {
  2068. drv_index = j;
  2069. drv_found = 1;
  2070. break;
  2071. }
  2072. }
  2073. /* check if the drive was found already in the array */
  2074. if (!drv_found) {
  2075. drv_index = cciss_add_gendisk(h, lunid, 0);
  2076. if (drv_index == -1)
  2077. goto freeret;
  2078. }
  2079. cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
  2080. } /* end for */
  2081. freeret:
  2082. kfree(ld_buff);
  2083. h->busy_configuring = 0;
  2084. /* We return -1 here to tell the ACU that we have registered/updated
  2085. * all of the drives that we can and to keep it from calling us
  2086. * additional times.
  2087. */
  2088. return -1;
  2089. mem_msg:
  2090. dev_err(&h->pdev->dev, "out of memory\n");
  2091. h->busy_configuring = 0;
  2092. goto freeret;
  2093. }
  2094. static void cciss_clear_drive_info(drive_info_struct *drive_info)
  2095. {
  2096. /* zero out the disk size info */
  2097. drive_info->nr_blocks = 0;
  2098. drive_info->block_size = 0;
  2099. drive_info->heads = 0;
  2100. drive_info->sectors = 0;
  2101. drive_info->cylinders = 0;
  2102. drive_info->raid_level = -1;
  2103. memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
  2104. memset(drive_info->model, 0, sizeof(drive_info->model));
  2105. memset(drive_info->rev, 0, sizeof(drive_info->rev));
  2106. memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
  2107. /*
  2108. * don't clear the LUNID though, we need to remember which
  2109. * one this one is.
  2110. */
  2111. }
  2112. /* This function will deregister the disk and it's queue from the
  2113. * kernel. It must be called with the controller lock held and the
  2114. * drv structures busy_configuring flag set. It's parameters are:
  2115. *
  2116. * disk = This is the disk to be deregistered
  2117. * drv = This is the drive_info_struct associated with the disk to be
  2118. * deregistered. It contains information about the disk used
  2119. * by the driver.
  2120. * clear_all = This flag determines whether or not the disk information
  2121. * is going to be completely cleared out and the highest_lun
  2122. * reset. Sometimes we want to clear out information about
  2123. * the disk in preparation for re-adding it. In this case
  2124. * the highest_lun should be left unchanged and the LunID
  2125. * should not be cleared.
  2126. * via_ioctl
  2127. * This indicates whether we've reached this path via ioctl.
  2128. * This affects the maximum usage count allowed for c0d0 to be messed with.
  2129. * If this path is reached via ioctl(), then the max_usage_count will
  2130. * be 1, as the process calling ioctl() has got to have the device open.
  2131. * If we get here via sysfs, then the max usage count will be zero.
  2132. */
  2133. static int deregister_disk(ctlr_info_t *h, int drv_index,
  2134. int clear_all, int via_ioctl)
  2135. {
  2136. int i;
  2137. struct gendisk *disk;
  2138. drive_info_struct *drv;
  2139. int recalculate_highest_lun;
  2140. if (!capable(CAP_SYS_RAWIO))
  2141. return -EPERM;
  2142. drv = h->drv[drv_index];
  2143. disk = h->gendisk[drv_index];
  2144. /* make sure logical volume is NOT is use */
  2145. if (clear_all || (h->gendisk[0] == disk)) {
  2146. if (drv->usage_count > via_ioctl)
  2147. return -EBUSY;
  2148. } else if (drv->usage_count > 0)
  2149. return -EBUSY;
  2150. recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
  2151. /* invalidate the devices and deregister the disk. If it is disk
  2152. * zero do not deregister it but just zero out it's values. This
  2153. * allows us to delete disk zero but keep the controller registered.
  2154. */
  2155. if (h->gendisk[0] != disk) {
  2156. struct request_queue *q = disk->queue;
  2157. if (disk->flags & GENHD_FL_UP) {
  2158. cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
  2159. del_gendisk(disk);
  2160. }
  2161. if (q)
  2162. blk_cleanup_queue(q);
  2163. /* If clear_all is set then we are deleting the logical
  2164. * drive, not just refreshing its info. For drives
  2165. * other than disk 0 we will call put_disk. We do not
  2166. * do this for disk 0 as we need it to be able to
  2167. * configure the controller.
  2168. */
  2169. if (clear_all){
  2170. /* This isn't pretty, but we need to find the
  2171. * disk in our array and NULL our the pointer.
  2172. * This is so that we will call alloc_disk if
  2173. * this index is used again later.
  2174. */
  2175. for (i=0; i < CISS_MAX_LUN; i++){
  2176. if (h->gendisk[i] == disk) {
  2177. h->gendisk[i] = NULL;
  2178. break;
  2179. }
  2180. }
  2181. put_disk(disk);
  2182. }
  2183. } else {
  2184. set_capacity(disk, 0);
  2185. cciss_clear_drive_info(drv);
  2186. }
  2187. --h->num_luns;
  2188. /* if it was the last disk, find the new hightest lun */
  2189. if (clear_all && recalculate_highest_lun) {
  2190. int newhighest = -1;
  2191. for (i = 0; i <= h->highest_lun; i++) {
  2192. /* if the disk has size > 0, it is available */
  2193. if (h->drv[i] && h->drv[i]->heads)
  2194. newhighest = i;
  2195. }
  2196. h->highest_lun = newhighest;
  2197. }
  2198. return 0;
  2199. }
  2200. static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
  2201. size_t size, __u8 page_code, unsigned char *scsi3addr,
  2202. int cmd_type)
  2203. {
  2204. u64bit buff_dma_handle;
  2205. int status = IO_OK;
  2206. c->cmd_type = CMD_IOCTL_PEND;
  2207. c->Header.ReplyQueue = 0;
  2208. if (buff != NULL) {
  2209. c->Header.SGList = 1;
  2210. c->Header.SGTotal = 1;
  2211. } else {
  2212. c->Header.SGList = 0;
  2213. c->Header.SGTotal = 0;
  2214. }
  2215. c->Header.Tag.lower = c->busaddr;
  2216. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2217. c->Request.Type.Type = cmd_type;
  2218. if (cmd_type == TYPE_CMD) {
  2219. switch (cmd) {
  2220. case CISS_INQUIRY:
  2221. /* are we trying to read a vital product page */
  2222. if (page_code != 0) {
  2223. c->Request.CDB[1] = 0x01;
  2224. c->Request.CDB[2] = page_code;
  2225. }
  2226. c->Request.CDBLen = 6;
  2227. c->Request.Type.Attribute = ATTR_SIMPLE;
  2228. c->Request.Type.Direction = XFER_READ;
  2229. c->Request.Timeout = 0;
  2230. c->Request.CDB[0] = CISS_INQUIRY;
  2231. c->Request.CDB[4] = size & 0xFF;
  2232. break;
  2233. case CISS_REPORT_LOG:
  2234. case CISS_REPORT_PHYS:
  2235. /* Talking to controller so It's a physical command
  2236. mode = 00 target = 0. Nothing to write.
  2237. */
  2238. c->Request.CDBLen = 12;
  2239. c->Request.Type.Attribute = ATTR_SIMPLE;
  2240. c->Request.Type.Direction = XFER_READ;
  2241. c->Request.Timeout = 0;
  2242. c->Request.CDB[0] = cmd;
  2243. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2244. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2245. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2246. c->Request.CDB[9] = size & 0xFF;
  2247. break;
  2248. case CCISS_READ_CAPACITY:
  2249. c->Request.CDBLen = 10;
  2250. c->Request.Type.Attribute = ATTR_SIMPLE;
  2251. c->Request.Type.Direction = XFER_READ;
  2252. c->Request.Timeout = 0;
  2253. c->Request.CDB[0] = cmd;
  2254. break;
  2255. case CCISS_READ_CAPACITY_16:
  2256. c->Request.CDBLen = 16;
  2257. c->Request.Type.Attribute = ATTR_SIMPLE;
  2258. c->Request.Type.Direction = XFER_READ;
  2259. c->Request.Timeout = 0;
  2260. c->Request.CDB[0] = cmd;
  2261. c->Request.CDB[1] = 0x10;
  2262. c->Request.CDB[10] = (size >> 24) & 0xFF;
  2263. c->Request.CDB[11] = (size >> 16) & 0xFF;
  2264. c->Request.CDB[12] = (size >> 8) & 0xFF;
  2265. c->Request.CDB[13] = size & 0xFF;
  2266. c->Request.Timeout = 0;
  2267. c->Request.CDB[0] = cmd;
  2268. break;
  2269. case CCISS_CACHE_FLUSH:
  2270. c->Request.CDBLen = 12;
  2271. c->Request.Type.Attribute = ATTR_SIMPLE;
  2272. c->Request.Type.Direction = XFER_WRITE;
  2273. c->Request.Timeout = 0;
  2274. c->Request.CDB[0] = BMIC_WRITE;
  2275. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2276. break;
  2277. case TEST_UNIT_READY:
  2278. c->Request.CDBLen = 6;
  2279. c->Request.Type.Attribute = ATTR_SIMPLE;
  2280. c->Request.Type.Direction = XFER_NONE;
  2281. c->Request.Timeout = 0;
  2282. break;
  2283. default:
  2284. dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
  2285. return IO_ERROR;
  2286. }
  2287. } else if (cmd_type == TYPE_MSG) {
  2288. switch (cmd) {
  2289. case 0: /* ABORT message */
  2290. c->Request.CDBLen = 12;
  2291. c->Request.Type.Attribute = ATTR_SIMPLE;
  2292. c->Request.Type.Direction = XFER_WRITE;
  2293. c->Request.Timeout = 0;
  2294. c->Request.CDB[0] = cmd; /* abort */
  2295. c->Request.CDB[1] = 0; /* abort a command */
  2296. /* buff contains the tag of the command to abort */
  2297. memcpy(&c->Request.CDB[4], buff, 8);
  2298. break;
  2299. case 1: /* RESET message */
  2300. c->Request.CDBLen = 16;
  2301. c->Request.Type.Attribute = ATTR_SIMPLE;
  2302. c->Request.Type.Direction = XFER_NONE;
  2303. c->Request.Timeout = 0;
  2304. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2305. c->Request.CDB[0] = cmd; /* reset */
  2306. c->Request.CDB[1] = 0x03; /* reset a target */
  2307. break;
  2308. case 3: /* No-Op message */
  2309. c->Request.CDBLen = 1;
  2310. c->Request.Type.Attribute = ATTR_SIMPLE;
  2311. c->Request.Type.Direction = XFER_WRITE;
  2312. c->Request.Timeout = 0;
  2313. c->Request.CDB[0] = cmd;
  2314. break;
  2315. default:
  2316. dev_warn(&h->pdev->dev,
  2317. "unknown message type %d\n", cmd);
  2318. return IO_ERROR;
  2319. }
  2320. } else {
  2321. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2322. return IO_ERROR;
  2323. }
  2324. /* Fill in the scatter gather information */
  2325. if (size > 0) {
  2326. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2327. buff, size,
  2328. PCI_DMA_BIDIRECTIONAL);
  2329. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2330. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2331. c->SG[0].Len = size;
  2332. c->SG[0].Ext = 0; /* we are not chaining */
  2333. }
  2334. return status;
  2335. }
  2336. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2337. {
  2338. switch (c->err_info->ScsiStatus) {
  2339. case SAM_STAT_GOOD:
  2340. return IO_OK;
  2341. case SAM_STAT_CHECK_CONDITION:
  2342. switch (0xf & c->err_info->SenseInfo[2]) {
  2343. case 0: return IO_OK; /* no sense */
  2344. case 1: return IO_OK; /* recovered error */
  2345. default:
  2346. if (check_for_unit_attention(h, c))
  2347. return IO_NEEDS_RETRY;
  2348. dev_warn(&h->pdev->dev, "cmd 0x%02x "
  2349. "check condition, sense key = 0x%02x\n",
  2350. c->Request.CDB[0], c->err_info->SenseInfo[2]);
  2351. }
  2352. break;
  2353. default:
  2354. dev_warn(&h->pdev->dev, "cmd 0x%02x"
  2355. "scsi status = 0x%02x\n",
  2356. c->Request.CDB[0], c->err_info->ScsiStatus);
  2357. break;
  2358. }
  2359. return IO_ERROR;
  2360. }
  2361. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2362. {
  2363. int return_status = IO_OK;
  2364. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2365. return IO_OK;
  2366. switch (c->err_info->CommandStatus) {
  2367. case CMD_TARGET_STATUS:
  2368. return_status = check_target_status(h, c);
  2369. break;
  2370. case CMD_DATA_UNDERRUN:
  2371. case CMD_DATA_OVERRUN:
  2372. /* expected for inquiry and report lun commands */
  2373. break;
  2374. case CMD_INVALID:
  2375. dev_warn(&h->pdev->dev, "cmd 0x%02x is "
  2376. "reported invalid\n", c->Request.CDB[0]);
  2377. return_status = IO_ERROR;
  2378. break;
  2379. case CMD_PROTOCOL_ERR:
  2380. dev_warn(&h->pdev->dev, "cmd 0x%02x has "
  2381. "protocol error\n", c->Request.CDB[0]);
  2382. return_status = IO_ERROR;
  2383. break;
  2384. case CMD_HARDWARE_ERR:
  2385. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2386. " hardware error\n", c->Request.CDB[0]);
  2387. return_status = IO_ERROR;
  2388. break;
  2389. case CMD_CONNECTION_LOST:
  2390. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2391. "connection lost\n", c->Request.CDB[0]);
  2392. return_status = IO_ERROR;
  2393. break;
  2394. case CMD_ABORTED:
  2395. dev_warn(&h->pdev->dev, "cmd 0x%02x was "
  2396. "aborted\n", c->Request.CDB[0]);
  2397. return_status = IO_ERROR;
  2398. break;
  2399. case CMD_ABORT_FAILED:
  2400. dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
  2401. "abort failed\n", c->Request.CDB[0]);
  2402. return_status = IO_ERROR;
  2403. break;
  2404. case CMD_UNSOLICITED_ABORT:
  2405. dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
  2406. c->Request.CDB[0]);
  2407. return_status = IO_NEEDS_RETRY;
  2408. break;
  2409. default:
  2410. dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
  2411. "unknown status %x\n", c->Request.CDB[0],
  2412. c->err_info->CommandStatus);
  2413. return_status = IO_ERROR;
  2414. }
  2415. return return_status;
  2416. }
  2417. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2418. int attempt_retry)
  2419. {
  2420. DECLARE_COMPLETION_ONSTACK(wait);
  2421. u64bit buff_dma_handle;
  2422. int return_status = IO_OK;
  2423. resend_cmd2:
  2424. c->waiting = &wait;
  2425. enqueue_cmd_and_start_io(h, c);
  2426. wait_for_completion(&wait);
  2427. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2428. goto command_done;
  2429. return_status = process_sendcmd_error(h, c);
  2430. if (return_status == IO_NEEDS_RETRY &&
  2431. c->retry_count < MAX_CMD_RETRIES) {
  2432. dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
  2433. c->Request.CDB[0]);
  2434. c->retry_count++;
  2435. /* erase the old error information */
  2436. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2437. return_status = IO_OK;
  2438. INIT_COMPLETION(wait);
  2439. goto resend_cmd2;
  2440. }
  2441. command_done:
  2442. /* unlock the buffers from DMA */
  2443. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2444. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2445. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2446. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2447. return return_status;
  2448. }
  2449. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  2450. __u8 page_code, unsigned char scsi3addr[],
  2451. int cmd_type)
  2452. {
  2453. CommandList_struct *c;
  2454. int return_status;
  2455. c = cmd_special_alloc(h);
  2456. if (!c)
  2457. return -ENOMEM;
  2458. return_status = fill_cmd(h, c, cmd, buff, size, page_code,
  2459. scsi3addr, cmd_type);
  2460. if (return_status == IO_OK)
  2461. return_status = sendcmd_withirq_core(h, c, 1);
  2462. cmd_special_free(h, c);
  2463. return return_status;
  2464. }
  2465. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  2466. sector_t total_size,
  2467. unsigned int block_size,
  2468. InquiryData_struct *inq_buff,
  2469. drive_info_struct *drv)
  2470. {
  2471. int return_code;
  2472. unsigned long t;
  2473. unsigned char scsi3addr[8];
  2474. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2475. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2476. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  2477. sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
  2478. if (return_code == IO_OK) {
  2479. if (inq_buff->data_byte[8] == 0xFF) {
  2480. dev_warn(&h->pdev->dev,
  2481. "reading geometry failed, volume "
  2482. "does not support reading geometry\n");
  2483. drv->heads = 255;
  2484. drv->sectors = 32; /* Sectors per track */
  2485. drv->cylinders = total_size + 1;
  2486. drv->raid_level = RAID_UNKNOWN;
  2487. } else {
  2488. drv->heads = inq_buff->data_byte[6];
  2489. drv->sectors = inq_buff->data_byte[7];
  2490. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2491. drv->cylinders += inq_buff->data_byte[5];
  2492. drv->raid_level = inq_buff->data_byte[8];
  2493. }
  2494. drv->block_size = block_size;
  2495. drv->nr_blocks = total_size + 1;
  2496. t = drv->heads * drv->sectors;
  2497. if (t > 1) {
  2498. sector_t real_size = total_size + 1;
  2499. unsigned long rem = sector_div(real_size, t);
  2500. if (rem)
  2501. real_size++;
  2502. drv->cylinders = real_size;
  2503. }
  2504. } else { /* Get geometry failed */
  2505. dev_warn(&h->pdev->dev, "reading geometry failed\n");
  2506. }
  2507. }
  2508. static void
  2509. cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
  2510. unsigned int *block_size)
  2511. {
  2512. ReadCapdata_struct *buf;
  2513. int return_code;
  2514. unsigned char scsi3addr[8];
  2515. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2516. if (!buf) {
  2517. dev_warn(&h->pdev->dev, "out of memory\n");
  2518. return;
  2519. }
  2520. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2521. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
  2522. sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
  2523. if (return_code == IO_OK) {
  2524. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2525. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2526. } else { /* read capacity command failed */
  2527. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2528. *total_size = 0;
  2529. *block_size = BLOCK_SIZE;
  2530. }
  2531. kfree(buf);
  2532. }
  2533. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  2534. sector_t *total_size, unsigned int *block_size)
  2535. {
  2536. ReadCapdata_struct_16 *buf;
  2537. int return_code;
  2538. unsigned char scsi3addr[8];
  2539. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2540. if (!buf) {
  2541. dev_warn(&h->pdev->dev, "out of memory\n");
  2542. return;
  2543. }
  2544. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2545. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
  2546. buf, sizeof(ReadCapdata_struct_16),
  2547. 0, scsi3addr, TYPE_CMD);
  2548. if (return_code == IO_OK) {
  2549. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2550. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2551. } else { /* read capacity command failed */
  2552. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2553. *total_size = 0;
  2554. *block_size = BLOCK_SIZE;
  2555. }
  2556. dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
  2557. (unsigned long long)*total_size+1, *block_size);
  2558. kfree(buf);
  2559. }
  2560. static int cciss_revalidate(struct gendisk *disk)
  2561. {
  2562. ctlr_info_t *h = get_host(disk);
  2563. drive_info_struct *drv = get_drv(disk);
  2564. int logvol;
  2565. int FOUND = 0;
  2566. unsigned int block_size;
  2567. sector_t total_size;
  2568. InquiryData_struct *inq_buff = NULL;
  2569. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2570. if (memcmp(h->drv[logvol]->LunID, drv->LunID,
  2571. sizeof(drv->LunID)) == 0) {
  2572. FOUND = 1;
  2573. break;
  2574. }
  2575. }
  2576. if (!FOUND)
  2577. return 1;
  2578. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2579. if (inq_buff == NULL) {
  2580. dev_warn(&h->pdev->dev, "out of memory\n");
  2581. return 1;
  2582. }
  2583. if (h->cciss_read == CCISS_READ_10) {
  2584. cciss_read_capacity(h, logvol,
  2585. &total_size, &block_size);
  2586. } else {
  2587. cciss_read_capacity_16(h, logvol,
  2588. &total_size, &block_size);
  2589. }
  2590. cciss_geometry_inquiry(h, logvol, total_size, block_size,
  2591. inq_buff, drv);
  2592. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2593. set_capacity(disk, drv->nr_blocks);
  2594. kfree(inq_buff);
  2595. return 0;
  2596. }
  2597. /*
  2598. * Map (physical) PCI mem into (virtual) kernel space
  2599. */
  2600. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2601. {
  2602. ulong page_base = ((ulong) base) & PAGE_MASK;
  2603. ulong page_offs = ((ulong) base) - page_base;
  2604. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2605. return page_remapped ? (page_remapped + page_offs) : NULL;
  2606. }
  2607. /*
  2608. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2609. * the Q to wait for completion.
  2610. */
  2611. static void start_io(ctlr_info_t *h)
  2612. {
  2613. CommandList_struct *c;
  2614. while (!hlist_empty(&h->reqQ)) {
  2615. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2616. /* can't do anything if fifo is full */
  2617. if ((h->access.fifo_full(h))) {
  2618. dev_warn(&h->pdev->dev, "fifo full\n");
  2619. break;
  2620. }
  2621. /* Get the first entry from the Request Q */
  2622. removeQ(c);
  2623. h->Qdepth--;
  2624. /* Tell the controller execute command */
  2625. h->access.submit_command(h, c);
  2626. /* Put job onto the completed Q */
  2627. addQ(&h->cmpQ, c);
  2628. }
  2629. }
  2630. /* Assumes that h->lock is held. */
  2631. /* Zeros out the error record and then resends the command back */
  2632. /* to the controller */
  2633. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2634. {
  2635. /* erase the old error information */
  2636. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2637. /* add it to software queue and then send it to the controller */
  2638. addQ(&h->reqQ, c);
  2639. h->Qdepth++;
  2640. if (h->Qdepth > h->maxQsinceinit)
  2641. h->maxQsinceinit = h->Qdepth;
  2642. start_io(h);
  2643. }
  2644. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2645. unsigned int msg_byte, unsigned int host_byte,
  2646. unsigned int driver_byte)
  2647. {
  2648. /* inverse of macros in scsi.h */
  2649. return (scsi_status_byte & 0xff) |
  2650. ((msg_byte & 0xff) << 8) |
  2651. ((host_byte & 0xff) << 16) |
  2652. ((driver_byte & 0xff) << 24);
  2653. }
  2654. static inline int evaluate_target_status(ctlr_info_t *h,
  2655. CommandList_struct *cmd, int *retry_cmd)
  2656. {
  2657. unsigned char sense_key;
  2658. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2659. int error_value;
  2660. *retry_cmd = 0;
  2661. /* If we get in here, it means we got "target status", that is, scsi status */
  2662. status_byte = cmd->err_info->ScsiStatus;
  2663. driver_byte = DRIVER_OK;
  2664. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2665. if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
  2666. host_byte = DID_PASSTHROUGH;
  2667. else
  2668. host_byte = DID_OK;
  2669. error_value = make_status_bytes(status_byte, msg_byte,
  2670. host_byte, driver_byte);
  2671. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2672. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
  2673. dev_warn(&h->pdev->dev, "cmd %p "
  2674. "has SCSI Status 0x%x\n",
  2675. cmd, cmd->err_info->ScsiStatus);
  2676. return error_value;
  2677. }
  2678. /* check the sense key */
  2679. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2680. /* no status or recovered error */
  2681. if (((sense_key == 0x0) || (sense_key == 0x1)) &&
  2682. (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
  2683. error_value = 0;
  2684. if (check_for_unit_attention(h, cmd)) {
  2685. *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
  2686. return 0;
  2687. }
  2688. /* Not SG_IO or similar? */
  2689. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
  2690. if (error_value != 0)
  2691. dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
  2692. " sense key = 0x%x\n", cmd, sense_key);
  2693. return error_value;
  2694. }
  2695. /* SG_IO or similar, copy sense data back */
  2696. if (cmd->rq->sense) {
  2697. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2698. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2699. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2700. cmd->rq->sense_len);
  2701. } else
  2702. cmd->rq->sense_len = 0;
  2703. return error_value;
  2704. }
  2705. /* checks the status of the job and calls complete buffers to mark all
  2706. * buffers for the completed job. Note that this function does not need
  2707. * to hold the hba/queue lock.
  2708. */
  2709. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2710. int timeout)
  2711. {
  2712. int retry_cmd = 0;
  2713. struct request *rq = cmd->rq;
  2714. rq->errors = 0;
  2715. if (timeout)
  2716. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2717. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2718. goto after_error_processing;
  2719. switch (cmd->err_info->CommandStatus) {
  2720. case CMD_TARGET_STATUS:
  2721. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2722. break;
  2723. case CMD_DATA_UNDERRUN:
  2724. if (cmd->rq->cmd_type == REQ_TYPE_FS) {
  2725. dev_warn(&h->pdev->dev, "cmd %p has"
  2726. " completed with data underrun "
  2727. "reported\n", cmd);
  2728. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2729. }
  2730. break;
  2731. case CMD_DATA_OVERRUN:
  2732. if (cmd->rq->cmd_type == REQ_TYPE_FS)
  2733. dev_warn(&h->pdev->dev, "cciss: cmd %p has"
  2734. " completed with data overrun "
  2735. "reported\n", cmd);
  2736. break;
  2737. case CMD_INVALID:
  2738. dev_warn(&h->pdev->dev, "cciss: cmd %p is "
  2739. "reported invalid\n", cmd);
  2740. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2741. cmd->err_info->CommandStatus, DRIVER_OK,
  2742. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2743. DID_PASSTHROUGH : DID_ERROR);
  2744. break;
  2745. case CMD_PROTOCOL_ERR:
  2746. dev_warn(&h->pdev->dev, "cciss: cmd %p has "
  2747. "protocol error\n", cmd);
  2748. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2749. cmd->err_info->CommandStatus, DRIVER_OK,
  2750. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2751. DID_PASSTHROUGH : DID_ERROR);
  2752. break;
  2753. case CMD_HARDWARE_ERR:
  2754. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2755. " hardware error\n", cmd);
  2756. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2757. cmd->err_info->CommandStatus, DRIVER_OK,
  2758. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2759. DID_PASSTHROUGH : DID_ERROR);
  2760. break;
  2761. case CMD_CONNECTION_LOST:
  2762. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2763. "connection lost\n", cmd);
  2764. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2765. cmd->err_info->CommandStatus, DRIVER_OK,
  2766. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2767. DID_PASSTHROUGH : DID_ERROR);
  2768. break;
  2769. case CMD_ABORTED:
  2770. dev_warn(&h->pdev->dev, "cciss: cmd %p was "
  2771. "aborted\n", cmd);
  2772. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2773. cmd->err_info->CommandStatus, DRIVER_OK,
  2774. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2775. DID_PASSTHROUGH : DID_ABORT);
  2776. break;
  2777. case CMD_ABORT_FAILED:
  2778. dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
  2779. "abort failed\n", cmd);
  2780. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2781. cmd->err_info->CommandStatus, DRIVER_OK,
  2782. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2783. DID_PASSTHROUGH : DID_ERROR);
  2784. break;
  2785. case CMD_UNSOLICITED_ABORT:
  2786. dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
  2787. "abort %p\n", h->ctlr, cmd);
  2788. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2789. retry_cmd = 1;
  2790. dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
  2791. cmd->retry_count++;
  2792. } else
  2793. dev_warn(&h->pdev->dev,
  2794. "%p retried too many times\n", cmd);
  2795. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2796. cmd->err_info->CommandStatus, DRIVER_OK,
  2797. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2798. DID_PASSTHROUGH : DID_ABORT);
  2799. break;
  2800. case CMD_TIMEOUT:
  2801. dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
  2802. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2803. cmd->err_info->CommandStatus, DRIVER_OK,
  2804. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2805. DID_PASSTHROUGH : DID_ERROR);
  2806. break;
  2807. default:
  2808. dev_warn(&h->pdev->dev, "cmd %p returned "
  2809. "unknown status %x\n", cmd,
  2810. cmd->err_info->CommandStatus);
  2811. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2812. cmd->err_info->CommandStatus, DRIVER_OK,
  2813. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2814. DID_PASSTHROUGH : DID_ERROR);
  2815. }
  2816. after_error_processing:
  2817. /* We need to return this command */
  2818. if (retry_cmd) {
  2819. resend_cciss_cmd(h, cmd);
  2820. return;
  2821. }
  2822. cmd->rq->completion_data = cmd;
  2823. blk_complete_request(cmd->rq);
  2824. }
  2825. static inline u32 cciss_tag_contains_index(u32 tag)
  2826. {
  2827. #define DIRECT_LOOKUP_BIT 0x10
  2828. return tag & DIRECT_LOOKUP_BIT;
  2829. }
  2830. static inline u32 cciss_tag_to_index(u32 tag)
  2831. {
  2832. #define DIRECT_LOOKUP_SHIFT 5
  2833. return tag >> DIRECT_LOOKUP_SHIFT;
  2834. }
  2835. static inline u32 cciss_tag_discard_error_bits(u32 tag)
  2836. {
  2837. #define CCISS_ERROR_BITS 0x03
  2838. return tag & ~CCISS_ERROR_BITS;
  2839. }
  2840. static inline void cciss_mark_tag_indexed(u32 *tag)
  2841. {
  2842. *tag |= DIRECT_LOOKUP_BIT;
  2843. }
  2844. static inline void cciss_set_tag_index(u32 *tag, u32 index)
  2845. {
  2846. *tag |= (index << DIRECT_LOOKUP_SHIFT);
  2847. }
  2848. /*
  2849. * Get a request and submit it to the controller.
  2850. */
  2851. static void do_cciss_request(struct request_queue *q)
  2852. {
  2853. ctlr_info_t *h = q->queuedata;
  2854. CommandList_struct *c;
  2855. sector_t start_blk;
  2856. int seg;
  2857. struct request *creq;
  2858. u64bit temp64;
  2859. struct scatterlist *tmp_sg;
  2860. SGDescriptor_struct *curr_sg;
  2861. drive_info_struct *drv;
  2862. int i, dir;
  2863. int sg_index = 0;
  2864. int chained = 0;
  2865. /* We call start_io here in case there is a command waiting on the
  2866. * queue that has not been sent.
  2867. */
  2868. if (blk_queue_plugged(q))
  2869. goto startio;
  2870. queue:
  2871. creq = blk_peek_request(q);
  2872. if (!creq)
  2873. goto startio;
  2874. BUG_ON(creq->nr_phys_segments > h->maxsgentries);
  2875. c = cmd_alloc(h);
  2876. if (!c)
  2877. goto full;
  2878. blk_start_request(creq);
  2879. tmp_sg = h->scatter_list[c->cmdindex];
  2880. spin_unlock_irq(q->queue_lock);
  2881. c->cmd_type = CMD_RWREQ;
  2882. c->rq = creq;
  2883. /* fill in the request */
  2884. drv = creq->rq_disk->private_data;
  2885. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2886. /* got command from pool, so use the command block index instead */
  2887. /* for direct lookups. */
  2888. /* The first 2 bits are reserved for controller error reporting. */
  2889. cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
  2890. cciss_mark_tag_indexed(&c->Header.Tag.lower);
  2891. memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
  2892. c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
  2893. c->Request.Type.Type = TYPE_CMD; /* It is a command. */
  2894. c->Request.Type.Attribute = ATTR_SIMPLE;
  2895. c->Request.Type.Direction =
  2896. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2897. c->Request.Timeout = 0; /* Don't time out */
  2898. c->Request.CDB[0] =
  2899. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2900. start_blk = blk_rq_pos(creq);
  2901. dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
  2902. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2903. sg_init_table(tmp_sg, h->maxsgentries);
  2904. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2905. /* get the DMA records for the setup */
  2906. if (c->Request.Type.Direction == XFER_READ)
  2907. dir = PCI_DMA_FROMDEVICE;
  2908. else
  2909. dir = PCI_DMA_TODEVICE;
  2910. curr_sg = c->SG;
  2911. sg_index = 0;
  2912. chained = 0;
  2913. for (i = 0; i < seg; i++) {
  2914. if (((sg_index+1) == (h->max_cmd_sgentries)) &&
  2915. !chained && ((seg - i) > 1)) {
  2916. /* Point to next chain block. */
  2917. curr_sg = h->cmd_sg_list[c->cmdindex];
  2918. sg_index = 0;
  2919. chained = 1;
  2920. }
  2921. curr_sg[sg_index].Len = tmp_sg[i].length;
  2922. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2923. tmp_sg[i].offset,
  2924. tmp_sg[i].length, dir);
  2925. curr_sg[sg_index].Addr.lower = temp64.val32.lower;
  2926. curr_sg[sg_index].Addr.upper = temp64.val32.upper;
  2927. curr_sg[sg_index].Ext = 0; /* we are not chaining */
  2928. ++sg_index;
  2929. }
  2930. if (chained)
  2931. cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
  2932. (seg - (h->max_cmd_sgentries - 1)) *
  2933. sizeof(SGDescriptor_struct));
  2934. /* track how many SG entries we are using */
  2935. if (seg > h->maxSG)
  2936. h->maxSG = seg;
  2937. dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
  2938. "chained[%d]\n",
  2939. blk_rq_sectors(creq), seg, chained);
  2940. c->Header.SGTotal = seg + chained;
  2941. if (seg <= h->max_cmd_sgentries)
  2942. c->Header.SGList = c->Header.SGTotal;
  2943. else
  2944. c->Header.SGList = h->max_cmd_sgentries;
  2945. set_performant_mode(h, c);
  2946. if (likely(creq->cmd_type == REQ_TYPE_FS)) {
  2947. if(h->cciss_read == CCISS_READ_10) {
  2948. c->Request.CDB[1] = 0;
  2949. c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
  2950. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2951. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2952. c->Request.CDB[5] = start_blk & 0xff;
  2953. c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
  2954. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2955. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2956. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2957. } else {
  2958. u32 upper32 = upper_32_bits(start_blk);
  2959. c->Request.CDBLen = 16;
  2960. c->Request.CDB[1]= 0;
  2961. c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
  2962. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2963. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2964. c->Request.CDB[5]= upper32 & 0xff;
  2965. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2966. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2967. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2968. c->Request.CDB[9]= start_blk & 0xff;
  2969. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2970. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2971. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2972. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2973. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2974. }
  2975. } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
  2976. c->Request.CDBLen = creq->cmd_len;
  2977. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2978. } else {
  2979. dev_warn(&h->pdev->dev, "bad request type %d\n",
  2980. creq->cmd_type);
  2981. BUG();
  2982. }
  2983. spin_lock_irq(q->queue_lock);
  2984. addQ(&h->reqQ, c);
  2985. h->Qdepth++;
  2986. if (h->Qdepth > h->maxQsinceinit)
  2987. h->maxQsinceinit = h->Qdepth;
  2988. goto queue;
  2989. full:
  2990. blk_stop_queue(q);
  2991. startio:
  2992. /* We will already have the driver lock here so not need
  2993. * to lock it.
  2994. */
  2995. start_io(h);
  2996. }
  2997. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2998. {
  2999. return h->access.command_completed(h);
  3000. }
  3001. static inline int interrupt_pending(ctlr_info_t *h)
  3002. {
  3003. return h->access.intr_pending(h);
  3004. }
  3005. static inline long interrupt_not_for_us(ctlr_info_t *h)
  3006. {
  3007. return ((h->access.intr_pending(h) == 0) ||
  3008. (h->interrupts_enabled == 0));
  3009. }
  3010. static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
  3011. u32 raw_tag)
  3012. {
  3013. if (unlikely(tag_index >= h->nr_cmds)) {
  3014. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3015. return 1;
  3016. }
  3017. return 0;
  3018. }
  3019. static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
  3020. u32 raw_tag)
  3021. {
  3022. removeQ(c);
  3023. if (likely(c->cmd_type == CMD_RWREQ))
  3024. complete_command(h, c, 0);
  3025. else if (c->cmd_type == CMD_IOCTL_PEND)
  3026. complete(c->waiting);
  3027. #ifdef CONFIG_CISS_SCSI_TAPE
  3028. else if (c->cmd_type == CMD_SCSI)
  3029. complete_scsi_command(c, 0, raw_tag);
  3030. #endif
  3031. }
  3032. static inline u32 next_command(ctlr_info_t *h)
  3033. {
  3034. u32 a;
  3035. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  3036. return h->access.command_completed(h);
  3037. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  3038. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  3039. (h->reply_pool_head)++;
  3040. h->commands_outstanding--;
  3041. } else {
  3042. a = FIFO_EMPTY;
  3043. }
  3044. /* Check for wraparound */
  3045. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  3046. h->reply_pool_head = h->reply_pool;
  3047. h->reply_pool_wraparound ^= 1;
  3048. }
  3049. return a;
  3050. }
  3051. /* process completion of an indexed ("direct lookup") command */
  3052. static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3053. {
  3054. u32 tag_index;
  3055. CommandList_struct *c;
  3056. tag_index = cciss_tag_to_index(raw_tag);
  3057. if (bad_tag(h, tag_index, raw_tag))
  3058. return next_command(h);
  3059. c = h->cmd_pool + tag_index;
  3060. finish_cmd(h, c, raw_tag);
  3061. return next_command(h);
  3062. }
  3063. /* process completion of a non-indexed command */
  3064. static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3065. {
  3066. u32 tag;
  3067. CommandList_struct *c = NULL;
  3068. struct hlist_node *tmp;
  3069. __u32 busaddr_masked, tag_masked;
  3070. tag = cciss_tag_discard_error_bits(raw_tag);
  3071. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  3072. busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
  3073. tag_masked = cciss_tag_discard_error_bits(tag);
  3074. if (busaddr_masked == tag_masked) {
  3075. finish_cmd(h, c, raw_tag);
  3076. return next_command(h);
  3077. }
  3078. }
  3079. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3080. return next_command(h);
  3081. }
  3082. static irqreturn_t do_cciss_intx(int irq, void *dev_id)
  3083. {
  3084. ctlr_info_t *h = dev_id;
  3085. unsigned long flags;
  3086. u32 raw_tag;
  3087. if (interrupt_not_for_us(h))
  3088. return IRQ_NONE;
  3089. spin_lock_irqsave(&h->lock, flags);
  3090. while (interrupt_pending(h)) {
  3091. raw_tag = get_next_completion(h);
  3092. while (raw_tag != FIFO_EMPTY) {
  3093. if (cciss_tag_contains_index(raw_tag))
  3094. raw_tag = process_indexed_cmd(h, raw_tag);
  3095. else
  3096. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3097. }
  3098. }
  3099. spin_unlock_irqrestore(&h->lock, flags);
  3100. return IRQ_HANDLED;
  3101. }
  3102. /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
  3103. * check the interrupt pending register because it is not set.
  3104. */
  3105. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
  3106. {
  3107. ctlr_info_t *h = dev_id;
  3108. unsigned long flags;
  3109. u32 raw_tag;
  3110. spin_lock_irqsave(&h->lock, flags);
  3111. raw_tag = get_next_completion(h);
  3112. while (raw_tag != FIFO_EMPTY) {
  3113. if (cciss_tag_contains_index(raw_tag))
  3114. raw_tag = process_indexed_cmd(h, raw_tag);
  3115. else
  3116. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3117. }
  3118. spin_unlock_irqrestore(&h->lock, flags);
  3119. return IRQ_HANDLED;
  3120. }
  3121. /**
  3122. * add_to_scan_list() - add controller to rescan queue
  3123. * @h: Pointer to the controller.
  3124. *
  3125. * Adds the controller to the rescan queue if not already on the queue.
  3126. *
  3127. * returns 1 if added to the queue, 0 if skipped (could be on the
  3128. * queue already, or the controller could be initializing or shutting
  3129. * down).
  3130. **/
  3131. static int add_to_scan_list(struct ctlr_info *h)
  3132. {
  3133. struct ctlr_info *test_h;
  3134. int found = 0;
  3135. int ret = 0;
  3136. if (h->busy_initializing)
  3137. return 0;
  3138. if (!mutex_trylock(&h->busy_shutting_down))
  3139. return 0;
  3140. mutex_lock(&scan_mutex);
  3141. list_for_each_entry(test_h, &scan_q, scan_list) {
  3142. if (test_h == h) {
  3143. found = 1;
  3144. break;
  3145. }
  3146. }
  3147. if (!found && !h->busy_scanning) {
  3148. INIT_COMPLETION(h->scan_wait);
  3149. list_add_tail(&h->scan_list, &scan_q);
  3150. ret = 1;
  3151. }
  3152. mutex_unlock(&scan_mutex);
  3153. mutex_unlock(&h->busy_shutting_down);
  3154. return ret;
  3155. }
  3156. /**
  3157. * remove_from_scan_list() - remove controller from rescan queue
  3158. * @h: Pointer to the controller.
  3159. *
  3160. * Removes the controller from the rescan queue if present. Blocks if
  3161. * the controller is currently conducting a rescan. The controller
  3162. * can be in one of three states:
  3163. * 1. Doesn't need a scan
  3164. * 2. On the scan list, but not scanning yet (we remove it)
  3165. * 3. Busy scanning (and not on the list). In this case we want to wait for
  3166. * the scan to complete to make sure the scanning thread for this
  3167. * controller is completely idle.
  3168. **/
  3169. static void remove_from_scan_list(struct ctlr_info *h)
  3170. {
  3171. struct ctlr_info *test_h, *tmp_h;
  3172. mutex_lock(&scan_mutex);
  3173. list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
  3174. if (test_h == h) { /* state 2. */
  3175. list_del(&h->scan_list);
  3176. complete_all(&h->scan_wait);
  3177. mutex_unlock(&scan_mutex);
  3178. return;
  3179. }
  3180. }
  3181. if (h->busy_scanning) { /* state 3. */
  3182. mutex_unlock(&scan_mutex);
  3183. wait_for_completion(&h->scan_wait);
  3184. } else { /* state 1, nothing to do. */
  3185. mutex_unlock(&scan_mutex);
  3186. }
  3187. }
  3188. /**
  3189. * scan_thread() - kernel thread used to rescan controllers
  3190. * @data: Ignored.
  3191. *
  3192. * A kernel thread used scan for drive topology changes on
  3193. * controllers. The thread processes only one controller at a time
  3194. * using a queue. Controllers are added to the queue using
  3195. * add_to_scan_list() and removed from the queue either after done
  3196. * processing or using remove_from_scan_list().
  3197. *
  3198. * returns 0.
  3199. **/
  3200. static int scan_thread(void *data)
  3201. {
  3202. struct ctlr_info *h;
  3203. while (1) {
  3204. set_current_state(TASK_INTERRUPTIBLE);
  3205. schedule();
  3206. if (kthread_should_stop())
  3207. break;
  3208. while (1) {
  3209. mutex_lock(&scan_mutex);
  3210. if (list_empty(&scan_q)) {
  3211. mutex_unlock(&scan_mutex);
  3212. break;
  3213. }
  3214. h = list_entry(scan_q.next,
  3215. struct ctlr_info,
  3216. scan_list);
  3217. list_del(&h->scan_list);
  3218. h->busy_scanning = 1;
  3219. mutex_unlock(&scan_mutex);
  3220. rebuild_lun_table(h, 0, 0);
  3221. complete_all(&h->scan_wait);
  3222. mutex_lock(&scan_mutex);
  3223. h->busy_scanning = 0;
  3224. mutex_unlock(&scan_mutex);
  3225. }
  3226. }
  3227. return 0;
  3228. }
  3229. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  3230. {
  3231. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  3232. return 0;
  3233. switch (c->err_info->SenseInfo[12]) {
  3234. case STATE_CHANGED:
  3235. dev_warn(&h->pdev->dev, "a state change "
  3236. "detected, command retried\n");
  3237. return 1;
  3238. break;
  3239. case LUN_FAILED:
  3240. dev_warn(&h->pdev->dev, "LUN failure "
  3241. "detected, action required\n");
  3242. return 1;
  3243. break;
  3244. case REPORT_LUNS_CHANGED:
  3245. dev_warn(&h->pdev->dev, "report LUN data changed\n");
  3246. /*
  3247. * Here, we could call add_to_scan_list and wake up the scan thread,
  3248. * except that it's quite likely that we will get more than one
  3249. * REPORT_LUNS_CHANGED condition in quick succession, which means
  3250. * that those which occur after the first one will likely happen
  3251. * *during* the scan_thread's rescan. And the rescan code is not
  3252. * robust enough to restart in the middle, undoing what it has already
  3253. * done, and it's not clear that it's even possible to do this, since
  3254. * part of what it does is notify the block layer, which starts
  3255. * doing it's own i/o to read partition tables and so on, and the
  3256. * driver doesn't have visibility to know what might need undoing.
  3257. * In any event, if possible, it is horribly complicated to get right
  3258. * so we just don't do it for now.
  3259. *
  3260. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  3261. */
  3262. return 1;
  3263. break;
  3264. case POWER_OR_RESET:
  3265. dev_warn(&h->pdev->dev,
  3266. "a power on or device reset detected\n");
  3267. return 1;
  3268. break;
  3269. case UNIT_ATTENTION_CLEARED:
  3270. dev_warn(&h->pdev->dev,
  3271. "unit attention cleared by another initiator\n");
  3272. return 1;
  3273. break;
  3274. default:
  3275. dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
  3276. return 1;
  3277. }
  3278. }
  3279. /*
  3280. * We cannot read the structure directly, for portability we must use
  3281. * the io functions.
  3282. * This is for debug only.
  3283. */
  3284. static void print_cfg_table(ctlr_info_t *h)
  3285. {
  3286. int i;
  3287. char temp_name[17];
  3288. CfgTable_struct *tb = h->cfgtable;
  3289. dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
  3290. dev_dbg(&h->pdev->dev, "------------------------------------\n");
  3291. for (i = 0; i < 4; i++)
  3292. temp_name[i] = readb(&(tb->Signature[i]));
  3293. temp_name[4] = '\0';
  3294. dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
  3295. dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
  3296. readl(&(tb->SpecValence)));
  3297. dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
  3298. readl(&(tb->TransportSupport)));
  3299. dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
  3300. readl(&(tb->TransportActive)));
  3301. dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
  3302. readl(&(tb->HostWrite.TransportRequest)));
  3303. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
  3304. readl(&(tb->HostWrite.CoalIntDelay)));
  3305. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
  3306. readl(&(tb->HostWrite.CoalIntCount)));
  3307. dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
  3308. readl(&(tb->CmdsOutMax)));
  3309. dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
  3310. readl(&(tb->BusTypes)));
  3311. for (i = 0; i < 16; i++)
  3312. temp_name[i] = readb(&(tb->ServerName[i]));
  3313. temp_name[16] = '\0';
  3314. dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
  3315. dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
  3316. readl(&(tb->HeartBeat)));
  3317. }
  3318. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3319. {
  3320. int i, offset, mem_type, bar_type;
  3321. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3322. return 0;
  3323. offset = 0;
  3324. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3325. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3326. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3327. offset += 4;
  3328. else {
  3329. mem_type = pci_resource_flags(pdev, i) &
  3330. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3331. switch (mem_type) {
  3332. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3333. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3334. offset += 4; /* 32 bit */
  3335. break;
  3336. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3337. offset += 8;
  3338. break;
  3339. default: /* reserved in PCI 2.2 */
  3340. dev_warn(&pdev->dev,
  3341. "Base address is invalid\n");
  3342. return -1;
  3343. break;
  3344. }
  3345. }
  3346. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3347. return i + 1;
  3348. }
  3349. return -1;
  3350. }
  3351. /* Fill in bucket_map[], given nsgs (the max number of
  3352. * scatter gather elements supported) and bucket[],
  3353. * which is an array of 8 integers. The bucket[] array
  3354. * contains 8 different DMA transfer sizes (in 16
  3355. * byte increments) which the controller uses to fetch
  3356. * commands. This function fills in bucket_map[], which
  3357. * maps a given number of scatter gather elements to one of
  3358. * the 8 DMA transfer sizes. The point of it is to allow the
  3359. * controller to only do as much DMA as needed to fetch the
  3360. * command, with the DMA transfer size encoded in the lower
  3361. * bits of the command address.
  3362. */
  3363. static void calc_bucket_map(int bucket[], int num_buckets,
  3364. int nsgs, int *bucket_map)
  3365. {
  3366. int i, j, b, size;
  3367. /* even a command with 0 SGs requires 4 blocks */
  3368. #define MINIMUM_TRANSFER_BLOCKS 4
  3369. #define NUM_BUCKETS 8
  3370. /* Note, bucket_map must have nsgs+1 entries. */
  3371. for (i = 0; i <= nsgs; i++) {
  3372. /* Compute size of a command with i SG entries */
  3373. size = i + MINIMUM_TRANSFER_BLOCKS;
  3374. b = num_buckets; /* Assume the biggest bucket */
  3375. /* Find the bucket that is just big enough */
  3376. for (j = 0; j < 8; j++) {
  3377. if (bucket[j] >= size) {
  3378. b = j;
  3379. break;
  3380. }
  3381. }
  3382. /* for a command with i SG entries, use bucket b. */
  3383. bucket_map[i] = b;
  3384. }
  3385. }
  3386. static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
  3387. {
  3388. int i;
  3389. /* under certain very rare conditions, this can take awhile.
  3390. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3391. * as we enter this code.) */
  3392. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3393. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3394. break;
  3395. msleep(10);
  3396. }
  3397. }
  3398. static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
  3399. {
  3400. /* This is a bit complicated. There are 8 registers on
  3401. * the controller which we write to to tell it 8 different
  3402. * sizes of commands which there may be. It's a way of
  3403. * reducing the DMA done to fetch each command. Encoded into
  3404. * each command's tag are 3 bits which communicate to the controller
  3405. * which of the eight sizes that command fits within. The size of
  3406. * each command depends on how many scatter gather entries there are.
  3407. * Each SG entry requires 16 bytes. The eight registers are programmed
  3408. * with the number of 16-byte blocks a command of that size requires.
  3409. * The smallest command possible requires 5 such 16 byte blocks.
  3410. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3411. * blocks. Note, this only extends to the SG entries contained
  3412. * within the command block, and does not extend to chained blocks
  3413. * of SG elements. bft[] contains the eight values we write to
  3414. * the registers. They are not evenly distributed, but have more
  3415. * sizes for small commands, and fewer sizes for larger commands.
  3416. */
  3417. __u32 trans_offset;
  3418. int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3419. /*
  3420. * 5 = 1 s/g entry or 4k
  3421. * 6 = 2 s/g entry or 8k
  3422. * 8 = 4 s/g entry or 16k
  3423. * 10 = 6 s/g entry or 24k
  3424. */
  3425. unsigned long register_value;
  3426. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3427. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3428. /* Controller spec: zero out this buffer. */
  3429. memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
  3430. h->reply_pool_head = h->reply_pool;
  3431. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3432. calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
  3433. h->blockFetchTable);
  3434. writel(bft[0], &h->transtable->BlockFetch0);
  3435. writel(bft[1], &h->transtable->BlockFetch1);
  3436. writel(bft[2], &h->transtable->BlockFetch2);
  3437. writel(bft[3], &h->transtable->BlockFetch3);
  3438. writel(bft[4], &h->transtable->BlockFetch4);
  3439. writel(bft[5], &h->transtable->BlockFetch5);
  3440. writel(bft[6], &h->transtable->BlockFetch6);
  3441. writel(bft[7], &h->transtable->BlockFetch7);
  3442. /* size of controller ring buffer */
  3443. writel(h->max_commands, &h->transtable->RepQSize);
  3444. writel(1, &h->transtable->RepQCount);
  3445. writel(0, &h->transtable->RepQCtrAddrLow32);
  3446. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3447. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3448. writel(0, &h->transtable->RepQAddr0High32);
  3449. writel(CFGTBL_Trans_Performant,
  3450. &(h->cfgtable->HostWrite.TransportRequest));
  3451. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3452. cciss_wait_for_mode_change_ack(h);
  3453. register_value = readl(&(h->cfgtable->TransportActive));
  3454. if (!(register_value & CFGTBL_Trans_Performant))
  3455. dev_warn(&h->pdev->dev, "cciss: unable to get board into"
  3456. " performant mode\n");
  3457. }
  3458. static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
  3459. {
  3460. __u32 trans_support;
  3461. dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
  3462. /* Attempt to put controller into performant mode if supported */
  3463. /* Does board support performant mode? */
  3464. trans_support = readl(&(h->cfgtable->TransportSupport));
  3465. if (!(trans_support & PERFORMANT_MODE))
  3466. return;
  3467. dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
  3468. /* Performant mode demands commands on a 32 byte boundary
  3469. * pci_alloc_consistent aligns on page boundarys already.
  3470. * Just need to check if divisible by 32
  3471. */
  3472. if ((sizeof(CommandList_struct) % 32) != 0) {
  3473. dev_warn(&h->pdev->dev, "%s %d %s\n",
  3474. "cciss info: command size[",
  3475. (int)sizeof(CommandList_struct),
  3476. "] not divisible by 32, no performant mode..\n");
  3477. return;
  3478. }
  3479. /* Performant mode ring buffer and supporting data structures */
  3480. h->reply_pool = (__u64 *)pci_alloc_consistent(
  3481. h->pdev, h->max_commands * sizeof(__u64),
  3482. &(h->reply_pool_dhandle));
  3483. /* Need a block fetch table for performant mode */
  3484. h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
  3485. sizeof(__u32)), GFP_KERNEL);
  3486. if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
  3487. goto clean_up;
  3488. cciss_enter_performant_mode(h);
  3489. /* Change the access methods to the performant access methods */
  3490. h->access = SA5_performant_access;
  3491. h->transMethod = CFGTBL_Trans_Performant;
  3492. return;
  3493. clean_up:
  3494. kfree(h->blockFetchTable);
  3495. if (h->reply_pool)
  3496. pci_free_consistent(h->pdev,
  3497. h->max_commands * sizeof(__u64),
  3498. h->reply_pool,
  3499. h->reply_pool_dhandle);
  3500. return;
  3501. } /* cciss_put_controller_into_performant_mode */
  3502. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3503. * controllers that are capable. If not, we use IO-APIC mode.
  3504. */
  3505. static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
  3506. {
  3507. #ifdef CONFIG_PCI_MSI
  3508. int err;
  3509. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3510. {0, 2}, {0, 3}
  3511. };
  3512. /* Some boards advertise MSI but don't really support it */
  3513. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3514. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3515. goto default_int_mode;
  3516. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3517. err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
  3518. if (!err) {
  3519. h->intr[0] = cciss_msix_entries[0].vector;
  3520. h->intr[1] = cciss_msix_entries[1].vector;
  3521. h->intr[2] = cciss_msix_entries[2].vector;
  3522. h->intr[3] = cciss_msix_entries[3].vector;
  3523. h->msix_vector = 1;
  3524. return;
  3525. }
  3526. if (err > 0) {
  3527. dev_warn(&h->pdev->dev,
  3528. "only %d MSI-X vectors available\n", err);
  3529. goto default_int_mode;
  3530. } else {
  3531. dev_warn(&h->pdev->dev,
  3532. "MSI-X init failed %d\n", err);
  3533. goto default_int_mode;
  3534. }
  3535. }
  3536. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3537. if (!pci_enable_msi(h->pdev))
  3538. h->msi_vector = 1;
  3539. else
  3540. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3541. }
  3542. default_int_mode:
  3543. #endif /* CONFIG_PCI_MSI */
  3544. /* if we get here we're going to use the default interrupt mode */
  3545. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3546. return;
  3547. }
  3548. static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3549. {
  3550. int i;
  3551. u32 subsystem_vendor_id, subsystem_device_id;
  3552. subsystem_vendor_id = pdev->subsystem_vendor;
  3553. subsystem_device_id = pdev->subsystem_device;
  3554. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3555. subsystem_vendor_id;
  3556. for (i = 0; i < ARRAY_SIZE(products); i++) {
  3557. /* Stand aside for hpsa driver on request */
  3558. if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
  3559. return -ENODEV;
  3560. if (*board_id == products[i].board_id)
  3561. return i;
  3562. }
  3563. dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
  3564. *board_id);
  3565. return -ENODEV;
  3566. }
  3567. static inline bool cciss_board_disabled(ctlr_info_t *h)
  3568. {
  3569. u16 command;
  3570. (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
  3571. return ((command & PCI_COMMAND_MEMORY) == 0);
  3572. }
  3573. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  3574. unsigned long *memory_bar)
  3575. {
  3576. int i;
  3577. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3578. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3579. /* addressing mode bits already removed */
  3580. *memory_bar = pci_resource_start(pdev, i);
  3581. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3582. *memory_bar);
  3583. return 0;
  3584. }
  3585. dev_warn(&pdev->dev, "no memory BAR found\n");
  3586. return -ENODEV;
  3587. }
  3588. static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
  3589. {
  3590. int i;
  3591. u32 scratchpad;
  3592. for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
  3593. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3594. if (scratchpad == CCISS_FIRMWARE_READY)
  3595. return 0;
  3596. msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
  3597. }
  3598. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  3599. return -ENODEV;
  3600. }
  3601. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  3602. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3603. u64 *cfg_offset)
  3604. {
  3605. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3606. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3607. *cfg_base_addr &= (u32) 0x0000ffff;
  3608. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3609. if (*cfg_base_addr_index == -1) {
  3610. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
  3611. "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
  3612. return -ENODEV;
  3613. }
  3614. return 0;
  3615. }
  3616. static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
  3617. {
  3618. u64 cfg_offset;
  3619. u32 cfg_base_addr;
  3620. u64 cfg_base_addr_index;
  3621. u32 trans_offset;
  3622. int rc;
  3623. rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3624. &cfg_base_addr_index, &cfg_offset);
  3625. if (rc)
  3626. return rc;
  3627. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3628. cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
  3629. if (!h->cfgtable)
  3630. return -ENOMEM;
  3631. /* Find performant mode table. */
  3632. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3633. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3634. cfg_base_addr_index)+cfg_offset+trans_offset,
  3635. sizeof(*h->transtable));
  3636. if (!h->transtable)
  3637. return -ENOMEM;
  3638. return 0;
  3639. }
  3640. static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
  3641. {
  3642. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3643. if (h->max_commands < 16) {
  3644. dev_warn(&h->pdev->dev, "Controller reports "
  3645. "max supported commands of %d, an obvious lie. "
  3646. "Using 16. Ensure that firmware is up to date.\n",
  3647. h->max_commands);
  3648. h->max_commands = 16;
  3649. }
  3650. }
  3651. /* Interrogate the hardware for some limits:
  3652. * max commands, max SG elements without chaining, and with chaining,
  3653. * SG chain block size, etc.
  3654. */
  3655. static void __devinit cciss_find_board_params(ctlr_info_t *h)
  3656. {
  3657. cciss_get_max_perf_mode_cmds(h);
  3658. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3659. h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
  3660. /*
  3661. * Limit in-command s/g elements to 32 save dma'able memory.
  3662. * Howvever spec says if 0, use 31
  3663. */
  3664. h->max_cmd_sgentries = 31;
  3665. if (h->maxsgentries > 512) {
  3666. h->max_cmd_sgentries = 32;
  3667. h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
  3668. h->maxsgentries--; /* save one for chain pointer */
  3669. } else {
  3670. h->maxsgentries = 31; /* default to traditional values */
  3671. h->chainsize = 0;
  3672. }
  3673. }
  3674. static inline bool CISS_signature_present(ctlr_info_t *h)
  3675. {
  3676. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3677. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3678. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3679. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3680. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3681. return false;
  3682. }
  3683. return true;
  3684. }
  3685. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3686. static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
  3687. {
  3688. #ifdef CONFIG_X86
  3689. u32 prefetch;
  3690. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3691. prefetch |= 0x100;
  3692. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3693. #endif
  3694. }
  3695. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3696. * in a prefetch beyond physical memory.
  3697. */
  3698. static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
  3699. {
  3700. u32 dma_prefetch;
  3701. __u32 dma_refetch;
  3702. if (h->board_id != 0x3225103C)
  3703. return;
  3704. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3705. dma_prefetch |= 0x8000;
  3706. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3707. pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3708. dma_refetch |= 0x1;
  3709. pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
  3710. }
  3711. static int __devinit cciss_pci_init(ctlr_info_t *h)
  3712. {
  3713. int prod_index, err;
  3714. prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
  3715. if (prod_index < 0)
  3716. return -ENODEV;
  3717. h->product_name = products[prod_index].product_name;
  3718. h->access = *(products[prod_index].access);
  3719. if (cciss_board_disabled(h)) {
  3720. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3721. return -ENODEV;
  3722. }
  3723. err = pci_enable_device(h->pdev);
  3724. if (err) {
  3725. dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
  3726. return err;
  3727. }
  3728. err = pci_request_regions(h->pdev, "cciss");
  3729. if (err) {
  3730. dev_warn(&h->pdev->dev,
  3731. "Cannot obtain PCI resources, aborting\n");
  3732. return err;
  3733. }
  3734. dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
  3735. dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
  3736. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3737. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3738. */
  3739. cciss_interrupt_mode(h);
  3740. err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
  3741. if (err)
  3742. goto err_out_free_res;
  3743. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3744. if (!h->vaddr) {
  3745. err = -ENOMEM;
  3746. goto err_out_free_res;
  3747. }
  3748. err = cciss_wait_for_board_ready(h);
  3749. if (err)
  3750. goto err_out_free_res;
  3751. err = cciss_find_cfgtables(h);
  3752. if (err)
  3753. goto err_out_free_res;
  3754. print_cfg_table(h);
  3755. cciss_find_board_params(h);
  3756. if (!CISS_signature_present(h)) {
  3757. err = -ENODEV;
  3758. goto err_out_free_res;
  3759. }
  3760. cciss_enable_scsi_prefetch(h);
  3761. cciss_p600_dma_prefetch_quirk(h);
  3762. cciss_put_controller_into_performant_mode(h);
  3763. return 0;
  3764. err_out_free_res:
  3765. /*
  3766. * Deliberately omit pci_disable_device(): it does something nasty to
  3767. * Smart Array controllers that pci_enable_device does not undo
  3768. */
  3769. if (h->transtable)
  3770. iounmap(h->transtable);
  3771. if (h->cfgtable)
  3772. iounmap(h->cfgtable);
  3773. if (h->vaddr)
  3774. iounmap(h->vaddr);
  3775. pci_release_regions(h->pdev);
  3776. return err;
  3777. }
  3778. /* Function to find the first free pointer into our hba[] array
  3779. * Returns -1 if no free entries are left.
  3780. */
  3781. static int alloc_cciss_hba(struct pci_dev *pdev)
  3782. {
  3783. int i;
  3784. for (i = 0; i < MAX_CTLR; i++) {
  3785. if (!hba[i]) {
  3786. ctlr_info_t *h;
  3787. h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3788. if (!h)
  3789. goto Enomem;
  3790. hba[i] = h;
  3791. return i;
  3792. }
  3793. }
  3794. dev_warn(&pdev->dev, "This driver supports a maximum"
  3795. " of %d controllers.\n", MAX_CTLR);
  3796. return -1;
  3797. Enomem:
  3798. dev_warn(&pdev->dev, "out of memory.\n");
  3799. return -1;
  3800. }
  3801. static void free_hba(ctlr_info_t *h)
  3802. {
  3803. int i;
  3804. hba[h->ctlr] = NULL;
  3805. for (i = 0; i < h->highest_lun + 1; i++)
  3806. if (h->gendisk[i] != NULL)
  3807. put_disk(h->gendisk[i]);
  3808. kfree(h);
  3809. }
  3810. /* Send a message CDB to the firmware. */
  3811. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3812. {
  3813. typedef struct {
  3814. CommandListHeader_struct CommandHeader;
  3815. RequestBlock_struct Request;
  3816. ErrDescriptor_struct ErrorDescriptor;
  3817. } Command;
  3818. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3819. Command *cmd;
  3820. dma_addr_t paddr64;
  3821. uint32_t paddr32, tag;
  3822. void __iomem *vaddr;
  3823. int i, err;
  3824. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3825. if (vaddr == NULL)
  3826. return -ENOMEM;
  3827. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3828. CCISS commands, so they must be allocated from the lower 4GiB of
  3829. memory. */
  3830. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3831. if (err) {
  3832. iounmap(vaddr);
  3833. return -ENOMEM;
  3834. }
  3835. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3836. if (cmd == NULL) {
  3837. iounmap(vaddr);
  3838. return -ENOMEM;
  3839. }
  3840. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3841. although there's no guarantee, we assume that the address is at
  3842. least 4-byte aligned (most likely, it's page-aligned). */
  3843. paddr32 = paddr64;
  3844. cmd->CommandHeader.ReplyQueue = 0;
  3845. cmd->CommandHeader.SGList = 0;
  3846. cmd->CommandHeader.SGTotal = 0;
  3847. cmd->CommandHeader.Tag.lower = paddr32;
  3848. cmd->CommandHeader.Tag.upper = 0;
  3849. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3850. cmd->Request.CDBLen = 16;
  3851. cmd->Request.Type.Type = TYPE_MSG;
  3852. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3853. cmd->Request.Type.Direction = XFER_NONE;
  3854. cmd->Request.Timeout = 0; /* Don't time out */
  3855. cmd->Request.CDB[0] = opcode;
  3856. cmd->Request.CDB[1] = type;
  3857. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3858. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3859. cmd->ErrorDescriptor.Addr.upper = 0;
  3860. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3861. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3862. for (i = 0; i < 10; i++) {
  3863. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3864. if ((tag & ~3) == paddr32)
  3865. break;
  3866. schedule_timeout_uninterruptible(HZ);
  3867. }
  3868. iounmap(vaddr);
  3869. /* we leak the DMA buffer here ... no choice since the controller could
  3870. still complete the command. */
  3871. if (i == 10) {
  3872. dev_err(&pdev->dev,
  3873. "controller message %02x:%02x timed out\n",
  3874. opcode, type);
  3875. return -ETIMEDOUT;
  3876. }
  3877. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3878. if (tag & 2) {
  3879. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3880. opcode, type);
  3881. return -EIO;
  3882. }
  3883. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3884. opcode, type);
  3885. return 0;
  3886. }
  3887. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3888. #define cciss_noop(p) cciss_message(p, 3, 0)
  3889. static __devinit int cciss_reset_msi(struct pci_dev *pdev)
  3890. {
  3891. /* the #defines are stolen from drivers/pci/msi.h. */
  3892. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  3893. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  3894. int pos;
  3895. u16 control = 0;
  3896. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  3897. if (pos) {
  3898. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3899. if (control & PCI_MSI_FLAGS_ENABLE) {
  3900. dev_info(&pdev->dev, "resetting MSI\n");
  3901. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
  3902. }
  3903. }
  3904. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  3905. if (pos) {
  3906. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3907. if (control & PCI_MSIX_FLAGS_ENABLE) {
  3908. dev_info(&pdev->dev, "resetting MSI-X\n");
  3909. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
  3910. }
  3911. }
  3912. return 0;
  3913. }
  3914. static int cciss_controller_hard_reset(struct pci_dev *pdev,
  3915. void * __iomem vaddr, bool use_doorbell)
  3916. {
  3917. u16 pmcsr;
  3918. int pos;
  3919. if (use_doorbell) {
  3920. /* For everything after the P600, the PCI power state method
  3921. * of resetting the controller doesn't work, so we have this
  3922. * other way using the doorbell register.
  3923. */
  3924. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3925. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  3926. msleep(1000);
  3927. } else { /* Try to do it the PCI power state way */
  3928. /* Quoting from the Open CISS Specification: "The Power
  3929. * Management Control/Status Register (CSR) controls the power
  3930. * state of the device. The normal operating state is D0,
  3931. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3932. * the controller, place the interface device in D3 then to D0,
  3933. * this causes a secondary PCI reset which will reset the
  3934. * controller." */
  3935. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3936. if (pos == 0) {
  3937. dev_err(&pdev->dev,
  3938. "cciss_controller_hard_reset: "
  3939. "PCI PM not supported\n");
  3940. return -ENODEV;
  3941. }
  3942. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3943. /* enter the D3hot power management state */
  3944. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3945. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3946. pmcsr |= PCI_D3hot;
  3947. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3948. msleep(500);
  3949. /* enter the D0 power management state */
  3950. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3951. pmcsr |= PCI_D0;
  3952. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3953. msleep(500);
  3954. }
  3955. return 0;
  3956. }
  3957. /* This does a hard reset of the controller using PCI power management
  3958. * states or using the doorbell register. */
  3959. static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
  3960. {
  3961. u16 saved_config_space[32];
  3962. u64 cfg_offset;
  3963. u32 cfg_base_addr;
  3964. u64 cfg_base_addr_index;
  3965. void __iomem *vaddr;
  3966. unsigned long paddr;
  3967. u32 misc_fw_support, active_transport;
  3968. int rc, i;
  3969. CfgTable_struct __iomem *cfgtable;
  3970. bool use_doorbell;
  3971. u32 board_id;
  3972. /* For controllers as old a the p600, this is very nearly
  3973. * the same thing as
  3974. *
  3975. * pci_save_state(pci_dev);
  3976. * pci_set_power_state(pci_dev, PCI_D3hot);
  3977. * pci_set_power_state(pci_dev, PCI_D0);
  3978. * pci_restore_state(pci_dev);
  3979. *
  3980. * but we can't use these nice canned kernel routines on
  3981. * kexec, because they also check the MSI/MSI-X state in PCI
  3982. * configuration space and do the wrong thing when it is
  3983. * set/cleared. Also, the pci_save/restore_state functions
  3984. * violate the ordering requirements for restoring the
  3985. * configuration space from the CCISS document (see the
  3986. * comment below). So we roll our own ....
  3987. *
  3988. * For controllers newer than the P600, the pci power state
  3989. * method of resetting doesn't work so we have another way
  3990. * using the doorbell register.
  3991. */
  3992. /* Exclude 640x boards. These are two pci devices in one slot
  3993. * which share a battery backed cache module. One controls the
  3994. * cache, the other accesses the cache through the one that controls
  3995. * it. If we reset the one controlling the cache, the other will
  3996. * likely not be happy. Just forbid resetting this conjoined mess.
  3997. */
  3998. cciss_lookup_board_id(pdev, &board_id);
  3999. if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
  4000. dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
  4001. "due to shared cache module.");
  4002. return -ENODEV;
  4003. }
  4004. for (i = 0; i < 32; i++)
  4005. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  4006. /* find the first memory BAR, so we can find the cfg table */
  4007. rc = cciss_pci_find_memory_BAR(pdev, &paddr);
  4008. if (rc)
  4009. return rc;
  4010. vaddr = remap_pci_mem(paddr, 0x250);
  4011. if (!vaddr)
  4012. return -ENOMEM;
  4013. /* find cfgtable in order to check if reset via doorbell is supported */
  4014. rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  4015. &cfg_base_addr_index, &cfg_offset);
  4016. if (rc)
  4017. goto unmap_vaddr;
  4018. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  4019. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  4020. if (!cfgtable) {
  4021. rc = -ENOMEM;
  4022. goto unmap_vaddr;
  4023. }
  4024. /* If reset via doorbell register is supported, use that. */
  4025. misc_fw_support = readl(&cfgtable->misc_fw_support);
  4026. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  4027. /* The doorbell reset seems to cause lockups on some Smart
  4028. * Arrays (e.g. P410, P410i, maybe others). Until this is
  4029. * fixed or at least isolated, avoid the doorbell reset.
  4030. */
  4031. use_doorbell = 0;
  4032. rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
  4033. if (rc)
  4034. goto unmap_cfgtable;
  4035. /* Restore the PCI configuration space. The Open CISS
  4036. * Specification says, "Restore the PCI Configuration
  4037. * Registers, offsets 00h through 60h. It is important to
  4038. * restore the command register, 16-bits at offset 04h,
  4039. * last. Do not restore the configuration status register,
  4040. * 16-bits at offset 06h." Note that the offset is 2*i.
  4041. */
  4042. for (i = 0; i < 32; i++) {
  4043. if (i == 2 || i == 3)
  4044. continue;
  4045. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  4046. }
  4047. wmb();
  4048. pci_write_config_word(pdev, 4, saved_config_space[2]);
  4049. /* Some devices (notably the HP Smart Array 5i Controller)
  4050. need a little pause here */
  4051. msleep(CCISS_POST_RESET_PAUSE_MSECS);
  4052. /* Controller should be in simple mode at this point. If it's not,
  4053. * It means we're on one of those controllers which doesn't support
  4054. * the doorbell reset method and on which the PCI power management reset
  4055. * method doesn't work (P800, for example.)
  4056. * In those cases, don't try to proceed, as it generally doesn't work.
  4057. */
  4058. active_transport = readl(&cfgtable->TransportActive);
  4059. if (active_transport & PERFORMANT_MODE) {
  4060. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  4061. " Ignoring controller.\n");
  4062. rc = -ENODEV;
  4063. }
  4064. unmap_cfgtable:
  4065. iounmap(cfgtable);
  4066. unmap_vaddr:
  4067. iounmap(vaddr);
  4068. return rc;
  4069. }
  4070. static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
  4071. {
  4072. int rc, i;
  4073. if (!reset_devices)
  4074. return 0;
  4075. /* Reset the controller with a PCI power-cycle or via doorbell */
  4076. rc = cciss_kdump_hard_reset_controller(pdev);
  4077. /* -ENOTSUPP here means we cannot reset the controller
  4078. * but it's already (and still) up and running in
  4079. * "performant mode". Or, it might be 640x, which can't reset
  4080. * due to concerns about shared bbwc between 6402/6404 pair.
  4081. */
  4082. if (rc == -ENOTSUPP)
  4083. return 0; /* just try to do the kdump anyhow. */
  4084. if (rc)
  4085. return -ENODEV;
  4086. if (cciss_reset_msi(pdev))
  4087. return -ENODEV;
  4088. /* Now try to get the controller to respond to a no-op */
  4089. for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
  4090. if (cciss_noop(pdev) == 0)
  4091. break;
  4092. else
  4093. dev_warn(&pdev->dev, "no-op failed%s\n",
  4094. (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
  4095. "; re-trying" : ""));
  4096. msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
  4097. }
  4098. return 0;
  4099. }
  4100. /*
  4101. * This is it. Find all the controllers and register them. I really hate
  4102. * stealing all these major device numbers.
  4103. * returns the number of block devices registered.
  4104. */
  4105. static int __devinit cciss_init_one(struct pci_dev *pdev,
  4106. const struct pci_device_id *ent)
  4107. {
  4108. int i;
  4109. int j = 0;
  4110. int k = 0;
  4111. int rc;
  4112. int dac, return_code;
  4113. InquiryData_struct *inq_buff;
  4114. ctlr_info_t *h;
  4115. rc = cciss_init_reset_devices(pdev);
  4116. if (rc)
  4117. return rc;
  4118. i = alloc_cciss_hba(pdev);
  4119. if (i < 0)
  4120. return -1;
  4121. h = hba[i];
  4122. h->pdev = pdev;
  4123. h->busy_initializing = 1;
  4124. INIT_HLIST_HEAD(&h->cmpQ);
  4125. INIT_HLIST_HEAD(&h->reqQ);
  4126. mutex_init(&h->busy_shutting_down);
  4127. if (cciss_pci_init(h) != 0)
  4128. goto clean_no_release_regions;
  4129. sprintf(h->devname, "cciss%d", i);
  4130. h->ctlr = i;
  4131. init_completion(&h->scan_wait);
  4132. if (cciss_create_hba_sysfs_entry(h))
  4133. goto clean0;
  4134. /* configure PCI DMA stuff */
  4135. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4136. dac = 1;
  4137. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  4138. dac = 0;
  4139. else {
  4140. dev_err(&h->pdev->dev, "no suitable DMA available\n");
  4141. goto clean1;
  4142. }
  4143. /*
  4144. * register with the major number, or get a dynamic major number
  4145. * by passing 0 as argument. This is done for greater than
  4146. * 8 controller support.
  4147. */
  4148. if (i < MAX_CTLR_ORIG)
  4149. h->major = COMPAQ_CISS_MAJOR + i;
  4150. rc = register_blkdev(h->major, h->devname);
  4151. if (rc == -EBUSY || rc == -EINVAL) {
  4152. dev_err(&h->pdev->dev,
  4153. "Unable to get major number %d for %s "
  4154. "on hba %d\n", h->major, h->devname, i);
  4155. goto clean1;
  4156. } else {
  4157. if (i >= MAX_CTLR_ORIG)
  4158. h->major = rc;
  4159. }
  4160. /* make sure the board interrupts are off */
  4161. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4162. if (h->msi_vector || h->msix_vector) {
  4163. if (request_irq(h->intr[PERF_MODE_INT],
  4164. do_cciss_msix_intr,
  4165. IRQF_DISABLED, h->devname, h)) {
  4166. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4167. h->intr[PERF_MODE_INT], h->devname);
  4168. goto clean2;
  4169. }
  4170. } else {
  4171. if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
  4172. IRQF_DISABLED, h->devname, h)) {
  4173. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4174. h->intr[PERF_MODE_INT], h->devname);
  4175. goto clean2;
  4176. }
  4177. }
  4178. dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  4179. h->devname, pdev->device, pci_name(pdev),
  4180. h->intr[PERF_MODE_INT], dac ? "" : " not");
  4181. h->cmd_pool_bits =
  4182. kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4183. * sizeof(unsigned long), GFP_KERNEL);
  4184. h->cmd_pool = (CommandList_struct *)
  4185. pci_alloc_consistent(h->pdev,
  4186. h->nr_cmds * sizeof(CommandList_struct),
  4187. &(h->cmd_pool_dhandle));
  4188. h->errinfo_pool = (ErrorInfo_struct *)
  4189. pci_alloc_consistent(h->pdev,
  4190. h->nr_cmds * sizeof(ErrorInfo_struct),
  4191. &(h->errinfo_pool_dhandle));
  4192. if ((h->cmd_pool_bits == NULL)
  4193. || (h->cmd_pool == NULL)
  4194. || (h->errinfo_pool == NULL)) {
  4195. dev_err(&h->pdev->dev, "out of memory");
  4196. goto clean4;
  4197. }
  4198. /* Need space for temp scatter list */
  4199. h->scatter_list = kmalloc(h->max_commands *
  4200. sizeof(struct scatterlist *),
  4201. GFP_KERNEL);
  4202. if (!h->scatter_list)
  4203. goto clean4;
  4204. for (k = 0; k < h->nr_cmds; k++) {
  4205. h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
  4206. h->maxsgentries,
  4207. GFP_KERNEL);
  4208. if (h->scatter_list[k] == NULL) {
  4209. dev_err(&h->pdev->dev,
  4210. "could not allocate s/g lists\n");
  4211. goto clean4;
  4212. }
  4213. }
  4214. h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
  4215. h->chainsize, h->nr_cmds);
  4216. if (!h->cmd_sg_list && h->chainsize > 0)
  4217. goto clean4;
  4218. spin_lock_init(&h->lock);
  4219. /* Initialize the pdev driver private data.
  4220. have it point to h. */
  4221. pci_set_drvdata(pdev, h);
  4222. /* command and error info recs zeroed out before
  4223. they are used */
  4224. memset(h->cmd_pool_bits, 0,
  4225. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4226. * sizeof(unsigned long));
  4227. h->num_luns = 0;
  4228. h->highest_lun = -1;
  4229. for (j = 0; j < CISS_MAX_LUN; j++) {
  4230. h->drv[j] = NULL;
  4231. h->gendisk[j] = NULL;
  4232. }
  4233. cciss_scsi_setup(h);
  4234. /* Turn the interrupts on so we can service requests */
  4235. h->access.set_intr_mask(h, CCISS_INTR_ON);
  4236. /* Get the firmware version */
  4237. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  4238. if (inq_buff == NULL) {
  4239. dev_err(&h->pdev->dev, "out of memory\n");
  4240. goto clean4;
  4241. }
  4242. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  4243. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  4244. if (return_code == IO_OK) {
  4245. h->firm_ver[0] = inq_buff->data_byte[32];
  4246. h->firm_ver[1] = inq_buff->data_byte[33];
  4247. h->firm_ver[2] = inq_buff->data_byte[34];
  4248. h->firm_ver[3] = inq_buff->data_byte[35];
  4249. } else { /* send command failed */
  4250. dev_warn(&h->pdev->dev, "unable to determine firmware"
  4251. " version of controller\n");
  4252. }
  4253. kfree(inq_buff);
  4254. cciss_procinit(h);
  4255. h->cciss_max_sectors = 8192;
  4256. rebuild_lun_table(h, 1, 0);
  4257. h->busy_initializing = 0;
  4258. return 1;
  4259. clean4:
  4260. kfree(h->cmd_pool_bits);
  4261. /* Free up sg elements */
  4262. for (k = 0; k < h->nr_cmds; k++)
  4263. kfree(h->scatter_list[k]);
  4264. kfree(h->scatter_list);
  4265. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4266. if (h->cmd_pool)
  4267. pci_free_consistent(h->pdev,
  4268. h->nr_cmds * sizeof(CommandList_struct),
  4269. h->cmd_pool, h->cmd_pool_dhandle);
  4270. if (h->errinfo_pool)
  4271. pci_free_consistent(h->pdev,
  4272. h->nr_cmds * sizeof(ErrorInfo_struct),
  4273. h->errinfo_pool,
  4274. h->errinfo_pool_dhandle);
  4275. free_irq(h->intr[PERF_MODE_INT], h);
  4276. clean2:
  4277. unregister_blkdev(h->major, h->devname);
  4278. clean1:
  4279. cciss_destroy_hba_sysfs_entry(h);
  4280. clean0:
  4281. pci_release_regions(pdev);
  4282. clean_no_release_regions:
  4283. h->busy_initializing = 0;
  4284. /*
  4285. * Deliberately omit pci_disable_device(): it does something nasty to
  4286. * Smart Array controllers that pci_enable_device does not undo
  4287. */
  4288. pci_set_drvdata(pdev, NULL);
  4289. free_hba(h);
  4290. return -1;
  4291. }
  4292. static void cciss_shutdown(struct pci_dev *pdev)
  4293. {
  4294. ctlr_info_t *h;
  4295. char *flush_buf;
  4296. int return_code;
  4297. h = pci_get_drvdata(pdev);
  4298. flush_buf = kzalloc(4, GFP_KERNEL);
  4299. if (!flush_buf) {
  4300. dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
  4301. return;
  4302. }
  4303. /* write all data in the battery backed cache to disk */
  4304. memset(flush_buf, 0, 4);
  4305. return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
  4306. 4, 0, CTLR_LUNID, TYPE_CMD);
  4307. kfree(flush_buf);
  4308. if (return_code != IO_OK)
  4309. dev_warn(&h->pdev->dev, "Error flushing cache\n");
  4310. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4311. free_irq(h->intr[PERF_MODE_INT], h);
  4312. }
  4313. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  4314. {
  4315. ctlr_info_t *h;
  4316. int i, j;
  4317. if (pci_get_drvdata(pdev) == NULL) {
  4318. dev_err(&pdev->dev, "Unable to remove device\n");
  4319. return;
  4320. }
  4321. h = pci_get_drvdata(pdev);
  4322. i = h->ctlr;
  4323. if (hba[i] == NULL) {
  4324. dev_err(&pdev->dev, "device appears to already be removed\n");
  4325. return;
  4326. }
  4327. mutex_lock(&h->busy_shutting_down);
  4328. remove_from_scan_list(h);
  4329. remove_proc_entry(h->devname, proc_cciss);
  4330. unregister_blkdev(h->major, h->devname);
  4331. /* remove it from the disk list */
  4332. for (j = 0; j < CISS_MAX_LUN; j++) {
  4333. struct gendisk *disk = h->gendisk[j];
  4334. if (disk) {
  4335. struct request_queue *q = disk->queue;
  4336. if (disk->flags & GENHD_FL_UP) {
  4337. cciss_destroy_ld_sysfs_entry(h, j, 1);
  4338. del_gendisk(disk);
  4339. }
  4340. if (q)
  4341. blk_cleanup_queue(q);
  4342. }
  4343. }
  4344. #ifdef CONFIG_CISS_SCSI_TAPE
  4345. cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
  4346. #endif
  4347. cciss_shutdown(pdev);
  4348. #ifdef CONFIG_PCI_MSI
  4349. if (h->msix_vector)
  4350. pci_disable_msix(h->pdev);
  4351. else if (h->msi_vector)
  4352. pci_disable_msi(h->pdev);
  4353. #endif /* CONFIG_PCI_MSI */
  4354. iounmap(h->transtable);
  4355. iounmap(h->cfgtable);
  4356. iounmap(h->vaddr);
  4357. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
  4358. h->cmd_pool, h->cmd_pool_dhandle);
  4359. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
  4360. h->errinfo_pool, h->errinfo_pool_dhandle);
  4361. kfree(h->cmd_pool_bits);
  4362. /* Free up sg elements */
  4363. for (j = 0; j < h->nr_cmds; j++)
  4364. kfree(h->scatter_list[j]);
  4365. kfree(h->scatter_list);
  4366. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4367. /*
  4368. * Deliberately omit pci_disable_device(): it does something nasty to
  4369. * Smart Array controllers that pci_enable_device does not undo
  4370. */
  4371. pci_release_regions(pdev);
  4372. pci_set_drvdata(pdev, NULL);
  4373. cciss_destroy_hba_sysfs_entry(h);
  4374. mutex_unlock(&h->busy_shutting_down);
  4375. free_hba(h);
  4376. }
  4377. static struct pci_driver cciss_pci_driver = {
  4378. .name = "cciss",
  4379. .probe = cciss_init_one,
  4380. .remove = __devexit_p(cciss_remove_one),
  4381. .id_table = cciss_pci_device_id, /* id_table */
  4382. .shutdown = cciss_shutdown,
  4383. };
  4384. /*
  4385. * This is it. Register the PCI driver information for the cards we control
  4386. * the OS will call our registered routines when it finds one of our cards.
  4387. */
  4388. static int __init cciss_init(void)
  4389. {
  4390. int err;
  4391. /*
  4392. * The hardware requires that commands are aligned on a 64-bit
  4393. * boundary. Given that we use pci_alloc_consistent() to allocate an
  4394. * array of them, the size must be a multiple of 8 bytes.
  4395. */
  4396. BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
  4397. printk(KERN_INFO DRIVER_NAME "\n");
  4398. err = bus_register(&cciss_bus_type);
  4399. if (err)
  4400. return err;
  4401. /* Start the scan thread */
  4402. cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
  4403. if (IS_ERR(cciss_scan_thread)) {
  4404. err = PTR_ERR(cciss_scan_thread);
  4405. goto err_bus_unregister;
  4406. }
  4407. /* Register for our PCI devices */
  4408. err = pci_register_driver(&cciss_pci_driver);
  4409. if (err)
  4410. goto err_thread_stop;
  4411. return err;
  4412. err_thread_stop:
  4413. kthread_stop(cciss_scan_thread);
  4414. err_bus_unregister:
  4415. bus_unregister(&cciss_bus_type);
  4416. return err;
  4417. }
  4418. static void __exit cciss_cleanup(void)
  4419. {
  4420. int i;
  4421. pci_unregister_driver(&cciss_pci_driver);
  4422. /* double check that all controller entrys have been removed */
  4423. for (i = 0; i < MAX_CTLR; i++) {
  4424. if (hba[i] != NULL) {
  4425. dev_warn(&hba[i]->pdev->dev,
  4426. "had to remove controller\n");
  4427. cciss_remove_one(hba[i]->pdev);
  4428. }
  4429. }
  4430. kthread_stop(cciss_scan_thread);
  4431. remove_proc_entry("driver/cciss", NULL);
  4432. bus_unregister(&cciss_bus_type);
  4433. }
  4434. module_init(cciss_init);
  4435. module_exit(cciss_cleanup);