Domů Procházet Nápověda
Registrovat se Přihlásit se
phyus
/
linux-vybrid_public
8
0
Rozštěpit 0
Soubory Úkoly 0 Pull Requesty 0 Wiki
Strom: 38a81da220
Větve Značky
linux-vybrid_pu...
/
arch
/
blackfin
/
mach-bf548
/
Kconfig

Kconfig 6.4 KB
Historie Surový

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357 
  1. config BF542
    2. 

  2. 	def_bool y
    3. 

  3. 	depends on BF542_std || BF542M
    4. 

  4. config BF544
    5. 

  5. 	def_bool y
    6. 

  6. 	depends on BF544_std || BF544M
    7. 

  7. config BF547
    8. 

  8. 	def_bool y
    9. 

  9. 	depends on BF547_std || BF547M
    10. 

  10. config BF548
    11. 

  11. 	def_bool y
    12. 

  12. 	depends on BF548_std || BF548M
    13. 

  13. config BF549
    14. 

  14. 	def_bool y
    15. 

  15. 	depends on BF549_std || BF549M
    16. 

  16. 

  17. config BF54xM
    18. 

  18. 	def_bool y
    19. 

  19. 	depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
    20. 

  20. 

  21. config BF54x
    22. 

  22. 	def_bool y
    23. 

  23. 	depends on (BF542 || BF544 || BF547 || BF548 || BF549)
    24. 

  24. 

  25. if (BF54x)
    26. 

  26. 

  27. source "arch/blackfin/mach-bf548/boards/Kconfig"
    28. 

  28. 

  29. menu "BF548 Specific Configuration"
    30. 

  30. 

  31. config DEB_DMA_URGENT
    32. 

  32. 	bool "DMA has priority over core for ext. accesses"
    33. 

  33. 	depends on BF54x
    34. 

  34. 	default y
    35. 

  35. 	help
    36. 

  36. 	  Treat any DEB1, DEB2 and DEB3 request as Urgent
    37. 

  37. 

  38. config BF548_ATAPI_ALTERNATIVE_PORT
    39. 

  39. 	bool "BF548 ATAPI alternative port via GPIO"
    40. 

  40. 	help
    41. 

  41. 	  BF548 ATAPI data and address PINs can be routed through
    42. 

  42. 	  async address or GPIO port F and G. Select y to route it
    43. 

  43. 	  to GPIO.
    44. 

  44. 

  45. comment "Interrupt Priority Assignment"
    46. 

  46. menu "Priority"
    47. 

  47. 

  48. config IRQ_PLL_WAKEUP
    49. 

  49. 	int "IRQ_PLL_WAKEUP"
    50. 

  50. 	default 7
    51. 

  51. config IRQ_DMAC0_ERR
    52. 

  52. 	int "IRQ_DMAC0_ERR"
    53. 

  53. 	default 7
    54. 

  54. config IRQ_EPPI0_ERR
    55. 

  55. 	int "IRQ_EPPI0_ERR"
    56. 

  56. 	default 7
    57. 

  57. config IRQ_SPORT0_ERR
    58. 

  58. 	int "IRQ_SPORT0_ERR"
    59. 

  59. 	default 7
    60. 

  60. config IRQ_SPORT1_ERR
    61. 

  61. 	int "IRQ_SPORT1_ERR"
    62. 

  62. 	default 7
    63. 

  63. config IRQ_SPI0_ERR
    64. 

  64. 	int "IRQ_SPI0_ERR"
    65. 

  65. 	default 7
    66. 

  66. config IRQ_UART0_ERR
    67. 

  67. 	int "IRQ_UART0_ERR"
    68. 

  68. 	default 7
    69. 

  69. config IRQ_RTC
    70. 

  70. 	int "IRQ_RTC"
    71. 

  71. 	default 8
    72. 

  72. config IRQ_EPPI0
    73. 

  73. 	int "IRQ_EPPI0"
    74. 

  74. 	default 8
    75. 

  75. config IRQ_SPORT0_RX
    76. 

  76. 	int "IRQ_SPORT0_RX"
    77. 

  77. 	default 9
    78. 

  78. config IRQ_SPORT0_TX
    79. 

  79. 	int "IRQ_SPORT0_TX"
    80. 

  80. 	default 9
    81. 

  81. config IRQ_SPORT1_RX
    82. 

  82. 	int "IRQ_SPORT1_RX"
    83. 

  83. 	default 9
    84. 

  84. config IRQ_SPORT1_TX
    85. 

  85. 	int "IRQ_SPORT1_TX"
    86. 

  86. 	default 9
    87. 

  87. config IRQ_SPI0
    88. 

  88. 	int "IRQ_SPI0"
    89. 

  89. 	default 10
    90. 

  90. config IRQ_UART0_RX
    91. 

  91. 	int "IRQ_UART0_RX"
    92. 

  92. 	default 10
    93. 

  93. config IRQ_UART0_TX
    94. 

  94. 	int "IRQ_UART0_TX"
    95. 

  95. 	default 10
    96. 

  96. config IRQ_TIMER8
    97. 

  97. 	int "IRQ_TIMER8"
    98. 

  98. 	default 11
    99. 

  99. config IRQ_TIMER9
    100. 

  100. 	int "IRQ_TIMER9"
    101. 

  101. 	default 11
    102. 

  102. config IRQ_TIMER10
    103. 

  103. 	int "IRQ_TIMER10"
    104. 

  104. 	default 11
    105. 

  105. config IRQ_PINT0
    106. 

  106. 	int "IRQ_PINT0"
    107. 

  107. 	default 12
    108. 

  108. config IRQ_PINT1
    109. 

  109. 	int "IRQ_PINT0"
    110. 

  110. 	default 12
    111. 

  111. config IRQ_MDMAS0
    112. 

  112. 	int "IRQ_MDMAS0"
    113. 

  113. 	default 13
    114. 

  114. config IRQ_MDMAS1
    115. 

  115. 	int "IRQ_DMDMAS1"
    116. 

  116. 	default 13
    117. 

  117. config IRQ_WATCHDOG
    118. 

  118. 	int "IRQ_WATCHDOG"
    119. 

  119. 	default 13
    120. 

  120. config IRQ_DMAC1_ERR
    121. 

  121. 	int "IRQ_DMAC1_ERR"
    122. 

  122. 	default 7
    123. 

  123. config IRQ_SPORT2_ERR
    124. 

  124. 	int "IRQ_SPORT2_ERR"
    125. 

  125. 	default 7
    126. 

  126. config IRQ_SPORT3_ERR
    127. 

  127. 	int "IRQ_SPORT3_ERR"
    128. 

  128. 	default 7
    129. 

  129. config IRQ_MXVR_DATA
    130. 

  130. 	int "IRQ MXVR Data"
    131. 

  131. 	default 7
    132. 

  132. config IRQ_SPI1_ERR
    133. 

  133. 	int "IRQ_SPI1_ERR"
    134. 

  134. 	default 7
    135. 

  135. config IRQ_SPI2_ERR
    136. 

  136. 	int "IRQ_SPI2_ERR"
    137. 

  137. 	default 7
    138. 

  138. config IRQ_UART1_ERR
    139. 

  139. 	int "IRQ_UART1_ERR"
    140. 

  140. 	default 7
    141. 

  141. config IRQ_UART2_ERR
    142. 

  142. 	int "IRQ_UART2_ERR"
    143. 

  143. 	default 7
    144. 

  144. config IRQ_CAN0_ERR
    145. 

  145. 	int "IRQ_CAN0_ERR"
    146. 

  146. 	default 7
    147. 

  147. config IRQ_SPORT2_RX
    148. 

  148. 	int "IRQ_SPORT2_RX"
    149. 

  149. 	default 9
    150. 

  150. config IRQ_SPORT2_TX
    151. 

  151. 	int "IRQ_SPORT2_TX"
    152. 

  152. 	default 9
    153. 

  153. config IRQ_SPORT3_RX
    154. 

  154. 	int "IRQ_SPORT3_RX"
    155. 

  155. 	default 9
    156. 

  156. config IRQ_SPORT3_TX
    157. 

  157. 	int "IRQ_SPORT3_TX"
    158. 

  158. 	default 9
    159. 

  159. config IRQ_EPPI1
    160. 

  160. 	int "IRQ_EPPI1"
    161. 

  161. 	default 9
    162. 

  162. config IRQ_EPPI2
    163. 

  163. 	int "IRQ_EPPI2"
    164. 

  164. 	default 9
    165. 

  165. config IRQ_SPI1
    166. 

  166. 	int "IRQ_SPI1"
    167. 

  167. 	default 10
    168. 

  168. config IRQ_SPI2
    169. 

  169. 	int "IRQ_SPI2"
    170. 

  170. 	default 10
    171. 

  171. config IRQ_UART1_RX
    172. 

  172. 	int "IRQ_UART1_RX"
    173. 

  173. 	default 10
    174. 

  174. config IRQ_UART1_TX
    175. 

  175. 	int "IRQ_UART1_TX"
    176. 

  176. 	default 10
    177. 

  177. config IRQ_ATAPI_RX
    178. 

  178. 	int "IRQ_ATAPI_RX"
    179. 

  179. 	default 10
    180. 

  180. config IRQ_ATAPI_TX
    181. 

  181. 	int "IRQ_ATAPI_TX"
    182. 

  182. 	default 10
    183. 

  183. config IRQ_TWI0
    184. 

  184. 	int "IRQ_TWI0"
    185. 

  185. 	default 11
    186. 

  186. config IRQ_TWI1
    187. 

  187. 	int "IRQ_TWI1"
    188. 

  188. 	default 11
    189. 

  189. config IRQ_CAN0_RX
    190. 

  190. 	int "IRQ_CAN_RX"
    191. 

  191. 	default 11
    192. 

  192. config IRQ_CAN0_TX
    193. 

  193. 	int "IRQ_CAN_TX"
    194. 

  194. 	default 11
    195. 

  195. config IRQ_MDMAS2
    196. 

  196. 	int "IRQ_MDMAS2"
    197. 

  197. 	default 13
    198. 

  198. config IRQ_MDMAS3
    199. 

  199. 	int "IRQ_DMMAS3"
    200. 

  200. 	default 13
    201. 

  201. config IRQ_MXVR_ERR
    202. 

  202. 	int "IRQ_MXVR_ERR"
    203. 

  203. 	default 11
    204. 

  204. config IRQ_MXVR_MSG
    205. 

  205. 	int "IRQ_MXVR_MSG"
    206. 

  206. 	default 11
    207. 

  207. config IRQ_MXVR_PKT
    208. 

  208. 	int "IRQ_MXVR_PKT"
    209. 

  209. 	default 11
    210. 

  210. config IRQ_EPPI1_ERR
    211. 

  211. 	int "IRQ_EPPI1_ERR"
    212. 

  212. 	default 7
    213. 

  213. config IRQ_EPPI2_ERR
    214. 

  214. 	int "IRQ_EPPI2_ERR"
    215. 

  215. 	default 7
    216. 

  216. config IRQ_UART3_ERR
    217. 

  217. 	int "IRQ_UART3_ERR"
    218. 

  218. 	default 7
    219. 

  219. config IRQ_HOST_ERR
    220. 

  220. 	int "IRQ_HOST_ERR"
    221. 

  221. 	default 7
    222. 

  222. config IRQ_PIXC_ERR
    223. 

  223. 	int "IRQ_PIXC_ERR"
    224. 

  224. 	default 7
    225. 

  225. config IRQ_NFC_ERR
    226. 

  226. 	int "IRQ_NFC_ERR"
    227. 

  227. 	default 7
    228. 

  228. config IRQ_ATAPI_ERR
    229. 

  229. 	int "IRQ_ATAPI_ERR"
    230. 

  230. 	default 7
    231. 

  231. config IRQ_CAN1_ERR
    232. 

  232. 	int "IRQ_CAN1_ERR"
    233. 

  233. 	default 7
    234. 

  234. config IRQ_HS_DMA_ERR
    235. 

  235. 	int "IRQ Handshake DMA Status"
    236. 

  236. 	default 7
    237. 

  237. config IRQ_PIXC_IN0
    238. 

  238. 	int "IRQ PIXC IN0"
    239. 

  239. 	default 8
    240. 

  240. config IRQ_PIXC_IN1
    241. 

  241. 	int "IRQ PIXC IN1"
    242. 

  242. 	default 8
    243. 

  243. config IRQ_PIXC_OUT
    244. 

  244. 	int "IRQ PIXC OUT"
    245. 

  245. 	default 8
    246. 

  246. config IRQ_SDH
    247. 

  247. 	int "IRQ SDH"
    248. 

  248. 	default 8
    249. 

  249. config IRQ_CNT
    250. 

  250. 	int "IRQ CNT"
    251. 

  251. 	default 8
    252. 

  252. config IRQ_KEY
    253. 

  253. 	int "IRQ KEY"
    254. 

  254. 	default 8
    255. 

  255. config IRQ_CAN1_RX
    256. 

  256. 	int "IRQ CAN1 RX"
    257. 

  257. 	default 11
    258. 

  258. config IRQ_CAN1_TX
    259. 

  259. 	int "IRQ_CAN1_TX"
    260. 

  260. 	default 11
    261. 

  261. config IRQ_SDH_MASK0
    262. 

  262. 	int "IRQ_SDH_MASK0"
    263. 

  263. 	default 11
    264. 

  264. config IRQ_SDH_MASK1
    265. 

  265. 	int "IRQ_SDH_MASK1"
    266. 

  266. 	default 11
    267. 

  267. config IRQ_USB_INT0
    268. 

  268. 	int "IRQ USB INT0"
    269. 

  269. 	default 11
    270. 

  270. config IRQ_USB_INT1
    271. 

  271. 	int "IRQ USB INT1"
    272. 

  272. 	default 11
    273. 

  273. config IRQ_USB_INT2
    274. 

  274. 	int "IRQ USB INT2"
    275. 

  275. 	default 11
    276. 

  276. config IRQ_USB_DMA
    277. 

  277. 	int "IRQ USB DMA"
    278. 

  278. 	default 11
    279. 

  279. config IRQ_OTPSEC
    280. 

  280. 	int "IRQ OPTSEC"
    281. 

  281. 	default 11
    282. 

  282. config IRQ_TIMER0
    283. 

  283. 	int "IRQ_TIMER0"
    284. 

  284. 	default 7 if TICKSOURCE_GPTMR0
    285. 

  285. 	default 8
    286. 

  286. config IRQ_TIMER1
    287. 

  287. 	int "IRQ_TIMER1"
    288. 

  288. 	default 11
    289. 

  289. config IRQ_TIMER2
    290. 

  290. 	int "IRQ_TIMER2"
    291. 

  291. 	default 11
    292. 

  292. config IRQ_TIMER3
    293. 

  293. 	int "IRQ_TIMER3"
    294. 

  294. 	default 11
    295. 

  295. config IRQ_TIMER4
    296. 

  296. 	int "IRQ_TIMER4"
    297. 

  297. 	default 11
    298. 

  298. config IRQ_TIMER5
    299. 

  299. 	int "IRQ_TIMER5"
    300. 

  300. 	default 11
    301. 

  301. config IRQ_TIMER6
    302. 

  302. 	int "IRQ_TIMER6"
    303. 

  303. 	default 11
    304. 

  304. config IRQ_TIMER7
    305. 

  305. 	int "IRQ_TIMER7"
    306. 

  306. 	default 11
    307. 

  307. config IRQ_PINT2
    308. 

  308. 	int "IRQ_PIN2"
    309. 

  309. 	default 11
    310. 

  310. config IRQ_PINT3
    311. 

  311. 	int "IRQ_PIN3"
    312. 

  312. 	default 11
    313. 

  313. 

  314. 	help
    315. 

  315. 	  Enter the priority numbers between 7-13 ONLY.  Others are Reserved.
    316. 

  316. 	  This applies to all the above.  It is not recommended to assign the
    317. 

  317. 	  highest priority number 7 to UART or any other device.
    318. 

  318. 

  319. endmenu
    320. 

  320. 

  321. comment "Pin Interrupt to Port Assignment"
    322. 

  322. menu "Assignment"
    323. 

  323. 

  324. config PINTx_REASSIGN
    325. 

  325. 	bool "Reprogram PINT Assignment"
    326. 

  326. 	default y
    327. 

  327. 	help
    328. 

  328. 	  The interrupt assignment registers controls the pin-to-interrupt
    329. 

  329. 	  assignment in a byte-wide manner. Each option allows you to select
    330. 

  330. 	  a set of pins (High/Low Byte) of an specific Port being mapped
    331. 

  331. 	  to one of the four PIN Interrupts IRQ_PINTx.
    332. 

  332. 

  333. 	  You shouldn't change any of these unless you know exactly what you're doing.
    334. 

  334. 	  Please consult the Blackfin BF54x Processor Hardware Reference Manual.
    335. 

  335. 

  336. config PINT0_ASSIGN
    337. 

  337. 	hex "PINT0_ASSIGN"
    338. 

  338. 	depends on PINTx_REASSIGN
    339. 

  339. 	default 0x00000101
    340. 

  340. config PINT1_ASSIGN
    341. 

  341. 	hex "PINT1_ASSIGN"
    342. 

  342. 	depends on PINTx_REASSIGN
    343. 

  343. 	default 0x01010000
    344. 

  344. config PINT2_ASSIGN
    345. 

  345. 	hex "PINT2_ASSIGN"
    346. 

  346. 	depends on PINTx_REASSIGN
    347. 

  347. 	default 0x07000101
    348. 

  348. config PINT3_ASSIGN
    349. 

  349. 	hex "PINT3_ASSIGN"
    350. 

  350. 	depends on PINTx_REASSIGN
    351. 

  351. 	default 0x02020303
    352. 

  352. 

  353. endmenu
    354. 

  354. 

  355. endmenu
    356. 

  356. 

  357. endif
    358.