ezkit.c 29 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. #ifdef CONFIG_BFIN527_EZKIT_V2
  32. const char bfin_board_name[] = "ADI BF527-EZKIT V2";
  33. #else
  34. const char bfin_board_name[] = "ADI BF527-EZKIT";
  35. #endif
  36. /*
  37. * Driver needs to know address, irq and flag pin.
  38. */
  39. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40. #include <linux/usb/isp1760.h>
  41. static struct resource bfin_isp1760_resources[] = {
  42. [0] = {
  43. .start = 0x203C0000,
  44. .end = 0x203C0000 + 0x000fffff,
  45. .flags = IORESOURCE_MEM,
  46. },
  47. [1] = {
  48. .start = IRQ_PF7,
  49. .end = IRQ_PF7,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct isp1760_platform_data isp1760_priv = {
  54. .is_isp1761 = 0,
  55. .bus_width_16 = 1,
  56. .port1_otg = 0,
  57. .analog_oc = 0,
  58. .dack_polarity_high = 0,
  59. .dreq_polarity_high = 0,
  60. };
  61. static struct platform_device bfin_isp1760_device = {
  62. .name = "isp1760",
  63. .id = 0,
  64. .dev = {
  65. .platform_data = &isp1760_priv,
  66. },
  67. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  68. .resource = bfin_isp1760_resources,
  69. };
  70. #endif
  71. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  72. static struct resource musb_resources[] = {
  73. [0] = {
  74. .start = 0xffc03800,
  75. .end = 0xffc03cff,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = { /* general IRQ */
  79. .start = IRQ_USB_INT0,
  80. .end = IRQ_USB_INT0,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  82. },
  83. [2] = { /* DMA IRQ */
  84. .start = IRQ_USB_DMA,
  85. .end = IRQ_USB_DMA,
  86. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  87. },
  88. };
  89. static struct musb_hdrc_config musb_config = {
  90. .multipoint = 0,
  91. .dyn_fifo = 0,
  92. .soft_con = 1,
  93. .dma = 1,
  94. .num_eps = 8,
  95. .dma_channels = 8,
  96. .gpio_vrsel = GPIO_PG13,
  97. /* Some custom boards need to be active low, just set it to "0"
  98. * if it is the case.
  99. */
  100. .gpio_vrsel_active = 1,
  101. };
  102. static struct musb_hdrc_platform_data musb_plat = {
  103. #if defined(CONFIG_USB_MUSB_OTG)
  104. .mode = MUSB_OTG,
  105. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  106. .mode = MUSB_HOST,
  107. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  108. .mode = MUSB_PERIPHERAL,
  109. #endif
  110. .config = &musb_config,
  111. };
  112. static u64 musb_dmamask = ~(u32)0;
  113. static struct platform_device musb_device = {
  114. .name = "musb_hdrc",
  115. .id = 0,
  116. .dev = {
  117. .dma_mask = &musb_dmamask,
  118. .coherent_dma_mask = 0xffffffff,
  119. .platform_data = &musb_plat,
  120. },
  121. .num_resources = ARRAY_SIZE(musb_resources),
  122. .resource = musb_resources,
  123. };
  124. #endif
  125. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  126. static struct resource bf52x_t350mcqb_resources[] = {
  127. {
  128. .start = IRQ_PPI_ERROR,
  129. .end = IRQ_PPI_ERROR,
  130. .flags = IORESOURCE_IRQ,
  131. },
  132. };
  133. static struct platform_device bf52x_t350mcqb_device = {
  134. .name = "bfin-t350mcqb",
  135. .id = -1,
  136. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  137. .resource = bf52x_t350mcqb_resources,
  138. };
  139. #endif
  140. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  141. #include <asm/bfin-lq035q1.h>
  142. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  143. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  144. .ppi_mode = USE_RGB565_8_BIT_PPI,
  145. };
  146. static struct resource bfin_lq035q1_resources[] = {
  147. {
  148. .start = IRQ_PPI_ERROR,
  149. .end = IRQ_PPI_ERROR,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. };
  153. static struct platform_device bfin_lq035q1_device = {
  154. .name = "bfin-lq035q1",
  155. .id = -1,
  156. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  157. .resource = bfin_lq035q1_resources,
  158. .dev = {
  159. .platform_data = &bfin_lq035q1_data,
  160. },
  161. };
  162. #endif
  163. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  164. static struct mtd_partition ezkit_partitions[] = {
  165. {
  166. .name = "bootloader(nor)",
  167. .size = 0x40000,
  168. .offset = 0,
  169. }, {
  170. .name = "linux kernel(nor)",
  171. .size = 0x1C0000,
  172. .offset = MTDPART_OFS_APPEND,
  173. }, {
  174. .name = "file system(nor)",
  175. .size = MTDPART_SIZ_FULL,
  176. .offset = MTDPART_OFS_APPEND,
  177. }
  178. };
  179. static struct physmap_flash_data ezkit_flash_data = {
  180. .width = 2,
  181. .parts = ezkit_partitions,
  182. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  183. };
  184. static struct resource ezkit_flash_resource = {
  185. .start = 0x20000000,
  186. .end = 0x203fffff,
  187. .flags = IORESOURCE_MEM,
  188. };
  189. static struct platform_device ezkit_flash_device = {
  190. .name = "physmap-flash",
  191. .id = 0,
  192. .dev = {
  193. .platform_data = &ezkit_flash_data,
  194. },
  195. .num_resources = 1,
  196. .resource = &ezkit_flash_resource,
  197. };
  198. #endif
  199. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  200. static struct mtd_partition partition_info[] = {
  201. {
  202. .name = "linux kernel(nand)",
  203. .offset = 0,
  204. .size = 4 * 1024 * 1024,
  205. },
  206. {
  207. .name = "file system(nand)",
  208. .offset = MTDPART_OFS_APPEND,
  209. .size = MTDPART_SIZ_FULL,
  210. },
  211. };
  212. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  213. .data_width = NFC_NWIDTH_8,
  214. .partitions = partition_info,
  215. .nr_partitions = ARRAY_SIZE(partition_info),
  216. .rd_dly = 3,
  217. .wr_dly = 3,
  218. };
  219. static struct resource bf5xx_nand_resources[] = {
  220. {
  221. .start = NFC_CTL,
  222. .end = NFC_DATA_RD + 2,
  223. .flags = IORESOURCE_MEM,
  224. },
  225. {
  226. .start = CH_NFC,
  227. .end = CH_NFC,
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. };
  231. static struct platform_device bf5xx_nand_device = {
  232. .name = "bf5xx-nand",
  233. .id = 0,
  234. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  235. .resource = bf5xx_nand_resources,
  236. .dev = {
  237. .platform_data = &bf5xx_nand_platform,
  238. },
  239. };
  240. #endif
  241. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  242. static struct resource bfin_pcmcia_cf_resources[] = {
  243. {
  244. .start = 0x20310000, /* IO PORT */
  245. .end = 0x20312000,
  246. .flags = IORESOURCE_MEM,
  247. }, {
  248. .start = 0x20311000, /* Attribute Memory */
  249. .end = 0x20311FFF,
  250. .flags = IORESOURCE_MEM,
  251. }, {
  252. .start = IRQ_PF4,
  253. .end = IRQ_PF4,
  254. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  255. }, {
  256. .start = 6, /* Card Detect PF6 */
  257. .end = 6,
  258. .flags = IORESOURCE_IRQ,
  259. },
  260. };
  261. static struct platform_device bfin_pcmcia_cf_device = {
  262. .name = "bfin_cf_pcmcia",
  263. .id = -1,
  264. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  265. .resource = bfin_pcmcia_cf_resources,
  266. };
  267. #endif
  268. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  269. static struct platform_device rtc_device = {
  270. .name = "rtc-bfin",
  271. .id = -1,
  272. };
  273. #endif
  274. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  275. #include <linux/smc91x.h>
  276. static struct smc91x_platdata smc91x_info = {
  277. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  278. .leda = RPC_LED_100_10,
  279. .ledb = RPC_LED_TX_RX,
  280. };
  281. static struct resource smc91x_resources[] = {
  282. {
  283. .name = "smc91x-regs",
  284. .start = 0x20300300,
  285. .end = 0x20300300 + 16,
  286. .flags = IORESOURCE_MEM,
  287. }, {
  288. .start = IRQ_PF7,
  289. .end = IRQ_PF7,
  290. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  291. },
  292. };
  293. static struct platform_device smc91x_device = {
  294. .name = "smc91x",
  295. .id = 0,
  296. .num_resources = ARRAY_SIZE(smc91x_resources),
  297. .resource = smc91x_resources,
  298. .dev = {
  299. .platform_data = &smc91x_info,
  300. },
  301. };
  302. #endif
  303. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  304. static struct resource dm9000_resources[] = {
  305. [0] = {
  306. .start = 0x203FB800,
  307. .end = 0x203FB800 + 1,
  308. .flags = IORESOURCE_MEM,
  309. },
  310. [1] = {
  311. .start = 0x203FB800 + 4,
  312. .end = 0x203FB800 + 5,
  313. .flags = IORESOURCE_MEM,
  314. },
  315. [2] = {
  316. .start = IRQ_PF9,
  317. .end = IRQ_PF9,
  318. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  319. },
  320. };
  321. static struct platform_device dm9000_device = {
  322. .name = "dm9000",
  323. .id = -1,
  324. .num_resources = ARRAY_SIZE(dm9000_resources),
  325. .resource = dm9000_resources,
  326. };
  327. #endif
  328. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  329. static struct platform_device bfin_mii_bus = {
  330. .name = "bfin_mii_bus",
  331. };
  332. static struct platform_device bfin_mac_device = {
  333. .name = "bfin_mac",
  334. .dev.platform_data = &bfin_mii_bus,
  335. };
  336. #endif
  337. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  338. static struct resource net2272_bfin_resources[] = {
  339. {
  340. .start = 0x20300000,
  341. .end = 0x20300000 + 0x100,
  342. .flags = IORESOURCE_MEM,
  343. }, {
  344. .start = IRQ_PF7,
  345. .end = IRQ_PF7,
  346. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  347. },
  348. };
  349. static struct platform_device net2272_bfin_device = {
  350. .name = "net2272",
  351. .id = -1,
  352. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  353. .resource = net2272_bfin_resources,
  354. };
  355. #endif
  356. #if defined(CONFIG_MTD_M25P80) \
  357. || defined(CONFIG_MTD_M25P80_MODULE)
  358. static struct mtd_partition bfin_spi_flash_partitions[] = {
  359. {
  360. .name = "bootloader(spi)",
  361. .size = 0x00040000,
  362. .offset = 0,
  363. .mask_flags = MTD_CAP_ROM
  364. }, {
  365. .name = "linux kernel(spi)",
  366. .size = MTDPART_SIZ_FULL,
  367. .offset = MTDPART_OFS_APPEND,
  368. }
  369. };
  370. static struct flash_platform_data bfin_spi_flash_data = {
  371. .name = "m25p80",
  372. .parts = bfin_spi_flash_partitions,
  373. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  374. .type = "m25p16",
  375. };
  376. /* SPI flash chip (m25p64) */
  377. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  378. .enable_dma = 0, /* use dma transfer with this chip*/
  379. .bits_per_word = 8,
  380. };
  381. #endif
  382. #if defined(CONFIG_BFIN_SPI_ADC) \
  383. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  384. /* SPI ADC chip */
  385. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  386. .enable_dma = 1, /* use dma transfer with this chip*/
  387. .bits_per_word = 16,
  388. };
  389. #endif
  390. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  391. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  392. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  393. .enable_dma = 0,
  394. .bits_per_word = 16,
  395. };
  396. #endif
  397. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  398. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  399. .enable_dma = 0,
  400. .bits_per_word = 8,
  401. };
  402. #endif
  403. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  404. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  405. .enable_dma = 0,
  406. .bits_per_word = 16,
  407. };
  408. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  409. .model = 7877,
  410. .vref_delay_usecs = 50, /* internal, no capacitor */
  411. .x_plate_ohms = 419,
  412. .y_plate_ohms = 486,
  413. .pressure_max = 1000,
  414. .pressure_min = 0,
  415. .stopacq_polarity = 1,
  416. .first_conversion_delay = 3,
  417. .acquisition_time = 1,
  418. .averaging = 1,
  419. .pen_down_acc_interval = 1,
  420. };
  421. #endif
  422. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  423. #include <linux/spi/ad7879.h>
  424. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  425. .model = 7879, /* Model = AD7879 */
  426. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  427. .pressure_max = 10000,
  428. .pressure_min = 0,
  429. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  430. .acquisition_time = 1, /* 4us acquisition time per sample */
  431. .median = 2, /* do 8 measurements */
  432. .averaging = 1, /* take the average of 4 middle samples */
  433. .pen_down_acc_interval = 255, /* 9.4 ms */
  434. .gpio_export = 0, /* Export GPIO to gpiolib */
  435. };
  436. #endif
  437. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  438. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  439. .enable_dma = 0,
  440. .bits_per_word = 16,
  441. };
  442. #endif
  443. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  444. static struct bfin5xx_spi_chip spidev_chip_info = {
  445. .enable_dma = 0,
  446. .bits_per_word = 8,
  447. };
  448. #endif
  449. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  450. static struct platform_device bfin_i2s = {
  451. .name = "bfin-i2s",
  452. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  453. /* TODO: add platform data here */
  454. };
  455. #endif
  456. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  457. static struct platform_device bfin_tdm = {
  458. .name = "bfin-tdm",
  459. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  460. /* TODO: add platform data here */
  461. };
  462. #endif
  463. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  464. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  465. .enable_dma = 0,
  466. .bits_per_word = 8,
  467. };
  468. #endif
  469. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  470. #if defined(CONFIG_MTD_M25P80) \
  471. || defined(CONFIG_MTD_M25P80_MODULE)
  472. {
  473. /* the modalias must be the same as spi device driver name */
  474. .modalias = "m25p80", /* Name of spi_driver for this device */
  475. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  476. .bus_num = 0, /* Framework bus number */
  477. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  478. .platform_data = &bfin_spi_flash_data,
  479. .controller_data = &spi_flash_chip_info,
  480. .mode = SPI_MODE_3,
  481. },
  482. #endif
  483. #if defined(CONFIG_BFIN_SPI_ADC) \
  484. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  485. {
  486. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  487. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  488. .bus_num = 0, /* Framework bus number */
  489. .chip_select = 1, /* Framework chip select. */
  490. .platform_data = NULL, /* No spi_driver specific config */
  491. .controller_data = &spi_adc_chip_info,
  492. },
  493. #endif
  494. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  495. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  496. {
  497. .modalias = "ad1836",
  498. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  499. .bus_num = 0,
  500. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  501. .controller_data = &ad1836_spi_chip_info,
  502. },
  503. #endif
  504. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  505. {
  506. .modalias = "mmc_spi",
  507. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  508. .bus_num = 0,
  509. .chip_select = 3,
  510. .controller_data = &mmc_spi_chip_info,
  511. .mode = SPI_MODE_0,
  512. },
  513. #endif
  514. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  515. {
  516. .modalias = "ad7877",
  517. .platform_data = &bfin_ad7877_ts_info,
  518. .irq = IRQ_PF8,
  519. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  520. .bus_num = 0,
  521. .chip_select = 2,
  522. .controller_data = &spi_ad7877_chip_info,
  523. },
  524. #endif
  525. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  526. {
  527. .modalias = "ad7879",
  528. .platform_data = &bfin_ad7879_ts_info,
  529. .irq = IRQ_PF8,
  530. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  531. .bus_num = 0,
  532. .chip_select = 3,
  533. .controller_data = &spi_ad7879_chip_info,
  534. .mode = SPI_CPHA | SPI_CPOL,
  535. },
  536. #endif
  537. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  538. {
  539. .modalias = "spidev",
  540. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  541. .bus_num = 0,
  542. .chip_select = 1,
  543. .controller_data = &spidev_chip_info,
  544. },
  545. #endif
  546. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  547. {
  548. .modalias = "bfin-lq035q1-spi",
  549. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  550. .bus_num = 0,
  551. .chip_select = 7,
  552. .controller_data = &lq035q1_spi_chip_info,
  553. .mode = SPI_CPHA | SPI_CPOL,
  554. },
  555. #endif
  556. };
  557. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  558. /* SPI controller data */
  559. static struct bfin5xx_spi_master bfin_spi0_info = {
  560. .num_chipselect = 8,
  561. .enable_dma = 1, /* master has the ability to do dma transfer */
  562. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  563. };
  564. /* SPI (0) */
  565. static struct resource bfin_spi0_resource[] = {
  566. [0] = {
  567. .start = SPI0_REGBASE,
  568. .end = SPI0_REGBASE + 0xFF,
  569. .flags = IORESOURCE_MEM,
  570. },
  571. [1] = {
  572. .start = CH_SPI,
  573. .end = CH_SPI,
  574. .flags = IORESOURCE_DMA,
  575. },
  576. [2] = {
  577. .start = IRQ_SPI,
  578. .end = IRQ_SPI,
  579. .flags = IORESOURCE_IRQ,
  580. },
  581. };
  582. static struct platform_device bfin_spi0_device = {
  583. .name = "bfin-spi",
  584. .id = 0, /* Bus number */
  585. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  586. .resource = bfin_spi0_resource,
  587. .dev = {
  588. .platform_data = &bfin_spi0_info, /* Passed to driver */
  589. },
  590. };
  591. #endif /* spi master and devices */
  592. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  593. #ifdef CONFIG_SERIAL_BFIN_UART0
  594. static struct resource bfin_uart0_resources[] = {
  595. {
  596. .start = UART0_THR,
  597. .end = UART0_GCTL+2,
  598. .flags = IORESOURCE_MEM,
  599. },
  600. {
  601. .start = IRQ_UART0_RX,
  602. .end = IRQ_UART0_RX+1,
  603. .flags = IORESOURCE_IRQ,
  604. },
  605. {
  606. .start = IRQ_UART0_ERROR,
  607. .end = IRQ_UART0_ERROR,
  608. .flags = IORESOURCE_IRQ,
  609. },
  610. {
  611. .start = CH_UART0_TX,
  612. .end = CH_UART0_TX,
  613. .flags = IORESOURCE_DMA,
  614. },
  615. {
  616. .start = CH_UART0_RX,
  617. .end = CH_UART0_RX,
  618. .flags = IORESOURCE_DMA,
  619. },
  620. };
  621. unsigned short bfin_uart0_peripherals[] = {
  622. P_UART0_TX, P_UART0_RX, 0
  623. };
  624. static struct platform_device bfin_uart0_device = {
  625. .name = "bfin-uart",
  626. .id = 0,
  627. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  628. .resource = bfin_uart0_resources,
  629. .dev = {
  630. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  631. },
  632. };
  633. #endif
  634. #ifdef CONFIG_SERIAL_BFIN_UART1
  635. static struct resource bfin_uart1_resources[] = {
  636. {
  637. .start = UART1_THR,
  638. .end = UART1_GCTL+2,
  639. .flags = IORESOURCE_MEM,
  640. },
  641. {
  642. .start = IRQ_UART1_RX,
  643. .end = IRQ_UART1_RX+1,
  644. .flags = IORESOURCE_IRQ,
  645. },
  646. {
  647. .start = IRQ_UART1_ERROR,
  648. .end = IRQ_UART1_ERROR,
  649. .flags = IORESOURCE_IRQ,
  650. },
  651. {
  652. .start = CH_UART1_TX,
  653. .end = CH_UART1_TX,
  654. .flags = IORESOURCE_DMA,
  655. },
  656. {
  657. .start = CH_UART1_RX,
  658. .end = CH_UART1_RX,
  659. .flags = IORESOURCE_DMA,
  660. },
  661. #ifdef CONFIG_BFIN_UART1_CTSRTS
  662. { /* CTS pin */
  663. .start = GPIO_PF9,
  664. .end = GPIO_PF9,
  665. .flags = IORESOURCE_IO,
  666. },
  667. { /* RTS pin */
  668. .start = GPIO_PF10,
  669. .end = GPIO_PF10,
  670. .flags = IORESOURCE_IO,
  671. },
  672. #endif
  673. };
  674. unsigned short bfin_uart1_peripherals[] = {
  675. P_UART1_TX, P_UART1_RX, 0
  676. };
  677. static struct platform_device bfin_uart1_device = {
  678. .name = "bfin-uart",
  679. .id = 1,
  680. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  681. .resource = bfin_uart1_resources,
  682. .dev = {
  683. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  684. },
  685. };
  686. #endif
  687. #endif
  688. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  689. #ifdef CONFIG_BFIN_SIR0
  690. static struct resource bfin_sir0_resources[] = {
  691. {
  692. .start = 0xFFC00400,
  693. .end = 0xFFC004FF,
  694. .flags = IORESOURCE_MEM,
  695. },
  696. {
  697. .start = IRQ_UART0_RX,
  698. .end = IRQ_UART0_RX+1,
  699. .flags = IORESOURCE_IRQ,
  700. },
  701. {
  702. .start = CH_UART0_RX,
  703. .end = CH_UART0_RX+1,
  704. .flags = IORESOURCE_DMA,
  705. },
  706. };
  707. static struct platform_device bfin_sir0_device = {
  708. .name = "bfin_sir",
  709. .id = 0,
  710. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  711. .resource = bfin_sir0_resources,
  712. };
  713. #endif
  714. #ifdef CONFIG_BFIN_SIR1
  715. static struct resource bfin_sir1_resources[] = {
  716. {
  717. .start = 0xFFC02000,
  718. .end = 0xFFC020FF,
  719. .flags = IORESOURCE_MEM,
  720. },
  721. {
  722. .start = IRQ_UART1_RX,
  723. .end = IRQ_UART1_RX+1,
  724. .flags = IORESOURCE_IRQ,
  725. },
  726. {
  727. .start = CH_UART1_RX,
  728. .end = CH_UART1_RX+1,
  729. .flags = IORESOURCE_DMA,
  730. },
  731. };
  732. static struct platform_device bfin_sir1_device = {
  733. .name = "bfin_sir",
  734. .id = 1,
  735. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  736. .resource = bfin_sir1_resources,
  737. };
  738. #endif
  739. #endif
  740. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  741. static struct resource bfin_twi0_resource[] = {
  742. [0] = {
  743. .start = TWI0_REGBASE,
  744. .end = TWI0_REGBASE,
  745. .flags = IORESOURCE_MEM,
  746. },
  747. [1] = {
  748. .start = IRQ_TWI,
  749. .end = IRQ_TWI,
  750. .flags = IORESOURCE_IRQ,
  751. },
  752. };
  753. static struct platform_device i2c_bfin_twi_device = {
  754. .name = "i2c-bfin-twi",
  755. .id = 0,
  756. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  757. .resource = bfin_twi0_resource,
  758. };
  759. #endif
  760. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  761. #include <linux/mfd/adp5520.h>
  762. /*
  763. * ADP5520/5501 LEDs Data
  764. */
  765. static struct led_info adp5520_leds[] = {
  766. {
  767. .name = "adp5520-led1",
  768. .default_trigger = "none",
  769. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  770. },
  771. };
  772. static struct adp5520_leds_platform_data adp5520_leds_data = {
  773. .num_leds = ARRAY_SIZE(adp5520_leds),
  774. .leds = adp5520_leds,
  775. .fade_in = ADP5520_FADE_T_600ms,
  776. .fade_out = ADP5520_FADE_T_600ms,
  777. .led_on_time = ADP5520_LED_ONT_600ms,
  778. };
  779. /*
  780. * ADP5520 Keypad Data
  781. */
  782. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  783. [ADP5520_KEY(3, 3)] = KEY_1,
  784. [ADP5520_KEY(2, 3)] = KEY_2,
  785. [ADP5520_KEY(1, 3)] = KEY_3,
  786. [ADP5520_KEY(0, 3)] = KEY_UP,
  787. [ADP5520_KEY(3, 2)] = KEY_4,
  788. [ADP5520_KEY(2, 2)] = KEY_5,
  789. [ADP5520_KEY(1, 2)] = KEY_6,
  790. [ADP5520_KEY(0, 2)] = KEY_DOWN,
  791. [ADP5520_KEY(3, 1)] = KEY_7,
  792. [ADP5520_KEY(2, 1)] = KEY_8,
  793. [ADP5520_KEY(1, 1)] = KEY_9,
  794. [ADP5520_KEY(0, 1)] = KEY_DOT,
  795. [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
  796. [ADP5520_KEY(2, 0)] = KEY_0,
  797. [ADP5520_KEY(1, 0)] = KEY_HELP,
  798. [ADP5520_KEY(0, 0)] = KEY_ENTER,
  799. };
  800. static struct adp5520_keys_platform_data adp5520_keys_data = {
  801. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  802. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  803. .keymap = adp5520_keymap,
  804. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  805. .repeat = 0,
  806. };
  807. /*
  808. * ADP5520/5501 Multifuction Device Init Data
  809. */
  810. static struct adp5520_platform_data adp5520_pdev_data = {
  811. .leds = &adp5520_leds_data,
  812. .keys = &adp5520_keys_data,
  813. };
  814. #endif
  815. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  816. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  817. {
  818. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  819. },
  820. #endif
  821. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  822. {
  823. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  824. .irq = IRQ_PF8,
  825. },
  826. #endif
  827. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  828. {
  829. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  830. },
  831. #endif
  832. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  833. {
  834. I2C_BOARD_INFO("ad7879", 0x2C),
  835. .irq = IRQ_PF8,
  836. .platform_data = (void *)&bfin_ad7879_ts_info,
  837. },
  838. #endif
  839. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  840. {
  841. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  842. .irq = IRQ_PF9,
  843. .platform_data = (void *)&adp5520_pdev_data,
  844. },
  845. #endif
  846. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  847. {
  848. I2C_BOARD_INFO("ssm2602", 0x1b),
  849. },
  850. #endif
  851. };
  852. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  853. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  854. static struct resource bfin_sport0_uart_resources[] = {
  855. {
  856. .start = SPORT0_TCR1,
  857. .end = SPORT0_MRCS3+4,
  858. .flags = IORESOURCE_MEM,
  859. },
  860. {
  861. .start = IRQ_SPORT0_RX,
  862. .end = IRQ_SPORT0_RX+1,
  863. .flags = IORESOURCE_IRQ,
  864. },
  865. {
  866. .start = IRQ_SPORT0_ERROR,
  867. .end = IRQ_SPORT0_ERROR,
  868. .flags = IORESOURCE_IRQ,
  869. },
  870. };
  871. unsigned short bfin_sport0_peripherals[] = {
  872. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  873. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  874. };
  875. static struct platform_device bfin_sport0_uart_device = {
  876. .name = "bfin-sport-uart",
  877. .id = 0,
  878. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  879. .resource = bfin_sport0_uart_resources,
  880. .dev = {
  881. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  882. },
  883. };
  884. #endif
  885. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  886. static struct resource bfin_sport1_uart_resources[] = {
  887. {
  888. .start = SPORT1_TCR1,
  889. .end = SPORT1_MRCS3+4,
  890. .flags = IORESOURCE_MEM,
  891. },
  892. {
  893. .start = IRQ_SPORT1_RX,
  894. .end = IRQ_SPORT1_RX+1,
  895. .flags = IORESOURCE_IRQ,
  896. },
  897. {
  898. .start = IRQ_SPORT1_ERROR,
  899. .end = IRQ_SPORT1_ERROR,
  900. .flags = IORESOURCE_IRQ,
  901. },
  902. };
  903. unsigned short bfin_sport1_peripherals[] = {
  904. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  905. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  906. };
  907. static struct platform_device bfin_sport1_uart_device = {
  908. .name = "bfin-sport-uart",
  909. .id = 1,
  910. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  911. .resource = bfin_sport1_uart_resources,
  912. .dev = {
  913. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  914. },
  915. };
  916. #endif
  917. #endif
  918. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  919. #include <linux/gpio_keys.h>
  920. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  921. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  922. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  923. };
  924. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  925. .buttons = bfin_gpio_keys_table,
  926. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  927. };
  928. static struct platform_device bfin_device_gpiokeys = {
  929. .name = "gpio-keys",
  930. .dev = {
  931. .platform_data = &bfin_gpio_keys_data,
  932. },
  933. };
  934. #endif
  935. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  936. #include <asm/bfin_rotary.h>
  937. static struct bfin_rotary_platform_data bfin_rotary_data = {
  938. /*.rotary_up_key = KEY_UP,*/
  939. /*.rotary_down_key = KEY_DOWN,*/
  940. .rotary_rel_code = REL_WHEEL,
  941. .rotary_button_key = KEY_ENTER,
  942. .debounce = 10, /* 0..17 */
  943. .mode = ROT_QUAD_ENC | ROT_DEBE,
  944. };
  945. static struct resource bfin_rotary_resources[] = {
  946. {
  947. .start = IRQ_CNT,
  948. .end = IRQ_CNT,
  949. .flags = IORESOURCE_IRQ,
  950. },
  951. };
  952. static struct platform_device bfin_rotary_device = {
  953. .name = "bfin-rotary",
  954. .id = -1,
  955. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  956. .resource = bfin_rotary_resources,
  957. .dev = {
  958. .platform_data = &bfin_rotary_data,
  959. },
  960. };
  961. #endif
  962. static const unsigned int cclk_vlev_datasheet[] =
  963. {
  964. VRPAIR(VLEV_100, 400000000),
  965. VRPAIR(VLEV_105, 426000000),
  966. VRPAIR(VLEV_110, 500000000),
  967. VRPAIR(VLEV_115, 533000000),
  968. VRPAIR(VLEV_120, 600000000),
  969. };
  970. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  971. .tuple_tab = cclk_vlev_datasheet,
  972. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  973. .vr_settling_time = 25 /* us */,
  974. };
  975. static struct platform_device bfin_dpmc = {
  976. .name = "bfin dpmc",
  977. .dev = {
  978. .platform_data = &bfin_dmpc_vreg_data,
  979. },
  980. };
  981. static struct platform_device *stamp_devices[] __initdata = {
  982. &bfin_dpmc,
  983. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  984. &bf5xx_nand_device,
  985. #endif
  986. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  987. &bfin_pcmcia_cf_device,
  988. #endif
  989. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  990. &rtc_device,
  991. #endif
  992. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  993. &bfin_isp1760_device,
  994. #endif
  995. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  996. &musb_device,
  997. #endif
  998. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  999. &smc91x_device,
  1000. #endif
  1001. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  1002. &dm9000_device,
  1003. #endif
  1004. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  1005. &bfin_mii_bus,
  1006. &bfin_mac_device,
  1007. #endif
  1008. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1009. &net2272_bfin_device,
  1010. #endif
  1011. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1012. &bfin_spi0_device,
  1013. #endif
  1014. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  1015. &bf52x_t350mcqb_device,
  1016. #endif
  1017. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1018. &bfin_lq035q1_device,
  1019. #endif
  1020. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1021. #ifdef CONFIG_SERIAL_BFIN_UART0
  1022. &bfin_uart0_device,
  1023. #endif
  1024. #ifdef CONFIG_SERIAL_BFIN_UART1
  1025. &bfin_uart1_device,
  1026. #endif
  1027. #endif
  1028. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1029. #ifdef CONFIG_BFIN_SIR0
  1030. &bfin_sir0_device,
  1031. #endif
  1032. #ifdef CONFIG_BFIN_SIR1
  1033. &bfin_sir1_device,
  1034. #endif
  1035. #endif
  1036. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1037. &i2c_bfin_twi_device,
  1038. #endif
  1039. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1040. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1041. &bfin_sport0_uart_device,
  1042. #endif
  1043. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1044. &bfin_sport1_uart_device,
  1045. #endif
  1046. #endif
  1047. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1048. &bfin_device_gpiokeys,
  1049. #endif
  1050. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1051. &bfin_rotary_device,
  1052. #endif
  1053. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1054. &ezkit_flash_device,
  1055. #endif
  1056. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1057. &bfin_i2s,
  1058. #endif
  1059. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1060. &bfin_tdm,
  1061. #endif
  1062. };
  1063. static int __init ezkit_init(void)
  1064. {
  1065. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1066. i2c_register_board_info(0, bfin_i2c_board_info,
  1067. ARRAY_SIZE(bfin_i2c_board_info));
  1068. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1069. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1070. return 0;
  1071. }
  1072. arch_initcall(ezkit_init);
  1073. static struct platform_device *ezkit_early_devices[] __initdata = {
  1074. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1075. #ifdef CONFIG_SERIAL_BFIN_UART0
  1076. &bfin_uart0_device,
  1077. #endif
  1078. #ifdef CONFIG_SERIAL_BFIN_UART1
  1079. &bfin_uart1_device,
  1080. #endif
  1081. #endif
  1082. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1083. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1084. &bfin_sport0_uart_device,
  1085. #endif
  1086. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1087. &bfin_sport1_uart_device,
  1088. #endif
  1089. #endif
  1090. };
  1091. void __init native_machine_early_platform_add_devices(void)
  1092. {
  1093. printk(KERN_INFO "register early platform devices\n");
  1094. early_platform_add_devices(ezkit_early_devices,
  1095. ARRAY_SIZE(ezkit_early_devices));
  1096. }
  1097. void native_machine_restart(char *cmd)
  1098. {
  1099. /* workaround reboot hang when booting from SPI */
  1100. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1101. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1102. }
  1103. void bfin_get_ether_addr(char *addr)
  1104. {
  1105. /* the MAC is stored in OTP memory page 0xDF */
  1106. u32 ret;
  1107. u64 otp_mac;
  1108. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  1109. ret = otp_read(0xDF, 0x00, &otp_mac);
  1110. if (!(ret & 0x1)) {
  1111. char *otp_mac_p = (char *)&otp_mac;
  1112. for (ret = 0; ret < 6; ++ret)
  1113. addr[ret] = otp_mac_p[5 - ret];
  1114. }
  1115. }
  1116. EXPORT_SYMBOL(bfin_get_ether_addr);