vfpmodule.c 14 KB

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  1. /*
  2. * linux/arch/arm/vfp/vfpmodule.c
  3. *
  4. * Copyright (C) 2004 ARM Limited.
  5. * Written by Deep Blue Solutions Limited.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/types.h>
  13. #include <linux/kernel.h>
  14. #include <linux/signal.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <asm/cputype.h>
  18. #include <asm/thread_notify.h>
  19. #include <asm/vfp.h>
  20. #include "vfpinstr.h"
  21. #include "vfp.h"
  22. /*
  23. * Our undef handlers (in entry.S)
  24. */
  25. void vfp_testing_entry(void);
  26. void vfp_support_entry(void);
  27. void vfp_null_entry(void);
  28. void (*vfp_vector)(void) = vfp_null_entry;
  29. union vfp_state *last_VFP_context[NR_CPUS];
  30. /*
  31. * Dual-use variable.
  32. * Used in startup: set to non-zero if VFP checks fail
  33. * After startup, holds VFP architecture
  34. */
  35. unsigned int VFP_arch;
  36. /*
  37. * Per-thread VFP initialization.
  38. */
  39. static void vfp_thread_flush(struct thread_info *thread)
  40. {
  41. union vfp_state *vfp = &thread->vfpstate;
  42. unsigned int cpu;
  43. memset(vfp, 0, sizeof(union vfp_state));
  44. vfp->hard.fpexc = FPEXC_EN;
  45. vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
  46. /*
  47. * Disable VFP to ensure we initialize it first. We must ensure
  48. * that the modification of last_VFP_context[] and hardware disable
  49. * are done for the same CPU and without preemption.
  50. */
  51. cpu = get_cpu();
  52. if (last_VFP_context[cpu] == vfp)
  53. last_VFP_context[cpu] = NULL;
  54. fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
  55. put_cpu();
  56. }
  57. static void vfp_thread_exit(struct thread_info *thread)
  58. {
  59. /* release case: Per-thread VFP cleanup. */
  60. union vfp_state *vfp = &thread->vfpstate;
  61. unsigned int cpu = get_cpu();
  62. if (last_VFP_context[cpu] == vfp)
  63. last_VFP_context[cpu] = NULL;
  64. put_cpu();
  65. }
  66. /*
  67. * When this function is called with the following 'cmd's, the following
  68. * is true while this function is being run:
  69. * THREAD_NOFTIFY_SWTICH:
  70. * - the previously running thread will not be scheduled onto another CPU.
  71. * - the next thread to be run (v) will not be running on another CPU.
  72. * - thread->cpu is the local CPU number
  73. * - not preemptible as we're called in the middle of a thread switch
  74. * THREAD_NOTIFY_FLUSH:
  75. * - the thread (v) will be running on the local CPU, so
  76. * v === current_thread_info()
  77. * - thread->cpu is the local CPU number at the time it is accessed,
  78. * but may change at any time.
  79. * - we could be preempted if tree preempt rcu is enabled, so
  80. * it is unsafe to use thread->cpu.
  81. * THREAD_NOTIFY_EXIT
  82. * - the thread (v) will be running on the local CPU, so
  83. * v === current_thread_info()
  84. * - thread->cpu is the local CPU number at the time it is accessed,
  85. * but may change at any time.
  86. * - we could be preempted if tree preempt rcu is enabled, so
  87. * it is unsafe to use thread->cpu.
  88. */
  89. static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
  90. {
  91. struct thread_info *thread = v;
  92. if (likely(cmd == THREAD_NOTIFY_SWITCH)) {
  93. u32 fpexc = fmrx(FPEXC);
  94. #ifdef CONFIG_SMP
  95. unsigned int cpu = thread->cpu;
  96. /*
  97. * On SMP, if VFP is enabled, save the old state in
  98. * case the thread migrates to a different CPU. The
  99. * restoring is done lazily.
  100. */
  101. if ((fpexc & FPEXC_EN) && last_VFP_context[cpu]) {
  102. vfp_save_state(last_VFP_context[cpu], fpexc);
  103. last_VFP_context[cpu]->hard.cpu = cpu;
  104. }
  105. /*
  106. * Thread migration, just force the reloading of the
  107. * state on the new CPU in case the VFP registers
  108. * contain stale data.
  109. */
  110. if (thread->vfpstate.hard.cpu != cpu)
  111. last_VFP_context[cpu] = NULL;
  112. #endif
  113. /*
  114. * Always disable VFP so we can lazily save/restore the
  115. * old state.
  116. */
  117. fmxr(FPEXC, fpexc & ~FPEXC_EN);
  118. return NOTIFY_DONE;
  119. }
  120. if (cmd == THREAD_NOTIFY_FLUSH)
  121. vfp_thread_flush(thread);
  122. else
  123. vfp_thread_exit(thread);
  124. return NOTIFY_DONE;
  125. }
  126. static struct notifier_block vfp_notifier_block = {
  127. .notifier_call = vfp_notifier,
  128. };
  129. /*
  130. * Raise a SIGFPE for the current process.
  131. * sicode describes the signal being raised.
  132. */
  133. void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
  134. {
  135. siginfo_t info;
  136. memset(&info, 0, sizeof(info));
  137. info.si_signo = SIGFPE;
  138. info.si_code = sicode;
  139. info.si_addr = (void __user *)(instruction_pointer(regs) - 4);
  140. /*
  141. * This is the same as NWFPE, because it's not clear what
  142. * this is used for
  143. */
  144. current->thread.error_code = 0;
  145. current->thread.trap_no = 6;
  146. send_sig_info(SIGFPE, &info, current);
  147. }
  148. static void vfp_panic(char *reason, u32 inst)
  149. {
  150. int i;
  151. printk(KERN_ERR "VFP: Error: %s\n", reason);
  152. printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
  153. fmrx(FPEXC), fmrx(FPSCR), inst);
  154. for (i = 0; i < 32; i += 2)
  155. printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
  156. i, vfp_get_float(i), i+1, vfp_get_float(i+1));
  157. }
  158. /*
  159. * Process bitmask of exception conditions.
  160. */
  161. static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
  162. {
  163. int si_code = 0;
  164. pr_debug("VFP: raising exceptions %08x\n", exceptions);
  165. if (exceptions == VFP_EXCEPTION_ERROR) {
  166. vfp_panic("unhandled bounce", inst);
  167. vfp_raise_sigfpe(0, regs);
  168. return;
  169. }
  170. /*
  171. * If any of the status flags are set, update the FPSCR.
  172. * Comparison instructions always return at least one of
  173. * these flags set.
  174. */
  175. if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
  176. fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
  177. fpscr |= exceptions;
  178. fmxr(FPSCR, fpscr);
  179. #define RAISE(stat,en,sig) \
  180. if (exceptions & stat && fpscr & en) \
  181. si_code = sig;
  182. /*
  183. * These are arranged in priority order, least to highest.
  184. */
  185. RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
  186. RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
  187. RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
  188. RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
  189. RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
  190. if (si_code)
  191. vfp_raise_sigfpe(si_code, regs);
  192. }
  193. /*
  194. * Emulate a VFP instruction.
  195. */
  196. static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
  197. {
  198. u32 exceptions = VFP_EXCEPTION_ERROR;
  199. pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
  200. if (INST_CPRTDO(inst)) {
  201. if (!INST_CPRT(inst)) {
  202. /*
  203. * CPDO
  204. */
  205. if (vfp_single(inst)) {
  206. exceptions = vfp_single_cpdo(inst, fpscr);
  207. } else {
  208. exceptions = vfp_double_cpdo(inst, fpscr);
  209. }
  210. } else {
  211. /*
  212. * A CPRT instruction can not appear in FPINST2, nor
  213. * can it cause an exception. Therefore, we do not
  214. * have to emulate it.
  215. */
  216. }
  217. } else {
  218. /*
  219. * A CPDT instruction can not appear in FPINST2, nor can
  220. * it cause an exception. Therefore, we do not have to
  221. * emulate it.
  222. */
  223. }
  224. return exceptions & ~VFP_NAN_FLAG;
  225. }
  226. /*
  227. * Package up a bounce condition.
  228. */
  229. void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
  230. {
  231. u32 fpscr, orig_fpscr, fpsid, exceptions;
  232. pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
  233. /*
  234. * At this point, FPEXC can have the following configuration:
  235. *
  236. * EX DEX IXE
  237. * 0 1 x - synchronous exception
  238. * 1 x 0 - asynchronous exception
  239. * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later
  240. * 0 0 1 - synchronous on VFP9 (non-standard subarch 1
  241. * implementation), undefined otherwise
  242. *
  243. * Clear various bits and enable access to the VFP so we can
  244. * handle the bounce.
  245. */
  246. fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
  247. fpsid = fmrx(FPSID);
  248. orig_fpscr = fpscr = fmrx(FPSCR);
  249. /*
  250. * Check for the special VFP subarch 1 and FPSCR.IXE bit case
  251. */
  252. if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
  253. && (fpscr & FPSCR_IXE)) {
  254. /*
  255. * Synchronous exception, emulate the trigger instruction
  256. */
  257. goto emulate;
  258. }
  259. if (fpexc & FPEXC_EX) {
  260. #ifndef CONFIG_CPU_FEROCEON
  261. /*
  262. * Asynchronous exception. The instruction is read from FPINST
  263. * and the interrupted instruction has to be restarted.
  264. */
  265. trigger = fmrx(FPINST);
  266. regs->ARM_pc -= 4;
  267. #endif
  268. } else if (!(fpexc & FPEXC_DEX)) {
  269. /*
  270. * Illegal combination of bits. It can be caused by an
  271. * unallocated VFP instruction but with FPSCR.IXE set and not
  272. * on VFP subarch 1.
  273. */
  274. vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
  275. goto exit;
  276. }
  277. /*
  278. * Modify fpscr to indicate the number of iterations remaining.
  279. * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
  280. * whether FPEXC.VECITR or FPSCR.LEN is used.
  281. */
  282. if (fpexc & (FPEXC_EX | FPEXC_VV)) {
  283. u32 len;
  284. len = fpexc + (1 << FPEXC_LENGTH_BIT);
  285. fpscr &= ~FPSCR_LENGTH_MASK;
  286. fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
  287. }
  288. /*
  289. * Handle the first FP instruction. We used to take note of the
  290. * FPEXC bounce reason, but this appears to be unreliable.
  291. * Emulate the bounced instruction instead.
  292. */
  293. exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
  294. if (exceptions)
  295. vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
  296. /*
  297. * If there isn't a second FP instruction, exit now. Note that
  298. * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
  299. */
  300. if (fpexc ^ (FPEXC_EX | FPEXC_FP2V))
  301. goto exit;
  302. /*
  303. * The barrier() here prevents fpinst2 being read
  304. * before the condition above.
  305. */
  306. barrier();
  307. trigger = fmrx(FPINST2);
  308. emulate:
  309. exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
  310. if (exceptions)
  311. vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
  312. exit:
  313. preempt_enable();
  314. }
  315. static void vfp_enable(void *unused)
  316. {
  317. u32 access = get_copro_access();
  318. /*
  319. * Enable full access to VFP (cp10 and cp11)
  320. */
  321. set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
  322. }
  323. #ifdef CONFIG_PM
  324. #include <linux/sysdev.h>
  325. static int vfp_pm_suspend(struct sys_device *dev, pm_message_t state)
  326. {
  327. struct thread_info *ti = current_thread_info();
  328. u32 fpexc = fmrx(FPEXC);
  329. /* if vfp is on, then save state for resumption */
  330. if (fpexc & FPEXC_EN) {
  331. printk(KERN_DEBUG "%s: saving vfp state\n", __func__);
  332. vfp_save_state(&ti->vfpstate, fpexc);
  333. /* disable, just in case */
  334. fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
  335. }
  336. /* clear any information we had about last context state */
  337. memset(last_VFP_context, 0, sizeof(last_VFP_context));
  338. return 0;
  339. }
  340. static int vfp_pm_resume(struct sys_device *dev)
  341. {
  342. /* ensure we have access to the vfp */
  343. vfp_enable(NULL);
  344. /* and disable it to ensure the next usage restores the state */
  345. fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
  346. return 0;
  347. }
  348. static struct sysdev_class vfp_pm_sysclass = {
  349. .name = "vfp",
  350. .suspend = vfp_pm_suspend,
  351. .resume = vfp_pm_resume,
  352. };
  353. static struct sys_device vfp_pm_sysdev = {
  354. .cls = &vfp_pm_sysclass,
  355. };
  356. static void vfp_pm_init(void)
  357. {
  358. sysdev_class_register(&vfp_pm_sysclass);
  359. sysdev_register(&vfp_pm_sysdev);
  360. }
  361. #else
  362. static inline void vfp_pm_init(void) { }
  363. #endif /* CONFIG_PM */
  364. void vfp_sync_hwstate(struct thread_info *thread)
  365. {
  366. unsigned int cpu = get_cpu();
  367. /*
  368. * If the thread we're interested in is the current owner of the
  369. * hardware VFP state, then we need to save its state.
  370. */
  371. if (last_VFP_context[cpu] == &thread->vfpstate) {
  372. u32 fpexc = fmrx(FPEXC);
  373. /*
  374. * Save the last VFP state on this CPU.
  375. */
  376. fmxr(FPEXC, fpexc | FPEXC_EN);
  377. vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
  378. fmxr(FPEXC, fpexc);
  379. }
  380. put_cpu();
  381. }
  382. void vfp_flush_hwstate(struct thread_info *thread)
  383. {
  384. unsigned int cpu = get_cpu();
  385. /*
  386. * If the thread we're interested in is the current owner of the
  387. * hardware VFP state, then we need to save its state.
  388. */
  389. if (last_VFP_context[cpu] == &thread->vfpstate) {
  390. u32 fpexc = fmrx(FPEXC);
  391. fmxr(FPEXC, fpexc & ~FPEXC_EN);
  392. /*
  393. * Set the context to NULL to force a reload the next time
  394. * the thread uses the VFP.
  395. */
  396. last_VFP_context[cpu] = NULL;
  397. }
  398. #ifdef CONFIG_SMP
  399. /*
  400. * For SMP we still have to take care of the case where the thread
  401. * migrates to another CPU and then back to the original CPU on which
  402. * the last VFP user is still the same thread. Mark the thread VFP
  403. * state as belonging to a non-existent CPU so that the saved one will
  404. * be reloaded in the above case.
  405. */
  406. thread->vfpstate.hard.cpu = NR_CPUS;
  407. #endif
  408. put_cpu();
  409. }
  410. #include <linux/smp.h>
  411. /*
  412. * VFP support code initialisation.
  413. */
  414. static int __init vfp_init(void)
  415. {
  416. unsigned int vfpsid;
  417. unsigned int cpu_arch = cpu_architecture();
  418. if (cpu_arch >= CPU_ARCH_ARMv6)
  419. vfp_enable(NULL);
  420. /*
  421. * First check that there is a VFP that we can use.
  422. * The handler is already setup to just log calls, so
  423. * we just need to read the VFPSID register.
  424. */
  425. vfp_vector = vfp_testing_entry;
  426. barrier();
  427. vfpsid = fmrx(FPSID);
  428. barrier();
  429. vfp_vector = vfp_null_entry;
  430. printk(KERN_INFO "VFP support v0.3: ");
  431. if (VFP_arch)
  432. printk("not present\n");
  433. else if (vfpsid & FPSID_NODOUBLE) {
  434. printk("no double precision support\n");
  435. } else {
  436. smp_call_function(vfp_enable, NULL, 1);
  437. VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
  438. printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
  439. (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
  440. (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
  441. (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
  442. (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
  443. (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
  444. vfp_vector = vfp_support_entry;
  445. thread_register_notifier(&vfp_notifier_block);
  446. vfp_pm_init();
  447. /*
  448. * We detected VFP, and the support code is
  449. * in place; report VFP support to userspace.
  450. */
  451. elf_hwcap |= HWCAP_VFP;
  452. #ifdef CONFIG_VFPv3
  453. if (VFP_arch >= 2) {
  454. elf_hwcap |= HWCAP_VFPv3;
  455. /*
  456. * Check for VFPv3 D16. CPUs in this configuration
  457. * only have 16 x 64bit registers.
  458. */
  459. if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
  460. elf_hwcap |= HWCAP_VFPv3D16;
  461. }
  462. #endif
  463. #ifdef CONFIG_NEON
  464. /*
  465. * Check for the presence of the Advanced SIMD
  466. * load/store instructions, integer and single
  467. * precision floating point operations. Only check
  468. * for NEON if the hardware has the MVFR registers.
  469. */
  470. if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  471. if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
  472. elf_hwcap |= HWCAP_NEON;
  473. }
  474. #endif
  475. }
  476. return 0;
  477. }
  478. late_initcall(vfp_init);